part select in expressions.
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steve
parent
a0b9db8a88
commit
13cd13d9d5
58
elaborate.cc
58
elaborate.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: elaborate.cc,v 1.54 1999/07/13 04:08:26 steve Exp $"
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#ident "$Id: elaborate.cc,v 1.55 1999/07/17 03:08:31 steve Exp $"
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#endif
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/*
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@ -949,19 +949,62 @@ NetExpr*PEIdent::elaborate_expr(Design*des, const string&path) const
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// If the identifier names a signal (a register or wire)
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// then create a NetESignal node to handle it.
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if (NetNet*net = des->find_signal(path, text_)) {
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// If this is a part select of a signal, then make a new
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// temporary signal that is connected to just the
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// selected bits.
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if (lsb_) {
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assert(msb_);
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verinum*lsn = lsb_->eval_const(des, path);
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verinum*msn = msb_->eval_const(des, path);
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unsigned long lsv = lsn->as_ulong();
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unsigned long msv = msn->as_ulong();
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assert(msv >= lsv);
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unsigned long wid = msv-lsv+1;
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string tname = des->local_symbol(path);
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NetESignal*tmp = new NetESignal(tname, wid);
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tmp->set_line(*this);
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for (unsigned idx = 0 ; idx < wid ; idx += 1)
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connect(tmp->pin(idx), net->pin(idx+lsv));
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des->add_node(tmp);
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des->set_esignal(tmp);
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return tmp;
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}
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// If the bit select is constant, then treat it similar
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// to the part select, so that I save the effort of
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// making a mux part in the netlist.
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verinum*msn;
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if (msb_ && (msn = msb_->eval_const(des, path))) {
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assert(idx_ == 0);
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unsigned long msv = msn->as_ulong();
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string tname = des->local_symbol(path);
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NetESignal*tmp = new NetESignal(tname, 1);
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tmp->set_line(*this);
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connect(tmp->pin(0), net->pin(msv));
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des->add_node(tmp);
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des->set_esignal(tmp);
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return tmp;
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}
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NetESignal*node = des->get_esignal(net);
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assert(idx_ == 0);
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if (lsb_) {
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cerr << get_line() << ": Sorry, I cannot yet elaborate "
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"bit ranges in this context." << endl;
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des->errors += 1;
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}
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// Non-constant bit select? punt and make a subsignal
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// device to mux the bit in the net.
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if (msb_) {
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NetExpr*ex = msb_->elaborate_expr(des, path);
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NetESubSignal*ss = new NetESubSignal(node, ex);
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ss->set_line(*this);
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return ss;
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}
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// All else fails, return the signal itself as the
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// expression.
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assert(msb_ == 0);
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return node;
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}
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@ -1783,6 +1826,9 @@ Design* elaborate(const map<string,Module*>&modules,
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/*
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* $Log: elaborate.cc,v $
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* Revision 1.55 1999/07/17 03:08:31 steve
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* part select in expressions.
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*
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* Revision 1.54 1999/07/13 04:08:26 steve
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* Construct delayed assignment as an equivilent block.
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*
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17
netlist.cc
17
netlist.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: netlist.cc,v 1.42 1999/07/16 04:33:41 steve Exp $"
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#ident "$Id: netlist.cc,v 1.43 1999/07/17 03:08:31 steve Exp $"
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#endif
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# include <cassert>
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@ -693,6 +693,11 @@ NetESignal::NetESignal(NetNet*n)
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}
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}
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NetESignal::NetESignal(const string&n, unsigned np)
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: NetExpr(np), NetNode(n, np)
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{
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}
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NetESignal::~NetESignal()
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{
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}
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@ -1240,6 +1245,13 @@ NetESignal* Design::get_esignal(NetNet*net)
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return node;
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}
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void Design::set_esignal(NetESignal*sig)
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{
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NetESignal*&node = esigs_[sig->name()];
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assert( node == 0 );
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node = sig;
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}
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void Design::add_process(NetProcTop*pro)
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{
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pro->next_ = procs_;
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@ -1304,6 +1316,9 @@ NetNet* Design::find_signal(bool (*func)(const NetNet*))
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/*
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* $Log: netlist.cc,v $
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* Revision 1.43 1999/07/17 03:08:31 steve
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* part select in expressions.
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*
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* Revision 1.42 1999/07/16 04:33:41 steve
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* set_width for NetESubSignal.
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*
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: netlist.h,v 1.45 1999/07/16 04:33:41 steve Exp $"
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#ident "$Id: netlist.h,v 1.46 1999/07/17 03:08:32 steve Exp $"
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#endif
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/*
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@ -1156,6 +1156,7 @@ class NetESignal : public NetExpr, public NetNode {
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public:
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NetESignal(NetNet*n);
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NetESignal(const string&name, unsigned npins);
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~NetESignal();
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const string& name() const { return NetNode::name(); }
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@ -1246,6 +1247,7 @@ class Design {
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// ESIGNALS
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NetESignal* get_esignal(NetNet*net);
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void set_esignal(NetESignal*sig);
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// PROCESSES
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void add_process(NetProcTop*);
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@ -1340,6 +1342,9 @@ extern ostream& operator << (ostream&, NetNet::Type);
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/*
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* $Log: netlist.h,v $
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* Revision 1.46 1999/07/17 03:08:32 steve
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* part select in expressions.
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*
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* Revision 1.45 1999/07/16 04:33:41 steve
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* set_width for NetESubSignal.
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*
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