Commit Graph

256 Commits

Author SHA1 Message Date
Stephen Williams df15a0368c Collect NetTran devices into islands.
NetTran devices must be collected into islands because they are all
a bi-directional mass. This is how vvp will process them and the code
generator will need a head start organizing them.
2008-06-01 19:45:12 -07:00
Stephen Williams 7898f4e402 Account for swithes linked to nexus in ivl_target.h API.
Switches can connect to a nexus too, so add the missing nexus support
for that in the ivl_target.h API.
2008-06-01 14:29:27 -07:00
Stephen Williams 1be1f65f33 Merge branch 'master' into verilog-ams 2008-05-29 20:11:00 -07:00
Cary R 7a1180868a Remove definition for non-existent routines.
ivl_switch_scope, ivl_switch_attr_cnt and ivl_switch_attr_val
are non-existent routines and should not be in ivl.def. I also
removed them from ivl_target.h. Cygwin expects that if a routine
is listed in ivl.def that it will find a real implementation.
2008-05-28 09:45:27 -07:00
Stephen Williams de7fff8ac6 Elaborate tran devices (switches)
This takes the support for switch modeling to the code generator.
Add error messages in the vvp code generator for lack of support.
2008-05-27 20:06:58 -07:00
Stephen Williams ca756f3ec3 Bring switch information out to the ivl_target API.
This involves defining the API for switches and cleaning up the
elaborated form to match the defined ivl_target API. Also add t-dll
code to support the ivl_switch_t functions, and add stub code that
checks the results.
2008-05-23 20:53:10 -07:00
Stephen Williams 10ab5cf698 Merge branch 'verilog-ams' 2008-05-06 21:00:12 -07:00
Cary R 4f8b91e65c Add file and line information for parameters, etc.
This patch adds file and line information for parameters and
local parameters. It also adds file/line stubs for signals in
the tgt-* files. It adds the pform code needed to eventually
do genvar checks and passing of genvar file/line information.
It verifies that a genvar does not have the same name as a
parameter/local parameter.
2008-05-06 07:14:27 -07:00
Stephen Williams e91243e1c6 Elaborate abs() is continuous assign expressions.
In continuous assign expressions, the abs() operator can't easily be
burried in generic unary handling, so add the IVL_LPM_ABS type and
generate it as needed.
2008-05-05 22:00:39 -07:00
Cary R 86a4025b58 Push file and line information for scopes to the runtime.
This patch adds code to push the file and line information
for scope objects (modules, functions, tasks, etc.) to the
runtime. For modules, this includes the definition fields.
2008-04-29 21:51:34 -07:00
Cary R 436e2fca13 Add ifnone functionality.
This patch adds ifnone functionality. It does not produce an
error when both an ifnone and an unconditional simple module
path are given. For this case the ifnone delays are ignored.
2008-04-29 11:55:32 -07:00
Cary R b6f26e62df Add support for delaying constants at T0.
This patch adds support for delaying constants at time zero. It also
cleans up the code in elab_net.cc to use this capability instead of
building it with an extra BUFZ to carry the delay information.
2008-02-13 20:10:55 -08:00
Cary R 40064b3181 Catch that we do not currently support unsigned bit based power.
This patch adds a check and prints a warning message when the power
operator is used with unsigned bit based values. It also fixes a couple
of typos and adds an asserts if the above power operator happens to
get to the tgt-vvp back end.
2008-02-04 13:35:44 -08:00
Cary R 5e8a1bd8cc Add power operator (**) for real values in a continuous assignment.
This patch adds the power operator for real values in a continuous
assignment.
2008-01-31 16:48:52 -08:00
Larry Doolittle d9ac146b8f Spelling fixes
only comments and documentation
some punctuation and capitalization for good measure
Changelogs are purposefully untouched
2008-01-29 20:24:24 -08:00
Larry Doolittle 47d65034db Spelling fixes
mostly comments, but includes some identifiers and message text
2008-01-27 18:18:13 -08:00
Cary R 10d25d2b88 Support delays for all operators in a continuous assignments.
Previously only the logical operators (~, &, |, ^, etc.) supported a
delayed value in a continuous assignment. This patch should extend this
to all operators. An extensive check of real values was done. The same
will be done shortly for bit based nets.

Checks for constructs currently unsupported in continuous assignments
provide a more explicit message (** operator, real user functions,
{!, && and ||} operators with a real argument).
2008-01-21 18:21:31 -08:00
Larry Doolittle eb5e7b792b Spelling fixes
Sorry, I can't help myself.  :-p
2008-01-08 17:26:55 -08:00
Cary R 21730ab228 Fix definition missing in include file and missing UINT64_FMT.
This fixes the missing include file definitions and fixes three
cases that needed to us UINT64_FMT.
2008-01-03 14:14:54 -08:00
Stephen Williams 08752453b4 File line information for expressions
Add ivl_target support for file and line numbers of expressions.
2007-12-22 17:19:45 -05:00
Stephen Williams 1db19b8703 Make statement file lineno available to targets.
Make the Verilog file/lineno of statements available to loadable
code generators. Make sure the information is properly set for
system task calls.
2007-12-22 09:31:24 -05:00
Stephen Williams 0d9ed65e8c Give delay paths scope.
Delay paths need a scope. This helps the code generators bind the
modpaths to the correct scope. This patch doesn't actually make use
of the information, it just makes it available to code generators.

Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-31 21:39:29 -07:00
Cary R 3258b7726b Pass local scope precision from compiler to vvp/etc.
This patch adds ivl_scope_time_precision() to the compiler which can
be used to extract the local scope precision. tgt-stub and tgt-vvp
have been modified to use this new function and output a value that
is appropriate. The vvp runtime has been altered to use this new
data which is accessed with the vpip_time_precision_from_handle()
function. vpiTimePrecision uses this function to return the correct
precision.
2007-09-28 15:08:02 -07:00
Cary R 7c852aa075 Add cmos/rcmos primitives.
This patch adds the cmos and rcmos primitives.
2007-09-06 18:46:22 -07:00
steve d883979fd8 Seperate arrayness from word count 2007-04-02 01:12:34 +00:00
steve 611d2c81b3 Spelling fixes from Larry 2007-03-22 16:08:14 +00:00
steve fc9a90c9e0 Add support for edge sensitive spec paths. 2007-03-02 06:13:22 +00:00
steve 243cf94165 Add support for conditional specify delay paths. 2007-03-01 06:19:38 +00:00
steve 6804732b9e Spelling fixes (larry doolittle) 2007-02-26 19:49:48 +00:00
steve d2ba78559a Process Verilog escape sequences much earlier. 2007-02-25 23:08:24 +00:00
steve 6d91be5b19 Use inttypes.h instead of stdint.h for portability. 2007-02-02 04:33:00 +00:00
steve d175eb17f1 Clarify the use of ivl_scope_def for not-functions. 2007-01-29 01:52:51 +00:00
steve 6f3ddce7c4 Dead code for memories in scopes. 2007-01-17 05:00:12 +00:00
steve f5a7ee0736 Remove dead code related to memories. 2007-01-17 04:39:18 +00:00
steve 91d84e7dc7 Major rework of array handling. Memories are replaced with the
more general concept of arrays. The NetMemory and NetEMemory
 classes are removed from the ivl core program, and the IVL_LPM_RAM
 lpm type is removed from the ivl_target API.
2007-01-16 05:44:14 +00:00
steve 0edb5a7547 Basic support for specify timing. 2006-09-23 04:57:19 +00:00
steve fc0695beb6 Handle 64bit delay constants. 2006-08-08 05:11:37 +00:00
steve 06d6ac4b33 Fix/implement signed right shift. 2006-07-30 02:51:35 +00:00
steve 80f30be9d0 Add support for system functions in continuous assignments. 2006-06-18 04:15:50 +00:00
steve 707af782b3 Fix part selects in l-values. 2006-04-16 00:15:43 +00:00
steve f001d0001a Add support for generate loops w/ wires and gates. 2006-04-10 00:37:42 +00:00
steve d434dd7296 Allow part selects of memory words in l-values. 2006-02-02 02:43:57 +00:00
steve 58f182a159 Node delays can be more general expressions in structural contexts. 2006-01-02 05:33:19 +00:00
steve 1721799050 Document binary expression use. 2005-12-22 15:44:29 +00:00
steve 244844c067 Document the IVL_ST_DELAY statements. 2005-11-20 15:58:25 +00:00
steve be73be8c98 Spelling patches from Larry. 2005-09-19 21:45:35 +00:00
steve c39976fbf1 Generate code to handle real valued muxes. 2005-09-01 04:11:37 +00:00
steve 4a8be3db9c Implement bi-directional part selects. 2005-08-06 17:58:16 +00:00
steve b9799cf6ec Remove NetVariable and ivl_variable_t structures. 2005-07-11 16:56:50 +00:00
steve 75ad90534b Generalize signals to carry types. 2005-07-07 16:22:49 +00:00
steve a0dce80eba Document ivl_logic_delay function. 2005-06-13 22:25:37 +00:00
steve 739a1839ed Do sign extension of structuran nets. 2005-05-24 01:44:27 +00:00
steve 7dd0d255a6 Add support for variable part select. 2005-05-08 23:40:14 +00:00
steve 06816e79fe Clarify internal delays for assignments. 2005-05-07 03:14:00 +00:00
steve 365cfedd55 Update DFF support to new data flow. 2005-04-24 23:44:01 +00:00
steve 6244dc1194 Make logic aware of strength. 2005-04-13 06:35:11 +00:00
steve e8a6835d36 Make clear that memory addresses are cannonical. 2005-04-08 04:52:31 +00:00
steve 65c7ec00e7 Rework NetRamDq and IVL_LPM_RAM nodes. 2005-04-06 05:29:08 +00:00
steve 236ff2b278 Clean up handle of UDPs. 2005-04-01 06:04:30 +00:00
steve 53da6e9a33 Add support for LPM_UFUNC user defined functions. 2005-03-18 02:56:03 +00:00
steve 53af2949b4 Generate code for new form of memory ports. 2005-03-09 04:53:40 +00:00
steve 0fb1fd36ee Handle memory words in l-value concatenations. 2005-03-05 05:47:42 +00:00
steve 85286cc086 Rearrange how memories are supported as vvp_vector4 arrays. 2005-03-03 04:33:10 +00:00
steve 257e1f9516 Support shifts and divide. 2005-02-19 02:43:38 +00:00
steve aaf35ab1a9 Handle bit selects in l-values to assignments. 2005-02-14 01:51:39 +00:00
steve 1d7235b4f1 Replace supply nets with wires connected to pullup/down supply devices. 2005-02-13 01:15:07 +00:00
steve d74177634c Restructure NetMux devices to pass vectors.
Generate NetMux devices from ternary expressions,
 Reduce NetMux devices to bufif when appropriate.
2005-02-12 06:25:40 +00:00
steve ee5bb5fcaf Add the NetRepeat node, and code generator support. 2005-02-08 00:12:36 +00:00
steve 97f83ffbe3 laborate reduction gates into LPM_RED_ nodes. 2005-02-03 04:56:20 +00:00
steve 609b6a7baa Netlist boolean expressions generate gate vectors. 2005-01-29 18:46:18 +00:00
steve 695718d691 Clarify width of nexus. 2005-01-29 16:47:20 +00:00
steve 99ace10774 Simplified NetMult and IVL_LPM_MULT. 2005-01-28 05:39:33 +00:00
steve dfb7c7ba6f Remove the NetEBitSel and combine all bit/part select
behavior into the NetESelect node and IVL_EX_SELECT
 ivl_target expression type.
2005-01-24 05:28:30 +00:00
steve cb4e0d4724 stub dump signed flags of magnitude compare. 2005-01-22 17:36:59 +00:00
steve e28636776a Change case compare from logic to an LPM node. 2005-01-22 01:06:55 +00:00
steve 9e94afe399 Use PartSelect/PV and VP to handle part selects through ports. 2005-01-09 20:16:00 +00:00
steve 8f2d679c8a Unify elaboration of l-values for all proceedural assignments,
including assing, cassign and force.

 Generate NetConcat devices for gate outputs that feed into a
 vector results. Use this to hande gate arrays. Also let gate
 arrays handle vectors of gates when the outputs allow for it.
2004-12-29 23:55:43 +00:00
steve 5eb25e44e1 Add ivl_event_scope, and better document ivl_event_X methods. 2004-12-18 18:56:18 +00:00
steve 4444079409 Fixup force statement elaboration. 2004-12-15 17:10:40 +00:00
steve 65e9b6be12 Rework of internals to carry vectors through nexus instead
of single bits. Make the ivl, tgt-vvp and vvp initial changes
 down this path.
2004-12-11 02:31:25 +00:00
steve e4ae832153 Clean up spurious trailing white space. 2004-10-04 01:10:51 +00:00
steve 94647be1f0 Some commentary on ivl_logic_pin. 2004-09-25 01:58:12 +00:00
steve e56b77a43f Add support for wait on list of named events. 2003-12-03 02:46:23 +00:00
steve bc0ead2842 Spelling fixes in comments. 2003-11-08 20:06:21 +00:00
steve 64d795c53a Preserve variable ranges all the way to the vpi. 2003-08-22 23:14:26 +00:00
steve e561819179 Add synthesis support for synchronous reset. 2003-08-15 02:23:52 +00:00
steve d653a7e88d Add support for triand and trior. 2003-07-30 01:13:28 +00:00
steve bad861dba3 Module attributes make it al the way to ivl_target. 2003-06-23 01:25:44 +00:00
steve 2a29c4fd62 Support real expressions in case statements. 2003-05-14 05:26:41 +00:00
steve f1cc9d865b Support event names as expressions elements. 2003-04-22 04:48:29 +00:00
steve 5d1d99a89f Handle signed magnitude compare all the
way through to the vvp code generator.
2003-04-11 05:18:08 +00:00
steve 1222153cdf Keep parameter constants for the ivl_target API. 2003-03-10 23:40:53 +00:00
steve 22d392a75c Obsolete the ivl_event_name function. 2003-03-06 01:24:37 +00:00
steve badad63ab4 All NetObj objects have lex_string base names. 2003-03-06 00:28:41 +00:00
steve a275133ff9 LPM objects store only their base names. 2003-02-26 01:29:24 +00:00
steve e941e7e805 Spelling fixes. 2003-01-30 16:23:07 +00:00
steve 46253ed873 Rework expression parsing and elaboration to
accommodate real/realtime values and expressions.
2003-01-26 21:15:58 +00:00
steve c2070777b2 The $time system task returns the integer time
scaled to the local units. Change the internal
 implementation of vpiSystemTime the $time functions
 to properly account for this. Also add $simtime
 to get the simulation time.
2002-12-21 00:55:57 +00:00
steve 9ce2806710 Fix synth2 handling of aset/aclr signals where
flip-flops are split by begin-end blocks.
2002-10-23 01:45:24 +00:00
steve 166621bcb3 Generate vvp code for asynch set/reset of NetFF. 2002-09-26 03:18:04 +00:00