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761 Commits

Author SHA1 Message Date
Alan Mishchenko 78951b4c6f Improvements to Scl_Lib/SC_Cell data-structure. 2015-09-24 12:12:36 -07:00
Alan Mishchenko f1bc346894 Several bug-fixed related to synthesis, library handling, and timimg info. 2015-09-23 18:44:07 -07:00
Alan Mishchenko 19a4bb930e Threshold logic checking code by Augusto Neutzling and Jody Matos. 2015-09-23 15:24:25 -07:00
Alan Mishchenko 97751e43b7 New constraint manager and memory reporting 'ps'. 2015-09-08 19:53:49 -07:00
Alan Mishchenko faeeaeb5e7 Updating Mio to use int instead of float. 2015-08-31 15:09:46 -07:00
Alan Mishchenko 4530ef6444 Alternative way to bit-blast a divisor. 2015-08-29 00:08:41 -07:00
Alan Mishchenko 04be8af560 Important bug fixes in standard-cell library handling and mapper &nf. 2015-08-28 17:47:00 -07:00
Alan Mishchenko 77d64787e0 Changes to be able to compile ABC without CUDD. 2015-08-24 19:49:18 -07:00
Alan Mishchenko 1fffe8f6f3 New switch in 'read_lib' to replace gate/pin names by short strings. 2015-08-24 18:07:10 -07:00
Alan Mishchenko 5bf0f86450 New switch in 'read_lib' to replace gate/pin names by short strings. 2015-08-24 17:40:20 -07:00
Alan Mishchenko 0e4561ab9f Experiments with mapping plus small changes. 2015-08-23 20:38:55 -07:00
Alan Mishchenko 10e0f3c58d Small changes to enable collecting results using &ps -D file. 2015-07-09 11:50:24 -07:00
Alan Mishchenko fd5b7e8b5d Bug fix in programmable cell parser and minor tuning. 2015-07-08 16:59:22 -07:00
Alan Mishchenko 609be7a114 C++ compiler typecast problem. 2015-07-08 15:04:26 -07:00
Alan Mishchenko 9894fc762e Add fix to Liberty parser to skip extra semicolon. 2015-07-06 07:57:18 -07:00
Alan Mishchenko b4d0abb77d Undo recent assert. 2015-06-27 21:38:32 -07:00
Alan Mishchenko 66ef4a9ac1 Potential performance bug in the mapper. 2015-06-27 19:57:49 -07:00
Alan Mishchenko d0d7763ef8 Supporting AND-gate cuts in 'if' and '&if' 2015-06-21 13:31:02 -07:00
Alan Mishchenko 14b7a520a1 Bug fix in 'dsd_tune' when processing cells with 0-input LUTs. 2015-05-15 22:36:11 -07:00
Alan Mishchenko 37b6b5f1f8 Making sure 0-input LUTs are supported by the DSD matching code. 2015-05-14 13:12:17 -07:00
Alan Mishchenko c0f0e145c4 Improving the criteria to select representative gates in 'map' with floating-point-delay libraries having more than one gate in some functionality classes. 2015-04-25 14:58:29 -07:00
Alan Mishchenko 9e20b3016d Adding switch 'map -f' to not use large gates for high-fanout nodes (disabled by default). 2015-04-24 14:51:34 -07:00
Alan Mishchenko a78fb767ee Adding platform-independent (alphabetic) way of sorting Genlib gates and selecting representatives based on area/delay. 2015-04-17 21:02:15 +09:00
Alan Mishchenko 3de5d18c5f Adding APIs to retrieve NOR/OR gates from the library. 2015-04-14 18:53:28 +09:00
Alan Mishchenko b3e5ccd256 Getting default AND-node delay from Genlib library. 2015-04-06 10:56:14 +07:00
Alan Mishchenko bb22a20cb0 Support for representing programmable cell configuration data (bug fix). 2015-03-09 08:36:22 -07:00
Alan Mishchenko 193c46e3c6 Support for representing programmable cell configuration data. 2015-03-08 20:19:56 -07:00
Alan Mishchenko 56f783157a Support for representing programmable cell configuration data. 2015-03-08 20:17:59 -07:00
Alan Mishchenko 6da21b8b88 Experiments with SAT-based cube enumeration. 2015-03-05 23:00:30 -08:00
Alan Mishchenko 874d394089 Corner case bug in wire-cap estimation. 2015-02-18 09:18:01 -08:00
Alan Mishchenko fd877c3f37 Several improvements to CBA data-structure. 2015-02-09 15:36:25 -08:00
Alan Mishchenko 68467cfff7 Fixed a typo in variable names. 2015-02-07 22:29:14 -08:00
Alan Mishchenko 8410daf3e4 Improvements and tuning of CBA with buffering/sizing. 2015-02-04 16:29:55 -08:00
Alan Mishchenko 7b1c25086b Improvements and tuning of CBA. 2015-02-01 20:50:59 -08:00
Alan Mishchenko 77dbe2b656 Major rehash of the CBA code. 2015-01-31 19:52:32 -08:00
Alan Mishchenko 0f22046bcb New assertions and bug fix in DSD balancing. 2015-01-27 09:54:35 -08:00
Alan Mishchenko 58d28539a7 Gate sizing with barrier buffers. 2014-12-21 22:22:31 -08:00
Alan Mishchenko 6733abd72e Exprimental features in tech-mapping. 2014-12-21 01:04:39 -08:00
Alan Mishchenko 55f0a2805c Bug fix in reading box library. 2014-12-20 10:16:13 -08:00
Alan Mishchenko aadfea8b4d Integrating barrier buffers. 2014-12-13 12:37:04 -08:00
Alan Mishchenko b379b3ee20 Adding new mapping feature. 2014-12-11 20:45:41 -08:00
Alan Mishchenko 1398de7c46 Integrating barrier buffers. 2014-12-08 14:10:41 -08:00
Alan Mishchenko 3653bf53e9 Bug fix in truth table computation. 2014-10-15 14:26:44 -07:00
Alan Mishchenko 3ac8aa9c12 Recommended changes for portability. 2014-10-12 09:10:27 -07:00
Alan Mishchenko 8b160138f1 MUX decomposition during mapping. 2014-10-11 17:19:41 -07:00
Alan Mishchenko 09a5950c8f Deriving network in terms of programmable cells. 2014-10-11 15:53:32 -07:00
Alan Mishchenko ccb5bb34d7 Suggested patch for type-punned warnings 2014-10-10 08:58:18 -07:00
Alan Mishchenko ca9eca3b22 Small changes. 2014-10-08 13:26:23 -07:00
Alan Mishchenko 141c1de0a2 Compiler warnings. 2014-10-08 10:52:32 -07:00
Alan Mishchenko e4d5887671 Detection of threshold functions. 2014-10-08 10:41:20 -07:00
Alan Mishchenko 734435f441 Deriving cell mapping with &if -kz. 2014-10-04 19:36:41 -07:00
Alan Mishchenko 24083998ab Deriving cell mapping with &if -kz. 2014-10-04 19:18:34 -07:00
Alan Mishchenko fa5f05e3a2 Deriving AIG after cell mapping. 2014-10-03 17:15:43 -07:00
Alan Mishchenko 76666174b4 Synchronizing packages. 2014-09-20 16:41:11 -07:00
Alan Mishchenko 2d4342f8c4 Synchronizing packages. 2014-09-20 14:50:52 -07:00
Alan Mishchenko 00b8cda3d3 Synchronizing packages. 2014-09-20 14:10:05 -07:00
Alan Mishchenko 1fb65889a3 Updating command 'dsd_clean'. 2014-09-20 13:56:26 -07:00
Alan Mishchenko a02b020356 Updating DSD balance to handle XOR gate as having the same delay as AND gate. 2014-09-19 19:06:01 -07:00
Alan Mishchenko f989aea224 Improvements to Boolean matching. 2014-09-19 15:08:46 -07:00
Alan Mishchenko b05ee94311 Improvements to Boolean matching. 2014-09-19 14:06:51 -07:00
Alan Mishchenko ee72791293 Improvements to Boolean matching. 2014-09-18 22:26:54 -07:00
Alan Mishchenko 69699da912 Improvements to Boolean matching. 2014-09-18 16:44:04 -07:00
Alan Mishchenko 596f387b03 Improvements to Boolean matching. 2014-09-18 15:13:12 -07:00
Alan Mishchenko a0ed347992 Improving DSD manager. 2014-09-18 14:50:08 -07:00
Alan Mishchenko 043cfcd775 Concurrency for Boolean matching. 2014-09-18 11:46:14 -07:00
Alan Mishchenko 023e92c470 Improvements to Boolean matching. 2014-09-17 18:58:20 -07:00
Alan Mishchenko 6d0b555dab Support for leakage power in Liberty parser and sizer. 2014-09-16 16:44:51 -07:00
Alan Mishchenko 288d64d033 New choice computation. 2014-09-16 14:59:28 -07:00
Alan Mishchenko 1d5cb52e4a Improvements to Boolean matching. 2014-09-16 11:56:40 -07:00
Alan Mishchenko 70a3474849 Improvements to the timing manager. 2014-08-25 20:47:11 -05:00
Alan Mishchenko 47dde4e478 Correcting incorrect handling of timing in several &-commands. 2014-08-25 16:55:39 -07:00
Alan Mishchenko ec5bc5825d Adding specialized matching to 'if'. 2014-08-16 18:34:20 -07:00
Alan Mishchenko 97e620a4b7 Adding specialized matching to 'if'. 2014-08-16 18:28:41 -07:00
Alan Mishchenko c8bfe83e55 Suggested fix to allow .constr files to have empty lines. 2014-08-13 16:46:20 -07:00
Alan Mishchenko ae64dc0796 Profiling code for SOP/DSD/LMS balancing. 2014-08-04 21:36:01 -07:00
Alan Mishchenko a3a6002b3d Compiler warnings. 2014-08-04 15:34:34 -07:00
Alan Mishchenko edba505d9d Profiling code for SOP/DSD/LMS balancing. 2014-08-02 17:01:48 -07:00
Alan Mishchenko 674dcf2a6e Generating abstraction of standard cell library. 2014-07-26 16:49:32 -07:00
Alan Mishchenko 704b4bad6b Generating abstraction of standard cell library. 2014-07-26 16:46:45 -07:00
Alan Mishchenko 7d81490fe6 Generating abstraction of standard cell library. 2014-07-25 20:02:56 -07:00
Alan Mishchenko 9bfe2ad73a Fixing option 'if -G <num>' after changes. 2014-07-25 08:58:20 -07:00
Alan Mishchenko eee04f448d Undoing previous change to SOP balancing. 2014-07-22 17:11:50 -07:00
Alan Mishchenko 9fa827aacf Small improvement to SOP balancing. 2014-07-22 10:13:40 -07:00
Alan Mishchenko c0aa9b6a5d Adding new command &sopb for resource-aware SOP balancing. 2014-07-21 13:49:25 -07:00
Alan Mishchenko afcec52a49 Improvements to representation of choices. 2014-07-01 13:05:09 -07:00
Alan Mishchenko 85e23c8459 Various changes to enable better CNF generation. 2014-06-17 21:00:51 -07:00
Alan Mishchenko 0ac22c9e1d Specializing some truth-table functions to 6 inputs. 2014-06-14 18:29:19 -07:00
Alan Mishchenko fcdd9148b4 Various modifications. 2014-06-12 21:27:14 -07:00
Alan Mishchenko 9b54345120 Commented out some assertions in 
'map'.
 2014-06-07 14:09:22 -07:00
Alan Mishchenko 78e09e9119 Correcting switching activity computation. 2014-06-05 17:00:04 -07:00
Alan Mishchenko aed898c878 Commented out assertions that do not hold due to rounding of floating point numbers. 2014-05-10 13:35:25 +07:00
Alan Mishchenko f39369a415 Adding switch -C <num> to 'amap' to control max number of cuts at a node. 2014-05-09 19:01:22 +07:00
Alan Mishchenko 73289034be Added optimization for average rather than maximum delay. 2014-04-29 00:21:35 -07:00
Alan Mishchenko 1023908e30 Performance improvement to 'amap'. 2014-04-23 18:44:51 -07:00
Alan Mishchenko 76f2adb54f Adding color to sizing stats. 2014-04-19 22:44:18 -07:00
Alan Mishchenko ed2f0ef34f Adding color to sizing stats. 2014-04-19 22:37:17 -07:00
Alan Mishchenko 606fed3b84 Added optimization for average rather than maximum delay. 2014-04-19 19:57:32 -07:00
Alan Mishchenko 1bca32bae3 Improvements to DSD balancing. 2014-04-19 17:13:00 -07:00
Alan Mishchenko d0c4c0cd7b Improvements to DSD balancing. 2014-04-19 16:55:44 -07:00
Alan Mishchenko 17f989ccba Fix SOP balancing. 2014-04-19 14:12:09 -07:00
Alan Mishchenko 6730e21e12 Improvements in technology mapping. 2014-04-17 13:09:08 -07:00
Alan Mishchenko 02cf869391 Changes in the LUT mapper data-structures. 2014-04-14 09:06:14 -05:00
Alan Mishchenko 5cd9145046 New feature to optimize delay during mapping. 2014-04-13 10:53:35 -05:00
Alan Mishchenko e7d0c9dc23 New feature to optimize delay during mapping. 2014-04-11 13:07:56 -07:00
Alan Mishchenko 865526f880 New feature to optimize delay during mapping. 2014-04-11 12:20:36 -07:00
Alan Mishchenko e855eaa080 Improvements to DSD in technology mapping. 2014-04-11 12:01:36 -07:00
Alan Mishchenko 80110cc328 New feature to optimize delay during mapping. 2014-04-11 11:01:54 -07:00
Alan Mishchenko 24f63cf92c Correcting internal check. 2014-04-11 09:53:19 -07:00
Alan Mishchenko b50894ab64 Removed obsolete code for sequential mapping. 2014-04-11 09:17:34 -07:00
Alan Mishchenko b9274a07de Improvements to DSD in technology mapping. 2014-04-11 08:57:03 -07:00
Alan Mishchenko 80d2eef712 Adding switch to control area/delay quality tradeoff in 'amap'. 2014-04-08 19:22:41 -07:00
Alan Mishchenko af6705a8b1 Implementation of DSD balancing. 2014-04-06 21:22:10 -07:00
Alan Mishchenko f1f1cf3eb1 Improvement in SOP balancing. 2014-04-06 15:54:02 -07:00
Alan Mishchenko a26d61f47d Improvement in SOP balancing. 2014-04-06 15:21:07 -07:00
Alan Mishchenko d05f83b293 Improvement in SOP balancing. 2014-04-06 12:52:00 -07:00
Alan Mishchenko 2a399042ba Improvement in SOP balancing. 2014-04-06 12:26:25 -07:00
Alan Mishchenko faf3bf34af Improvement in SOP balancing. 2014-04-06 12:07:04 -07:00
Alan Mishchenko 9c502b70f3 Preparing new implementation of SOP/DSD balancing in 'if' mapper. 2014-04-05 22:51:01 -07:00
Alan Mishchenko 5608d947ed Preparing new implementation of SOP/DSD balancing in 'if' mapper. 2014-04-05 11:06:35 -07:00
Alan Mishchenko 424b86a556 Performance bug fix in SOP balancing. 2014-04-05 09:58:43 -07:00
Alan Mishchenko 6ab0d68d56 Tuning LUT mapping to work while saving the best network. 2014-04-04 16:38:46 -07:00
Alan Mishchenko 11bab8caf9 Improvements to technology mapping. 2014-04-03 15:12:29 -07:00
Alan Mishchenko d82be1fd05 Improvements to technology mapping. 2014-04-03 14:40:43 -07:00
Alan Mishchenko b0e04dc2c3 Improvements to technology mapping. 2014-04-03 14:37:18 -07:00
Alan Mishchenko c1670d7444 Improvements to technology mapping. 2014-04-03 13:52:13 -07:00
Alan Mishchenko 71e11a3eec Improvements to technology mapping. 2014-04-03 12:57:27 -07:00
Alan Mishchenko 7669c99605 Improvements to technology mapping. 2014-04-03 12:23:49 -07:00
Alan Mishchenko 3db3be2d61 Improvements to technology mapping. 2014-04-03 12:06:09 -07:00
Alan Mishchenko b21589ea1a Improvements to technology mapping. 2014-04-03 11:48:44 -07:00
Alan Mishchenko 481c29c8d8 Improvements to technology mapping. 2014-04-03 11:45:41 -07:00
Alan Mishchenko ffea3a2c84 Improvements to technology mapping. 2014-04-03 00:39:48 -07:00
Alan Mishchenko 9291ab9f50 Improvements to technology mapping. 2014-04-02 20:20:07 -07:00
Alan Mishchenko 280a485336 Improvements to technology mapping. 2014-04-02 19:33:49 -07:00
Alan Mishchenko b085ba4b51 Improvements to DSD manager. 2014-04-02 18:27:35 -07:00
Alan Mishchenko 883e21fe8a Improvements to DSD manager. 2014-04-02 18:07:50 -07:00
Alan Mishchenko 7b8863466e Adding switch to handle only single faults. 2014-04-01 11:53:08 -07:00
Alan Mishchenko 49c2661ae1 Compiler warnings. 2014-03-31 22:19:15 -07:00
Alan Mishchenko 80b8b25af0 Bug fix in the DSD manager writing and reading. 2014-03-31 18:00:09 -07:00
Alan Mishchenko f0b6795194 Improving cut computation. 2014-03-30 23:48:20 -07:00
Alan Mishchenko 2f926f2faf Improving cut computation. 2014-03-30 12:07:49 -07:00
Alan Mishchenko 7d500c8920 Updating &if for new cut function representation. 2014-03-29 22:14:15 -07:00
Alan Mishchenko 6f17c44e91 Integrating barrier buffers into the mapper. 2014-03-23 16:52:40 -07:00
Alan Mishchenko ace340997b Experiments with mapping. 2014-03-22 16:24:44 -07:00
Alan Mishchenko b581e16f32 Experiments with cut caching. 2014-03-20 11:21:33 -07:00
Alan Mishchenko 8826ed6d4f Experiments with simulation. 2014-03-14 22:08:33 -07:00
Alan Mishchenko c7c3aa3f2d Experiments with simulation. 2014-03-14 21:55:49 -07:00
Alan Mishchenko 3f7cfde14b Experiments with simulation. 2014-03-14 21:53:45 -07:00
Alan Mishchenko cb65ccd28b Experiments with simulation. 2014-03-14 21:50:46 -07:00
Alan Mishchenko eae0455267 Experiments with simulation. 2014-03-14 21:37:34 -07:00
Alan Mishchenko 550b769d39 Experiments with simulation. 2014-03-14 21:04:48 -07:00