mirror of https://github.com/YosysHQ/abc.git
Improvement in SOP balancing.
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9c502b70f3
commit
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@ -51,6 +51,7 @@ ABC_NAMESPACE_HEADER_START
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typedef struct Kit_Sop_t_ Kit_Sop_t;
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struct Kit_Sop_t_
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{
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int nLits; // the number of literals
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int nCubes; // the number of cubes
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unsigned * pCubes; // the storage for cubes
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};
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@ -87,7 +87,7 @@ int Kit_TruthIsop( unsigned * puTruth, int nVars, Vec_Int_t * vMemory, int fTryB
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if ( pcRes2->nCubes >= 0 )
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{
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assert( Kit_TruthIsEqual( puTruth, pResult, nVars ) );
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if ( pcRes->nCubes > pcRes2->nCubes )
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if ( pcRes->nCubes > pcRes2->nCubes || (pcRes->nCubes == pcRes2->nCubes && pcRes->nLits > pcRes2->nLits) )
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{
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RetValue = 1;
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pcRes = pcRes2;
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@ -157,6 +157,7 @@ unsigned * Kit_TruthIsop_rec( unsigned * puOn, unsigned * puOnDc, int nVars, Kit
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// check for constants
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if ( Kit_TruthIsConst0( puOn, nVars ) )
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{
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pcRes->nLits = 0;
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pcRes->nCubes = 0;
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pcRes->pCubes = NULL;
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Kit_TruthClear( pTemp, nVars );
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@ -164,6 +165,7 @@ unsigned * Kit_TruthIsop_rec( unsigned * puOn, unsigned * puOnDc, int nVars, Kit
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}
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if ( Kit_TruthIsConst1( puOnDc, nVars ) )
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{
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pcRes->nLits = 0;
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pcRes->nCubes = 1;
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pcRes->pCubes = Vec_IntFetch( vStore, 1 );
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if ( pcRes->pCubes == NULL )
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@ -222,6 +224,7 @@ unsigned * Kit_TruthIsop_rec( unsigned * puOn, unsigned * puOnDc, int nVars, Kit
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return NULL;
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}
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// create the resulting cover
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pcRes->nLits = pcRes0->nLits + pcRes1->nLits + pcRes2->nLits + pcRes0->nCubes + pcRes1->nCubes;
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pcRes->nCubes = pcRes0->nCubes + pcRes1->nCubes + pcRes2->nCubes;
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pcRes->pCubes = Vec_IntFetch( vStore, pcRes->nCubes );
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if ( pcRes->pCubes == NULL )
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@ -273,12 +276,14 @@ unsigned Kit_TruthIsop5_rec( unsigned uOn, unsigned uOnDc, int nVars, Kit_Sop_t
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assert( (uOn & ~uOnDc) == 0 );
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if ( uOn == 0 )
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{
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pcRes->nLits = 0;
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pcRes->nCubes = 0;
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pcRes->pCubes = NULL;
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return 0;
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}
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if ( uOnDc == 0xFFFFFFFF )
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{
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pcRes->nLits = 0;
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pcRes->nCubes = 1;
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pcRes->pCubes = Vec_IntFetch( vStore, 1 );
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if ( pcRes->pCubes == NULL )
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@ -323,6 +328,7 @@ unsigned Kit_TruthIsop5_rec( unsigned uOn, unsigned uOnDc, int nVars, Kit_Sop_t
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return 0;
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}
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// create the resulting cover
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pcRes->nLits = pcRes0->nLits + pcRes1->nLits + pcRes2->nLits + pcRes0->nCubes + pcRes1->nCubes;
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pcRes->nCubes = pcRes0->nCubes + pcRes1->nCubes + pcRes2->nCubes;
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pcRes->pCubes = Vec_IntFetch( vStore, pcRes->nCubes );
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if ( pcRes->pCubes == NULL )
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@ -245,7 +245,7 @@ word If_AigVerifyArray( Vec_Int_t * vAig, int nLeaves, int fCompl )
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}
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else
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{
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word Truth0, Truth1, TruthR;
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word Truth0 = 0, Truth1 = 0, TruthR;
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int i, iVar0, iVar1, iLit0, iLit1;
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assert( Vec_IntSize(vAig) & 1 );
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Vec_IntForEachEntryDouble( vAig, iLit0, iLit1, i )
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