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5854 Commits

Author SHA1 Message Date
Alan Mishchenko 3dc77bbe1c Bug fix in "stochmap". 2025-03-09 23:52:03 -07:00
Alan Mishchenko 38ba7d78aa Experiment with mapping. 2025-03-09 15:42:25 -07:00
alanminko f058e15f87
Merge pull request #382 from MyskYko/cadical 
CaDiCaL
 2025-03-07 23:17:57 +07:00
alanminko 383c16b690
Merge pull request #380 from MyskYko/kissat 
support debug mode
 2025-03-07 23:17:44 +07:00
qiuweibin db4a3005e3 Fix the null reference vulnerability 2025-03-07 10:48:02 +00:00
MyskYko 14b451b52f patch 2025-03-07 00:25:11 -08:00
MyskYko f544165a88 cadical original 2025-03-05 21:25:31 -08:00
MyskYko 8fb9fc5d0f add version 2025-03-05 21:19:39 -08:00
MyskYko f168f2f286 support debug mode 2025-03-05 20:25:40 -08:00
alanminko fbd19056e7
Merge pull request #379 from MyskYko/rrr 
update rrr
 2025-03-06 09:00:36 +07:00
Alan Mishchenko 7364002c39 Updates to rewiring. 2025-03-05 17:47:12 -08:00
Alan Mishchenko f3ae349cf2 Bug fixing in "stockmap". 2025-03-05 17:46:39 -08:00
MyskYko 8005405ed7 update rrr 2025-03-05 14:44:12 -08:00
Alan Mishchenko 2126cb3ca1 Fixing a typo in Kissat integration. 2025-03-05 10:30:16 -08:00
Alan Mishchenko b9b8ff47e3 Adding programmable call to Kissat in command &kissat. 2025-03-05 08:26:28 -08:00
MyskYko 3f6171127a add license 2025-03-05 04:21:18 -08:00
MyskYko 664d285fcb patch 2025-03-05 04:10:49 -08:00
MyskYko a7476c65d8 kissat original 2025-03-04 17:39:59 -08:00
Alan Mishchenko c25bf73466 Adding new external APIs. 2025-03-03 19:40:11 -08:00
alanminko 1b96863505
Merge pull request #375 from chenjunhao0315/master 
Command rewire
 2025-03-02 01:27:30 +07:00
alanminko adbeffc145
Merge pull request #374 from wjrforcyber/fix_lib_pointer 
Fix(Pointer): Fix the wrong value passed to size
 2025-03-02 01:27:01 +07:00
alanminko d0d1721bbe
Merge pull request #373 from wjrforcyber/fix_HMetis 
Fix(write_hmetis): Remain the obj number when omitting POs explictly
 2025-03-02 01:26:44 +07:00
jiunhaochen 083d3884dd Command rewire 2025-03-01 23:44:55 +08:00
wjrforcyber 5632bb8892
Fix(Pointer): Fix the wrong value passed to size 
Signed-off-by: wjrforcyber <wjrforcyber@163.com>
 2025-03-01 21:03:51 +08:00
Alan Mishchenko 75ef06017d LUT cascade mapping. 2025-02-27 13:40:11 -08:00
wjrforcyber 6046bbee4e
Update(EmptyLine): Remove empty line between data and comment 
Due to the parsing issue here: https://github.com/kahypar/mt-kahypar/pull/205

Signed-off-by: wjrforcyber <wjrforcyber@163.com>
 2025-02-27 16:42:29 +08:00
wjrforcyber e9c7059274
Fix(write_hmetis): Remain the obj number when omit POs explictly 
Signed-off-by: wjrforcyber <wjrforcyber@163.com>
 2025-02-26 21:36:48 +08:00
Alan Mishchenko 45c250fb5b New command &randsyn (fixing scalability issue). 2025-02-23 15:49:49 -08:00
Alan Mishchenko a9d959acbe Command "stochmap". 2025-02-23 15:47:28 -08:00
Alan Mishchenko c4a10c728e Suggested fix of an overflow in vectors (compiler error). 2025-02-23 15:47:00 -08:00
Alan Mishchenko 4f1b961d00 Suggested fix of an overflow in vectors. 2025-02-23 13:17:51 -08:00
Alan Mishchenko 9e35825e6b New command &randsyn. 2025-02-21 13:20:15 -08:00
Alan Mishchenko e5e1f76b21 Bug fix. 2025-02-14 14:41:01 -08:00
alanminko 0cbc9a851a
Merge pull request #368 from hriener/dau_fix 
Increase buffer size to DAU_MAX_STR (=2000).
 2025-02-15 05:30:48 +07:00
alanminko 57e504db7b
Merge pull request #362 from wjrforcyber/gz_lib_support 
Feat(read_lib): Gz lib format support
 2025-02-15 05:30:24 +07:00
alanminko ee8e0370d5
Merge pull request #361 from letsintegreat/power-aware 
Fix switching bug
 2025-02-15 05:29:55 +07:00
alanminko a2c6cb8fd4
Merge pull request #360 from wjrforcyber/fix_print_mffc 
Fix(print_mffc): Missing condition when single output linked to CO
 2025-02-15 05:29:37 +07:00
alanminko 4b6c35bd4d
Merge pull request #356 from wjrforcyber/choice_bug 
Fix(&dch): choices bugs in &put
 2025-02-15 05:29:14 +07:00
alanminko 8a96d02e33
Merge pull request #354 from wjrforcyber/write_hmetis 
Feat(write_hmetis): Enable hMetis format
 2025-02-15 05:28:50 +07:00
alanminko a2e4c153c9
Merge pull request #255 from phsauter/fix-scl-regression 
Fix Segfault in scl
 2025-02-15 05:28:25 +07:00
Heinz Riener 80eecea409 Increase buffer size to DAU_MAX_STR (=2000). 2025-02-14 15:49:17 +01:00
alanminko 7bd782382e
Merge pull request #367 from MyskYko/rrr 
New implementation
 2025-02-14 06:19:30 +07:00
MyskYko f51543457d change default parameter 2025-02-13 12:40:48 -08:00
Alan Mishchenko 775dee4de9 Fixing timing propagation bug in &nf with boxes. 2025-02-12 18:41:12 -08:00
MyskYko 23c632f113 compilation error 2025-02-12 06:16:09 -08:00
MyskYko b0153e0f57 fix template 2025-02-12 06:16:09 -08:00
MyskYko d1d861f703 fix template 2025-02-12 06:16:09 -08:00
MyskYko 6e3b38c7d3 add rrr 2025-02-12 06:16:02 -08:00
alanminko aa9630e169
Merge pull request #365 from QuantamHD/fix_nf_crash 
nf: Fix assert( pDp->F < FLT_MAX ); in nf
 2025-02-12 08:34:50 +07:00
alanminko c4f8e8e88b
Merge pull request #364 from QuantamHD/fix_mising_return 
Fixes missing return in cec
 2025-02-12 08:34:21 +07:00
Alan Mishchenko b7bf6c20b6 Improvements to LUT cascade mapping. 2025-02-11 17:32:19 -08:00
Ethan Mahintorabi 2227d6d4e7
nf: Fix assert( pDp->F < FLT_MAX ); in nf 
This error was triggered by what appears to be a missing
saturating float check in Nf_ManCutMatchOne. When opened
in the debugger AreaF starts at FLT_MAX and in some cases
can be added to itself which results in +Inf. I noticed the
other if had a  saturating condidtion.

I took a flyer on it, and added it to the previous condition,
and it resolved the error. I think this is a good fix.

Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
 2025-02-11 22:04:24 +00:00
Ethan Mahintorabi 964170d8dc
Fixes missing return in cec 
Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
 2025-02-10 05:44:31 +00:00
Alan Mishchenko 8912d3aabe Adding command &write_truth equivalent to &write_truths. 2025-01-29 17:40:17 -08:00
Alan Mishchenko 3e86444510 Bug fix in reading truth tables. 2025-01-29 17:37:24 -08:00
wjrforcyber 303907ec0c
Update(read_lib): Remove redundant header 2025-01-21 15:58:31 +08:00
wjrforcyber adf9b4e7fb
Feat(read_lib): Support .gz file 2025-01-21 15:54:38 +08:00
letsintegreat a75d0cb0ad
fix switching bug 2025-01-18 22:41:24 +05:30
wjrforcyber 910a66a372
Fix(print_mffc): Missing condition when single output linked to CO 2025-01-17 18:31:14 +08:00
wjrforcyber a03c126a13
Refactor(Redundant): Remove redundant code 2025-01-09 23:39:02 +08:00
wjrforcyber c1ac7d8153
Update(&ps): Revert two line since `cls` shows the same data 2025-01-09 23:04:00 +08:00
wjrforcyber 8c7c9d0ccf
Fix(&dch): choices bugs in &put 2025-01-09 22:21:32 +08:00
Alan Mishchenko d5e1a5d445 Bug fix in &gencex. 2025-01-02 00:33:22 +07:00
Alan Mishchenko 350dcd3ea4 Enabling shared variables in bound set evaluation. 2024-12-28 00:05:00 -08:00
wjrforcyber 71b3daf0f6
Merge remote-tracking branch 'upstream/master' into write_hmetis 2024-12-26 20:58:17 +08:00
Alan Mishchenko b59b475d6a Compiler error. 2024-12-26 00:56:18 -08:00
Alan Mishchenko 7d247a08f7 Experiments with bound-set evaluation. 2024-12-26 00:37:37 -08:00
wjrforcyber 0dff4dbc4b
Feat(write_hmetis): Add weight on hyperedges and format 2024-12-26 13:54:55 +08:00
wjrforcyber 7a5a0ad8b3
Refactor(Compile): For MSVS build 2024-12-26 11:27:24 +08:00
wjrforcyber f7c5241dee
Merge branch 'master' into write_hmetis 2024-12-25 15:54:34 +08:00
wjrforcyber 47e4e23bc5
Fix(write_hmetis): Comments should be start with % 2024-12-25 15:43:50 +08:00
wjrforcyber 17652cfda6
Feat(write_hmetis): Write out hMetis file format 2024-12-25 15:37:36 +08:00
alanminko ef8230d9be
Merge pull request #353 from Carmine50/master 
cec: Modifying algorithm for generating simulation vectors for SAT sweeping (SimGen) and adding new feature to specify the simulation vector of the PIs for SAT sweeping algorithm.
 2024-12-24 11:36:05 -08:00
Carmine50 a74da1c50b [CEC][SAT Sweeping] Added new functionality in SAT sweeping function to use for simulation the PI vector present in vSimsPi data structure. 2024-12-24 14:54:59 +01:00
Carmine50 64e8bb02b9 [CEC][SimGen][Bits to Words] Changing the units of measure for random simulation from number bits to number words 2024-12-24 14:48:57 +01:00
Carmine50 5961231ed1 [CEC][SimGen][Clean codes] Disabling verbose. 2024-12-24 12:27:09 +01:00
Carmine50 7c6d1ffd2d [CEC][SimGen][Bugs] Fixing bugs and removing unused var. 2024-12-24 11:59:23 +01:00
Carmine50 37979dbd94 [CEC][SimGen][Clean codes] Removing commented SAT calls operations. 2024-12-24 11:50:47 +01:00
Carmine50 699c8c4c88 [CEC][SimGen][Clean codes] Removing commented SAT calls operations. 2024-12-24 11:50:11 +01:00
Carmine50 0ba2b7dae9 [CEC][SimGen][Clean codes] Removing unused parameters. 2024-12-24 11:49:17 +01:00
Carmine50 1a89f7ff63 [CEC][SimGen][CLI] Changed function name and help message. Added new option to specify file where to dump simulation vectors. Commented out too verbose information 2024-12-24 11:43:18 +01:00
Carmine50 463cf6a7df [CEC][SimGen][ABC Integration] Removed SAT solver calls and saving the simulation vectors in an internal data structure to pass to other functions. 2024-12-24 11:06:00 +01:00
Alan Mishchenko 14d46bfef8 Fixing big-endian problem if &fx and &deepsyn. 2024-12-23 20:26:00 -08:00
Alan Mishchenko 733fec328c Fixing big-endian problems in mfs2 and &mfs. 2024-12-23 20:04:21 -08:00
Alan Mishchenko cc894c5905 Deleting unused files. 2024-12-23 17:03:29 -08:00
Alan Mishchenko b81df1744f Removing unhelpful assertion. 2024-12-23 10:00:37 -08:00
Alan Mishchenko e21399f3bc Compiler warning. 2024-12-23 08:55:59 -08:00
alanminko 943bc0191c
Merge pull request #352 from wjrforcyber/conditional_jump 
Fix(&if -x): Conditional jump or move depends on uninitialised value(s)
 2024-12-23 08:52:54 -08:00
alanminko 01c6102ca7
Merge pull request #350 from wjrforcyber/put_bug_on_choice 
Fix(&put): &put bug with choices
 2024-12-23 08:52:29 -08:00
alanminko 733d2cd390
Merge pull request #348 from wjrforcyber/mem_leak 
Refactor(MemLeak): MemLeak fix in orchestrate
 2024-12-23 08:52:12 -08:00
wjrforcyber fdd66a8963
Fix(&if -x): Conditional jump or move depends on uninitialised value(s) 
From Valgrind:
==44570== Conditional jump or move depends on uninitialised value(s)
==44570==    at 0x9DEBA1: Dau_DsdRemoveBraces (dauMerge.c:563)
==44570==    by 0x9D1F53: Dau_DsdDecompose (dauDsd.c:1926)
==44570==    by 0x835523: If_DsdManCompute (ifDsd.c:2073)
==44570==    by 0x84177C: If_ObjPerformMappingAnd (ifMap.c:315)
==44570==    by 0x843720: If_ManPerformMappingRound (ifMap.c:667)
==44570==    by 0x813A01: If_ManPerformMappingComb (ifCore.c:126)
==44570==    by 0x813C88: If_ManPerformMapping (ifCore.c:91)
==44570==    by 0xE5F147: Gia_ManPerformMappingInt (giaIf.c:2503)
==44570==    by 0xE60976: Gia_ManPerformMapping (giaIf.c:2566)
==44570==    by 0x543605: Abc_CommandAbc9If (abc.c:41910)
==44570==    by 0x654739: CmdCommandDispatch (cmdUtils.c:157)
==44570==    by 0x64E0F2: Cmd_CommandExecute (cmdApi.c:210)
 2024-12-23 23:24:47 +08:00
Alan Mishchenko 42c2c54969 Fixing a big-endian issue in SOP manipulation and factoring. 2024-12-22 14:15:35 -08:00
Alan Mishchenko 207cfddaa8 Experiments with structural LUT cascade mapping. 2024-12-21 21:24:45 -08:00
Carmine50 ef8c35f95d [CEC][SimGen][LUT mapping] Adding option to consider an already mapped circuit before executing SimGen 2024-12-21 20:22:02 +01:00
Carmine50 8a1c28bf0f [CEC][SimGen][LUT mapping] Adding option to consider an already mapped circuit before executing SimGen 2024-12-21 20:15:40 +01:00
Carmine50 f407156de6 [CEC][SimGen][Warnings] Re-adjusted code to remove unused variables and avoid warnings compilation 2024-12-21 16:19:47 +01:00
Carmine50 bd80d2e459 [CEC][SimGen][Warnings] Re-adjusted code to remove unused variables and avoid warnings compilation 2024-12-21 16:04:45 +01:00
Carmine50 a6de82377d [CEC][SimGen][Warnings] Re-adjusted code to remove unused variables and avoid warnings compilation 2024-12-21 15:57:47 +01:00
Carmine50 c104d9cb72 [CEC][SimGen][Warnings] Re-adjusted code to remove unused variables and avoid warnings compilation 2024-12-21 14:26:54 +01:00
Carmine50 b999084ade [CEC][SimGen][CLI] Removed option of nMaxStep since it was unused 2024-12-19 18:12:28 +01:00
Carmine50 30af6f9868 [CEC][SimGen][CLI] Change name of command for simgen 2024-12-19 17:25:45 +01:00
Carmine50 87a3cafa44 [CEC][SimGen][Main Algo] Added main algorithm of SimGen and all necessary utility functions 2024-12-19 14:23:19 +01:00
Carmine50 0ea9929e65 [CEC][SimGen][Man new data struct] Added new variables in Gia_Man to save truth tables, MFFC infos and luts rankings for simgen. Modified also the function type to extract MFFC info 2024-12-19 14:22:26 +01:00
Carmine50 91dcfae020 [CEC][SimGen][Experiment ID] Added experiment ID option to test different experiments with simgen 2024-12-18 19:56:12 +01:00
Carmine50 cbd4456805 [CEC][SimGen][Experiment ID] Added experiment ID option to test different experiments with simgen 2024-12-18 19:53:44 +01:00
Carmine50 070ae52a46 [CEC][SimGen][Custom Parameters] Added custom parameters for SimGen CEC algo 2024-12-18 19:36:50 +01:00
Carmine50 99648e132f [CEC][SimGen][CLI] Added command line function to call SimGen main function. 2024-12-18 18:43:38 +01:00
wjrforcyber a8c65f1343
Fix(&put): &put bug with choices 
Related: #349
 2024-12-17 14:05:58 +08:00
Alan Mishchenko 8ba3d9b91c Trying anothe resource limit in scorr. 2024-12-14 13:44:18 -08:00
Alan Mishchenko 6754da13f2 Compiler warning. 2024-12-08 00:19:54 -08:00
wjrforcyber 7391a297bb
Refactor(MemLeak): MemLeak fix in orchestrate 2024-12-06 18:13:32 +08:00
Ethan Mahintorabi 01c9a65a47
map: Add Mio_Library_t* parameter to Abc_NtkMap 
This lets users of the ABC API call map without relying on the static
Mio_Library_t* in Abc_FrameReadLibGen.
 2024-12-02 06:55:42 +00:00
Alan Mishchenko 14168eb509 Updating command "rungen" to generate random functions. 2024-11-27 22:01:27 -08:00
Alan Mishchenko 1f3cf0aad9 Experiment with "scorr". 2024-11-17 15:44:32 -08:00
Alan Mishchenko 3aff0af0c5 Adding command for generating sorters. 2024-11-11 21:02:59 -08:00
Alan Mishchenko b5a76d8ba3 Compilation problem. 2024-11-10 19:30:24 -08:00
Alan Mishchenko f2e4ceb0e3 Update to "lutexact". 2024-11-10 19:12:40 -08:00
Alan Mishchenko aeb977286f Updates to LUT cascade synthesis. 2024-11-10 18:54:35 -08:00
Alan Mishchenko c787e32f86 Adding postiive minterm count for random functions generated by "lutexact". 2024-11-05 22:01:07 -08:00
Alan Mishchenko 091ff4e7a9 Adding generation of random functions to "lutexact" 2024-11-05 19:23:04 -08:00
Alan Mishchenko ecd948027e Fixing assertion failures in &put. 2024-10-23 14:49:57 +07:00
Alan Mishchenko cb2140dc0c Adding PI/PO name transfer after mapping+retiming. 2024-10-21 20:37:52 +07:00
alanminko 743f3a7bdd
Merge pull request #250 from wjrforcyber/typo 
Refactor(Typo):Typo currently exists
 2024-10-21 01:54:12 -07:00
alanminko 498ec539e6
Merge pull request #340 from aletempiac/acd_improvements 
Performance improvements to ACD
 2024-10-21 01:39:32 -07:00
alanminko a239dd8c0b
Merge pull request #328 from heshpdx/master 
Perf improvement in satsolver
 2024-10-21 01:38:40 -07:00
Alan Mishchenko f1773bd612 Procedure to detect node equivalences across two AIGs. 2024-10-21 15:15:08 +07:00
Alan Mishchenko 74e7c64662 Bug fix in &scorr 2024-10-21 13:16:29 +07:00
aletempiac baf4ddb16a Bug fix (just in the code; it does not affect the execution) 2024-10-15 19:04:49 +02:00
aletempiac d1f78b36cb Bug fix (just in the code; it does not affect the execution) 2024-10-15 19:00:45 +02:00
aletempiac 52c842b648 Cleaning code 2024-10-15 17:54:38 +02:00
aletempiac 46f2300b7b Performance improvements in ACD 2024-10-15 14:45:09 +02:00
Alan Mishchenko 707442e091 Bug fix in &scorr. 2024-10-08 10:01:29 +07:00
Alan Mishchenko 2e3384390a Updating "lutexact" to run on symmetric functions. 2024-10-07 14:10:02 +07:00
Alan Mishchenko af1de4fa9c Improved bit-blasting of some word-level operators. 2024-10-01 20:34:58 +07:00
Alan Mishchenko a78d358e1c Extending &funtrace to dump and load precomputed library. 2024-10-01 20:33:01 +07:00
Alan Mishchenko 6004b7b21e Adding API for inserting danginling flop. 2024-10-01 15:55:45 +07:00
Alan Mishchenko 4369321167 Bug fix. 2024-09-28 22:39:10 +02:00
alanminko 9539306436
Merge pull request #334 from mikesinouye/multilib 
Increase buffer size in filename append utility to support more liberty files.
 2024-09-22 20:48:15 -07:00
Yukio Miyasaka 35a8768c50 ttopt bugfix 2024-09-22 14:34:18 -07:00
Mike Inouye 8179c73e62 Try support for Windows again. 
Signed-off-by: Mike Inouye <mikeinouye@google.com>
 2024-09-18 23:46:28 +00:00
Mike Inouye 5bd52161cd Add #include <stdlib.h> for Windows build support. 
Signed-off-by: Mike Inouye <mikeinouye@google.com>
 2024-09-18 23:29:11 +00:00
Mike Inouye ee5acbbc01 Use <limits.h>'s PATH_MAX macro instead of fixed size. 
Signed-off-by: Mike Inouye <mikeinouye@google.com>
 2024-09-18 23:05:32 +00:00
Mike Inouye db735b632f Increase buffer size in filename append utility to support more liberty files. 
Signed-off-by: Mike Inouye <mikeinouye@google.com>
 2024-09-18 22:24:41 +00:00
Alan Mishchenko 9c152b71e9 Trasferring equivalence in the special-case usage of &scorr. 2024-09-12 18:11:59 -07:00
Alan Mishchenko 0d10253bd0 Another way of writing primary outputs in Verilog. 2024-09-06 06:27:53 -07:00
Alan Mishchenko 3ddd46131c Updating "read_lib" to output all gates when gain-based modeling is used. 2024-09-05 17:53:13 -07:00
Alan Mishchenko 3de73f2756 Updating internal cut manager to prefer cuts with high fanin fanout counts. 2024-09-05 13:27:17 -07:00
Alan Mishchenko 03d92930fa Updating &funtrace to trace function of the primary outputs of the AIG. 2024-09-03 17:16:48 -07:00
Mahesh Madhav ad8f8a2aab Convert the other divide to a multiply 2024-09-03 04:48:07 +00:00
Mahesh Madhav cd711089d7 Perf improvement in satsolver 
Switch one FP divide to an FP multiply (variable is constant).
Calculate ratio inside of verbosity clause, since that is where it is used.
 2024-09-03 04:30:14 +00:00
alanminko 5d6a568c9e
Merge pull request #327 from YosysHQ/povik/aiger-cell-mapping 
Save cell mapping as new 'M' AIGER extension
 2024-08-28 13:23:17 -07:00
Martin Povišer 786a39a294 Make casts explicit 2024-08-28 22:09:34 +02:00
Martin Povišer cb294bbebc Save cell mapping as new 'M' AIGER extension 2024-08-28 16:21:10 +02:00
wjrforcyber 252afb1521
Refactor(Resub): Clear mark A/B 2024-08-28 16:51:33 +08:00
wjrforcyber bcf292fdeb
Refactor(Resub): Clear markB at the beginning 2024-08-28 15:41:09 +08:00
Alan Mishchenko af77b80194 Regrouping recently added code. 2024-08-18 13:57:35 -07:00
Alan Mishchenko 5e35510e25 New APIs for AIG package. 2024-08-18 13:12:08 -07:00
Alan Mishchenko 03b786af99 Experiments with adder-based circuits. 2024-08-17 16:26:20 -07:00
Alan Mishchenko 732abf5b48 Compiler warnings. 2024-08-16 21:35:10 -07:00
Alan Mishchenko 2055b1b490 Adding an option to dump satisfying assignments into a BLIF file. 2024-08-14 14:41:35 -07:00
Alan Mishchenko c099e62032 Adding a switch to complement the primary outputs of an AIG. 2024-08-14 13:40:52 -07:00
Alan Mishchenko 1a62954eb8 Adding command to read ROM data. 2024-08-14 12:56:10 -07:00
Alan Mishchenko e2b7750d3b Experiments with bit-blasting. 2024-08-14 11:40:41 -07:00
Alan Mishchenko c2391686ea Adding BLIF dumping to "lutexact". 2024-08-13 20:03:18 -07:00
alanminko 324ceeaa08
Merge pull request #320 from YosysHQ/povik/revert-pdr 
Revert recent PDR changes
 2024-08-12 17:17:24 -07:00
Alan Mishchenko 81fcf8494e Updating "lutexact" to support single-rail LUT cascade. 2024-08-12 16:26:55 -07:00
Martin Povišer de8620d777 Revert "pdr -X to write CEXes immediately" 
This reverts commit e62e8ac528.
 2024-08-12 22:53:53 +02:00
Martin Povišer 39f6fbb052 Revert "Fix pdr timing output" 
This reverts commit c8d64b8682.
 2024-08-12 22:53:48 +02:00
Martin Povišer ec8419c84b Revert "Improved anytime pdr" 
This reverts commit 5444cf281c.
 2024-08-12 22:53:40 +02:00
Alan Mishchenko 807f6ddacf Experiments with detecting multipliers. 2024-08-10 19:24:00 -07:00
Alan Mishchenko e824cca0ca Fixing a serious bug in bit-blasting when multiplier argments have different bit-width. 2024-08-10 19:13:50 -07:00
Alan Mishchenko 71c4e23f97 Adding cut print-out in &funtrace. 2024-08-10 19:12:19 -07:00
Alan Mishchenko 35a1bbbdb4 Ongoing development related to Boolean decomposition. 2024-08-09 18:33:36 -07:00
Alan Mishchenko 4156a88dbb Extending &funtrace to trace functions found in an AIG. 2024-08-09 12:39:43 -07:00
alanminko 71b409b778
Merge pull request #319 from YosysHQ/povik/rm-buffering-asserts 
Remove extra asserts in buffering code
 2024-08-08 15:00:20 -07:00
alanminko 762a123edc
Merge pull request #318 from YosysHQ/povik/fix-atomic_store-call 
Fix types in call to atomic_store_explicit
 2024-08-08 15:00:05 -07:00
alanminko dce6e4899b
Merge pull request #317 from YosysHQ/povik/fix-transfer-timing 
Handle edge case in Gia_ManTransferTiming
 2024-08-08 14:59:49 -07:00
alanminko 0129b4c60a
Merge pull request #316 from YosysHQ/povik/yosyshq-commands 
Pull command changes from YosysHQ fork
 2024-08-08 14:59:31 -07:00
alanminko e6b36cb5da
Merge pull request #315 from YosysHQ/povik/yosyshq-build 
Pull build-related changes from YosysHQ fork
 2024-08-08 14:58:42 -07:00
Alan Mishchenko 95f1837960 Ongoing development related to Boolean decomposition. 2024-08-07 10:07:39 -07:00
Martin Povišer 2d267786d7 Include `stdbool.h` for portability of atomic calls 2024-08-07 18:13:45 +02:00
Martin Povišer 2a8ea11ce0 Remove extra asserts in buffering code 2024-08-07 18:04:35 +02:00
Martin Povišer f0b070ef70 Fix types in call to atomic_store_explicit 
Deals with the following compilation error:

  src/misc/util/utilPth.c:106:9: error: no matching function for call to 'atomic_store_explicit'
          atomic_store_explicit(&pThData->fWorking, 0, memory_order_release);
          ^~~~~~~~~~~~~~~~~~~~~
  ... /include/c++/v1/atomic:1911:1: note: candidate template ignored: deduced conflicting types for parameter '_Tp' ('bool' vs. 'int')
  atomic_store_explicit(volatile atomic<_Tp>* __o, _Tp __d, memory_order __m) _NOEXCEPT
  ^
 2024-08-07 18:00:17 +02:00
Martin Povišer afbeccb79e Handle edge case in Gia_ManTransferTiming 2024-08-07 17:35:20 +02:00
Jannis Harder 5444cf281c Improved anytime pdr 
(cherry picked from commit c832967200)
 2024-08-07 15:46:44 +02:00
Jannis Harder c8d64b8682 Fix pdr timing output 
(cherry picked from commit acbe1b1f03)
 2024-08-07 15:46:44 +02:00
Jannis Harder e62e8ac528 pdr -X to write CEXes immediately 
(cherry picked from commit f63471bdf5)
 2024-08-07 15:46:44 +02:00
Miodrag Milanovic e334586ae4 Additional fix for large liberty files 
(cherry picked from commit ab5b16ede2)
 2024-08-07 15:46:43 +02:00
David A Roberts 3e65b25942 Apply patch to If_ObjPerformMappingChoice too 
(cherry picked from commit accf50468a)
 2024-08-07 15:46:43 +02:00
David A Roberts eef8c01340 Fix Assertion using &if: `pCutSet->nCuts > 0' 
(cherry picked from commit 316eec6d3f)
 2024-08-07 15:46:43 +02:00
Martin Povišer 1383c76464 Pull YosysHQ read_cex/write_cex changes 
See

 - YosysHQ/abc#19
 - YosysHQ/abc#16
 - commit 6234e18d
 - YosysHQ/abc#14
 - YosysHQ/abc#12
 - YosysHQ/abc#11

Co-authored-by: Jannis Harder <me@jix.one>
Co-authored-by: Claire Xenia Wolf <claire@clairexen.net>
Co-authored-by: Miodrag Milanovic <mmicko@gmail.com>
 2024-08-07 15:46:43 +02:00
Jannis Harder adbcb914b2 Add '-p' option to 'constr' to allow fully removing constraints 
Invoking 'constr -r' converts constraints into POs but does not fully
remove them. Now 'constr -pr' can be used to completely remove them,
leaving the set of non-constraint POs unchanged.

(cherry picked from commit 8c923ad492)
 2024-08-07 14:51:38 +02:00
Martin Povišer 57c3bd36f2 Patch to support WASI builds 
Co-authored-by: whitequark <whitequark@whitequark.org>
 2024-08-07 14:49:13 +02:00
Jannis Harder 6d52a1e449 fold: Option (-s) to make sequential cleanup optional 
(cherry picked from commit 1bd088d027)
 2024-08-07 14:47:00 +02:00
Mohamed A. Bamakhrama 15ec302095 Define S_IREAD|IWRITE macros using IRUSR|IWUSR 
On platforms such as Android, legacy macros are no longer defined.
Hence, we define them in terms of the new POSIX macros if the new ones are defined. Otherwise, we throw an error.

Signed-off-by: Mohamed A. Bamakhrama <mohamed@alumni.tum.de>
Signed-off-by: Miodrag Milanovic <mmicko@gmail.com>
(cherry picked from commit e792072f8a)
 2024-08-07 14:40:26 +02:00
alanminko b23f998b81
Merge pull request #313 from rocallahan/no-exceptions 
Instead of throwing C++ exceptions, just print an error message and a…
 2024-08-06 11:58:26 -07:00
Alan Mishchenko 43adbc77e8 New command for LUT cascade decomposition. 2024-08-06 11:50:54 -07:00
Robert O'Callahan e0a9c29e5a Instead of throwing C++ exceptions, just print an error message and abort 
Many C++ projects forbid the use of exceptions. These are not recoverable
errors anyway, so just abort.
 2024-08-06 17:51:15 +00:00
Alan Mishchenko 1963422c10 Experiments with detecting multipliers. 2024-08-05 20:18:30 -07:00
Alan Mishchenko 037971d9c9 Migrating &stochsyn to generic concurrency interface. 2024-08-03 18:12:03 -07:00
Alan Mishchenko 43426f0a94 Updates to history printing. 2024-08-03 15:35:19 -07:00
Alan Mishchenko b25d9c482a Changing interface of &genrel. 2024-08-02 18:30:09 -07:00
Alan Mishchenko 7d88bf21e9 New command to detect presence of a function in the AIG. 2024-08-02 14:34:57 -07:00
alanminko 3286179c48
Merge pull request #307 from rocallahan/exor-defines 
Using `#define` for short/common names like `BPI` and `DIFFERENT` can…
 2024-08-01 19:24:51 -07:00
Alan Mishchenko 1ac5f6467b Compiler warning. 2024-08-01 19:23:38 -07:00
Alan Mishchenko 8f0cbbdf38 Compiler warning. 2024-08-01 18:36:32 -07:00
Alan Mishchenko 1954e2fcaa Updating DSD profiling procedures. 2024-08-01 18:36:20 -07:00
Robert O'Callahan ab858c5435 Replace `#define`s with enum constants and inline functions in `exor.h` 
This avoids issues with short/common identifiers like `BPI`
and `DIFFERENT` colliding with identifiers used in other projects.
 2024-08-02 01:07:40 +00:00
Robert O'Callahan 53c25250a4 Remove support for `int` sizes other than 32 bits 
No viable platform uses anything other than 32 bits for `int`.
 2024-08-02 01:07:40 +00:00
Alan Mishchenko 9f864ebe76 Trying to fix the compilation issue. 2024-07-31 22:25:01 -07:00
Alan Mishchenko c62bfec2fd Trying to fix the compilation issue. 2024-07-31 21:56:08 -07:00
Alan Mishchenko 3491773f2a Suggested changes to improve thread safety. 2024-07-31 19:05:37 -07:00
alanminko a06dde4cf0
Merge pull request #309 from coastalwhite/chore-popcount-intrinsics 
chore: `__builtin_popcount` to replace BitCount8
 2024-07-31 18:44:58 -07:00
alanminko 279a909a05
Merge pull request #310 from QuantamHD/ethan_fixing_things_2 
Adds option to unmap network using a non static version of the library
 2024-07-31 18:31:26 -07:00
Alan Mishchenko 35d67f6c90 The same problem in another place. 2024-07-31 18:03:38 -07:00
Alan Mishchenko 4f68f08a7b Compilation problem. 2024-07-31 17:44:19 -07:00
Alan Mishchenko 9062ed964c Experiments with circuit generators. 2024-07-31 17:39:11 -07:00
Ethan Mahintorabi 70563cd441
Adds option to unamap network using a non static version of the library 
Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
 2024-07-31 22:19:43 +00:00
Alan Mishchenko 2011cbced9 One more file to be committed. 2024-07-28 15:26:19 -07:00
Alan Mishchenko 96edf40d60 Allow for disabling variable ordering in "lutmin". 2024-07-28 15:25:22 -07:00
Alan Mishchenko 3e1979f3c6 Experimental features of &scorr. 2024-07-28 13:00:32 -07:00
Alan Mishchenko 93388c0d26 Experiments with DSD. 2024-07-27 14:48:02 -07:00
coastalwhite 849adb2fcb chore: add `__builtin_popcount` for MSVC 2024-07-26 21:48:53 +02:00
Alan Mishchenko b5f4afa73b Duplicating AIG after synthesis. 2024-07-26 09:10:39 -07:00
Alan Mishchenko f8a6432d75 Implementation of functional abstraction. 2024-07-24 20:23:07 -07:00
coastalwhite fe3b5bf5fe chore: `__builtin_popcount` to replace BitCount8 
This replaces all occurrences of the `BitCount8` static array with the
`__builtin_popcount`. It is a rather simple and small PR.

Fixes #308.
 2024-07-24 21:46:03 +02:00
alanminko 6262dcffa9
Merge pull request #303 from rocallahan/signed-lbool 
Make `lbool` explicitly signed
 2024-07-24 09:48:03 -07:00
Alan Mishchenko d036ba520e Updating usage messages of QBF commands. 2024-07-24 09:46:56 -07:00
Alan Mishchenko 5450779250 Improved SOP to BDD conversion. 2024-07-21 16:46:39 -07:00
Alan Mishchenko d7a623c151 New API for swicthing activity estimation. 2024-07-17 15:15:49 -07:00
Alan Mishchenko c7ac6be504 Updating parameters. 2024-07-12 07:28:20 -07:00
Alan Mishchenko ae2e3f90f7 Adding command &genmux. 2024-07-11 22:23:06 -07:00
Alan Mishchenko 13998baf97 Allowing the genlib reader to skip gates larger than the given size. 2024-07-10 12:59:10 -07:00
Robert O'Callahan 6c6260465e Make `lbool` explicitly signed 
This avoids issues due to some platforms making `char` signed and others
unsigned. For example, currently the result of promoting `(lbool)-1` to `int`
can differ on different platforms. See
50ffa10848/lib/bill/bill/sat/interface/abc_bsat2.hpp (L156)
for an example of that.
 2024-06-28 01:07:10 +00:00
Alan Mishchenko 2d70debd07 Corner-case bug fix. 2024-06-18 23:01:03 +08:00
alanminko 7beda11621
Merge pull request #302 from mikesinouye/scl 
Change Scl_Pair_t_ membes to long to enable larger liberty file loading.
 2024-06-17 10:12:12 +02:00
Alan Mishchenko 24d420370a Adding switch "i" in "show" to display original AIG IDs of mapped nodes. 2024-06-16 17:49:39 +08:00
Mike Inouye a6bf51111f Change Scl_Pair_t_ member types to long to allow for large liberty file loading. 
Signed-off-by: Mike Inouye <mikeinouye@google.com>
 2024-06-13 23:12:45 +00:00
Alan Mishchenko 806a996b88 Updating the print-out after the bug fix. 2024-05-30 08:43:58 +02:00
Alan Mishchenko 17b1ec7655 Bug fix. 2024-05-29 22:05:40 +02:00
Alan Mishchenko fb4988bb13 New API to print internal nodes. 2024-05-28 22:23:07 +02:00
Xiaoqing Xu 34c2ed73a2 up stream changes 2024-05-23 22:51:15 +00:00
Alan Mishchenko 795fee8d57 Bug fix in &genrel. 2024-05-23 13:51:10 -07:00
Alan Mishchenko 23f351c7c6 Bug fix in word-level abstraction. 2024-05-23 07:47:30 -07:00
Alan Mishchenko 111867432c Compilation problem. 2024-05-21 10:26:01 -07:00
Alan Mishchenko 0cb945ebcd Enabling support of boxes in &nf. 2024-05-21 10:15:46 -07:00
Alan Mishchenko 8ec95e85c6 Bug fix. 2024-05-19 15:03:12 -07:00
Alan Mishchenko c64f927828 Various changes and bug fixes. 2024-05-19 14:47:18 -07:00
Alan Mishchenko 3616fd8fb5 New command "resub_unate" and various changes. 2024-05-17 02:56:33 -07:00
Alan Mishchenko 3fd42912ad Suggested fix. 2024-05-16 06:24:18 -07:00
Alan Mishchenko 5fc62b881f Code to dump resub instances. 2024-05-15 22:21:22 -07:00
Alan Mishchenko d9a08eb44b New command &window to extract windows from an AIG. 2024-05-15 21:41:29 -07:00
Alan Mishchenko 2c02ae89a0 Updating the previous commit. 2024-05-15 09:41:14 -07:00
Alan Mishchenko c906dfb748 Upgrading "twoexact" to read relations in an updated format. 2024-05-15 09:33:57 -07:00
Alan Mishchenko 6ad6539c0f New command &genrel to generate relations for windows in the AIG. 2024-05-14 22:35:43 -07:00
Alan Mishchenko daf3313ce6 New aliases. 2024-05-13 23:31:50 -07:00
Alan Mishchenko 554da94ea6 New command &odc to study observability don't-cares. 2024-05-13 22:59:11 -07:00
Alan Mishchenko 66c7f67b96 New command "resub_core". 2024-05-13 21:31:28 -07:00
Alan Mishchenko f04f9c4353 Updating counter-example generation. 2024-05-08 23:45:14 -07:00
Alan Mishchenko c194c112ae New way to generate counter-examples. 2024-05-08 23:13:31 -07:00
Alan Mishchenko 3c56ccb8fb Add warning when trying to CEC AIGs with xor-gates. 2024-05-08 08:15:45 -07:00
alanminko ae92ea0214
Merge pull request #297 from aletempiac/yosys-flow 
Integrating delay-driven LUT decomposition in &if
 2024-05-07 06:43:53 -07:00
aletempiac d109372fb7 Adding delay-driven LUT decomposition to &if 2024-05-07 11:03:24 +02:00
Alan Mishchenko fb97997991 New command &putontop to create large AIGs. 2024-05-04 13:38:32 -07:00
Ethan Mahintorabi 246337cdbe
Fixes incorrect extern definition of Wlc_BlastMultiplier3 
Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
 2024-05-03 01:55:31 +00:00
aletempiac 5708841672 Merge remote-tracking branch 'origin/master' into yosys-flow 2024-05-02 10:23:16 +02:00
aletempiac 714ab458b7 Adding deriving LUTs to if 2024-05-02 10:23:11 +02:00
aletempiac 39ed8b36d4 Cleaning code 2024-05-02 10:06:40 +02:00
Ethan Mahintorabi b7c7a6d98d
Fixes duplicate declaration of Abc_SclHasDelayInfo 
Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
 2024-05-02 02:15:59 +00:00
William D. Jones 402c2579db Modify include guards in cmd.c so that Windows compilers don't compile Unix-only code. 2024-04-27 19:06:36 -04:00
aletempiac 043a2ffcc6 Adding new XX decomposition to &if 2024-04-23 11:10:16 +02:00
Alan Mishchenko c14d5f3906 Dumping miter statistics. 2024-04-22 22:06:07 -04:00
Martin Povišer e6a3dc602c Fix prototype mismatch for `Gia_ManSimRsb` 2024-04-22 17:34:38 +02:00
aletempiac 864f96b11e Adding decomposition of mapping into LUT structures before returning the result 2024-04-16 17:40:47 +02:00
Peter Gadfort de060a26ad ensure initial library writing also honors prefix 2024-04-16 08:58:28 -04:00
Alan Mishchenko bc725b85de Bug fix in CNF generation for &glucose (three more places). 2024-04-15 20:29:38 -07:00
Alan Mishchenko 2d6b5c9adc Bug fix in CNF generation for &glucose. 2024-04-15 20:25:43 -07:00
Alan Mishchenko 99e0e37da6 Added switch -p in "read_lib" to skip writing cell prefix. 2024-04-14 09:51:00 -07:00
Peter Gadfort 935c6a875d add missing flag to read_lib help 2024-04-12 13:49:44 -04:00
Peter Gadfort 1d90cafd54 add library merging flag to read_lib 
Signed-off-by: Peter Gadfort <gadfort@zeroasic.com>
 2024-04-12 13:27:58 -04:00
aletempiac 045803dcb8 Merge remote-tracking branch 'origin/master' into acd66 2024-04-11 19:02:29 +02:00
aletempiac 0c905f873b Fixes 2024-04-11 19:01:05 +02:00
aletempiac 6052d10fde Adding new command if -U for 2-LUT decompositions under delay profile 2024-04-11 15:45:37 +02:00
aletempiac e8924e5534 Fixes and improvements 2024-04-11 15:44:52 +02:00
aletempiac 5b49724fcc removing acd666 2024-04-11 15:43:22 +02:00
Alan Mishchenko ca78f5e6e5 Bug fix in the resub engine. 2024-04-11 05:05:52 -07:00
aletempiac 32bc1d4ab2 Cleaning and generalizing code 2024-04-11 11:31:28 +02:00
aletempiac 64fea5c4c2 Improving the performance and quality of acd66 2024-04-10 18:43:52 +02:00
aletempiac 6b5ebb3e76 Removing assertion when decomposing into LUTs smaller than 6 2024-04-10 18:42:52 +02:00
aletempiac 8f3447800c Support again decompositions into luts smaller than 6 2024-04-02 11:25:03 +02:00
Alan Mishchenko 6e1653426f Switch to randomly select one choice. 2024-03-28 16:22:06 +08:00
Alan Mishchenko a2cb5eb4e3 Adding command &pms to print miter status. 2024-03-25 23:39:03 +08:00
aletempiac 1f72ffce79 Improving ACD performance with bail-out conditions 2024-03-25 14:23:43 +01:00
Alan Mishchenko b0d2ff1c63 Exact synthesis using NAND-gates. 2024-03-24 00:10:08 +09:00
aletempiac 6aacf524aa Performance improvement and fixes 2024-03-22 19:19:35 +01:00
aletempiac 8a314db8dc Bug fix 2024-03-22 15:39:52 +01:00
Alan Mishchenko 2c0943ff62 Fixiing compiler problem on Windows. 2024-03-19 09:34:20 +09:00
Alan Mishchenko 5d3d77fcfe Fixing Windows compiler problem. 2024-03-19 08:54:32 +09:00
Alan Mishchenko c32f36af08 Fixing c vs c++ header file issue. 2024-03-19 08:13:07 +09:00
Alan Mishchenko b31ab1960b Fixing compilation issues on Windows. 2024-03-18 21:30:46 +09:00
aletempiac db72df7a63 Merge remote-tracking branch 'origin/master' into acd66 2024-03-18 10:08:48 +01:00
aletempiac 3737a69d8d Adding new ACD66 with support for multiple shared-set variables 2024-03-18 10:01:59 +01:00
Alan Mishchenko 210474b08c Bug fix in &gen_hie. 2024-03-18 07:49:35 +09:00
alanminko 3040b8ddd5
Merge pull request #282 from allen1236/master 
&brecover with speculative reduction
 2024-03-16 08:52:57 +09:00
Allen Ho b7884aaf2b clean up & add options for &brecover 2024-03-16 01:40:11 +08:00
Allen Ho 015dd2a367 use speculative in &brecover 2024-03-15 16:56:10 +08:00
Alan Mishchenko a16a0f1027 Writing Verilog for AIG using NAND gates. 2024-03-06 01:40:48 -08:00
Allen Ho d87b1cd543 fixed some warnings in bsat2 2024-03-04 10:16:14 +08:00
Allen Ho bfbec71211 &stc_eco and &brecover done 2024-03-04 09:36:35 +08:00
Allen Ho bcf04fadb6 &brecover done 2024-03-04 00:54:23 +08:00
Alan Mishchenko a747f46292 More changes to compile with g++. 2024-03-02 17:21:05 -08:00
Alan Mishchenko eb24d29777 More changes. 2024-03-02 17:10:30 -08:00
Alan Mishchenko b73f1030a6 More changes. 2024-03-02 17:03:42 -08:00
Alan Mishchenko b627aa7cb5 More changes. 2024-03-02 16:57:00 -08:00
Alan Mishchenko ce44eda85a More changes. 2024-03-02 16:46:09 -08:00
Alan Mishchenko f6f542c873 More changes to compile with namespaces. 2024-03-02 16:38:16 -08:00
Alan Mishchenko 4de4605836 More changees to compile new code with namespaces. 2024-03-02 16:31:41 -08:00
Alan Mishchenko a1159d98df Fixing a compiler problem with namespaces. 2024-03-02 16:10:37 -08:00
alanminko 390a0e8ef3
Merge pull request #279 from allen1236/master 
Sat-sweeping-based ECO (&str_eco)
 2024-03-02 15:38:08 -08:00
Allen Ho 23654254e1 clean up 2024-03-03 03:06:13 +08:00
Allen Ho f5f4dca013 clean up 2024-03-02 21:08:10 +08:00
aletempiac cd407e2ba3 Activate use_first flag in acd_decompose 2024-03-01 10:05:30 +01:00
aletempiac 9bec2afd60 Removing -z flag to execute delay-driven ACD 2024-03-01 10:04:48 +01:00
Allen Ho 6f5656c188 shared EI/EO not handled yet 2024-03-01 16:05:41 +08:00
Alan Mishchenko 1fd79c8430 Fixing a bug in input/output name ordering. 2024-02-29 15:19:47 -08:00
aletempiac fa8a277765 Changing search space exploration of ACD to search for better implementation and prune unnecessary computations based on theoretical properties 2024-02-29 17:16:49 +01:00
aletempiac 48b5f3b399 ACD66 performance improvements by avoiding unnecessary computation 2024-02-29 17:15:29 +01:00
aletempiac 75abcd376b Adding bindings to use ACD66 instead of generic ACD 2024-02-28 09:51:32 +01:00
aletempiac 44a65c23ed Adding relaxation on the maximum free set constraint 2024-02-27 17:47:43 +01:00
aletempiac d3f140f1df Performance improvements 2024-02-27 17:36:24 +01:00
aletempiac f72000f5ae Adding ACD cascade 666, performance improvements 2024-02-21 18:25:48 +01:00
aletempiac eba56b088f Cleaning code and performance improvements 2024-02-21 17:13:29 +01:00
aletempiac 13fd0d55c7 Removing unnecessary structs 2024-02-21 09:47:16 +01:00
aletempiac 0cd548f1cb Performance improvements to ACD 2024-02-20 17:28:50 +01:00
aletempiac 0e471e3ff8 Performance improvements of ACD 66 2024-02-20 14:41:52 +01:00
aletempiac 7b74810047 Changing policy of finding ACD 66 decomposition (faster and 100 percent coverage) 2024-02-16 16:43:24 +01:00
aletempiac 17afd93c78 Extending ACD to work up to 11 variables 2024-02-08 15:36:09 +01:00
aletempiac 3f80b202cd C++11 compatible code 2024-02-08 14:57:42 +01:00
aletempiac 2afaeac823 Adding hash table to reduce computations 2024-02-08 11:20:19 +01:00
aletempiac 2d9af6c9a4 Adding ACD for 66 LUT structure using a new method 2024-02-08 09:36:58 +01:00
Alan Mishchenko 52e0a10bf7 Fixing a compiler problem. 2024-02-05 20:49:36 -08:00
Alan Mishchenko e9a0bf6bf9 Adding reversing of simulation bits in &sim_read. 2024-02-05 20:32:11 -08:00
Alan Mishchenko d7ef3cc030 Bug fix in &fx. 2024-02-05 19:29:50 -08:00
Alan Mishchenko 62a22c7574 Bug fix in blasting multipliers with different argument bit-width. 2024-02-05 19:26:36 -08:00
Allen Ho c74144c6eb str_eco ver1 2024-02-01 07:25:46 +08:00
Alan Mishchenko 6d1d52deaa Adding an option to read the RTL elaboration library from the current directory. 2024-01-30 20:22:55 -08:00
Alan Mishchenko d6555f48dd Adding a switch to not write the timestamp in the AIGER file. 2024-01-26 07:31:20 -08:00
Alan Mishchenko 5fa9192412 Change how &stochsyn runs on a single core. 2024-01-18 18:34:50 -08:00
Alan Mishchenko 8da884de85 Switch to reverse the order of bits. 2024-01-18 18:23:11 -08:00
Baruch Sterin 234af64a8c Workaround for C++17 compilation (on clang) 2024-01-18 09:58:18 -08:00
Baruch Sterin d140535d64 Adapt previous merge by @aletempiac to compile with ABC namespaces. 2024-01-17 15:04:31 -08:00
aletempiac d223898f3d Merge remote-tracking branch 'origin/master' into acd 2024-01-16 17:44:45 +01:00
aletempiac 67aab70cff Moving ACD package to if folder 2024-01-16 17:42:43 +01:00
Alan Mishchenko 5bc99574fc Eliminating dependency on "abc.rc" in "&deepsyn". 2024-01-12 22:54:44 -08:00
aletempiac 38e632a954 Consider buffers in matrix covering as free 2024-01-12 14:50:34 +01:00
Alan Mishchenko 8c7327b8df Recognizing interface of the module when writing Verilog. 2024-01-11 22:19:50 -08:00
Alan Mishchenko dc68fe27f9 Saving module interface. 2024-01-11 19:45:42 -08:00
aletempiac 7dcc10a254 Minor fixes 2024-01-10 15:18:39 +01:00
alanminko 7f0a319564
Merge pull request #269 from rmlarsen/speedup_scanning 
Micro-optimizations to speed up the Liberty parser by ~1.67x.
 2023-12-21 12:58:42 +09:00
Alan Mishchenko 5978ccdb52 Updating sleep command to wait for file. 2023-12-21 12:16:33 +09:00
Rasmus Munk Larsen 706112ebd8 Micro-optimizations to speed up the Liberty parser by ~1.67x. 
Signed-off-by: Rasmus Munk Larsen <rmlarsen@google.com>
 2023-12-19 16:13:52 -08:00
Alan Mishchenko 7fe92148cc New command to put computation to sleep. 2023-12-18 21:04:31 +09:00
Allen Ho 284b9d6a9c extended box report; 2023-12-10 21:30:46 +08:00
Alan Mishchenko 16a3c5fc30 Add copying names in &saveaig and &loadaig. 2023-12-09 21:53:48 +08:00
Allen Ho 9bb5333f62 extend bo 2023-12-07 19:07:52 +08:00
aletempiac b3d2419d9a Formatting, renaming, and cleaning code 2023-11-27 13:38:36 +01:00
aletempiac 6097fd4349 Code formatting 2023-11-24 14:24:20 +01:00
aletempiac 23cfcc1e1f Improving efficiency and removing useless code 2023-11-24 12:18:49 +01:00
aletempiac 43f4dccb4f run time improvements in computing the column multiplicity 2023-11-23 16:29:33 +01:00
Allen Ho a316847341 correct fanout count 2023-11-23 19:33:05 +08:00
aletempiac acdd08fd9b Performance improvements 2023-11-21 11:47:56 +01:00
aletempiac d10d450f38 Final implementation 2023-11-19 21:59:40 +01:00
aletempiac 219d6d86d6 Simplifying code 2023-11-19 19:33:19 +01:00
aletempiac 672fd1b629 removing not used methods 2023-11-19 18:53:54 +01:00
aletempiac f7a520b957 restructuring code 2023-11-19 18:51:50 +01:00
aletempiac 1d7dfd25c6 Improving ACD mapping 2023-11-17 16:58:17 +01:00
aletempiac 3d602e2f00 Adding sorting of columns in heuristic covering 2023-11-17 15:55:10 +01:00
aletempiac 1ca7a3a353 Remove symmetries in covering table 2023-11-17 15:49:29 +01:00
aletempiac b77bdeeb17 Enabling ACD for area 2023-11-16 19:21:29 +01:00
aletempiac 8aa57c5d54 Decisions on late arrival 2023-11-16 18:53:02 +01:00
aletempiac 548fd6afb2 New version of enumeration of combinations 2023-11-16 18:20:05 +01:00
aletempiac b32bbdfef3 Improving set covering using unitary cost 2023-11-16 15:33:19 +01:00
aletempiac dcc960beba Adding local search for covering 2023-11-15 21:57:29 +01:00
aletempiac c07080f818 Adding heuristic set covering solver 2023-11-15 21:32:34 +01:00
aletempiac 66cdd36d20 Runtime improvements in decomposition 2023-11-15 19:03:29 +01:00
aletempiac 1632dc0d4e First version of ACD 2023-11-15 18:38:00 +01:00
Alan Mishchenko 6ca7eab466 Prototype of integrating decomposition into "if". 2023-11-14 12:58:03 -08:00
Alan Mishchenko eb264c5d22 Suggested fixes. 2023-11-13 17:19:54 -08:00
WWFUG 67a2b97cf0 added -I options in &bmiter 2023-11-08 19:00:03 +08:00
Alan Mishchenko 04dba9eed9 Adding callback for wire caps during sizing. 2023-11-06 17:35:41 -08:00
Allen Ho 50010139ef why 2023-11-06 18:37:40 +08:00
Allen Ho ba64d6118b out-side box matching 2023-10-30 15:09:01 -07:00
Alan Mishchenko 5de12aa6b3 Experiments with SAT solving. 2023-10-23 11:30:44 -07:00
Alan Mishchenko 1bf21626c0 Bug fix. 2023-10-23 11:04:35 -07:00
Alan Mishchenko 76e8d21aaf Printout changes. 2023-10-23 10:48:43 -07:00
Alan Mishchenko 538ecb4515 Updating printouts. 2023-10-23 09:38:24 -07:00
Alan Mishchenko 01ad71b26f Experiments with verification. 2023-10-23 09:38:08 -07:00
Alan Mishchenko 8dbf8965fd Adding batch option to "scrgen". 2023-10-23 09:37:04 -07:00
Alan Mishchenko 652a0aaef7 Compiler warning. 2023-10-20 22:42:40 -07:00
Alan Mishchenko 72b423ba14 Experiments with SAT solving. 2023-10-20 20:53:43 -07:00