mirror of https://github.com/YosysHQ/abc.git
Bug fix in &gen_hie.
This commit is contained in:
parent
3040b8ddd5
commit
210474b08c
|
|
@ -2282,6 +2282,8 @@ void Gia_GenSandwich( char ** pFNames, int nFNames, char * pFileName )
|
|||
fprintf( pFile, "endmodule\n" );
|
||||
fclose( pFile );
|
||||
for ( i = 0; i < nFNames; i++ ) {
|
||||
Vec_PtrFreeFree( pGias[i]->vNamesIn ); pGias[i]->vNamesIn = NULL;
|
||||
Vec_PtrFreeFree( pGias[i]->vNamesOut ); pGias[i]->vNamesOut = NULL;
|
||||
Gia_ManDumpVerilog( pGias[i], Extra_FileNameGenericAppend(pGias[i]->pSpec, ".v"), NULL, 0, 0, 1, 0, 0 );
|
||||
printf( "Dumped Verilog file \"%s\"\n", Extra_FileNameGenericAppend(pGias[i]->pSpec, ".v") );
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue