mirror of https://github.com/YosysHQ/abc.git
Adding an option to read the RTL elaboration library from the current directory.
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@ -92,7 +92,7 @@ void Wln_End( Abc_Frame_t * pAbc )
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******************************************************************************/
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int Abc_CommandYosys( Abc_Frame_t * pAbc, int argc, char ** argv )
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{
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extern Gia_Man_t * Wln_BlastSystemVerilog( char * pFileName, char * pTopModule, char * pDefines, int fSkipStrash, int fInvert, int fTechMap, int fVerbose );
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extern Gia_Man_t * Wln_BlastSystemVerilog( char * pFileName, char * pTopModule, char * pDefines, int fSkipStrash, int fInvert, int fTechMap, int fLibInDir, int fVerbose );
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extern Rtl_Lib_t * Wln_ReadSystemVerilog( char * pFileName, char * pTopModule, char * pDefines, int fCollapse, int fVerbose );
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FILE * pFile;
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@ -102,11 +102,12 @@ int Abc_CommandYosys( Abc_Frame_t * pAbc, int argc, char ** argv )
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int fBlast = 0;
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int fInvert = 0;
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int fTechMap = 1;
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int fLibInDir = 0;
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int fSkipStrash = 0;
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int fCollapse = 0;
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int c, fVerbose = 0;
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Extra_UtilGetoptReset();
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while ( ( c = Extra_UtilGetopt( argc, argv, "TDbismcvh" ) ) != EOF )
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while ( ( c = Extra_UtilGetopt( argc, argv, "TDbismlcvh" ) ) != EOF )
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{
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switch ( c )
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{
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@ -140,6 +141,9 @@ int Abc_CommandYosys( Abc_Frame_t * pAbc, int argc, char ** argv )
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case 'm':
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fTechMap ^= 1;
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break;
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case 'l':
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fLibInDir ^= 1;
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break;
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case 'c':
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fCollapse ^= 1;
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break;
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@ -174,11 +178,11 @@ int Abc_CommandYosys( Abc_Frame_t * pAbc, int argc, char ** argv )
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{
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Gia_Man_t * pNew = NULL;
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if ( !strcmp( Extra_FileNameExtension(pFileName), "v" ) )
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pNew = Wln_BlastSystemVerilog( pFileName, pTopModule, pDefines, fSkipStrash, fInvert, fTechMap, fVerbose );
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pNew = Wln_BlastSystemVerilog( pFileName, pTopModule, pDefines, fSkipStrash, fInvert, fTechMap, fLibInDir, fVerbose );
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else if ( !strcmp( Extra_FileNameExtension(pFileName), "sv" ) )
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pNew = Wln_BlastSystemVerilog( pFileName, pTopModule, pDefines, fSkipStrash, fInvert, fTechMap, fVerbose );
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pNew = Wln_BlastSystemVerilog( pFileName, pTopModule, pDefines, fSkipStrash, fInvert, fTechMap, fLibInDir, fVerbose );
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else if ( !strcmp( Extra_FileNameExtension(pFileName), "rtlil" ) )
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pNew = Wln_BlastSystemVerilog( pFileName, pTopModule, pDefines, fSkipStrash, fInvert, fTechMap, fVerbose );
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pNew = Wln_BlastSystemVerilog( pFileName, pTopModule, pDefines, fSkipStrash, fInvert, fTechMap, fLibInDir, fVerbose );
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else
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{
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printf( "Abc_CommandYosys(): Unknown file extension.\n" );
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@ -204,7 +208,7 @@ int Abc_CommandYosys( Abc_Frame_t * pAbc, int argc, char ** argv )
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}
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return 0;
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usage:
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Abc_Print( -2, "usage: %%yosys [-T <module>] [-D <defines>] [-bismcvh] <file_name>\n" );
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Abc_Print( -2, "usage: %%yosys [-T <module>] [-D <defines>] [-bismlcvh] <file_name>\n" );
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Abc_Print( -2, "\t reads Verilog or SystemVerilog using Yosys\n" );
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Abc_Print( -2, "\t-T : specify the top module name (default uses \"-auto-top\")\n" );
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Abc_Print( -2, "\t-D : specify defines to be used by Yosys (default \"not used\")\n" );
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@ -212,6 +216,7 @@ usage:
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Abc_Print( -2, "\t-i : toggle inverting the outputs (useful for miters) [default = %s]\n", fInvert? "yes": "no" );
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Abc_Print( -2, "\t-s : toggle no structural hashing during bit-blasting [default = %s]\n", fSkipStrash? "no strash": "strash" );
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Abc_Print( -2, "\t-m : toggle using \"techmap\" to blast operators [default = %s]\n", fTechMap? "yes": "no" );
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Abc_Print( -2, "\t-l : toggle looking for \"techmap.v\" in the current directory [default = %s]\n", fLibInDir? "yes": "no" );
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Abc_Print( -2, "\t-c : toggle collapsing design hierarchy using Yosys [default = %s]\n", fCollapse? "yes": "no" );
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Abc_Print( -2, "\t-v : toggle printing verbose information [default = %s]\n", fVerbose? "yes": "no" );
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Abc_Print( -2, "\t-h : print the command usage\n");
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@ -167,7 +167,7 @@ Rtl_Lib_t * Wln_ReadSystemVerilog( char * pFileName, char * pTopModule, char * p
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unlink( pFileTemp );
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return pNtk;
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}
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Gia_Man_t * Wln_BlastSystemVerilog( char * pFileName, char * pTopModule, char * pDefines, int fSkipStrash, int fInvert, int fTechMap, int fVerbose )
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Gia_Man_t * Wln_BlastSystemVerilog( char * pFileName, char * pTopModule, char * pDefines, int fSkipStrash, int fInvert, int fTechMap, int fLibInDir, int fVerbose )
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{
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Gia_Man_t * pGia = NULL;
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char Command[1000];
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@ -183,7 +183,7 @@ Gia_Man_t * Wln_BlastSystemVerilog( char * pFileName, char * pTopModule, char *
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pFileName,
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pTopModule ? "-top " : "-auto-top",
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pTopModule ? pTopModule : "",
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fTechMap ? "techmap; setundef -zero; " : "", pFileTemp );
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fTechMap ? (fLibInDir ? "techmap -map techmap.v; setundef -zero; " : "techmap; setundef -zero; ") : "", pFileTemp );
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if ( fVerbose )
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printf( "%s\n", Command );
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if ( !Wln_ConvertToRtl(Command, pFileTemp) )
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