AngeloJacobo
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0ca641799d
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add bit files for example demo
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2024-06-10 16:44:41 +08:00 |
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AngeloJacobo
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ecfe59ab5c
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add example demo for qmtech wukong
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2024-06-10 16:09:36 +08:00 |
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AngeloJacobo
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085b959325
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replace clock wizard with PLL
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2024-06-09 15:31:27 +08:00 |
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AngeloJacobo
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19bfab3a60
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resolve error due to change in directory
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2024-06-09 14:16:31 +08:00 |
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AngeloJacobo
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26ae0cd660
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resolve errors due to change in directory
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2024-06-09 14:12:13 +08:00 |
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AngeloJacobo
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79a2c63bb8
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add example demo for enclustra_kx2_st1
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2024-06-09 13:28:31 +08:00 |
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AngeloJacobo
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8fb24dd180
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add copyright on headers
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2024-06-09 12:01:30 +08:00 |
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AngeloJacobo
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2333095668
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clean repo
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2024-06-09 11:31:58 +08:00 |
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AngeloJacobo
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75531be3c2
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clean repo
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2024-06-09 11:12:52 +08:00 |
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Angelo Jacobo
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1ce369cc1f
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Merge pull request #6 from AngeloJacobo/kimos_dev
add support for kimos project
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2024-06-09 10:52:18 +08:00 |
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AngeloJacobo
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a1b15fb9d6
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elevate DIC and RTT_NOM as parameters
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2024-06-09 10:50:18 +08:00 |
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Angelo Jacobo
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9737a11868
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Merge pull request #4 from regymm/main
Added Nexys Video Vivado/OpenXC7 support
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2024-06-09 09:27:08 +08:00 |
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Angelo Jacobo
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df776e059a
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Merge pull request #5 from AngeloJacobo/new_feature_axi
added AXI4 interface option on top of current wishbone interface
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2024-06-03 17:41:45 +08:00 |
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AngeloJacobo
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91fc6d8ed6
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moved axi-related files to separate folders
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2024-06-03 17:36:19 +08:00 |
regymm
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6d2acd9563
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Fixed chipdb path
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2024-06-02 20:59:44 +09:00 |
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regymm
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7c196bf595
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Added Nexys Video Vivado/OpenXC7 support
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2024-06-02 20:50:12 +09:00 |
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AngeloJacobo
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593f56ac4a
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resolve warning in implementation: not connected to load
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2024-06-02 19:20:10 +08:00 |
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AngeloJacobo
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9c440d535f
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fix bug in write levelling with cntvalue > 15 (reaches 31), changed mark_debug for debugging
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2024-06-02 19:19:17 +08:00 |
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AngeloJacobo
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66f0daf0e9
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added AXI4 feature
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2024-06-01 15:30:15 +08:00 |
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AngeloJacobo
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a6982da97d
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match dic and rtt_nom settings
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2024-05-26 20:53:00 +08:00 |
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AngeloJacobo
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eaa45f01d5
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fix error in formal verif
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2024-05-26 20:27:53 +08:00 |
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AngeloJacobo
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fe6919c987
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formally verify only the controller
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2024-05-26 20:27:18 +08:00 |
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AngeloJacobo
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57aebc6eef
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fixed error in slot calculation
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2024-05-25 13:49:48 +08:00 |
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AngeloJacobo
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18283f4436
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clean verilator lint by making parameters integer (instead of being inferred as real)
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2024-05-24 22:43:34 +08:00 |
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AngeloJacobo
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88a913f8da
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clean verilator lint
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2024-05-24 21:51:20 +08:00 |
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AngeloJacobo
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237752fa3d
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clean printed details
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2024-05-06 17:11:04 +08:00 |
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AngeloJacobo
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f1aa850c9c
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fixed LANES
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2024-05-05 21:18:05 +08:00 |
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AngeloJacobo
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1d1fd96893
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fixed bug when READ_SLOT and WRITE_SLOT is the same
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2024-05-05 21:15:02 +08:00 |
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AngeloJacobo
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61cc54ee89
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simplify constraint file
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2024-05-05 16:04:47 +08:00 |
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AngeloJacobo
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0fbd2e7cbb
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add more comments how design works
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2024-05-05 16:00:09 +08:00 |
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AngeloJacobo
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e4716b6675
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removed OPT parameter
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2024-05-05 15:43:40 +08:00 |
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AngeloJacobo
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22f6db696c
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automatically generate CL and CWL value based on ddr3 clock period
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2024-05-05 15:21:55 +08:00 |
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AngeloJacobo
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bb26b0ef4c
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fixed BYTE_LANES
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2024-05-05 14:03:51 +08:00 |
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AngeloJacobo
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81a6ab32f9
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removed OPT parameters (no use), and add defines
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2024-05-05 13:32:37 +08:00 |
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Angelo Jacobo
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e9633ddae7
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fixed instantiation template
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2024-05-05 13:27:51 +08:00 |
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Angelo Jacobo
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4491ddaa18
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update waveform config
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2024-04-28 16:22:30 +08:00 |
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Angelo Jacobo
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f70180b7c7
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add calibration_state signal to monitor calibration
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2024-04-28 16:22:11 +08:00 |
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Angelo Jacobo
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a14afa4c4b
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zero all delays
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2024-04-28 16:21:07 +08:00 |
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Angelo Jacobo
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926e167376
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zero all delays
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2024-04-28 16:20:39 +08:00 |
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Angelo Jacobo
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c4242a9cae
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Merge pull request #2 from AngeloJacobo/dev
make vivado waveform config more organized
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2024-04-21 14:05:59 +08:00 |
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Angelo Jacobo
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d959ecf8d2
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make vivado waveform config more organized
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2024-04-21 13:47:37 +08:00 |
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Angelo Jacobo
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da8eaa5d91
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make internal test shorter during sim
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2024-04-21 13:06:19 +08:00 |
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Angelo Jacobo
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a354a8d4ef
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Merge pull request #1 from AngeloJacobo/dev
Dev branch pull request
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2024-04-20 15:18:30 +08:00 |
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Angelo Jacobo
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81865ea2f8
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make controller not dependent on chip-select cs_n
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2024-04-20 15:03:47 +08:00 |
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Angelo Jacobo
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d2f0fd046b
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correct clock periods to ps
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2024-04-20 12:26:39 +08:00 |
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Angelo Jacobo
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25685e5769
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make internal test shorter during simulation
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2024-04-20 12:24:49 +08:00 |
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Angelo Jacobo
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be88286891
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fixed rtoi error in vivado
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2024-04-20 12:20:50 +08:00 |
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Angelo Jacobo
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d489b867d7
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fixed rtoi error in vivado
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2024-04-20 12:20:20 +08:00 |
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Angelo Jacobo
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31f02da699
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fixed rtoi error from vivado and add more options for speedbin and capacity
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2024-04-20 12:18:04 +08:00 |
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Angelo Jacobo
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eb5774d518
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add more comments
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2024-03-28 14:59:56 +08:00 |