add copyright on headers

2024-06-09 12:01:30 +08:00 · 2024-06-09 12:01:30 +08:00 · 8fb24dd180
parent 2333095668
commit 8fb24dd180
7 changed files with 168 additions and 27 deletions
--- a/example_demo/arty_s7/arty_ddr3.v
+++ b/example_demo/arty_s7/arty_ddr3.v
@ -1,3 +1,38 @@
+////////////////////////////////////////////////////////////////////////////////
+//
+// Filename: arty_ddr3.v
+// Project: UberDDR3 - An Open Source DDR3 Controller
+//
+// Purpose: Example demo of UberDDR3 for Arty-S7. Mechanism:
+//          - four LEDs will light up once UberDDR3 is done calibrating
+//          - if UART (9600 Baud Rate)receives small letter ASCII (a-z), this value will be written to DDR3 
+//          - if UART receives capital letter ASCII (A-Z), the small letter equivalent will be retrieved from DDR3 by doing
+//          - a read request, once read data is available this will be sent to UART to be streamed out.
+//          THUS:
+//          - Sendng "abcdefg" to the UART terminal will store that small latter to DDR3
+//          - Then sending "ABCDEFG" to the UART terminal will return the small letter equivalent: "abcdefg"
+//
+// Engineer: Angelo C. Jacobo
+//
+////////////////////////////////////////////////////////////////////////////////
+//
+// Copyright (C) 2023-2024  Angelo Jacobo
+// 
+//     This program is free software: you can redistribute it and/or modify
+//     it under the terms of the GNU General Public License as published by
+//     the Free Software Foundation, either version 3 of the License, or
+//     (at your option) any later version.
+// 
+//     This program is distributed in the hope that it will be useful,
+//     but WITHOUT ANY WARRANTY; without even the implied warranty of
+//     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+//     GNU General Public License for more details.
+// 
+//     You should have received a copy of the GNU General Public License
+//     along with this program.  If not, see <https://www.gnu.org/licenses/>.
+//
+////////////////////////////////////////////////////////////////////////////////
+
 `timescale 1ns / 1ps

   module arty_ddr3
@ -44,13 +79,6 @@
     assign led[2] = (o_debug1[4:0] == 23); //light up if at DONE_CALIBRATE
     assign led[3] = (o_debug1[4:0] == 23); //light up if at DONE_CALIBRATE
     
-     // what this design do is very simple:
-     // if UART receives small letter ASCII (a-z), this value will be written to DDR3 
-     // if UART receives capital letter ASCII (A-Z), the small letter equivalent will be retrieved from DDR3 by doing
-     // a read request, once read data is available this will be sent to UART to be streamed out.
-     // THUS:
-     // Sendng "abcdefg" to the UART terminal will store that small latter to DDR3
-     // Then sending "ABCDEFG" to the UART terminal will return the small letter equivalent: "abcdefg"
    always @(posedge i_controller_clk) begin
        begin
            i_wb_stb <= 0;
--- a/rtl/axi/ddr3_top_axi.v
+++ b/rtl/axi/ddr3_top_axi.v
@ -1,3 +1,32 @@
+////////////////////////////////////////////////////////////////////////////////
+//
+// Filename: ddr3_top_axi.v
+// Project: UberDDR3 - An Open Source DDR3 Controller
+//
+// Purpose: Top module which instantiates the ddr3_top and AXI to Wishbone bridge.
+// Use this as top module for instantiating UberDDR3 with AXI4 interface.
+//
+// Engineer: Angelo C. Jacobo
+//
+////////////////////////////////////////////////////////////////////////////////
+//
+// Copyright (C) 2023-2024  Angelo Jacobo
+// 
+//     This program is free software: you can redistribute it and/or modify
+//     it under the terms of the GNU General Public License as published by
+//     the Free Software Foundation, either version 3 of the License, or
+//     (at your option) any later version.
+// 
+//     This program is distributed in the hope that it will be useful,
+//     but WITHOUT ANY WARRANTY; without even the implied warranty of
+//     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+//     GNU General Public License for more details.
+// 
+//     You should have received a copy of the GNU General Public License
+//     along with this program.  If not, see <https://www.gnu.org/licenses/>.
+//
+////////////////////////////////////////////////////////////////////////////////
+
 `default_nettype none
 `timescale 1ps / 1ps

--- a/rtl/ddr3_controller.v
+++ b/rtl/ddr3_controller.v
@ -1,8 +1,7 @@
 ////////////////////////////////////////////////////////////////////////////////
 //
-// Filename:	ddr3_controller.v
-// {{{
-// Project:	DDR3 Controller
+// Filename: ddr3_controller.v
+// Project:	UberDDR3 - An Open Source DDR3 Controller
 //
 // Purpose: This DDR3 controller was originally designed to be used on the 
 // Network Switch Project (https://github.com/ZipCPU/eth10g). The Network Switch 
@ -17,6 +16,24 @@
 // Engineer: Angelo C. Jacobo
 //
 ////////////////////////////////////////////////////////////////////////////////
+//
+// Copyright (C) 2023-2024  Angelo Jacobo
+// 
+//     This program is free software: you can redistribute it and/or modify
+//     it under the terms of the GNU General Public License as published by
+//     the Free Software Foundation, either version 3 of the License, or
+//     (at your option) any later version.
+// 
+//     This program is distributed in the hope that it will be useful,
+//     but WITHOUT ANY WARRANTY; without even the implied warranty of
+//     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+//     GNU General Public License for more details.
+// 
+//     You should have received a copy of the GNU General Public License
+//     along with this program.  If not, see <https://www.gnu.org/licenses/>.
+//
+////////////////////////////////////////////////////////////////////////////////
+
 // NOTE TO SELF are questions which I still need to answer
 // Comments are continuously added on this RTL for better readability

--- a/rtl/ddr3_phy.v
+++ b/rtl/ddr3_phy.v
@ -1,3 +1,33 @@
+////////////////////////////////////////////////////////////////////////////////
+//
+// Filename: ddr3_phy.v
+// Project: UberDDR3 - An Open Source DDR3 Controller
+//
+// Purpose: PHY component for the DDR3 controller. Handles the primitives such
+// as IOSERDES, IODELAY, and IOBUF. These generates the signals connected to 
+// the DDR3 RAM.
+//
+// Engineer: Angelo C. Jacobo
+//
+////////////////////////////////////////////////////////////////////////////////
+//
+// Copyright (C) 2023-2024  Angelo Jacobo
+// 
+//     This program is free software: you can redistribute it and/or modify
+//     it under the terms of the GNU General Public License as published by
+//     the Free Software Foundation, either version 3 of the License, or
+//     (at your option) any later version.
+// 
+//     This program is distributed in the hope that it will be useful,
+//     but WITHOUT ANY WARRANTY; without even the implied warranty of
+//     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+//     GNU General Public License for more details.
+// 
+//     You should have received a copy of the GNU General Public License
+//     along with this program.  If not, see <https://www.gnu.org/licenses/>.
+//
+////////////////////////////////////////////////////////////////////////////////
+
 `default_nettype none
 `timescale 1ps / 1ps
 //`define DEBUG_DQS // uncomment to route the raw DQS to output port for debugging
--- a/rtl/ddr3_top.v
+++ b/rtl/ddr3_top.v
@ -1,3 +1,32 @@
+////////////////////////////////////////////////////////////////////////////////
+//
+// Filename: ddr3_top.v
+// Project: UberDDR3 - An Open Source DDR3 Controller
+//
+// Purpose: Top module which instantiates the ddr3_controller and ddr3_phy modules
+// Use this as top module for instantiating UberDDR3 with Wishbone Interface.
+//
+// Engineer: Angelo C. Jacobo
+//
+////////////////////////////////////////////////////////////////////////////////
+//
+// Copyright (C) 2023-2024  Angelo Jacobo
+// 
+//     This program is free software: you can redistribute it and/or modify
+//     it under the terms of the GNU General Public License as published by
+//     the Free Software Foundation, either version 3 of the License, or
+//     (at your option) any later version.
+// 
+//     This program is distributed in the hope that it will be useful,
+//     but WITHOUT ANY WARRANTY; without even the implied warranty of
+//     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+//     GNU General Public License for more details.
+// 
+//     You should have received a copy of the GNU General Public License
+//     along with this program.  If not, see <https://www.gnu.org/licenses/>.
+//
+////////////////////////////////////////////////////////////////////////////////
+
 `default_nettype none
 `timescale 1ps / 1ps

--- a/run_compile.sh
+++ b/run_compile.sh
@ -42,7 +42,7 @@ echo ""
 echo ""
 echo "Summary:"
 # Iterate over folders starting with 'ddr3*'
-for folder in ddr3*/ ; do
+for folder in formal/ddr3*/ ; do
    # Check if the 'PASS' file exists in the folder
    if [[ -e "${folder}PASS" ]]; then
        # Print the folder name and 'PASS' in green
--- a/testbench/ddr3_dimm_micron_sim.sv
+++ b/testbench/ddr3_dimm_micron_sim.sv
@ -1,22 +1,30 @@
-//////////////////////////////////////////////////////////////////////////////////
-// Company: 
-// Engineer: 
+////////////////////////////////////////////////////////////////////////////////
+//
+// Filename: ddr3_dimm_micron_sim.v
+// Project: UberDDR3 - An Open Source DDR3 Controller
+//
+// Purpose: Simulation testbench for UberDDR3
+//
+// Engineer: Angelo C. Jacobo
+//
+////////////////////////////////////////////////////////////////////////////////
+//
+// Copyright (C) 2023-2024  Angelo Jacobo
 // 
-// Create Date: 06/01/2023 08:50:24 AM
-// Design Name: 
-// Module Name: ddr3_dimm_micron_sim
-// Project Name: 
-// Target Devices: 
-// Tool Versions: 
-// Description: 
+//     This program is free software: you can redistribute it and/or modify
+//     it under the terms of the GNU General Public License as published by
+//     the Free Software Foundation, either version 3 of the License, or
+//     (at your option) any later version.
 // 
-// Dependencies: 
+//     This program is distributed in the hope that it will be useful,
+//     but WITHOUT ANY WARRANTY; without even the implied warranty of
+//     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+//     GNU General Public License for more details.
 // 
-// Revision:
-// Revision 0.01 - File Created
-// Additional Comments:
-// 
-//////////////////////////////////////////////////////////////////////////////////
+//     You should have received a copy of the GNU General Public License
+//     along with this program.  If not, see <https://www.gnu.org/licenses/>.
+//
+////////////////////////////////////////////////////////////////////////////////

 `timescale 1ps / 1ps
 `define den8192Mb