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.vscode
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single port progess
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2020-09-14 18:11:38 -07:00 |
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base
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no wl for col end
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2020-10-08 03:34:16 -07:00 |
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bitcells
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fix replica bitcell col
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2020-09-23 00:36:08 -07:00 |
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characterizer
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Change .spinit to .spiceinit
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2020-10-05 13:50:04 -07:00 |
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custom
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no wl for col end
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2020-10-08 03:34:16 -07:00 |
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datasheet
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Convert capital names to lower case for consistency
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2019-08-21 13:45:34 -07:00 |
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drc
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PEP8 cleanup
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2020-04-15 11:24:28 -07:00 |
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example_configs
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merge in dev
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2020-10-07 11:54:07 -07:00 |
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gdsMill
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single port progess
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2020-09-14 18:11:38 -07:00 |
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modules
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no wl for col end
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2020-10-08 03:34:16 -07:00 |
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pgates
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merge in dev
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2020-10-07 11:54:07 -07:00 |
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riscv
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single port progess
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2020-09-14 18:11:38 -07:00 |
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router
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Changes to simplify metal preferred directions and pitches.
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2020-05-10 11:32:45 -07:00 |
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scmos_run
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram
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Allow 16-way column mux
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2020-10-06 16:27:02 -07:00 |
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sram_0.01
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_0.05
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fix replica bitcell col
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2020-09-23 00:36:08 -07:00 |
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sram_0.8
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_0.75
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_0.78
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_0.85
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single port progess
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2020-09-14 18:11:38 -07:00 |
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temp
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single port progess
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2020-09-14 18:11:38 -07:00 |
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tests
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no wl for col end
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2020-10-08 03:34:16 -07:00 |
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verify
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Initial pex sram test.
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2020-10-02 13:32:52 -07:00 |
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Makefile
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Clean up Makefile for unit tests
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2018-12-05 12:58:10 -08:00 |
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b3v3_1check.log
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single port progess
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2020-09-14 18:11:38 -07:00 |
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b3v32check.log
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single port progess
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2020-09-14 18:11:38 -07:00 |
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big.log
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single port progess
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2020-09-14 18:11:38 -07:00 |
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debug.py
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DRC/LVS and errors fixes.
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2020-06-30 07:16:05 -07:00 |
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gen_stimulus.py
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Fixed errors in extra rows characterization
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2020-03-22 20:54:49 +00:00 |
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globals.py
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Add command line -j option for number of threads.
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2020-10-05 15:49:00 -07:00 |
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missing_pin.gds
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single port progess
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2020-09-14 18:11:38 -07:00 |
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openram.py
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Add words_per_row and others in config file.
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2020-07-13 12:37:56 -07:00 |
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options.py
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Add command line -j option for number of threads.
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2020-10-05 15:49:00 -07:00 |
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profile.dat
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single port progess
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2020-09-14 18:11:38 -07:00 |
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run.sh
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single port progess
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2020-09-14 18:11:38 -07:00 |
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run_profile.sh
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Convert pin map to a set for faster membership.
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2019-04-01 15:45:44 -07:00 |
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sram_2_16_scn4m_subm.gds
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_2_16_scn4m_subm.html
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_2_16_scn4m_subm.lef
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_2_16_scn4m_subm.log
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_2_16_scn4m_subm.py
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_2_16_scn4m_subm.sp
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_2_16_scn4m_subm.v
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_2_16_scn4m_subm_FF_5p0V_25C.lib
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_2_16_scn4m_subm_SS_5p0V_25C.lib
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_2_16_scn4m_subm_TT_5p0V_25C.lib
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_8_128_scn4m_subm.html
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_8_128_scn4m_subm.log
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_8_128_scn4m_subm.py
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_8_128_scn4m_subm.sp
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_8_128_scn4m_subm.v
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_8_128_scn4m_subm_FF_5p0V_25C.lib
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_8_128_scn4m_subm_SS_5p0V_25C.lib
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_8_128_scn4m_subm_TT_5p0V_25C.lib
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_16_256_scn4m_subm.html
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_16_256_scn4m_subm.log
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_16_256_scn4m_subm.py
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_16_256_scn4m_subm.sp
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_16_256_scn4m_subm.v
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_16_256_scn4m_subm_FF_5p0V_25C.lib
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_16_256_scn4m_subm_SS_5p0V_25C.lib
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_16_256_scn4m_subm_TT_5p0V_25C.lib
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_32_128_scn4m_subm.html
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_32_128_scn4m_subm.log
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_32_128_scn4m_subm.py
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_32_128_scn4m_subm.sp
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_32_128_scn4m_subm.v
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_32_128_scn4m_subm_FF_5p0V_25C.lib
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_32_128_scn4m_subm_SS_5p0V_25C.lib
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_32_128_scn4m_subm_TT_5p0V_25C.lib
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single port progess
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2020-09-14 18:11:38 -07:00 |
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sram_factory.py
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Auto-generate port dependent cell names.
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2020-06-05 15:09:22 -07:00 |
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view_profile.py
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Remove some flake8 errors/warnings.
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2019-10-02 23:26:02 +00:00 |
d40c3588ed