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OpenRAM
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4,460 Commits 4 Branches 63 Tags 78 MiB
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3667 Commits

Author SHA1 Message Date
Sam Crow 266bcd9cf2 consolidate failing xyce delay tests to one in skip list 2023-06-11 14:52:26 -07:00
Sam Crow 854bff9dce add norbl bank tests to sky130 skipped tests 2023-06-08 13:22:12 -07:00
Sam Crow 7048a072e2 add local/global array sky130 skipped tests 2023-06-08 13:16:27 -07:00
Sam Crow 44ed72b50d add has_rbl=True arg to tests 2023-06-08 13:10:03 -07:00
Sam Crow ce622952ef route rbl conditionally 2023-06-08 12:36:31 -07:00
Sam Crow a51b71d460 update copyright 2023-06-08 12:36:12 -07:00
Sam Crow 973b5512f0 add new failing sky130 tests to skip list 2023-06-07 17:29:58 -07:00
Sam Crow dcf95460d0 sort sky130 skipped tests numerically 2023-06-07 16:09:18 -07:00
Sam Crow 9256ae8c00 fix typos and standardize multiport control logic tests 2023-06-07 16:04:54 -07:00
samuelkcrow afd3b782b9 remove cs_bar signal bus from all control logics 2023-06-07 15:53:15 -07:00
samuelkcrow a48842ff72 fix code format issues from 00 test 2023-06-07 15:52:25 -07:00
samuelkcrow b9492051b6 use control_logic_base in control_logic_delay 2023-06-07 15:51:19 -07:00
Sam Crow a70dcc5c85 reword comments in replica bitcell array module 2023-06-06 14:43:18 -07:00
Sam Crow 9fdf8a8341 ommit rbl pins in sram_1bank when appropriate 2023-06-06 13:15:17 -07:00
Sam Crow 157935c915 update test/module imports related to delay control 2023-06-06 13:12:20 -07:00
Sam Crow 5fef78dbfa Merge branch 'no_rbl' into delay_ctrl 2023-06-05 16:31:07 -07:00
Sam Crow 2f5d3b6faf Merge branch 'dev' into delay_ctrl 2023-06-05 16:24:48 -07:00
Sam Crow df827fbd3d add norbl whole sram test 2023-06-05 15:26:26 -07:00
Sam Crow 5b10f06be6 place wl_en pin on wl drivers in absence of rbl_wl driver 2023-06-05 15:26:11 -07:00
Sam Crow 0b5039cc89 make norbl bank test executable 2023-06-05 12:08:22 -07:00
Sam Crow 23232fd376 Merge branch 'dev' into no_rbl 2023-06-05 11:03:22 -07:00
Sam Crow 2709f61317 fix index out of bounds bug 2023-05-16 14:38:51 -07:00
Sam Crow 79e5c1ad86 add dp norbl bank test 2023-05-16 14:36:58 -07:00
Eren Dogan 8ac95c19a4 Add optional $CONDA_HOME environment variable 2023-05-11 16:42:29 -07:00
Eren Dogan f2235c2457 Cleanup globals.py 2023-05-04 20:47:53 -07:00
Eren Dogan 420ce01b46 Throw error if can't make temp directory 2023-05-04 20:27:59 -07:00
Sam Crow f5bc031d83 Merge branch 'dev' into no_rbl 2023-05-03 15:24:03 -07:00
Sam Crow db8ab303c7 Merge branch 'dev' into sky130_custom_modules 2023-05-03 14:12:52 -07:00
Sam Crow 0e781dd224 cast valid addresses to list for python 3.11 requirement 2023-05-01 17:05:07 -07:00
Eren Dogan 938da3b369 Merge branch 'sky130_regress' into dev 2023-04-26 12:33:21 -07:00
Sam Crow 123149503b add a bank test with no rbl 2023-04-25 09:27:56 -07:00
Sam Crow 744ba0e892 fix precharge bit offsets in no rbl case 2023-04-25 09:24:18 -07:00
Eren Dogan 51ddb08385 Enable sky130 regression but disable failing tests 2023-04-13 22:12:46 -07:00
Eren Dogan ed8242daf8 Add OPENRAM_TECH to package namespace 2023-04-12 13:18:00 -07:00
Sam Crow eea748ff3e remove test for unsupported config 2023-04-10 11:16:10 -07:00
Sam Crow 670b40642b add no rbl tests to 15 global array tests 2023-04-10 10:38:52 -07:00
Eren Dogan 095e0baddd Remove CHECKPOINT_OPTS since it is not used 2023-04-07 12:32:29 -07:00
Sam Crow dff94a032e fix bug in right rbl dual port replica array test 2023-04-07 11:30:15 -07:00
Sam Crow 5b701d828e remove unused function 2023-04-07 10:32:11 -07:00
Sam Crow 3c7f35d295 add no rbl support to bank module 2023-04-07 10:02:38 -07:00
Sam Crow efbb658784 add no rbl support to port address 2023-04-05 16:04:20 -07:00
Sam Crow ae6d271602 add support for no rbl to port data 2023-04-05 15:33:45 -07:00
Sam Crow d00ba73bc9 add no rbl support to global array 2023-04-05 14:47:15 -07:00
Sam Crow 83b25138d0 apply 14* standard to 15_local tests 2023-04-03 10:11:49 -07:00
Sam Crow 9181f6a218 standardize 14* test structure 2023-04-03 10:08:57 -07:00
Jacob Walker 0b056dca54 fixed rom bank test name 2023-03-30 18:44:55 -07:00
Jacob Walker 52791a2719 a space 2023-03-30 11:30:50 -07:00
Jacob Walker c1fb3cab6c 1kb rom DRC clean 2023-03-30 11:30:50 -07:00
Jacob Walker 7805fcb21e more top level routing cleanup 2023-03-30 11:30:50 -07:00
Jacob Walker fef9902c45 rom base passing tests with top level routing 2023-03-30 11:30:50 -07:00