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Author SHA1 Message Date
Miodrag Milanovic ff67a82a13 Update ABC as per 2026-09-17 2026-09-17 08:38:40 +02:00
Emil J 150c32b03e Merge pull request #6154 from YosysHQ/emil/liberty-filter 
liberty: add filtering for things we need
 2026-09-16 16:44:09 +00:00
Emil J. Tywoniak 91ac95c2b4 libparse: overwrite cache whenever old filter doesn't cover new filter 2026-09-16 18:21:46 +02:00
nella 9e8f12b9b3 Merge pull request #6207 from YosysHQ/nella/xilinx-rdfirst-xc7 
xilinx: fix BRAM mapping for negedge port next to READ_FIRST port [sc-917]
 2026-09-16 13:14:35 +00:00
Lofty 92f43919b3 Merge pull request #6206 from YosysHQ/lofty/add-xaiger2-test 
xaiger2: add testcase from #4349
 2026-09-16 13:07:30 +00:00
Emil J d5e9476d2b Merge pull request #6208 from YosysHQ/emil/nix-macos-symlink-share 
yosys: fix share path on MacOS when behind a symlink
 2026-09-16 13:04:27 +00:00
Emil J. Tywoniak 716ee4d47a yosys: fix share path on MacOS when behind a symlink 2026-09-16 13:57:26 +02:00
nella a651db986a xilinx: Drop READ_FIRST erratum on 7 series. 2026-09-16 09:14:50 +02:00
Lofty 415dfc0960 xaiger2: add testcase from #4349 2026-09-16 08:13:23 +01:00
nella 0edda7a3ab Merge pull request #6201 from YosysHQ/nella/check-internal-celltypes 
check: reject unknown internal cell types [sc-915]
 2026-09-15 11:52:15 +00:00
Lofty d85872386a Merge pull request #6174 from YosysHQ/lofty/abc-refactor-16 
abc9: migrate to write_xaiger2
 2026-09-14 16:25:07 +00:00
Miodrag Milanović f04d70bd9b Merge pull request #6200 from YosysHQ/mmicko/heredoc 
Use <inlined> for heredoc input filename
 2026-09-14 14:50:38 +00:00
Emil J a9888845d2 Merge pull request #6194 from YosysHQ/emil/abc-module-and-clkdomain-par 
abc: module and clock domain parallelism, always
 2026-09-14 13:29:38 +00:00
nella 76213a5d4c Reject unknown internal cell types in check and hierarchy -check. 
A $-prefixed cell type must be a known cell type or a module in the
design. check reports it as a problem, hierarchy -check errors.
 2026-09-14 13:50:09 +02:00
nella 77bca709d4 Declare synth_fabulous pad cells as blackboxes. 
iopadmap inserted $__FABULOUS_* cells with no module, so their port
directions were unknown to later passes. Read with -icells so the module
names match the cell types.
 2026-09-14 13:50:09 +02:00
Emil J. TywoniakandJakub Michalski 72b30b1820 abc: dispatch modules in cell count order 
Co-authored-by: Jakub Michalski <[email protected]>
 2026-09-14 12:52:10 +02:00
Miodrag Milanovic 5cdba4fbd7 Update tests to reflect change to <inlined> 2026-09-14 10:35:11 +02:00
Miodrag Milanovic e091c16539 Use <inlined> for heredoc input filename 2026-09-14 10:16:34 +02:00
Miodrag Milanović d0e71cfb7b Merge pull request #6173 from YosysHQ/mmicko/colored 
log: Colored output for console
 2026-09-11 11:27:21 +00:00
Emil J. Tywoniak 5a81ce51c0 fixup! abc: finish the submitted runs before propagating an error 2026-09-11 10:08:28 +02:00
Miodrag Milanović 6d10de1bc4 Merge pull request #6197 from YosysHQ/update_abc 
Update ABC as per 2026-09-11
 2026-09-11 07:25:26 +00:00
Miodrag Milanovic c595ef69c6 Update ABC as per 2026-09-11 2026-09-11 08:37:38 +02:00
Emil J. Tywoniak 60a7f254f8 tests: rebless blif gatesi cell order 2026-09-10 18:16:57 +02:00
Emil J. Tywoniak bc92c9d9bf abc: finish the submitted runs before propagating an error 2026-09-10 18:16:57 +02:00
Emil J. Tywoniak cc9d6389d6 tests: rebless gatemate cell counts 2026-09-10 18:16:57 +02:00
Emil J. Tywoniak 5c6c0f66e3 abc: re-isolate autoidx churn 2026-09-10 18:16:57 +02:00
Emil J. Tywoniak fa61f1732e abc: clock domain parallelism is module parallelism 2026-09-10 18:16:57 +02:00
Emil J. Tywoniak 2a1c20dbbe liberty: add filtering for things we need 2026-09-10 16:12:49 +02:00
Miodrag Milanović 3a82894842 Merge pull request #6100 from YosysHQ/mmicko/test_verific 
tests: Explicitly run tests without and with Verific where applicable
 2026-09-10 10:07:07 +00:00
Miodrag Milanović 87b17517fd Merge pull request #6188 from YosysHQ/revert-6182-lofty/revert-read_xaiger2 
Revert "Temporarily revert #6101 and #6077"
 2026-09-10 09:17:02 +00:00
Miodrag Milanović 13b9011887 Merge pull request #5705 from YosysHQ/gus/rename-symbiyosys-to-sby 
Rename SymbiYosys to SBY
 2026-09-10 08:49:58 +00:00
Miodrag Milanovic ec25ee4de8 Fix remaining mentions, and update links 2026-09-10 10:24:34 +02:00
Gus Smith dcbf68bd5b Fix docs/Makefile filename renames 2026-09-10 10:08:50 +02:00
Gus Smith 697fed66da Rename SymbiYosys to SBY 2026-09-10 10:08:49 +02:00
Miodrag Milanović ae86bbb130 Revert "Temporarily revert #6101 and #6077" 2026-09-10 09:09:13 +02:00
Miodrag Milanović 01dc90937b Merge pull request #6187 from YosysHQ/update_abc 
Update ABC as per 2026-09-09
 2026-09-10 07:04:06 +00:00
Emil J 370a53acf8 Merge pull request #6169 from YosysHQ/emil/check-process-conflicts 
check: detect process-driver conflicts
 2026-09-09 16:52:20 +00:00
Emil J 5274c96506 Merge pull request #6161 from YosysHQ/emil/remove-dead-bindings 
rtlil: remove dead verilog bindings
 2026-09-09 16:51:35 +00:00
Emil J 982d04202f Merge pull request #6168 from YosysHQ/emil/synth-check-before-opt_clean 
synth*: run check after proc before opt_clean to discover process-ini…
 2026-09-09 16:51:20 +00:00
Miodrag Milanovic a06d5b3a5e Update ABC as per 2026-09-09 2026-09-09 14:46:05 +02:00
Miodrag Milanović c1baef8d8a Merge pull request #6185 from YosysHQ/release/v0.69 
Release version 0.69
 2026-09-09 06:15:52 +00:00
Miodrag Milanovic 5c7b22f37d Next dev cycle 2026-09-09 08:00:21 +02:00
Miodrag Milanovic 9f75ca1f98 Release version 0.69 v0.69 2026-09-09 07:26:44 +02:00
Miodrag Milanović 72dc977396 Merge pull request #6184 from YosysHQ/mmicko/svelab-update 
sv-elab: Update to release 2026-09-08
 2026-09-08 10:31:12 +00:00
Miodrag Milanovic a80623137a sv-elab: Update to release 2026-09-08 2026-09-08 11:58:13 +02:00
Miodrag Milanović f1442ce42e Merge pull request #6182 from YosysHQ/lofty/revert-read_xaiger2 
Temporarily revert #6101 and #6077
 2026-09-08 04:53:08 +00:00
Lofty 51583d854a Revert "Merge pull request #6077 from YosysHQ/lofty/abc-refactor-8" 
This reverts commit fd6367405e, reversing
changes made to 0f2bcb94b7.
 2026-09-07 17:29:08 +01:00
nella 7c26ff16c6 Merge pull request #6162 from YosysHQ/nella/scl-cache-dir 
liberty_cache: per user SCL cache directory [sc-843]
 2026-09-07 14:52:21 +00:00
Miodrag Milanović 95e245f563 Merge pull request #6181 from YosysHQ/mmicko/wheels 
cmake: fix wheels build
 2026-09-07 11:18:08 +00:00
Miodrag Milanovic 7a29365a3e cmake: fix wheels build 2026-09-07 12:38:32 +02:00