Commit Graph

933 Commits

Author SHA1 Message Date
Akash Levy 4a35c0ab87 opt_argmax fixes 2026-06-09 01:57:11 -07:00
Akash Levy b3ea5770cd opt_argmax pass 2026-06-02 04:11:17 -07:00
Akash Levy 0c3446e8af Fixups for Greptile 2026-06-01 19:03:52 -07:00
Akash Levy 9cc69a3c49 Improvement to opt_balance_tree 2026-06-01 17:56:44 -07:00
Akash Levy 6a8d800e63 Fixes for filtering small cases and catching more larger ones with trickier signatures 2026-05-27 03:40:44 -07:00
Akash Levy 69edb27ab3 muxpack fix 2026-05-27 03:07:24 -07:00
Akash Levy 5c3fbd2d63 Merge branch 'main' into opt_addcin 2026-05-27 01:52:11 -07:00
Akash Levy 89717069fe Fixup 2026-05-27 01:51:54 -07:00
Akash Levy 46a697e608
Merge pull request #169 from Silimate/opt_andor_pmux
opt_andor_pmux pass
2026-05-27 01:03:58 -07:00
Akash Levy e39395132d opt_addcin pass 2026-05-27 00:39:25 -07:00
Akash Levy 42d257e523 opt_andor_pmux pass 2026-05-27 00:11:54 -07:00
Akash Levy 5c3c342ea0 Fixup NEW_ID usage 2026-05-27 00:09:12 -07:00
Akash Levy 9ded74751c
Update passes/opt/opt.cc
Co-authored-by: greptile-apps[bot] <165735046+greptile-apps[bot]@users.noreply.github.com>
2026-05-26 06:38:27 -07:00
Akash Levy 9a225025d4 opt -max_iter 2026-05-26 06:23:40 -07:00
Akash Levy a5617f90ac Speed fix 2026-05-20 15:42:26 -07:00
Akash Levy 7eff462881 Make opt_prienc a bit faster 2026-05-20 13:33:19 -07:00
Akash Levy 2ba8a5cac6 opt parallel prefix and priority encoders 2026-05-20 12:14:50 -07:00
Akash Levy b4e94d9f13 modshr onehot pass 2026-05-20 01:25:28 -07:00
Akash Levy b9fa4f85ba Ignore DW in opt_hier/opt_boundary 2026-05-04 12:52:47 -07:00
Akash Levy ebf269bdf0 opt_boundary improvements and add to opt pass as option 2026-05-04 10:51:04 -07:00
Stan Lee 325d9b0c0e edit naming 2026-04-24 17:14:42 -07:00
Akash Levy 8485d57841 opt_expr for constant comparisons 2026-04-20 02:03:35 -07:00
Akash Levy 723ddd74cf Improve wreduce runtime 2026-02-19 01:03:26 -08:00
Akash Levy c04975b78c Remove custom mux opt_exprs 2026-02-17 20:41:29 -08:00
Akash Levy 5f7658ca7c
Merge branch 'YosysHQ:main' into main 2026-02-05 13:10:34 -08:00
Emil J 1717fa0180
Merge pull request #5663 from YosysHQ/emil/opt_expr-fix-pow-shift
opt_expr: fix const lhs of $pow to $shl
2026-02-05 13:09:01 +01:00
Akash Levy f74ac17a5f Undo the terrible upstream changes that break everything... 2026-02-04 22:26:06 -08:00
Akash Levy d3ab45c2fa
Merge branch 'YosysHQ:main' into main 2026-02-04 15:53:43 -08:00
Emil J 8bbde80e02
Merge pull request #5631 from rocallahan/cleanup-compare-signals
Clean up `compare_signals()` in `opt_clean`
2026-02-04 17:45:05 +01:00
Emil J 992e64342c
Merge pull request #5621 from rocallahan/remove-opt-sort
Remove `Design::sort()` calls from optimization passes
2026-02-04 16:55:56 +01:00
Emil J. Tywoniak 3bfeaee8ca opt_expr: fix const lhs of $pow to $shl 2026-02-03 11:59:00 +01:00
Akash Levy 1dd846022b Fix opt_dff cell naming 2026-01-28 23:36:49 -08:00
Akash Levy 9f911e3d63 Reorder ff.remove in opt_dff 2026-01-28 20:58:01 -08:00
Akash Levy 16087ae931 Merge from upstream 2026-01-28 18:17:50 -08:00
nella 8f6c4d40e4
Merge pull request #5623 from YosysHQ/nella/opt-dff-rewrite
opt_dff restructure.
2026-01-28 14:41:40 +01:00
Akash Levy 26f5ff3d74 Merge from upstream 2026-01-26 22:16:11 -08:00
nella 9367090763 OptDff more accurate ctrl/pattern desc. 2026-01-26 22:19:36 +01:00
nella 5803461c24 opt_dff pattern extraction. 2026-01-26 22:10:10 +01:00
nella 8576055dea Fix tests. 2026-01-26 18:41:41 +01:00
nella a75e0b2e92 opt_dff minor cleanup, added tests for comp var. 2026-01-26 14:24:01 +01:00
Robert O'Callahan 32e96605d4 Don't update `used_signals` for retained wires in `rmunused_module_signals`.
These updates should not be necessary. In fact, if they were necessary, this code
would be buggy, because the results would depend on the order in which wires are traversed:
If wire A is retained, which causes an update to `used_signals`, which then causes wire B
to be retained when it otherwise wouldn't be, then we would get different results depending
on whether A is visited before B.

These updates will also make it difficult to process these wires in parallel.
2026-01-24 03:41:18 +00:00
Robert O'Callahan 7d53d64a47 Make the call to `compare_signals()` easier to read.
The negation here is confusing. The intent of the code is "if `s1` is preferred
over `s2` as the canonical `SigBit` for this signal, make `s1` the canonical `SigBit`
in `assign_map`", so write the code that way instead of "if `s2` is not preferred
over `s1` ...".

This doesn't change any behavior now that `compare_signals()` is a total order,
i.e. `s1` is preferred over `s2`, `s2` is preferred over `s1`, or `s1` and `s2` are equal.
Now, when `s1` and `s2` are equal, we don't call `assign_map.add(s1)`, but that's
already a noop in that case.
2026-01-24 02:01:05 +00:00
Robert O'Callahan 2468b391bf Make `compare_signals` produce a total order.
Currently when `s1` and `s2` are different bits of the same wire,
it is possible for both `compare_signals(s1, s2)` and `compare_signals(s2, s1)` to
return false. This means the calling code will call `assign_map.add()` for
both `s1` and `s2`, which doesn't make much sense --- one of `s1` or `s2`
should be consistently preferred.

So fix that by preferring the `SigBit` with the smaller bit offset.
2026-01-24 02:00:33 +00:00
nella 0e4282d442 Add more opt_dff documentation. 2026-01-23 09:17:14 +01:00
Robert O'Callahan e87bb65956 Move `Design::sort()` calls out of `opt` and `opt_clean` passes into the synth passes that need them. 2026-01-23 01:14:35 +00:00
Akash Levy 5a6dffeecd Silimate mods to upstream opt_balance_tree pass 2026-01-21 23:34:34 -08:00
Akash Levy b11037e6c6 Merge remote-tracking branch 'upstream/main' 2026-01-21 15:13:57 -08:00
nella f6eba53d1f Fix copyright header. 2026-01-21 14:52:19 +01:00
nella 2c12545cf3 opt_dff restructure. 2026-01-21 10:08:44 +01:00
Emil J. Tywoniak c3f36afe7f opt_balance_tree: mark experimental 2026-01-19 12:01:25 +01:00