xschem/src
Stefan Frederik 9bca5b3f5b fix descend_symbol regression due to previous commit 2021-11-22 00:42:53 +01:00
..
systemlib aligned pdf hardcopy colors to xschem light colorscheme, pdf and svg exports use the enable_layer[] array to display/hide layers as does draw(). 2020-08-30 10:38:29 +02:00
utile update license info (2) 2021-07-27 16:53:08 +02:00
Makefile.in Added new feature "Make schematic and symbol from selected components" with command "xschem make_sch_from_sel" and function make_schematic(..) 2021-05-29 00:45:01 +02:00
actions.c fix descend_symbol regression due to previous commit 2021-11-22 00:42:53 +01:00
add_custom_menu.tcl add sample file for custom menu additions 2021-01-05 15:55:12 +01:00
break.awk break.awk: chop trailing white space on lines 2021-11-04 23:31:15 +01:00
callback.c avoid force-saving changed schematic before doing netlist (use push/pop undo instead of load_schematic() to restore circuit after traversing hierarchy) 2021-11-21 23:04:48 +01:00
change_index.tcl populating xschem git repo 2020-08-08 15:47:34 +02:00
change_ref.awk populating xschem git repo 2020-08-08 15:47:34 +02:00
check.c auditing of static in-function variables, remove unnecessary, add notes for allowed ones 2021-11-20 02:37:56 +01:00
clip.c update license info 2021-07-27 16:42:54 +02:00
convert_to_verilog2001.awk update license info 2021-07-27 16:42:54 +02:00
draw.c Bunch of function static variables moved into xctx struct for safety 2021-11-18 01:55:01 +01:00
editprop.c When saving a schematic issue a warning if disk file has been changed since opening 2021-11-20 13:33:40 +01:00
exp.awk populating xschem git repo 2020-08-08 15:47:34 +02:00
expandlabel.y update license info 2021-07-27 16:42:54 +02:00
findnet.c auditing of static in-function variables, remove unnecessary, add notes for allowed ones 2021-11-20 02:37:56 +01:00
flatten.awk update license info 2021-07-27 16:42:54 +02:00
flatten_savenodes.awk update license info 2021-07-27 16:42:54 +02:00
flatten_tedax.awk fix mapping issue in hiertEDAx code. Thanks to Hannu for pointing it out. Allow newlines in (quoted) long vector labels, like: "AAA,BBB,\nCCC,DDD,EEE" 2020-11-30 21:01:33 +01:00
font.c update license info 2021-07-27 16:42:54 +02:00
get_malloc_id.awk pass name and symname to tcl_hook, add @symname_ext in print_spice_element 2020-10-14 21:04:45 +02:00
globals.c Bunch of function static variables moved into xctx struct for safety 2021-11-18 01:55:01 +01:00
gschemtoxschem.awk misc fixes in gschemtoxschem.awk 2021-10-14 02:35:43 +02:00
gtkwave_server.tcl add gtkwave_server.tcl hook for gtkwave to listen to a tcp port 2020-09-24 02:28:00 +02:00
hash_iterator.c update license info 2021-07-27 16:42:54 +02:00
herculestospice.awk populating xschem git repo 2020-08-08 15:47:34 +02:00
hilight.c auditing of static in-function variables, remove unnecessary, add notes for allowed ones 2021-11-20 02:37:56 +01:00
hspice_backannotate.tcl update license info 2021-07-27 16:42:54 +02:00
icon.c update license info 2021-07-27 16:42:54 +02:00
icon.xpm better xschem icon: added shapemask for "transparent" background 2020-11-10 13:17:25 +01:00
import_opus_symbols.awk populating xschem git repo 2020-08-08 15:47:34 +02:00
in_memory_undo.c avoid force-saving changed schematic before doing netlist (use push/pop undo instead of load_schematic() to restore circuit after traversing hierarchy) 2021-11-21 23:04:48 +01:00
keys.help update bindkey description ("\" fullscreen) 2021-11-07 18:41:30 +01:00
label_compactor.awk populating xschem git repo 2020-08-08 15:47:34 +02:00
main.c some parameter checks in xschem commands, global var removal in simulation help window - No use for production yet 2021-11-16 22:28:10 +01:00
make_edif.awk populating xschem git repo 2020-08-08 15:47:34 +02:00
make_sch_from_cadence_pin.awk populating xschem git repo 2020-08-08 15:47:34 +02:00
make_sch_from_spice.awk bump version to 3.0.0; prepare for 3.0.0 release 2021-09-11 07:53:11 +02:00
make_sch_from_vhdl.awk populating xschem git repo 2020-08-08 15:47:34 +02:00
make_sym.awk bump version to 3.0.0; prepare for 3.0.0 release 2021-09-11 07:53:11 +02:00
make_sym_lcc.awk update license info 2021-07-27 16:42:54 +02:00
make_vhdl_from_spice.awk populating xschem git repo 2020-08-08 15:47:34 +02:00
move.c some parameter checks in xschem commands, global var removal in simulation help window - No use for production yet 2021-11-16 22:28:10 +01:00
netlist.c auditing of static in-function variables, remove unnecessary, add notes for allowed ones 2021-11-20 02:37:56 +01:00
netlist_compactor.awk populating xschem git repo 2020-08-08 15:47:34 +02:00
ngspice_backannotate.tcl update license info 2021-07-27 16:42:54 +02:00
node_hash.c removed a whole bunch of global UI-related variables and tcl/C redundancies 2021-11-10 13:43:08 +01:00
options.c flat_netlist and only_probes moved into xctx struct 2021-11-17 23:12:17 +01:00
order_labels.awk populating xschem git repo 2020-08-08 15:47:34 +02:00
parse_synopsys_vhdl.awk populating xschem git repo 2020-08-08 15:47:34 +02:00
parselabel.l some parameter checks in xschem commands, global var removal in simulation help window - No use for production yet 2021-11-16 22:28:10 +01:00
paste.c removed a whole bunch of global UI-related variables and tcl/C redundancies 2021-11-10 13:43:08 +01:00
psprint.c some parameter checks in xschem commands, global var removal in simulation help window - No use for production yet 2021-11-16 22:28:10 +01:00
rawtovcd.c fix compiler warnings (unused return value check on some function calls, missing %s on non literal string printf args) 2021-10-27 10:12:16 +02:00
reduce_even_odd_array_labels.awk populating xschem git repo 2020-08-08 15:47:34 +02:00
rescale.awk populating xschem git repo 2020-08-08 15:47:34 +02:00
resources.tcl better copy/paste button images 2021-11-07 12:54:15 +01:00
save.c fix descend_symbol regression due to previous commit 2021-11-22 00:42:53 +01:00
scheduler.c avoid force-saving changed schematic before doing netlist (use push/pop undo instead of load_schematic() to restore circuit after traversing hierarchy) 2021-11-21 23:04:48 +01:00
select.c Bunch of function static variables moved into xctx struct for safety 2021-11-18 01:55:01 +01:00
sort_labels.awk fix a regression in sort_labels.awk after moving tmpfile to /tmp; added oldvalue (for simulation) in hilight hash table 2020-12-26 23:53:26 +01:00
spice.awk avoid printing "**** end_element" in spice netlist if current instance is skipped (no format or spice_ignore set); spice_probe_vdiff.sym will print .save v(n1) v(n2) instead of .save v(n1,n2) since this is how ngspice saves nodes (no differential voltage is saved) 2021-10-21 00:00:54 +02:00
spice_netlist.c avoid force-saving changed schematic before doing netlist (use push/pop undo instead of load_schematic() to restore circuit after traversing hierarchy) 2021-11-21 23:04:48 +01:00
store.c update license info 2021-07-27 16:42:54 +02:00
supergrep.awk populating xschem git repo 2020-08-08 15:47:34 +02:00
svgdraw.c some parameter checks in xschem commands, global var removal in simulation help window - No use for production yet 2021-11-16 22:28:10 +01:00
symgen.awk bump version to 3.0.0; prepare for 3.0.0 release 2021-09-11 07:53:11 +02:00
tedax.awk update license info 2021-07-27 16:42:54 +02:00
tedax_netlist.c avoid force-saving changed schematic before doing netlist (use push/pop undo instead of load_schematic() to restore circuit after traversing hierarchy) 2021-11-21 23:04:48 +01:00
token.c add "xschem check_symbols" and "xschem reload_symbols" for future checking of symbols that are newer wrt to schematic. set mtime of newly created schematic (that does not exist on disk) to current time. Add verilog attributes to devices/pmos4.sym 2021-11-21 12:28:36 +01:00
track_memory.awk track_memory.awk: option to disable source line display 2021-11-17 04:06:36 +01:00
traduci.awk "@#n:net_name" attribute (n = pin name or number) in symbols translates to net name attached to pin. "lab_show.sym" component that shows (does not assign) net name. "highlight=true" attribute can be given on instances in addition to symbols 2020-09-30 00:30:48 +02:00
verilog.awk update license info 2021-07-27 16:42:54 +02:00
verilog_netlist.c avoid force-saving changed schematic before doing netlist (use push/pop undo instead of load_schematic() to restore circuit after traversing hierarchy) 2021-11-21 23:04:48 +01:00
vhdl.awk update license info 2021-07-27 16:42:54 +02:00
vhdl_netlist.c avoid force-saving changed schematic before doing netlist (use push/pop undo instead of load_schematic() to restore circuit after traversing hierarchy) 2021-11-21 23:04:48 +01:00
xinit.c add missing braces in update recent file submenu, fix file selector improperly setting main window title, added logic/test_mos_verilog.sch depletion mode verilog example 2021-11-20 23:44:19 +01:00
xschem.h avoid force-saving changed schematic before doing netlist (use push/pop undo instead of load_schematic() to restore circuit after traversing hierarchy) 2021-11-21 23:04:48 +01:00
xschem.help fix status bar info correctly swicthing when focusing multiple xschem child windows; multiple schematic window handling within one xschem instance is now working 2021-11-17 01:12:55 +01:00
xschem.tcl when descending from a modified schematic with highlight nets and not saving schematic before descending, clear highlights to avoid inconsistent state when returning back. save() and save_schematic() have more decent return values 2021-11-22 00:26:49 +01:00
xschemrc add File menu to open another schematic window in same xschem process 2021-11-17 03:49:32 +01:00