A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Go to file

Stefan Frederik 9bca5b3f5b fix descend_symbol regression due to previous commit		2021-11-22 00:42:53 +01:00
XSchemWin	redundant code elimination in new_schematic(), fixed a memory leak in update_symbol()	2021-11-03 00:31:08 +01:00
doc	doc: simulation html page updates	2021-11-21 00:09:25 +01:00
scconfig	some parameter checks in xschem commands, global var removal in simulation help window - No use for production yet	2021-11-16 22:28:10 +01:00
src	fix descend_symbol regression due to previous commit	2021-11-22 00:42:53 +01:00
tests	update license info	2021-07-27 16:42:54 +02:00
xschem_library	fix descend_symbol regression due to previous commit	2021-11-22 00:42:53 +01:00
.gitignore	changed .gitignore for specific xschem files	2020-08-08 23:25:43 +02:00
AUTHORS	update copyright info to 2021; update Product.wxs	2021-09-12 08:32:16 +02:00
COPYING	populating xschem git repo	2020-08-08 15:47:34 +02:00
Changelog	bump version to 3.0.0; prepare for 3.0.0 release	2021-09-11 07:53:11 +02:00
INSTALL	populating xschem git repo	2020-08-08 15:47:34 +02:00
LICENSE	update license info	2021-07-27 16:42:54 +02:00
Makefile	populating xschem git repo	2020-08-08 15:47:34 +02:00
Makefile.conf.in	populating xschem git repo	2020-08-08 15:47:34 +02:00
README	update license info	2021-07-27 16:42:54 +02:00
README.md	Update README.md	2020-10-08 00:54:06 +02:00
README_MacOS.md	added notes for MacOS 'Big Sur' builds.	2021-09-26 13:24:51 +02:00
config.h.in	scconfig test for dup2() availability	2021-10-25 01:53:00 +02:00
configure	populating xschem git repo	2020-08-08 15:47:34 +02:00

README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Manual and instructions