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9131 Commits

Author SHA1 Message Date
Kamil Danecki d53ead6775
Merge d3ffaae6b0 into a0b89dde8e 2026-02-14 14:00:58 -08:00
Geza Lore a0b89dde8e
Internals: Make AstCAwait an AstNodeStmt (#6280) (#7078) 
AstCAwait is only ever uses in statement position, so model it as a
statement. We should never ever have a coroutine that returns a value.
There is no need for it in SV, nor should we rely on it for internals.

Also reworks the fix for V3Life incorrectly constant propagating the
beforeTrig functions (#7072). The property that upsets V3Life is that
a function:
1. Is called from multiple static call sites (multiple AstCCall)
2. Reads model state directly (AstVarRef to non-locals/arguments)

Such function can only be created internally after scheduling (V3Task
throws an unsupported error on a non-inlined function that reads model
state), so added a flag to AstCFunc to mark the dangerous ones for
V3Life.
 2026-02-14 20:15:32 +00:00
Geza Lore be27811a10
Optimize: Remove redundant variables during Dfg Peephole pass (#7076) 
Many rules in the Dfg Peephole pass check if a node has more than one
sinks. Redundant variables that will ultimately be removed can prevent
these from matching. Remove such variables during the Peeophole pass
itself to enable more matches.
 2026-02-14 12:33:20 +00:00
Geza Lore a45a058b09
Optimize additional DFG peephole Shift and Concat patterns (#7077) 2026-02-14 07:25:17 -05:00
Geza Lore e0c626e48a
Fix constant propagating DPI-written variables (#7074) 2026-02-13 18:28:14 +00:00
Igor Zaworski 7d71c3bb76
Fix of event triggering with V3Life (#6932 effect) (#7068 partial) (#7072) 2026-02-13 11:01:19 -05:00
github action d3ffaae6b0 Apply 'make format' 2026-02-13 14:23:43 +00:00
Geza Lore 0aaf17acfd Internals: Add referencing flags in Dfg dumps 2026-02-13 14:20:38 +00:00
Kamil Danecki e457cf5234 Add comments explaining negative exponent handling 
Signed-off-by: Kamil Danecki <kdanecki@internships.antmicro.com>
 2026-02-13 14:38:27 +01:00
Kamil Danecki 39df12cf4d Add test with 0 exponent 
Signed-off-by: Kamil Danecki <kdanecki@internships.antmicro.com>
 2026-02-13 14:38:09 +01:00
Pawel Kojma 64511d30b6
Internals: Fix marking `AstVar`s as class members (#7070) 2026-02-13 07:45:13 -05:00
Kamil Danecki 2ce417e476 Fix message 
Signed-off-by: Kamil Danecki <kdanecki@internships.antmicro.com>
 2026-02-13 11:27:53 +01:00
Kamil Danecki 858ba6939f cleanup 
Signed-off-by: Kamil Danecki <kdanecki@internships.antmicro.com>
 2026-02-13 10:46:11 +01:00
Geza Lore 3dd2b762e7
Fix scope tree in traces in hierarchical mode (#7042) 2026-02-12 20:54:03 -05:00
Wilson Snyder b84466ec10 Commentary: Changes update 2026-02-12 18:24:05 -05:00
Veripool API Bot b0fdbff6eb Verilog format 2026-02-12 18:23:56 -05:00
Wilson Snyder 13b1321985 Tests: Fix uvm_pkg_packer comment 2026-02-12 17:46:53 -05:00
Kamil Danecki d274a6395d Only do the required divisions 
Signed-off-by: Kamil Danecki <kdanecki@internships.antmicro.com>
 2026-02-12 18:20:10 +01:00
Kamil Danecki db39bc0d3d Comment for negative exponents 
Signed-off-by: Kamil Danecki <kdanecki@internships.antmicro.com>
 2026-02-12 18:18:52 +01:00
Kamil Danecki 5610989e1a Apply suggestion 
Signed-off-by: Kamil Danecki <kdanecki@internships.antmicro.com>
 2026-02-12 18:17:07 +01:00
Todd Strader fed41aba91
Fix UNUSED / UNDRIVEN for unused functions (#6967) 2026-02-12 11:01:14 -05:00
Yilou Wang 9b1b9a5b3b
Fix randc cyclic behavior broken with constraints (#7029) (#7035) 2026-02-12 10:58:04 -05:00
Kamil Danecki 94307f8970 Use unsigned div when base is unsigned 
Signed-off-by: Kamil Danecki <kdanecki@internships.antmicro.com>
 2026-02-12 16:14:18 +01:00
Kamil Danecki b24b89207d Fix message 
Signed-off-by: Kamil Danecki <kdanecki@internships.antmicro.com>
 2026-02-12 15:56:50 +01:00
Kamil Danecki dd155627f2 Fix t_constraint_unsup out message 
Signed-off-by: Kamil Danecki <kdanecki@internships.antmicro.com>
 2026-02-12 12:20:09 +01:00
Kamil Danecki eeff109379 Add support for power expressions with constant exponent in constraints 
Signed-off-by: Kamil Danecki <kdanecki@internships.antmicro.com>
 2026-02-12 11:42:41 +01:00
Igor Zaworski 446bec3d1a
Fix event triggering (#6932) 2026-02-11 10:35:59 -08:00
Yilou Wang e41436bd4a
Support inherited and nested pre/post_randomize callbacks (#7049) (#7053) 2026-02-11 09:33:57 -08:00
Yilou Wang 554fcef627
Fix rand_mode()/constraint_mode() when used as function arguments (#7051) (#7055) 2026-02-11 09:33:09 -08:00
Yilou Wang 996a4b6e1a
Fix constraint_mode()/rand_mode() in constructor being overwritten by init code (#7054) 2026-02-11 09:32:08 -08:00
Yilou Wang 84350859e0
Support System Functions in Constraint Blocks (#7028) (#7036) 2026-02-11 05:19:25 -08:00
Pawel Kojma 5d12ae3a2f
Fix non-member identifiers used inside constraints (#7033) 2026-02-11 05:18:24 -08:00
Yilou Wang 22dc437dbb
Support std::randomize() for queue, dynamic array, and associative array variables (#7044) 2026-02-10 18:24:25 -08:00
Wilson Snyder 67bff893bf Fix whitespace 2026-02-10 20:17:22 -05:00
Yilou Wang 2bb807a931
Fix Inline foreach constraints on dynamic arrays of class objects (#7030) (#7037) 2026-02-10 15:22:31 -08:00
Geza Lore a031dd1a22
Fix tracing without module inlining to match with inlining (#7041) 
This is an attempt to generate an identical trace file scope hierarchy
both with and without -fno-inline. Primarily because it's needed for
testing in upcoming patch, but also improves consitency prior to #7001
 2026-02-10 21:05:41 +00:00
Geza Lore 021e0ba81b
Testing: Bump vcddiff to latest (#7040) 2026-02-10 20:08:23 +00:00
Yilou Wang 925543676e
Fix rand_mode() on nested object variables causes Z3 solver error (#7031) (#7034) 2026-02-10 13:59:09 -05:00
Yilou Wang 8791e6c5f2
Support constraint_mode() on static constraints (#7027) (#7038) 2026-02-10 13:58:35 -05:00
Ryszard Rozak 6303eb45ce
Fix multidim dynamic array elements passed to ref argument (#7023) 2026-02-10 08:46:04 +01:00
Igor Zaworski a660fa54a7
Fix unique constraint in derived class (#7022) 2026-02-09 09:56:38 -05:00
github action a28bd5a085 Apply 'make format' 2026-02-09 03:48:11 +00:00
Leela Pakanati e36838ad8e
Fix tristate enables for -fno-inline (#7016) (#7019) 2026-02-08 22:47:09 -05:00
Wilson Snyder 5a236dd35d
Change INITIALSTATIC to also report on processes, per IEEE (#7020) 2026-02-08 20:47:12 -05:00
Wilson Snyder ba194f3790 Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
Wilson Snyder 9ba625225d Internals: Minor cleanups preparing for initialization fixes. No functional change. 2026-02-08 17:54:04 -05:00
Wilson Snyder 8700617fae Internals: Cleanup CRESET verilog and other misc fixes 2026-02-08 17:53:56 -05:00
Geza Lore 3752102879
Internals: Clean up V3Reorder (#7015) 
This is primarily cleanup, but there are 2 functional changes included:
- It used to accidentally reorder bodies of AstNodeIf that were outside
  an AstAlways. Now it will not touch anything outside an AstAlways.
- Removed one redundant edge from the graph which perturbs the result of
  V3Graph::acyclic. This should make no difference for the actual
  intended result of reordering NBAs to eliminate shadow variables.
 2026-02-08 16:09:53 +00:00
Wilson Snyder e12c62c070 Change JSON dumps to not include booleans that are false (#6977). 
Fixes #6977.
 2026-02-08 07:59:55 -05:00
Wilson Snyder c1db30523f Commentary (#7014) 
Fixes #7014.
 2026-02-08 07:48:12 -05:00