Patrick Urban
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d6a8239d55
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TileBitDatabase: fix SERDES CDR parameters
|
2025-10-27 15:47:19 +01:00 |
Miodrag Milanovic
|
fffdc6610c
|
Remove most of boost usage
|
2025-10-22 15:27:22 +02:00 |
|
Miodrag Milanovic
|
e5df2fd309
|
add write_cmd_spll for designs without PLLs
|
2025-10-22 09:14:51 +02:00 |
|
Patrick Urban
|
8d1018796d
|
gmpack: reset config latches before bootaddr jump
|
2025-10-20 17:25:26 +02:00 |
|
Patrick Urban
|
ac547baf3b
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gmpack: set `CMD_CHG_STATUS` config mode byte in bootaddr and background modes
|
2025-10-20 16:28:26 +02:00 |
|
Patrick Urban
|
9aa2711958
|
gmunpack: unpack `CMD_CFGRST` and `CMD_JUMP`
|
2025-10-20 13:58:12 +02:00 |
|
Patrick Urban
|
0283a03d82
|
gmpack: add background reconfiguration feature
|
2025-10-15 23:19:50 +02:00 |
|
Patrick Urban
|
1f3f9aad85
|
gmpack: enable config clock for reconfiguration
|
2025-10-15 19:37:33 +02:00 |
|
Patrick Urban
|
05d8ef6a43
|
gmpack: revert `CFG_RECONFIG` and `CFG_CPE_CFG` separation
|
2025-10-15 17:35:20 +02:00 |
|
Patrick Urban
|
4597d1de96
|
gmpack: add bootaddr parameter for secondary bitstreams
|
2025-10-15 17:24:12 +02:00 |
|
Patrick Urban
|
72bc122449
|
gmpack: add option to clear config latches
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2025-10-15 12:41:01 +02:00 |
|
Miodrag Milanovic
|
5d37e3a18f
|
Add reconfig option
|
2025-10-07 13:43:51 +02:00 |
|
Miodrag Milanovic
|
b4a3a82578
|
set stop and done only for die 0
|
2025-10-07 13:43:10 +02:00 |
|
Miodrag Milanovic
|
89a4bd03d7
|
log iteration
|
2025-10-03 18:03:44 +02:00 |
|
Miodrag Milanovic
|
14e478fca5
|
Fix multi die unpack
|
2025-10-02 16:03:30 +02:00 |
|
Miodrag Milanovic
|
542863a768
|
Fix reading with gmunpack and clangformat
|
2025-07-09 12:52:00 +02:00 |
|
Patrick Urban
|
9148a1b81d
|
Merge branch 'YosysHQ:main' into cfgmode
|
2025-07-08 19:49:11 +02:00 |
|
Patrick Urban
|
10d7958f2e
|
Disable crc bytes if set to "unused"
|
2025-07-08 16:29:32 +02:00 |
|
Patrick Urban
|
2bb81624b1
|
Fix crc error behaviour length byte
|
2025-07-08 16:10:23 +02:00 |
|
Miodrag Milanovic
|
6e63a05636
|
Resolve name conflicts
|
2025-07-07 10:12:59 +02:00 |
|
Patrick Urban
|
ebafe63481
|
Enable crc error behaviour and spi io width selection in bitstream
|
2025-07-03 17:02:47 +02:00 |
|
Miodrag Milanovic
|
ff2445f353
|
Add D2D support
|
2025-06-18 08:31:49 +02:00 |
|
Miodrag Milanovic
|
04a2dc2dc3
|
Support reading multi die bitstreams
|
2025-06-18 08:31:49 +02:00 |
|
Miodrag Milanovic
|
84c5734c9c
|
clangformat
|
2025-06-18 08:31:49 +02:00 |
|
Miodrag Milanovic
|
aacc795393
|
Write proper multi die bitstream
|
2025-06-18 08:31:49 +02:00 |
|
Miodrag Milanovic
|
dfc6458d5a
|
Use _ as separator for PLL CFGs
|
2025-06-18 08:31:49 +02:00 |
|
Miodrag Milanovic
|
415de01bbe
|
Extract SERDES config
|
2025-04-30 09:57:28 +02:00 |
|
Miodrag Milanovic
|
69ed9f73ab
|
Switch to standard type
|
2025-04-28 17:38:40 +02:00 |
|
Miodrag Milanovic
|
adc3f7b133
|
Support SERDES in bitstream
|
2025-04-04 10:53:12 +02:00 |
|
Miodrag Milanovic
|
d79df6a1e0
|
Fix due to documentation error
|
2025-04-03 09:46:27 +02:00 |
|
Miodrag Milanovic
|
9ccc8588c0
|
RAM configuration bits
|
2025-03-21 10:01:41 +01:00 |
|
Miodrag Milanovic
|
dd3591cfa9
|
Group RAM data 40 bytes per row
|
2025-03-20 12:50:18 +01:00 |
|
Miodrag Milanovic
|
8e0cb69fd7
|
Off by one PLL config creating error
|
2025-03-07 09:57:56 +01:00 |
|
Miodrag Milanovic
|
1e60c0f6fb
|
Properly named configuration bits
|
2025-02-05 12:38:27 +01:00 |
|
Miodrag Milanovic
|
14b21aa4c7
|
Properly named configuration bits
|
2025-02-05 12:28:31 +01:00 |
|
Miodrag Milanovic
|
c40e44027d
|
Update naming and document unused bits
|
2025-02-04 10:12:42 +01:00 |
|
Miodrag Milanovic
|
1d93989ed5
|
Add bit mapping for edges
|
2025-01-22 12:19:41 +01:00 |
|
Miodrag Milanovic
|
cf84095539
|
Fixed typo
|
2025-01-13 18:32:07 +01:00 |
|
Miodrag Milanovic
|
f6f887ccfe
|
Fix SB_DRIVE index
|
2025-01-13 13:14:53 +01:00 |
|
Miodrag Milanovic
|
07d7827cd4
|
Fix exporting CLKIN and GLBOUT settings
|
2025-01-13 13:14:13 +01:00 |
|
Miodrag Milanovic
|
d1df911fca
|
Some more global/pll routing
|
2025-01-06 14:13:49 +01:00 |
|
Miodrag Milanovic
|
efec014074
|
PLL config bits
|
2024-12-23 14:45:32 +01:00 |
|
Miodrag Milanovic
|
e1694bfcbc
|
better describe global bits
|
2024-12-23 10:51:28 +01:00 |
|
Miodrag Milanovic
|
6bfd0c7114
|
Fixed typo
|
2024-12-20 10:32:41 +01:00 |
|
Miodrag Milanovic
|
f49a73d98a
|
Rename config bits
|
2024-12-18 14:58:42 +01:00 |
|
Miodrag Milanovic
|
4c8b566e62
|
Use full namespace
|
2024-12-18 10:19:43 +01:00 |
|
Miodrag Milanovic
|
172c570a28
|
Split some configuration bits
|
2024-12-17 15:48:11 +01:00 |
|
Miodrag Milanovic
|
5f04d0c224
|
Validate input data files
|
2024-12-13 17:17:42 +01:00 |
|
Miodrag Milanovic
|
46278407c4
|
Sync chipdb and pack/unpack
|
2024-12-13 15:00:29 +01:00 |
|
Miodrag Milanovic
|
fe8e82cdd7
|
Write proper change status commands
|
2024-12-07 19:29:27 +01:00 |