Add D2D support
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08b35c4538
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@ -18,7 +18,7 @@
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import die
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import os
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from die import Die, Location
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from die import Die, Location, Connection
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from dataclasses import dataclass
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from typing import List, Dict
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from timing import decompress_timing
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@ -105,10 +105,38 @@ class Chip:
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die_num = x_die + y_die * self.die_width
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return die.get_tile_info(die_num, x_pos, y_pos)
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def create_conn(self, conn, src_x,src_y, src, dst_x, dst_y, dst, delay=""):
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key_val = f"{src_x}/{src_y}/{src}"
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key = Connection(src_x, src_y, src, "")
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item = Connection(dst_x, dst_y, dst, delay)
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if key_val not in conn:
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conn[key_val] = list()
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conn[key_val].append(key)
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conn[key_val].append(item)
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def get_connections(self):
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conn = dict()
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for d in self.dies.values():
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d.create_in_die_connections(conn)
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if self.name=="CCGM1A2":
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for x in range(27, 163):
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if x == 27:
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# only 7 signals only from bottom of upper to top of lower
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p_range = range(2, 9)
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else:
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p_range = range(1, 9)
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for p in p_range:
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plane = f"{p:02d}"
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offset_y = 132 + 2
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sbb_y = -1 + offset_y if x % 2 == 1 else 0 + offset_y
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sbt_y = 129 if x % 2 == 1 else 130
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self.create_conn(conn, x, sbb_y, f"{die.get_sb_type(x,sbb_y-offset_y)}.P{plane}.Y4", x, sbt_y, f"{die.get_sb_type(x,sbt_y)}.P{plane}.D2_4")
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if x > 27 and (x != 28 or p > 4):
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# no connection for 27, and for 28 just 4 signals from lower to upper
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self.create_conn(conn, x, sbt_y, f"{die.get_sb_type(x,sbt_y)}.P{plane}.Y2", x, sbb_y, f"{die.get_sb_type(x,sbb_y-offset_y)}.P{plane}.D2_2")
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return conn.items()
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def get_packages(self):
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@ -44,7 +44,7 @@ class Die
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static constexpr int GLBOUT_CFG_SIZE = 8;
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static constexpr int STATUS_CFG_SIZE = 12;
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static constexpr int STATUS_CFG_START = PLL_CFG_SIZE * MAX_PLL * 2 + CLKIN_CFG_SIZE + GLBOUT_CFG_SIZE;
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static constexpr int DIE_CONFIG_SIZE = STATUS_CFG_START + STATUS_CFG_SIZE;
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static constexpr int DIE_CONFIG_SIZE = STATUS_CFG_START + STATUS_CFG_SIZE + 1;
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static constexpr int FF_INIT_RESET = 2;
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static constexpr int FF_INIT_SET = 3;
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static constexpr int SERDES_CFG_SIZE = 186;
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@ -68,11 +68,13 @@ class Die
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bool is_status_cfg_empty() const;
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bool is_using_cfg_gpios() const;
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bool is_serdes_cfg_empty() const;
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uint8_t get_d2d_config() const;
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void write_latch(int x, int y, const std::vector<uint8_t> &data);
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void write_ram(int x, int y, const std::vector<uint8_t> &data);
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void write_ram_data(int x, int y, const std::vector<uint8_t> &data, uint16_t addr);
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void write_pll_select(uint8_t select, const std::vector<uint8_t> &data);
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void write_d2d_config(uint8_t data);
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void write_die_cfg(const std::vector<uint8_t> &data) { die_cfg = data; }
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void write_serdes_cfg(const std::vector<uint8_t> &data) { serdes_cfg = data; }
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void write_ff_init(int x, int y, uint8_t data);
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@ -420,6 +420,7 @@ int Bitstream::determine_size(int *max_die_x, int *max_die_y)
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case CMD_LXLYS:
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case CMD_ACLCU:
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case CMD_RXRYS:
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case CMD_D2D:
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// Check header CRC
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check_crc(rd);
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// Read data block
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@ -579,6 +580,17 @@ Chip Bitstream::deserialise_chip()
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// Skip bytes
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rd.skip_bytes(9);
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break;
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case CMD_D2D:
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BITSTREAM_DEBUG("CMD_D2D");
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if (length != 1)
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BITSTREAM_FATAL("CMD_D2D data must be one byte long", rd.get_offset());
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// Check header CRC
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check_crc(rd);
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// Read data block
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die->write_d2d_config(rd.get_byte());
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// Check data CRC
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check_crc(rd);
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break;
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case CMD_SPLL:
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BITSTREAM_DEBUG("CMD_SPLL");
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if (length != 1)
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@ -794,6 +806,10 @@ Bitstream Bitstream::serialise_chip(const Chip &chip)
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}
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wr.write_cmd_path(0x10);
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uint8_t d2d = die.get_d2d_config();
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if (d2d)
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wr.write_cmd_d2d(d2d);
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// PLL setup
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std::vector<uint8_t> die_config = die.get_die_config();
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bool pll_written = false;
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@ -103,6 +103,8 @@ bool Die::is_serdes_cfg_empty() const
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bool Die::is_using_cfg_gpios() const { return die_cfg[STATUS_CFG_START + 2] & 0x08; }
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uint8_t Die::get_d2d_config() const { return die_cfg[DIE_CONFIG_SIZE - 1]; }
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void Die::write_latch(int x, int y, const std::vector<uint8_t> &data)
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{
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int pos = 0;
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@ -165,4 +167,6 @@ void Die::write_pll_select(uint8_t select, const std::vector<uint8_t> &data)
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die_cfg[pos++] = data[j];
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}
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void Die::write_d2d_config(uint8_t data) { die_cfg[DIE_CONFIG_SIZE - 1] = data; }
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} // namespace GateMate
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@ -841,6 +841,10 @@ ConfigBitDatabase::ConfigBitDatabase() : BaseBitDatabase(Die::DIE_CONFIG_SIZE *
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add_word_settings(stringf("PLL%d.USR_CLK_OUT", i), pos + 8 + 7, 1);
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pos += 16;
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}
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add_word_settings("D2D.N", pos + 0, 1);
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add_word_settings("D2D.E", pos + 1, 1);
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add_word_settings("D2D.S", pos + 2, 1);
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add_word_settings("D2D.W", pos + 3, 1);
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add_unknowns();
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}
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