gmpack: enable config clock for reconfiguration
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05d8ef6a43
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1f3f9aad85
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@ -58,6 +58,22 @@ static constexpr const uint8_t CFG_CPE_RESET = 0x10;
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static constexpr const uint8_t CFG_FILL_RAM = 0x20;
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static constexpr const uint8_t CFG_SERDES = 0x40;
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// PLL register A
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static constexpr const uint8_t CFG_PLL_RST_N = 0x01;
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static constexpr const uint8_t CFG_PLL_EN = 0x02;
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static constexpr const uint8_t CFG_PLL_AUTN = 0x04; // only available for PLL0
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static constexpr const uint8_t CFG_SET_SEL = 0x08;
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static constexpr const uint8_t CFG_USR_SET = 0x10;
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static constexpr const uint8_t CFG_USR_CLK_REF = 0x20;
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static constexpr const uint8_t CFG_CLK_OUT_EN = 0x40;
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static constexpr const uint8_t CFG_LOCK_REQ = 0x80;
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// PLL register B
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static constexpr const uint8_t CFG_AUTN_CT_I = 0x01; // only available for PLL0
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static constexpr const uint8_t CFG_CLK180_DOUB = 0x08;
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static constexpr const uint8_t CFG_CLK270_DOUB = 0x10;
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static constexpr const uint8_t CFG_USR_CLK_OUT = 0x80;
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static const std::vector<std::pair<std::string, uint8_t>> crc_modes = {
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{"check", 0x00}, // Check CRC
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{"ignore", 0x01}, // Ignore added CRC
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@ -1018,6 +1034,12 @@ Bitstream Bitstream::serialise_chip(const Chip &chip, const std::map<std::string
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if (options.count("reconfig")) {
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cfg_stat |= CFG_RECONFIG | CFG_CPE_CFG;
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}
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if (options.count("bootaddr")) {
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// Enable config clock
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die_config[Die::STATUS_CFG_START + 2 + 2] |= CFG_PLL_AUTN;
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die_config[Die::STATUS_CFG_START + 2 + 3] |= CFG_AUTN_CT_I;
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}
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}
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if (!die.is_serdes_cfg_empty()) {
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cfg_stat |= CFG_SERDES;
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