gmpack: set `CMD_CHG_STATUS` config mode byte in bootaddr and background modes
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9aa2711958
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ac547baf3b
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@ -392,11 +392,11 @@ class BitstreamReadWriter
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write_nops(4);
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}
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void write_cmd_chg_status(uint8_t cfg, std::vector<uint8_t> data)
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void write_cmd_chg_status(uint8_t cfg, uint8_t next_mode, std::vector<uint8_t> data)
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{
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write_header(CMD_CHG_STATUS, 12);
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write_byte(cfg);
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write_byte(0x00);
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write_byte(next_mode);
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for (int i = 2; i < 12; i++)
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write_byte(data[Die::STATUS_CFG_START + i]);
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insert_crc16();
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@ -1061,6 +1061,7 @@ Bitstream Bitstream::serialise_chip(const Chip &chip, const std::map<std::string
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}
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uint8_t cfg_stat = CFG_CPE_RESET;
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uint8_t cfg_mode = 0x1F; // unused mode enforces controller to stop
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// Only for die 0
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if (d == 0) {
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// Write change status
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@ -1079,6 +1080,7 @@ Bitstream Bitstream::serialise_chip(const Chip &chip, const std::map<std::string
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}
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if (options.count("bootaddr") || options.count("background")) {
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cfg_mode = 0x10; // active spi
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// Enable autonomous clock if PLL not enabled
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if (die.is_pll_cfg_empty(0)) {
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die_config[Die::STATUS_CFG_START + 2 + 2] |= CFG_PLL_AUTN;
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@ -1093,7 +1095,7 @@ Bitstream Bitstream::serialise_chip(const Chip &chip, const std::map<std::string
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wr.insert_crc16();
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}
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wr.write_cmd_chg_status(cfg_stat, die_config);
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wr.write_cmd_chg_status(cfg_stat, cfg_mode, die_config);
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if (d == 0) {
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if (options.count("bootaddr") && !options.count("background")) {
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