Commit Graph

1478 Commits

Author SHA1 Message Date
Gwenhael Goavec-Merou a1fd711a71 prepare v0.12.0 release 2024-03-09 10:23:31 +01:00
Gwenhael Goavec-Merou f1bf4fdf57 jtag,main,xilinx: fix warnings, lint 2024-03-09 10:21:21 +01:00
Gwenhael Goavec-Merou 899dc931c8 workflows: drop mingw32 2024-03-07 07:09:58 +01:00
Gwenhael Goavec-Merou 6366518ff7 device,ftdiJtagMPSSE,jtag: check/lint happy 2024-03-07 06:58:31 +01:00
Gwenhael Goavec-Merou 6dc2e752f4 ch347jtag: drop unused sync_cb 2024-03-07 06:57:27 +01:00
Gwenhael Goavec-Merou 8ed388ca1c
Merge pull request #440 from UweBonnes/xc7s
xilinx.cpp: After programming, go to bypass, PR for #436
2024-03-06 07:33:32 +01:00
Gwenhael Goavec-Merou 62169efa9c Github macos-latest runner workaround 2024-03-05 07:22:18 +01:00
Uwe Bonnes e299061992 xilinx.cpp: After programming, go to bypass
Needed for xc7s50 on VMM3 boards to detect FLASH
2024-03-04 15:33:25 +01:00
Gwenhael Goavec-Merou bcbd8aa0e3 new board: olimex_gatemateevb Olimex GateMate A1 EVB 2024-03-03 08:25:55 +01:00
Gwenhael Goavec-Merou 0b2d0e2c9c doc/boards: fix te0712 URL 2024-03-02 15:07:39 +01:00
Gwenhael Goavec-Merou 81de5110c7
Merge pull request #439 from UweBonnes/trenz
Add some two more Trenz boards, one containing Virtex7
2024-03-02 12:26:38 +01:00
Uwe Bonnes 645471a16c spiFlashdb.hpp: Detect N25Q256A. 2024-03-01 13:38:23 +01:00
Uwe Bonnes 21c2264382 xc7vx330tffg1157: Allow to build and provide spiOverJtag_xc7vx330tffg1157.bit 2024-03-01 13:38:23 +01:00
Uwe Bonnes f57abf9024 Add Trenz TEC0330 board. 2024-03-01 13:38:12 +01:00
Uwe Bonnes 88c4d86e63 Add xc7vx330t 2024-03-01 10:50:28 +01:00
Uwe Bonnes ae39b2c556 board.hpp: Add TE0712-8 Board (XC7A200TFBG484) 2024-02-28 22:46:01 +01:00
Gwenhael Goavec-Merou a2d8bc861f
Merge pull request #437 from UweBonnes/xc6v
Add spilOverJtag for Virtex6
2024-02-28 22:03:53 +01:00
ZhiYuanNJ 4af0bf6ed5
update CH347 (#424) 2024-02-28 20:44:49 +01:00
Uwe Bonnes 52ade9df6e spiOverJtag: XC6SLX...L may need other pin constraints as XC6SLX...
- Checked and handled for XC6Sxxx(T)fgg484
2024-02-28 12:59:22 +01:00
Uwe Bonnes 75e086cd55 spiOverJtag: Remove obsolete xc6 directory 2024-02-28 12:59:12 +01:00
Uwe Bonnes a926ab9b88 Add (Cern) VMM3 board 2024-02-28 11:50:10 +01:00
Uwe Bonnes 0e99360d1c Add (Cern) VEC_V6 Board 2024-02-28 11:50:10 +01:00
Uwe Bonnes 354d3f86ab Virtex6: Add spiOverJtag for Virtex6, detect xc6vlx130 and provide bitfile for xc6vlx130tff784 2024-02-28 11:50:10 +01:00
Uwe Bonnes 956d9355a6 Add S25FL128L flash 2024-02-28 11:50:10 +01:00
Uwe Bonnes 3ea541cd8e xilinx_spiOverJtag.v: Rearrange for better extensibility
- Use `ifdef ... `elsif ... `endif for better seperation
2024-02-28 11:49:51 +01:00
Uwe Bonnes 0a92adf8a6 spiOverJtag: Add constr_xc7k_fbg676.xdc 2024-02-28 10:00:13 +01:00
Uwe Bonnes 7363708f11 spiOverJtag: Fix errors on xc6slx150tfgg484 2024-02-28 09:59:44 +01:00
Uwe Bonnes 829b5eb099 spiOverJtag: Add missing xc6s_tqg144 constraint 2024-02-28 09:59:16 +01:00
Gwenhael Goavec-Merou 85d9ca5d20 board: added digilent cmoda7_15t 2024-02-26 21:18:33 +01:00
Gwenhael Goavec-Merou 9e2edeb6c1 spiOverJtag: added xc7a15tcpg236 bitstream 2024-02-26 21:15:36 +01:00
Gwenhael Goavec-Merou ee2337ce0a CMakeLists.txt: compress spiOverJtag for Darwin too 2024-02-23 21:41:58 +01:00
Gwenhael Goavec 0182d592be dfu,ftdipp_mpsse: sprintf -> snprintf 2024-02-20 20:59:13 +01:00
Gwenhael Goavec-Merou 3165552994 DFU: fix code to accept tinyDFU implementation (where not altsettings have an DFU descriptor) 2024-02-15 06:45:13 +01:00
Gwenhael Goavec-Merou d5dcf03fc7
Merge pull request #432 from bg-gsl/lattice_encrypted
Lattice encrypted bitstreams
2024-02-13 14:19:00 +01:00
Giovanni Bruni ffc519c0e2 lattice: improve info about "BSE Error Code" from Device Status Register 2024-02-13 09:32:30 +01:00
Giovanni Bruni e923ef4059 lattice nexus boards: change from CABLE_DEFAULT (i.e. 6MHz) to CABLE_MHZ(1) (i.e. 1MHz)
as at 6MHz the download of bitstreams is not stable.

With "not stable" we mean that:
- when dealing with Certus/Crosslink, most of the times it works
- when dealing with CertusPro devices, most of the times it doesn't work

We think this is due to the size of the bitstream and the way that the
transmission/storing is handled on the receiving side (i.e. the FPGA).
2024-02-13 09:24:47 +01:00
Giovanni Bruni 0f9422f09a latticeBitParser: add support for loading Lattice (Nexus) encrypted bitstreams,
by adding key and preamble of encrypted bitstreams to if statements.
2024-02-13 09:22:34 +01:00
Gwenhael Goavec-Merou 4c4b132c2c
Merge pull request #431 from mdavidsaver/xvc-client-fixup
SVC client fixup error handling
2024-02-12 06:59:15 +01:00
Michael Davidsaver daa1e38799 xvc client: handle failed ll_write()
Avoids "Send instruction failed" in a tight loop...
2024-02-11 14:25:00 -08:00
Michael Davidsaver 4c737b2b96 xvc client ensure send() entire buffer 2024-02-11 14:25:00 -08:00
Gwenhael Goavec-Merou 39be00fd56
Merge pull request #427 from jgroman/master
Fix Tang Primer 25K SRAM loading when flash is erased
2024-02-02 13:09:45 +01:00
jgroman eba9c37027 Fix SRAM loading on invalid flash 2024-02-02 12:54:17 +01:00
Gwenhael Goavec-Merou f7826b8820
Merge pull request #425 from sigmaeo/master
Update spiFlashdb.hpp for Macronix MX25L3233F used on Cmod A7-35T
2024-02-01 20:34:13 +01:00
sigmaeo fc58ffed38
Update spiFlashdb.hpp for Macronix MX25L3233F used on Cmod A7-35T
Digilent changed from Micron N25Q032A to Macronix MX25L3233F in 2020/2021, so this flash is needed in openfpgaloader to load to Cmod A7-35T
2024-02-01 19:48:21 +01:00
Gwenhael Goavec-Merou f9c1aa4eed
Merge pull request #423 from jgroman/master
Add faulty MPSEE cmd 8E workaround
2024-01-29 07:17:50 +01:00
jgroman 33eaf58869 Add faulty MPSEE cmd 8E workaround 2024-01-27 13:02:46 +01:00
Gwenhael Goavec-Merou abda6ed72c
Merge pull request #422 from antmicro/tmichalak/antmicro-ddr-tester-boards
Add support for Antmicro's DDR tester board
2024-01-25 18:50:29 +01:00
Michal Sieron d2f31860cd spiOverJtag: add support for xc7k70tfbg484
Signed-off-by: Michal Sieron <msieron@antmicro.com>
2024-01-25 12:42:11 +01:00
Michal Sieron 1aaa1b37ac board: add Antmicro LPDDR4 Tester board
Signed-off-by: Michal Sieron <msieron@antmicro.com>
2024-01-25 12:29:12 +01:00
Michal Sieron 59f5759888 board: add Antmicro DDR5 Tester board
Signed-off-by: Michal Sieron <msieron@antmicro.com>
2024-01-25 12:25:07 +01:00