Merge pull request #440 from UweBonnes/xc7s

xilinx.cpp: After programming, go to bypass, PR for #436
2024-03-06 07:33:32 +01:00 · 2024-03-06 07:33:32 +01:00 · 8ed388ca1c
parent 62169efa9c e299061992
commit 8ed388ca1c
1 changed files with 2 additions and 0 deletions
--- a/src/xilinx.cpp
+++ b/src/xilinx.cpp
@ -805,6 +805,8 @@ void Xilinx::program_mem(ConfigBitstreamParser *bitfile)
 	 * now functional.                                    X     1   3
 	 */
 	_jtag->go_test_logic_reset();
+        /* Some xc7s50 does not detect correct connected flash w/o this shift*/
+        _jtag->shiftIR(tx_buf, rx_buf, _irlen);
 }

 bool Xilinx::dumpFlash(uint32_t base_addr, uint32_t len)