spiOverJtag: XC6SLX...L may need other pin constraints as XC6SLX...

- Checked and handled for XC6Sxxx(T)fgg484
This commit is contained in:
Uwe Bonnes 2024-02-28 12:52:01 +01:00
parent 75e086cd55
commit 52ade9df6e
3 changed files with 12 additions and 2 deletions

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@ -76,7 +76,7 @@ if tool in ["ise", "vivado"]:
"xc6slx45csg324" : "xc6s_csg324",
"xc6slx100fgg484" : "xc6s_fgg484",
"xc6slx150tcsg484" : "xc6s_csg484",
"xc6slx150tfgg484" : "xc6s_fgg484",
"xc6slx150tfgg484" : "xc6s_t_fgg484",
"xc6vlx130tff784" : "xc6v_ff784",
"xc7a15tcpg236" : "xc7a_cpg236",
"xc7a25tcpg238" : "xc7a_cpg238",

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@ -2,5 +2,7 @@ CONFIG VCCAUX = "2.5";
NET "sdi_dq0" LOC = AB20 | IOSTANDARD = LVCMOS25;
NET "sdo_dq1" LOC = AA20 | IOSTANDARD = LVCMOS25;
NET "csn" LOC = T5 | IOSTANDARD = LVCMOS25;
NET "wpn_dq2" LOC = U14 | IOSTANDARD = LVCMOS25;
NET "hldn_dq3" LOC = U13 | IOSTANDARD = LVCMOS25;
NET "csn" LOC = T5 | IOSTANDARD = LVCMOS25;
NET "sck" LOC = Y21 | IOSTANDARD = LVCMOS25;

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@ -0,0 +1,8 @@
CONFIG VCCAUX = "2.5";
NET "sdi_dq0" LOC = AB20 | IOSTANDARD = LVCMOS25;
NET "sdo_dq1" LOC = AA20 | IOSTANDARD = LVCMOS25;
NET "wpn_dq2" LOC = R13 | IOSTANDARD = LVCMOS25;
NET "hldn_dq3" LOC = T14 | IOSTANDARD = LVCMOS25;
NET "csn" LOC = AA3 | IOSTANDARD = LVCMOS25;
NET "sck" LOC = Y20 | IOSTANDARD = LVCMOS25;