da3dfff609
part: re-adding version nibble to remove ambiguities between U, UM and UM5G
2022-03-27 07:47:38 +02:00
10ee84bb6d
jtag: when verbose > 1: display unfiltered/raw IDCODE
2022-03-27 07:14:14 +02:00
65c1d2ff0e
ftdipp_mpsse: change verbose level
2022-03-27 07:13:40 +02:00
7d730eeeb6
ftdiJtagxx: check lowlevel init return value
2022-03-20 16:27:51 +01:00
5d22374408
ftdipp_mpsse: robustness: check all function return code / improve a bit error message
2022-03-20 16:20:57 +01:00
7ed9c201ce
anlogicCable: remove unused _verbose, _tdi, _tms
2022-03-20 10:10:30 +01:00
cdc68b5dfc
efinixHexParser: remove unused reverseOrder
2022-03-20 08:51:18 +01:00
3f5aca5248
colognechip: explicitly set _spi or _ftdi_jtag to null, drop useless else if -> if not _spi it must be jtag
2022-03-20 08:44:55 +01:00
684a4363ba
efinix: fix dumpFlash: add override, remove filename param and use _filename from constructor
2022-03-20 08:27:13 +01:00
648de05e6d
colognechip: fix dumpFlash: add override, remove filename param and use _filename from constructor
2022-03-20 08:25:51 +01:00
74790c40b6
configBitstreamParser: string::find return size_t not uint32_t
2022-03-20 08:24:49 +01:00
80e917fcf1
Use uint32_t for misc_dev_list ( fixes #196 )
2022-03-19 12:13:07 +01:00
3cef7f920d
board: Xilinx ZCU102
2022-03-19 10:08:51 +01:00
8d3310d486
part: ZynqMPSoC XCZU9EG
2022-03-19 10:06:44 +01:00
3210bcd9cb
Merge pull request #194 from infphyny/qmtech_5cefa5f23
...
Add qmtechCycloneV_5cefa5f23 board and spiOverJtag/spiOverJtag_5cefa5…
2022-03-13 15:25:01 +01:00
2ed5eb5eec
Rename 5cefa5f23 to 5ce523, add documentation for board and fpga
2022-03-13 09:14:52 -04:00
9f025e8278
jlink: fix workflow failure
2022-03-12 19:01:54 +01:00
18100ec0f3
cable: new SEGGER J-Link support (PoC)
2022-03-12 18:46:23 +01:00
7b36bdc893
Add qmtechCycloneV_5cefa5f23 board and spiOverJtag/spiOverJtag_5cefa5f23.rbf.gz bitstream to write flash
2022-03-12 09:25:22 -05:00
15fb5ac591
board: PYNQ-Z2
2022-03-12 14:54:24 +01:00
ee08b1ac39
add Cyclone V 5CEFA5 in part database
2022-03-11 14:01:50 -05:00
964c7d6659
ftdi MPSSE / jtag: add option to use neg edge for TDO's sampling
2022-03-11 07:45:48 +01:00
86b2e14dbd
Merge pull request #191 from rwhitby/ice40_warnings
...
ice40: Add override specifier to resolve compiler warnings
2022-03-11 06:50:16 +01:00
259914910f
board: Xilinx ZC706
2022-03-10 18:53:41 +01:00
6ba1968952
part: Zynq XC7Z045
2022-03-10 18:53:12 +01:00
74eb812c6d
cable: digilent jtag-smt2-nc
2022-03-10 18:52:47 +01:00
94c5fbb854
ice40: Add override specifier to resolve compiler warnings
...
The following compiler warnings are resolved by adding appropriate override specifiers:
In file included from openFPGALoader/src/ice40.cpp:6:
openFPGALoader/src/ice40.hpp:26:8: warning: 'dumpFlash' overrides a member function but is not marked 'override' [-Winconsistent-missing-override]
bool dumpFlash(uint32_t base_addr, uint32_t len);
^
openFPGALoader/src/device.hpp:46:16: note: overridden virtual function is here
virtual bool dumpFlash(uint32_t base_addr, uint32_t len) {
^
In file included from openFPGALoader/src/ice40.cpp:6:
openFPGALoader/src/ice40.hpp:34:7: warning: 'spi_put' overrides a member function but is not marked 'override' [-Winconsistent-missing-override]
int spi_put(uint8_t cmd, uint8_t *tx, uint8_t *rx,
^
openFPGALoader/src/spiInterface.hpp:65:14: note: overridden virtual function is here
virtual int spi_put(uint8_t cmd, uint8_t *tx, uint8_t *rx,
^
In file included from openFPGALoader/src/ice40.cpp:6:
openFPGALoader/src/ice40.hpp:39:7: warning: 'spi_put' overrides a member function but is not marked 'override' [-Winconsistent-missing-override]
int spi_put(uint8_t *tx, uint8_t *rx, uint32_t len) {
^
openFPGALoader/src/spiInterface.hpp:75:14: note: overridden virtual function is here
virtual int spi_put(uint8_t *tx, uint8_t *rx, uint32_t len) = 0;
^
In file included from openFPGALoader/src/ice40.cpp:6:
openFPGALoader/src/ice40.hpp:43:7: warning: 'spi_wait' overrides a member function but is not marked 'override' [-Winconsistent-missing-override]
int spi_wait(uint8_t cmd, uint8_t mask, uint8_t cond,
^
openFPGALoader/src/spiInterface.hpp:85:14: note: overridden virtual function is here
virtual int spi_wait(uint8_t cmd, uint8_t mask, uint8_t cond,
^
4 warnings generated.
2022-03-10 18:19:49 +10:30
2eac30c24e
ftdiJtagMPSSE: fix read/write polarity: always write on neg, read is by default on pos but may on neg with arty
2022-03-10 07:43:14 +01:00
28ebc98b1b
board: add CERN SPEC150
2022-03-03 15:40:42 +01:00
75e3d82a92
part: xc6slx150T
2022-03-03 15:37:18 +01:00
86fa1e01de
spiFlash: force subsector only for SST26VF032B
2022-02-26 19:10:18 +01:00
02e93ffec6
spiFlashdb: fix bp_offset list
2022-02-26 17:02:38 +01:00
add794ab67
spiFlashdb: add microchip SST26VF032B
2022-02-26 16:31:41 +01:00
aada7fe26b
spiFlash: when no subsector_erase compute end_addr with correct block size
2022-02-26 16:17:49 +01:00
655f2c61ec
spiFlash: add no block protect use case
2022-02-26 16:15:50 +01:00
3cfdfb1856
Update board.hpp
...
Use default cable. This is equivalent to 6MHz setting, albeit more versatile.
2022-02-21 23:05:37 -04:00
d4e8eef676
Add board and cable defaults for genesys2
2022-02-21 08:11:57 +00:00
52696309bb
spiFlashdb: spansion S25FL256S
2022-02-21 08:27:33 +01:00
7a7f1723ea
add support for colorlight-i9
2022-02-20 01:41:17 +01:00
6059c9dbfb
Remove the Tigard default cable, as the board does not have an on-board JTAG adapter.
2022-02-19 17:14:49 +10:30
7022e2101a
Add support for the QMTech Kintex7 Core Board
2022-02-19 14:22:55 +10:30
1cb85a5a21
Add support for the Spansion S25FL256L flash on the QMTech Kintex 7 board
2022-02-19 14:22:26 +10:30
905e96dfec
Add digilent_zybo_z7 10/20 support
2022-02-15 21:01:11 -08:00
5099b57ce3
Merge pull request #174 from tarikgraba/master
...
Add support for Terasic DE1-SoC board
2022-02-09 20:14:38 +01:00
56457a4023
Merge pull request #173 from rstephan/tables
...
Nicer layout for the boards/fpga/cables table
2022-02-09 18:17:35 +01:00
63c9ec01b7
Fixed right alignment problem.
2022-02-09 17:55:16 +01:00
5aa34c6364
board: add Terasic DE1-SoC board
2022-02-09 17:22:38 +01:00
d188314ae3
part: add altera 5CSEMA5 (cyclone V Soc)
2022-02-09 17:21:19 +01:00
a0ef85d516
display: use a less dark blue
2022-02-09 08:33:21 +01:00
687503673e
jtag: for unknown IDCODE display a more complete error
2022-02-09 08:32:41 +01:00
Gwenhael Goavec-Merou
Jean THOMAS
Stéphane Chevigny
Rod Whitby
Torsten Reuschel
jonathan kimmitt
Hirosh Dabui
Hansem Ro
Stephan Ruloff
TG