part: Zynq XC7Z045
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@ -54,6 +54,7 @@ static std::map <int, fpga_model> fpga_list = {
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{0x03722093, {"xilinx", "zynq", "xc7z010", 6}},
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{0x03727093, {"xilinx", "zynq", "xc7z020", 6}},
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{0x23731093, {"xilinx", "zynq", "xc7z045", 6}},
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/* When powering a zynq ultrascale+ MPSoC, PL Tap and ARM dap
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* are disabled and only PS tap with a specific IDCODE is seen.
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