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board: Xilinx ZC706

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Gwenhael Goavec-Merou
2022-03-10 18:53:41 +01:00
parent 6ba1968952
commit 259914910f
2 changed files with 9 additions and 0 deletions
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src/board.hpp
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@@ -186,6 +186,7 @@ static std::map <std::string, target_board_t> board_list = {
SPI_BOARD("titanium_ti60_f225","efinix", "efinix_spi_ft4232",
DBUS4, DBUS5, DBUS7, DBUS3, DBUS0, DBUS1, DBUS2, DBUS6, 0, CABLE_DEFAULT),
JTAG_BOARD("titanium_ti60_f225_jtag", "","efinix_jtag_ft4232", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("zc706", "xc7z045ffg900", "jtag-smt2-nc", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("zedboard", "xc7z020clg484", "digilent_hs2", 0, 0, CABLE_DEFAULT),
};