2e2e325a9b
lattice: check matching idcode between bitstream and FPGA
2021-11-20 17:01:40 +01:00
ab43af7f0e
latticeBitParser: extract FPGA idcode from configuration data
2021-11-20 17:01:13 +01:00
1637d6f484
lattice: fix REG_STATUS_CNF_CHK_MASK offset: not the same for machXO3D and others
2021-11-20 16:57:31 +01:00
7f6a68ae2c
lattice: cppcheck/lint
2021-11-20 16:07:53 +01:00
5f78204f22
Merge pull request #130 from abacomartin/master
...
adding support for MachXO3D
2021-11-20 15:35:01 +01:00
482141c556
verbose/verify modifications + common code moved to calling func + more white space!
2021-11-19 15:21:52 +00:00
393bf1d28b
Unused variables (plus some more white space fixes)
2021-11-19 15:11:02 +00:00
7ed432cba2
board: add QMTECH Cyclone IV Core Board
2021-11-14 08:45:11 +01:00
48c326130a
part: EP3C16 and EP4CE15 have same idcode
2021-11-14 08:44:39 +01:00
952084cd1d
all jtag interface: don't convert verbosity level to bool
2021-11-11 17:42:51 +01:00
8df01663ff
main: raise error when board name is provided but not found
2021-11-11 17:20:51 +01:00
07752c37e2
fix up line endings and white space issues - also moved the flash sector if block into MachXO3D family - as not required for other types
2021-11-11 09:04:50 +00:00
b6979f54f7
adding support for MachXO3D
2021-11-09 08:54:09 +00:00
3b15a633fa
ch552_jtag: cleanup and fix buffer flush with previous libftdi version
2021-11-06 10:52:53 +01:00
745844f0a0
ftdipp_mpsse: check mpsse_write return value
2021-11-06 10:33:48 +01:00
f843dc2eb2
ch552_jtag: driver for ch552_jtag firmware (ft2232c clone)
2021-11-06 10:33:25 +01:00
fb6a3b9f03
all cables: writeTMS len int -> uint32_t
2021-11-06 10:31:00 +01:00
28620f8ce9
altera: check file type: for an unknown type user has to explicitly provides flash mode fails otherwise
2021-11-06 08:37:14 +01:00
b27422cbe9
Merge branch 'master' of github.com:trabucayre/openFPGALoader
2021-10-23 08:44:28 +02:00
649554f3fd
efinix: add jtag support, introduce oe_pin in board configuration, add xyloni jtag interface
2021-10-23 08:44:23 +02:00
859c1a1a0f
spiFlash: erase using 4 or 64Kb
2021-10-20 08:00:21 +02:00
c043da874c
spiFlash: enable_protection method
2021-10-20 07:43:47 +02:00
3730e8189d
spiFlash: extract status register display from read_status_reg
2021-10-19 07:06:46 +02:00
6714400909
spiFlashdb: introduce tb_register to know tb location register
2021-10-19 06:55:30 +02:00
d8b8afce99
spiFlash: fix len_to_bp mask
2021-10-18 07:34:27 +02:00
7d8c8b2dcb
Add Trion T120 BGA 576 Dev Kit support.
...
This Dev Kit uses a FT2232 chip, so also rename efinix_spi with efinix_spi_ft4232
and introduce efinix_spi_ft2232.
2021-10-15 09:20:36 +02:00
103de667f7
protection descriptor for IS25LP128
2021-10-14 20:55:42 +02:00
eb545b5256
typo
2021-10-14 20:52:46 +02:00
4b3755f368
cmsisDAP: fix buffer length
2021-10-13 07:16:30 +02:00
b1b1e5a4a8
main: don't limit vid/pid to dfu
2021-10-13 06:51:22 +02:00
de88698b0c
cmsisDAP: close device and context after use/ when fail
2021-10-13 06:46:05 +02:00
2d26b9d485
cmsisDAP: typo
2021-10-12 16:38:03 +02:00
6a4d24cf7a
cmsisDAP: send disconnect after use
2021-10-12 07:52:38 +02:00
dd4e3e40df
spiFlash: typo
2021-10-10 18:27:41 +02:00
ddcf8fd1b1
spiFlash: add flash_model, method to convert len to block protect and block protect to len
2021-10-10 18:26:04 +02:00
22c095547e
spi: introduce list of known spi flash devices (required for protection)
2021-10-10 18:25:09 +02:00
4c2a091ab1
xilinx: introduce coolrunner-II support
2021-10-06 08:46:00 +02:00
69ac10e2f7
Merge branch 'master' of github.com:trabucayre/openFPGALoader
2021-10-03 18:34:07 +02:00
6858cabc7d
main: introduce vid/pid args
2021-10-03 18:33:55 +02:00
2adf4d585e
dfu: throw exception when vid & pid == 0; change altsetting type
2021-10-03 18:33:07 +02:00
e6c01f75ad
board: fix altsetting default for non-DFU boards, use signed type
2021-10-03 18:31:55 +02:00
f6dfee2db0
xilinx: Adapt wait times with JTAG frequency.
...
Allowed frequency is up to 10 MHz according to xc95XXXxl_1532.bsd
2021-10-03 17:37:28 +02:00
c165154317
xilinxMapParser: typo
2021-10-03 16:46:12 +02:00
1233459528
xilinxMapParser: fuse mapping for xc2c jed
2021-10-03 16:25:41 +02:00
a38d0b2d36
board: force 0 for altsetting in non-DFU type
2021-10-03 15:23:21 +02:00
144e376d36
board: add support for 1bitsquared iCEBreaker-bitsy
2021-10-03 12:42:35 +02:00
ea613fa97a
dfu/main: add args to select altsetting and add filter to select corresponding interface
2021-10-03 12:39:06 +02:00
abef1f4968
add verbose-level args: -1 quiet, 0 normal mode, 1 verbose, 2 debug lowlevel
2021-10-03 08:22:35 +02:00
28cbd1faad
spiFlash: workaround for dump > 1M
2021-10-02 19:25:04 +02:00
fe1634897f
part: merge ECP5-12 & ECP5-25 (same idcode)
2021-10-02 15:20:55 +02:00
2e64a52cb5
Merge pull request #118 from UweBonnes/mpsse_toggle
...
ftdiJtagMPSSE: Fix TCK toggle for large numbers.
2021-09-29 06:31:50 +02:00
f9a62b418b
ftdiJtagMPSSE: Fix TCK toggle for large numbers.
2021-09-28 21:06:46 +02:00
8ec009fcea
part.hpp: Fix wrong description of XC95288XL
2021-09-28 12:33:14 +02:00
cee91fa5a1
jedParser: p2
2021-09-25 15:06:47 +02:00
bd903be6b6
jedParser: fix checksum when configuration data size is not multiple of 8bits
2021-09-25 15:06:13 +02:00
36783d74c4
progressBar: Use only stdout.
...
The progress markers of the progress bar were output to stderr while the
rest was output to stdout. Move everything to stdout.
2021-09-20 15:14:23 +02:00
3698b98976
ftdiJtagMPSSE: improve a bit USB transaction
2021-09-18 14:54:40 +02:00
57c0f16be4
ftdipp_mpsse: typo in setClkFreq
2021-09-16 07:41:05 +02:00
85b53b5918
add gowin external spi in bscan and --external-flash option
2021-09-15 20:18:49 +02:00
ae2fcfdca1
main: args. Fix comments for load and write bitstream
2021-09-13 14:10:42 +02:00
b70bd83ced
Merge branch 'trabucayre:master' into master
2021-09-03 08:52:18 +02:00
2ef040774e
fsparser: gw1nsr-4c idcode/nb_line
2021-09-03 07:47:58 +02:00
23cf631b85
fix part name GW1NSR-4 -> GW1NSR-4C
2021-09-02 14:56:22 +02:00
11bdebd884
adding reference to Tang Nano 4K kit in doc
2021-09-02 13:54:34 +02:00
94385a758e
adding IDCODE for GW1NSR, for Tang Nano 4K kit
2021-09-02 13:46:35 +02:00
bb69297ed0
xilinx: with XCF reconfigure FPGA after write
2021-08-30 17:15:45 +02:00
2606bf7017
xilinx/doc: add spartan3 and XCF flash
2021-08-30 15:08:11 +02:00
92a4b9bcd8
jtag: fix idcode mask and display
2021-08-28 16:31:24 +02:00
304ec0071c
mask idcode upper nibble (version in IEEE 1149.1)
2021-08-27 15:10:12 +02:00
faedb0cfd7
lattice: throw exception when program fails
2021-08-23 16:27:28 +02:00
74b8305730
xilinx: test parse return for jedec instead of catch exception
2021-08-20 09:54:43 +02:00
db5d4e75d9
jedParser: fix checksum for xc9500
2021-08-20 09:44:38 +02:00
521c703842
part: add xc95 family idcode
2021-08-18 15:41:39 +02:00
b61884614e
xilinx: add support for XC95 CPLD family
2021-08-18 15:38:49 +02:00
471fbb6a81
jedParser: add xilinx compatibility
2021-08-18 15:38:24 +02:00
274d4ea2dc
main: fix display order for detect
2021-08-18 07:40:25 +02:00
c47b494311
jtag: add access to targeted idcode
2021-08-18 07:39:23 +02:00
630d4428c6
main: DFU mode: pass board vid/pid
2021-07-17 08:36:32 +02:00
cbe2bf5494
dfu: try to open dfu vid/pid, next board vid/pid. without vid/pid download is forbidden. Simplify detection in not enumerate mode. Display iProduct
2021-07-17 08:36:13 +02:00
b8e2939776
board: add vid/pid for DFU at board level
2021-07-17 08:34:44 +02:00
7113f4b36b
part: add Gowin GW1N-2
2021-07-16 07:42:34 +02:00
651fdd8beb
ftdixx: improve workaround for arty. Not required with a classic ft2232
2021-07-14 19:09:39 +02:00
cd64bce4f2
fix warning in Debug mode
2021-07-14 17:59:02 +02:00
be6ed217dd
main: display error message if program fails
2021-07-14 16:39:14 +02:00
1e0a06288d
configBitstreamParser: don't compute reverseByte, use a precomputed table: gain: 200ms for arty @30MHz
2021-07-14 08:44:22 +02:00
cc688d6db6
main: small fix
2021-07-14 08:07:51 +02:00
894cda820f
board: add default frequency option for BITBANG and SPI boards
2021-07-14 08:05:36 +02:00
13af012163
main: avoid potential miss with probe clock frequency
2021-07-14 08:04:43 +02:00
fd329158de
Merge pull request #98 from ultraembedded/master
...
Add board specific default frequency
2021-07-14 07:53:13 +02:00
acf7d2a0a8
ftdiJtagMPSSE: add work around to deal with freq >= 15MHz
2021-07-13 07:00:30 +02:00
594f065116
ftdipp_mpsse: use runtime_error instead of simple exception
2021-07-12 08:05:25 +02:00
f8831f329c
Only use board clock speed if user does not specify an alternate freq
2021-07-11 15:27:46 +01:00
797785ce93
Allow board configuration table to contain a default clock speed (as some boards are known to work at higher speeds safely). Move Digilent Arty to 10MHz (tested).
2021-07-11 15:20:15 +01:00
3983726a66
all devices: use spiFlash dump & verify
2021-07-11 11:34:14 +02:00
f5254294eb
altera: add verify and dump
2021-07-11 11:32:35 +02:00
b77c5a22df
spiFlash: add verify and dump method
2021-07-11 11:32:10 +02:00
f19d0996a4
progressBar: limit resolution
2021-07-11 11:30:02 +02:00
6639f0646a
board: pipistrello: add spi flash support
2021-07-11 08:58:40 +02:00
c90a4b7734
altera: spi flash support for cycloneV and qmtech
2021-07-10 08:20:27 +02:00
0c4aedcb23
altera: add spi flash support for de0nano (EP4CE22F17C6)
2021-07-09 07:40:55 +02:00
c99f5aa4e6
main: update to pass device type and prog type to altera class
2021-07-08 20:54:12 +02:00
84bd19b19a
board: cyc1000: add fpga model
2021-07-08 20:53:20 +02:00
c29fbb15f9
altera: use new epcq interface, add device type and prog type. Now more generic and not specific to cyc1000
2021-07-08 20:52:46 +02:00
0d4b6143b5
epcq,spiFlash: epcq is now a subclass of spiFlash (real different part is power_(up|down) and read_id
2021-07-08 20:51:51 +02:00
f937cb9ab5
Adds support for the xc6slx100fgg484.
...
Tested on a Pano Logic G2.
2021-07-03 05:01:56 -04:00
8068c84ec8
board: add Fomu support
2021-06-29 13:49:33 +02:00
8f95303daf
move to APACHE-2.0 license
2021-06-26 15:24:07 +02:00
b2d2fa0127
ftdipp_mpsse: with 1.5 reatach may be automatic
2021-06-26 15:04:57 +02:00
c1f18cd1d3
jtag: fix unsigned vs signed
2021-06-26 08:47:37 +02:00
98a2e836fa
ice40: add support for verify and dump
2021-06-26 08:43:02 +02:00
fb8f50cb52
ice40: indent
2021-06-26 08:34:41 +02:00
79a0e84f1f
efinix: add support for verify and dump
2021-06-26 08:34:12 +02:00
b92a9adca7
ftdispi: improve write/read
2021-06-26 08:06:26 +02:00
d32b81037a
xilinx: add dumpFlash support
2021-06-25 11:28:19 +02:00
2af64e9af4
all: propagate verify with a message when not supported
2021-06-25 08:58:45 +02:00
fe0a315456
lattice,device: introduce method to dump flash content
2021-06-24 18:20:34 +02:00
c471d25bb5
xilinx,lattice,device: add verify write into flash
2021-06-24 18:08:02 +02:00
b150bbdd23
gowin: checks if fs is targeted for connected device
2021-06-24 08:57:18 +02:00
5e11b3cb67
cmsisDAP: Remove product string check.
2021-06-22 23:59:57 +02:00
7fc0703167
cable: Add support for Orbtrace.
2021-06-22 23:59:46 +02:00
40d9bc3ea7
dirtyJtag: cpplint/cppcheck
2021-06-20 16:39:19 +02:00
0a7fd93a08
dirtyJtag: update _clkHZ with current frequency
2021-06-20 16:28:46 +02:00
8d20c09791
dirtyJtag: fix toggleClk call (TMS is high, TDI depends on last_bit)
2021-06-20 16:28:18 +02:00
26f5dd3ee5
Merge pull request #92 from phdussud/master
...
dirtyJtag optimizations to cut the number of USB requests
2021-06-20 16:26:53 +02:00
827767b99f
add proof of concept / draft for DFU protocol. Add orangeCrab in DFU mode
2021-06-20 10:26:05 +02:00
80f642a0a4
Fix a buffer overflow per code review
2021-06-19 12:39:25 -07:00
cbbac0bff8
Changes per code review.
2021-06-19 09:40:33 -07:00
dddfcbc973
board: add support for colorlight I5
2021-06-19 17:30:47 +02:00
53c5d35da6
add cmsis dap (hid) support
2021-06-19 17:30:23 +02:00
00289503dd
README: add ZedBoard, de0nanoSoc and de10nano support
2021-06-19 15:33:26 +02:00
b4fe045060
fsparser: don't try to analyze header after then end of header area
2021-06-18 13:33:40 +02:00
f84cb403e4
dirtyJtag optimizations to cut the number of USB requests
2021-06-13 11:38:30 -07:00
eaed746cf2
Add a few more Spartan6 based parts and boards (tested on an old miniSpartan6+).
2021-06-13 17:55:56 +01:00
2bf7b255b3
lattice: move directly to run_test_idle with last tx packet in program_mem
2021-06-12 09:27:16 +02:00
2214a7e720
Merge remote-tracking branch 'origin/master' into JTAG_chain
2021-06-12 08:44:18 +02:00
b5f2506fd1
clkHZ: be more generic
2021-06-12 08:40:40 +02:00
dc003f6212
As per feedback, allow 232H devices to have upper bank pins configured on init.
2021-06-11 11:24:57 +01:00
291f1b6d6f
Add support for Digilent Digital Discovery and Analog Discovery 2 (openFPGALoader -c digilent_ad)
2021-06-10 22:38:17 +01:00
3abc591bd5
Add LCMXO2-1200HC
2021-06-06 13:30:13 -07:00
0cae46b367
configBitstreamParser: fix CRLF vs LF: use fread with FILE (or stdin) instead of c++ stream
2021-05-26 17:56:21 +02:00
b28ae236a1
fsparser: drop CR at the end of line
2021-05-26 17:40:16 +02:00
d3a5b712b4
part: cycloneV Soc 5CEMA4 -> 5CSEMA4, add 5CSEBA6 idcode
2021-05-21 12:37:16 +02:00
fc08249630
lattice: don't use read_write
2021-05-18 08:27:34 +02:00
c36d29e5e3
gowin: don't use read_write
2021-05-16 12:13:31 +02:00
a160cc6431
board: add terasic de0nanoSoc
2021-05-15 19:32:49 +02:00
a96fbcc99a
board: add digilent zedboard
2021-05-15 19:31:39 +02:00
ba92456597
part: add zynq 7020
2021-05-15 19:31:20 +02:00
2f38461826
main: fix default args.index_chain
2021-05-15 19:30:45 +02:00
9e260c1e05
xilinx: don't use read_write
2021-05-15 18:43:54 +02:00
181303ce8c
anlogic: don't use read_write
2021-05-15 15:39:37 +02:00
27af85dc19
main: add option to specify device index
2021-05-15 15:26:09 +02:00
acf4ab270c
main: rework fpga detection to allows more than one device in a chain, but only FPGA is allowed
2021-05-15 15:08:27 +02:00
8b34448ed0
jtag: add logic to handle multiple device in JTAG chain
2021-05-15 14:59:06 +02:00
a242168e7f
jtag: shiftxR: don't try to move to shift when not required
2021-05-15 09:05:48 +02:00
5da47a0200
jtag: propagate getClkFreq
2021-05-15 08:46:21 +02:00
3d60cd647f
altera: adapt delay according to clock freq
2021-05-15 08:35:16 +02:00
610a76f653
jtagInterface/cables: introduce getClkFreq
2021-05-15 08:32:51 +02:00
c4e58073c1
part: add irlength and introduce new structure for device not handled (CPU) mainly for irlength
2021-05-14 16:35:26 +02:00
49ba5f265a
add support for usb-blasterII
2021-05-13 16:11:22 +02:00
42b7279a4b
main: add optional probe-firmware
2021-05-13 16:07:40 +02:00
167d430c34
usbBlaster: add a low level to support both usbBlasterI(ftdi) and usbBlasterII(fx2)
2021-05-13 16:06:29 +02:00
dc884b86c8
fx2_ll: cypress fx2 low level
2021-05-13 15:28:00 +02:00
c09bc0662b
ihexParser: new parser for (i)hex files
2021-05-13 12:14:52 +02:00
6ae29125ed
spiFlash: add a workaround for microchip SST26VF032B / SST26VF032BA
2021-05-05 06:59:02 +02:00
c82257c9ba
spiFlash: introduce jedec_id
2021-05-05 06:25:00 +02:00
200bc6364e
fsparser: fix checksum with GW1NS-2C, when configuration data is smaller than theory
2021-04-26 19:28:44 +02:00
e2b40e1350
xilinx: supress useless test in spi_wait
2021-04-22 19:06:36 +02:00
a4ccdae7df
add basys3 support
2021-04-20 21:28:14 +02:00
7039465353
rework xilinx fpga spiOverJtag to respect model/package
2021-04-19 21:17:08 +02:00
65a1e995ec
xilinx: be more verbose when spiOverJtag not available
2021-04-19 21:08:11 +02:00
858d9e6273
add support for Alchitry Au
2021-04-16 21:20:30 +02:00
4defec0db1
add support for artix 7 75t
2021-04-15 15:38:36 +02:00
4e2b1aa73e
cable: add SecuringHardware Tigard programmer
2021-03-27 18:43:56 +01:00
32d3872f69
part.hpp: sort altera cyclone V device by alphabetical order
2021-03-27 18:31:39 +01:00
508635f788
Merge pull request #80 from emard/master
...
recognize altera cyclone V 5CEBA4 FPGA
2021-03-27 18:30:28 +01:00
fa70a9a3b2
part.hpp: sort xilinx device by alphabetical order
2021-03-27 18:25:52 +01:00
52efdab421
recognize altera cyclone V 5CEBA4 FPGA
2021-03-27 02:00:18 +01:00
16f85fff63
add support for kintex xc7k325t
2021-03-24 17:25:05 +01:00
f33d30dbce
main: fix bitbang check: config pins must be the shift value
2021-03-21 18:51:13 +01:00
630a976884
add support for cycloneIII and Terasic DE0 board
2021-03-20 12:23:17 +01:00
ea141fdcfe
Remove spurious files in previous commit
2021-02-27 13:25:22 -08:00
e9b1a2e610
fix for space
2021-02-27 13:19:25 -08:00
6e96d8f6d0
Conditionalization of ftdi_tcioflush
2021-02-27 13:12:21 -08:00
5d8ec9a162
Attempt to satisfy a comment from the owner
2021-02-27 12:45:12 -08:00
fdd1037d46
Remove temporary support for a hypotetical version based on Teensy 4
2021-02-27 11:35:45 -08:00
94ef653682
Resolved bunch of comments from owner
2021-02-27 10:37:07 -08:00
9ee8e84fba
Support for new DirtyJtag2 protocol. Merged with head
2021-02-27 09:59:38 -08:00
43caa612ca
lattice: drop the limitation, for .bin, to write at offset > 0
2021-02-27 06:49:42 +01:00
6d1c51d0a4
fix purge buffer fix libftdi >= 1.5
...
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
2021-02-25 13:37:33 +01:00
566d33c2f1
progressBar: use chrono instead of clock
2021-02-24 13:31:55 +01:00
16932786db
all parser:
...
- _raw_data is now filled in configBitstreamParser
- source may be a file or a pipe
- displayHeader become a common method (configBitstreamParser)
- improve/rewrite some parser (efinixHexparser 1s -> 11ms)
2021-02-24 06:36:48 +01:00
e27da3276f
Merge pull request #75 from Disasm/add-gw1ns-2c
...
Add support for GW1NS-2C FPGA chips
2021-02-21 18:48:16 +01:00
df52d523bf
All devices: new CLI argument to bypass file type autodetection
2021-02-21 18:30:13 +01:00
d226ab7671
Add support for GW1NS-2C FPGA chips
2021-02-21 17:31:09 +03:00
7cc5676e8e
ftdi: drop divide_by_5 param, now it's automatically set/unset according to the frequency. Better freq display
2021-02-19 07:07:10 +01:00
5f9a8835da
devices: simplify write RAM/Flash
2021-02-18 21:09:34 +01:00
48e65fa0ad
bitparser: drop garbage characters, use _hdr, best header parsing and display
2021-02-17 19:02:57 +01:00
4a555bb102
dfuFileParser: parser for bitstream with DFU suffix
2021-02-15 07:33:58 +01:00
590553e432
src/fsparser: rewrite to use header instead of comments, add support for compressed bitstream
2021-02-12 07:34:14 +01:00
210bdac09a
configBitstreamParser: external access to header keys/values
2021-02-10 08:02:20 +01:00
Gwenhael Goavec-Merou
Martin Beynon
Florent Kermarrec
emard
Uwe Bonnes
Vegard Storheil Eriksen
Fabien Marteau
Fabien Marteau
ultraembedded
Billy Stevens
phdussud
GEORGIOS KARNAS
Giuseppe Gebbia
phdussud
Vadim Kaushan