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openFPGALoader
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fix part name GW1NSR-4 -> GW1NSR-4C

This commit is contained in:
Fabien Marteau 2021-09-02 14:56:22 +02:00
parent 11bdebd884
commit 23cf631b85
3 changed files with 3 additions and 3 deletions
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2
doc/board-compatibility-list.md
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@ -47,7 +47,7 @@ openFPGALoader -b arty -f bitstream.bit # Writing in flash (non-volatile)
| | [Scarab Hardware MiniSpartan6+](https://www.kickstarter.com/projects/1812459948/minispartan6-a-powerful-fpga-board-and-easy-to-use) | Spartan6</br>xc6slx25-3-ftg256 | OK | NT |
| **spartanEdgeAccelBoard** | [SeeedStudio Spartan Edge Accelerator Board](http://wiki.seeedstudio.com/Spartan-Edge-Accelerator-Board) | Spartan7</br>xc7s15ftgb196 | OK | NA |
| **tangnano** | [Sipeed Tang Nano](https://tangnano.sipeed.com/en/) | littleBee</br>GW1N-1 | OK | |
| **tangnano4k** | [Sipeed Tang Nano 4K](https://tangnano.sipeed.com/en/) | littleBee</br>GW1NSR-4 | OK | |
| **tangnano4k** | [Sipeed Tang Nano 4K](https://tangnano.sipeed.com/en/) | littleBee</br>GW1NSR-4C | OK | |
| **tec0117** | [Trenz Gowin LittleBee (TEC0117)](https://shop.trenz-electronic.de/en/TEC0117-01-FPGA-Module-with-GOWIN-LittleBee-and-8-MByte-internal-SDRAM) | littleBee</br>GW1NR-9 | OK | IF |
| **xtrx** | [FairWaves XTRXPro](https://www.crowdsupply.com/fairwaves/xtrx) | Artix</br>xc7a50tcpg236 | OK | OK |
| **xyloni_spi** | [Efinix Xyloni](https://www.efinixinc.com/products-devkits-xyloni.html) | Trion</br>T8F81 | NA | AS |

2
doc/fpga-compatibility-list.md
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@ -4,7 +4,7 @@
|--------:|:---------------------------------------------------------------------------------------------------------------------------------|:-------|:------|
| Anlogic | [EG4S20](http://www.anlogic.com/prod_view.aspx?TypeId=10&Id=168&FId=t3:10:3) | OK | AS |
| Efinix | [Trion T8](https://www.efinixinc.com/products-trion.html) | NA | OK |
| Gowin | [GW1N (GW1N-1, GW1N-4, GW1NR-9, GW1NS-2C, GW1NSR-4)](https://www.gowinsemi.com/en/product/detail/2/) | OK | IF |
| Gowin | [GW1N (GW1N-1, GW1N-4, GW1NR-9, GW1NS-2C, GW1NSR-4C)](https://www.gowinsemi.com/en/product/detail/2/) | OK | IF |
| Intel | Cyclone III [EP3C16](https://www.intel.com/content/www/us/en/programmable/products/fpga/cyclone-series/cyclone-iii/support.html) | OK | OK |
| | Cyclone IV CE [EP4CE22](https://www.intel.com/content/www/us/en/products/programmable/fpga/cyclone-iv/features.html) | OK | OK |
| | Cyclone V E [5CEA2, 5CEBA4](https://www.intel.com/content/www/us/en/products/programmable/fpga/cyclone-v.html) | OK | OK |

2
src/part.hpp
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@ -101,7 +101,7 @@ static std::map <int, fpga_model> fpga_list = {
{0x0120681b, {"Gowin", "GW1N", "GW1N-2", 8}},
{0x0100381B, {"Gowin", "GW1N", "GW1N-4", 8}},
{0x0300181b, {"Gowin", "GW1NS", "GW1NS-2C", 8}},
{0x0100981b, {"Gowin", "GW1NSR", "GW1NSR-4", 8}},
{0x0100981b, {"Gowin", "GW1NSR", "GW1NSR-4C", 8}},
};
/* device potentially in JTAG chain but not handled */