ch552_jtag: cleanup and fix buffer flush with previous libftdi version
This commit is contained in:
Gwenhael Goavec-Merou
parent
745844f0a0
commit
3b15a633fa
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@ -31,8 +31,7 @@ using namespace std;
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CH552_jtag::CH552_jtag(const FTDIpp_MPSSE::mpsse_bit_config &cable,
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string dev, const string &serial, uint32_t clkHZ, bool verbose):
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FTDIpp_MPSSE(cable, dev, serial, clkHZ, verbose), _ch552WA(false),
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_write_mode(0), _read_mode(0), _to_read(0)
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FTDIpp_MPSSE(cable, dev, serial, clkHZ, verbose), _to_read(0)
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{
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init_internal(cable);
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}
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@ -47,8 +46,8 @@ CH552_jtag::~CH552_jtag()
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static unsigned char tbuf[16] = { SET_BITS_LOW, 0xff, 0x00,
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SET_BITS_HIGH, 0xff, 0x00,
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LOOPBACK_START,
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static_cast<unsigned char>(MPSSE_DO_READ | _read_mode |
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MPSSE_DO_WRITE | _write_mode | MPSSE_LSB),
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static_cast<unsigned char>(MPSSE_DO_READ |
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MPSSE_DO_WRITE | MPSSE_WRITE_NEG | MPSSE_LSB),
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0x04, 0x00,
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0xaa, 0x55, 0x00, 0xff, 0xaa,
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LOOPBACK_END
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@ -64,52 +63,30 @@ void CH552_jtag::init_internal(const FTDIpp_MPSSE::mpsse_bit_config &cable)
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{
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display("iProduct : %s\n", _iproduct);
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if (!strncmp((const char *)_iproduct, "Sipeed-Debug", 12)) {
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_ch552WA = true;
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}
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display("%x\n", cable.bit_low_val);
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display("%x\n", cable.bit_low_dir);
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display("%x\n", cable.bit_high_val);
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display("%x\n", cable.bit_high_dir);
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init(5, 0xfb, BITMODE_MPSSE);
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config_edge();
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ftdi_set_event_char(_ftdi, 0, 0);
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ftdi_set_error_char(_ftdi, 0, 0);
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ftdi_set_latency_timer(_ftdi, 5);
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#if (FTDI_VERSION < 105)
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ftdi_usb_purge_rx_buffer(_ftdi);
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ftdi_usb_purge_tx_buffer(_ftdi);
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#else
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ftdi_tciflush(_ftdi);
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ftdi_tcoflush(_ftdi);
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printInfo("fin");
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#endif
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}
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int CH552_jtag::setClkFreq(uint32_t clkHZ) {
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int ret = FTDIpp_MPSSE::setClkFreq(clkHZ);
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config_edge();
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return ret;
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}
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void CH552_jtag::config_edge()
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{
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/* at high (>15MHz) with digilent cable (arty)
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* opposite edges must be used.
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* Not required with classic FT2232
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*/
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if (!strncmp((const char *)_iproduct, "Digilent USB Device", 19)) {
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if (FTDIpp_MPSSE::getClkFreq() < 15000000) {
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_write_mode = MPSSE_WRITE_NEG;
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_read_mode = 0;
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} else {
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_write_mode = 0;
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_read_mode = MPSSE_READ_NEG;
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}
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} else {
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_write_mode = MPSSE_WRITE_NEG;
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_read_mode = 0;
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}
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}
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int CH552_jtag::writeTMS(uint8_t *tms, uint32_t len, bool flush_buffer)
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{
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(void) flush_buffer;
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@ -125,8 +102,8 @@ int CH552_jtag::writeTMS(uint8_t *tms, uint32_t len, bool flush_buffer)
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flush_buffer = true;
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uint8_t buf[3]= {static_cast<unsigned char>(MPSSE_WRITE_TMS | MPSSE_LSB |
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MPSSE_BITMODE | _write_mode |
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MPSSE_DO_READ | _read_mode),
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MPSSE_BITMODE | MPSSE_WRITE_NEG|
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MPSSE_DO_READ),
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0, 0};
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while (xfer > 0) {
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int bit_to_send = (xfer > 6) ? 6 : xfer;
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@ -211,12 +188,12 @@ int CH552_jtag::writeTDI(uint8_t *tdi, uint8_t *tdo, uint32_t len, bool last)
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unsigned char *rx_ptr = (unsigned char *)tdo;
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unsigned char *tx_ptr = (unsigned char *)tdi;
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unsigned char tx_buf[3] = {(unsigned char)(MPSSE_LSB |
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((tdi) ? (MPSSE_DO_WRITE | _write_mode) : 0) |
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((rd_mode) ? (MPSSE_DO_READ | _read_mode) : 0)),
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((tdi) ? (MPSSE_DO_WRITE | MPSSE_WRITE_NEG) : 0) |
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((rd_mode) ? (MPSSE_DO_READ) : 0)),
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static_cast<unsigned char>((xfer - 1) & 0xff), // low
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static_cast<unsigned char>((((xfer - 1) >> 8) & 0xff))}; // high
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unsigned char def_cmd = tx_buf[0];
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unsigned char rd_cmd = def_cmd | (MPSSE_DO_READ | _read_mode);
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unsigned char rd_cmd = def_cmd | (MPSSE_DO_READ);
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/* read (and write) 1Byte */
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uint8_t oneshot_buf[3] = {rd_cmd, 0, 0};
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@ -347,8 +324,8 @@ int CH552_jtag::writeTDI(uint8_t *tdi, uint8_t *tdo, uint32_t len, bool last)
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display("%s move to EXIT1_xx and send last bit %x\n", __func__, (last_bit?0x81:0x01));
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/* write the last bit in conjunction with TMS */
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tx_buf[0] = MPSSE_WRITE_TMS | MPSSE_LSB | MPSSE_BITMODE | _write_mode |
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(MPSSE_DO_READ | _read_mode);
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tx_buf[0] = MPSSE_WRITE_TMS | MPSSE_LSB | MPSSE_BITMODE | MPSSE_WRITE_NEG |
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(MPSSE_DO_READ);
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tx_buf[1] = 0x0; // send 1bit
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tx_buf[2] = ((last_bit) ? 0x81 : 0x01); // we know in TMS tdi is bit 7
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// and to move to EXIT_XR TMS = 1
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@ -49,15 +49,6 @@ class CH552_jtag : public JtagInterface, private FTDIpp_MPSSE {
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private:
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void init_internal(const FTDIpp_MPSSE::mpsse_bit_config &cable);
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/*!
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* \brief configure read and write edge (pos or neg), with freq < 15MHz
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* neg is used for write and pos to sample. with freq >= 15MHz
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* pos is used for write and neg to sample
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*/
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void config_edge();
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bool _ch552WA; /* avoid errors with SiPeed tangNano */
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uint8_t _write_mode; /**< write edge configuration */
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uint8_t _read_mode; /**< read edge configuration */
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uint32_t _to_read; /*!< amount of byte to read */
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};
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#endif // SRC_CH552_JTAG_HPP_
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