clkHZ: be more generic

src/anlogicCable.cpp

@@ -145,6 +145,8 @@ int AnlogicCable::setClkFreq(uint32_t clkHZ)
 	printWarn("Jtag frequency : requested " + std::to_string(req_freq) +
 			"Hz -> real " + std::to_string(clkHZ) + "Hz");
 
+	_clkHZ = clkHZ;
+
 	return clkHZ;
 }
 

src/ftdiJtagBitbang.cpp

@@ -76,7 +76,7 @@ FtdiJtagBitBang::FtdiJtagBitBang(const FTDIpp_MPSSE::mpsse_bit_config &cable,
 		throw std::runtime_error("_buffer realloc failed\n");
 	_buffer = ptr;
 
-	setClkFreq(_clkHZ);
+	setClkFreq(clkHZ);
 
 	init(1, _tck_pin | _tms_pin | _tdi_pin, BITMODE_BITBANG);
 	setBitmode(BITMODE_BITBANG);

src/ftdiJtagMPSSE.hpp

@@ -42,6 +42,8 @@ class FtdiJtagMPSSE : public JtagInterface, private FTDIpp_MPSSE {
 		return FTDIpp_MPSSE::setClkFreq(clkHZ);
 	}
 
+	uint32_t getClkFreq() override {return FTDIpp_MPSSE::getClkFreq();}
+
 	/* TMS */
 	int writeTMS(uint8_t *tms, int len, bool flush_buffer) override;
 	/* clock */

src/ftdipp_mpsse.cpp

@@ -294,6 +294,8 @@ int FTDIpp_MPSSE::setClkFreq(uint32_t clkHZ)
 	ftdi_tcioflush(_ftdi);
 #endif
 
+	_clkHZ = real_freq;
+
 	return real_freq;
 }
 

src/ftdipp_mpsse.hpp

@@ -22,6 +22,7 @@ class FTDIpp_MPSSE {
 		int init(unsigned char latency, unsigned char bitmask_mode,
 			unsigned char mode);
 		int setClkFreq(uint32_t clkHZ);
+		uint32_t getClkFreq() { return _clkHZ;}
 
 		int vid() {return _vid;}
 		int pid() {return _pid;}

src/jtagInterface.hpp

@@ -33,7 +33,7 @@ class JtagInterface {
 	virtual ~JtagInterface() {}
 
 	virtual int setClkFreq(uint32_t clkHZ) = 0;
-	virtual uint32_t getClkFreq() { return 0;}
+	virtual uint32_t getClkFreq() {return _clkHZ;}
 
 	/*!
 	 * \brief flush TMS internal buffer (ie. transmit to converter)
@@ -80,5 +80,7 @@ class JtagInterface {
 	 * \return 1 if success, 0 if nothing to write, -1 is something wrong
 	 */
 	virtual int flush() = 0;
+ protected:
+	uint32_t _clkHZ; /*!< current clk frequency */
 };
 #endif  // _JTAGINTERFACE_H_