Holger Vogt
c8f3a054c9
large TSTEP is possible
2025-06-04 12:35:02 +02:00
Holger Vogt
61633d39d9
Use cm_get_neg_node_name to improve output.
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Set a breakpoint at pulse maxumum time.
Set first breakpoint during initialization.
This enables large TSTEP times.
2025-06-04 12:33:05 +02:00
Holger Vogt
32b8be0896
Add function cm_get_neg_node_name
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as cm_get_node_name delivers only the pos node.
2025-06-04 12:31:13 +02:00
Holger Vogt
69cac5bcc6
README and examples updated (trise, tfall, let, cdepth).
2025-06-03 10:51:51 +02:00
Holger Vogt
5c3ddfb8e4
add source of model
2025-06-02 23:43:51 +02:00
Holger Vogt
1144e67a20
Introduce let, cdepth, and angle
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replace tbeta and talpha by trise and tfall
2025-06-02 23:38:29 +02:00
Holger Vogt
ed0ab4cc0d
CMOS simple and slow OpAmp example
2025-05-27 14:32:01 +02:00
Holger Vogt
cf72e76607
Early return, if ac simulation
2025-05-27 14:21:54 +02:00
Holger Vogt
287e8da85b
How to choose TSTEP in transient simulation.
2025-05-27 13:56:46 +02:00
Holger Vogt
064c649d98
Add a breakpoint to catch the pulse start time.
2025-05-27 13:56:08 +02:00
Holger Vogt
8e7c15a01a
Description of parameter 'perlim'.
2025-05-27 13:34:23 +02:00
Holger Vogt
f247d1e2ce
Add parameter perlim: continous sequence or one time sequence.
2025-05-27 13:33:17 +02:00
Holger Vogt
5182d7e4b2
Vary the total charge, repeat simulation in a loop
2025-05-23 18:17:46 +02:00
Holger Vogt
c0338bc0c0
Example with subcircuit cell, exposing nodes inside of subcircuit to pulses.
2025-05-23 15:37:50 +02:00
Holger Vogt
a6b943a91e
Make example more consitent, better viewable
2025-05-23 15:36:31 +02:00
Holger Vogt
6cf0034d72
Revert "Improve error messages when reading (and discarding) binned models,"
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This reverts commit 33f18b485a .
2025-05-23 14:33:52 +02:00
Holger Vogt
c59c851d9e
Coprrect usage of cm_message_printf
2025-05-21 22:44:33 +02:00
Holger Vogt
c36076b4d9
Improve visibility of data changes
2025-05-21 22:43:46 +02:00
Holger Vogt
dce5d5f3e8
Add some info, returned as messages when pulse is started
2025-05-21 21:20:40 +02:00
Holger Vogt
f1566b89f9
A short README on the SEEgenerator
2025-05-21 15:53:01 +02:00
Holger Vogt
16fd428729
A short description of the code model
2025-05-21 14:59:33 +02:00
Holger Vogt
0c9d93997f
cosmetics
2025-05-21 14:58:36 +02:00
Holger Vogt
9fed0d93d1
Add parameter ctrlthres as switching point for ctrl.
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Default is 0.5 V.
2025-05-20 22:36:54 +02:00
Holger Vogt
2ecc63d1a0
Examples for single event effects (SEE): Inverters and SRAM cell
2025-05-20 17:19:12 +02:00
Holger Vogt
9280b62be9
Add a control input ctrl with threshold 0.5:
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If ctrl rises from below to above threshold, the whole
SEE pulse sequence isrepeated (including delay) from the
current simulation time point.
2025-05-20 17:10:56 +02:00
Holger Vogt
87e2b365fd
Output 'out' is a vector.
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Pulse have a delay and then are periodic.
Pulses are sequentially pushed to each vector element (node pair).
2025-05-19 22:28:01 +02:00
Holger Vogt
40375934da
set current to 0 for time < tdelay
2025-05-19 15:38:14 +02:00
Holger Vogt
c309cb3932
A first trial on pulse current source
2025-05-19 15:19:02 +02:00
Holger Vogt
3d7fcc4fa9
Enable seegenerator compile with Visual Studio
2025-05-19 14:44:22 +02:00
Holger Vogt
42bd3b7d93
Create files for the new single event effects generator
2025-05-19 13:53:45 +02:00
Brian Taylor
72df67271c
Fix some more -Wextra warnings.
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Fix to inpcom.c removed by HVO
2025-05-14 16:21:14 +02:00
Holger Vogt
fbb88d6e8d
Fixes a bug introduced by
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317378085 ("Tidy code in get_number_terminals(), removing unneeded copying.", 2025-02-25)
2025-05-14 16:00:54 +02:00
Holger Vogt
4853303995
Allow command 'stop when time=val' also if the tran simulation has
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already been started, e.g. while waiting for resume.
Add a breakpoint if 'val' is in the future.
2025-05-13 11:52:45 +02:00
Brian Taylor
1750873dea
Fix some compiler warnings when -Wextra is added to CFLAGS.
2025-05-13 11:38:31 +02:00
Holger Vogt
4b3de8e3bb
Enable a pulse width (widths of its top) of 0
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to obtain true triangular waveforms
2025-05-05 15:11:05 +02:00
Holger Vogt
8b778c56f0
beautify the code
2025-04-29 20:29:14 +02:00
Holger Vogt
5d4bb23e3c
Re-enable compilation with MS Visual Studio, as "ngspice/config.h"
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is not available.
Add-on to commit
4881b2973 ("Fix Bug #772 - "ngspice + icarus verilog cosim: searches for ivlng.so in /usr/local/lib/ngspice ...". Use the configured library directory, NGSPICELIBDIR.", 2025-04-11)
2025-04-29 11:50:09 +02:00
Giles Atkinson
0a224fa704
Fix typo in vlnggen error message.
2025-04-29 11:37:48 +02:00
Giles Atkinson
4881b29730
Fix Bug #772 - "ngspice + icarus verilog cosim: searches for ivlng.so
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in /usr/local/lib/ngspice ...".
Use the configured library directory, NGSPICELIBDIR.
2025-04-29 11:37:34 +02:00
Giles Atkinson
78908b8543
Add an error message for a .model line that includes a default value
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for a read-only instance parameter. Before that caused a fatal error
in parsing the first device to use the model.
2025-04-29 11:37:28 +02:00
Giles Atkinson
db92688f54
Fix Bug #750 - "VDMOS Model Naming Rules in NGSPICE Cause Confusion."
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Recognise VDMOS as a special keyword only as the third token in a
.model line. A new function, skip_token(), included in the change
allows simplification of some existing code.
2025-04-29 11:37:20 +02:00
Holger Vogt
ad6635210a
Merge branch 'pre-master-45' of ssh://git.code.sf.net/p/ngspice/ngspice into pre-master-45
2025-04-29 11:33:48 +02:00
Holger Vogt
33f18b485a
Improve error messages when reading (and discarding) binned models,
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e.g. for Skywater PDK with up to 160 bins per model parameter set.
2025-04-29 11:32:46 +02:00
b'Dietmar Warning
bb90e83f3d
Merge /u/arpadbuermen/ngspice/ branch vadng-pre-45 into pre-master-45
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https://sourceforge.net/p/ngspice/ngspice/merge-requests/31/
2025-04-23 12:51:11 +00:00
Árpád Bűrmen
8da323b502
Fixed MOS9 scaling.
2025-04-23 14:04:06 +02:00
Árpád Bűrmen
86467457ed
Fixed MOS3 scaling.
2025-04-18 13:22:06 +02:00
Árpád Bűrmen
1a175dde2f
Fixed MOS2 scaling.
2025-04-18 12:46:33 +02:00
Giles Atkinson
78581e3ad4
Re-make pll-xspice.cir as a wrapper around shared-pll-xspice.cir,
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behaviour as before. Add similar pll-digital-iplot.cir as a
demonstration of iplot with analogue and digital nodes.
2025-04-12 18:20:20 +02:00
Giles Atkinson
a91cd8292c
Rename pll-xspice.cir to shared-pll-xspice.cir to prepare for split.
2025-04-12 18:20:20 +02:00
Giles Atkinson
46c5a8d375
Fix for an error message seen when testing the shx shared-library
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program: do not allow a negative timestep.
2025-04-12 18:20:20 +02:00