Commit Graph

211 Commits

Author SHA1 Message Date
Holger Vogt 5298cd56c7 Few cleanings 2018-12-22 22:43:45 +01:00
dwarning 9937b5bed8 Substitute ancient subthreshold model parameter with ksubthres. 2018-12-17 23:01:32 +01:00
Holger Vogt 1dc125fba8 various fonts and font sizes for plotting 2018-11-18 15:51:21 +01:00
Holger Vogt df5155abee move model name example to examples/various 2018-11-18 15:47:49 +01:00
Holger Vogt f46135cc03 script to start GTKWave 2018-10-13 22:47:53 +02:00
Holger Vogt 66e8e440ea update, bug fixed 2018-09-26 18:45:56 +02:00
dwarning bd5379d760 one tran analysis is sufficient 2018-09-14 20:34:27 +02:00
Holger Vogt 3138811acd README for the table model and its table directory 2018-09-02 18:05:10 +02:00
Holger Vogt 925cb49ff2 Add some description, correct minor bugs. 2018-09-02 18:05:06 +02:00
Holger Vogt 8a813f75e8 replace mc_source by reset, to avoid adding additional circuits 2018-09-02 18:04:10 +02:00
Holger Vogt 800c9711f2 add a flag 'type of the union' to safely free model->param[i]->element,
if it contain a malloced string
2018-08-28 21:29:05 +02:00
Holger Vogt f988dfad93 add plotting to the example 2018-08-27 12:20:30 +02:00
Holger Vogt df01a9b587 noisy ring-oszillator now using transistors with different W/L
(NMOS 2/2.5 and 5/0.25, PMOS 4/0.25 and 10/0.25)
for testing b3temp.c pParam generation, storage and removal
2018-08-25 23:21:49 +02:00
Holger Vogt eb68799f18 1/f noise current, random current and voltage sources
command 'alter'
2018-08-23 16:34:55 +02:00
Holger Vogt 7bf81eb122 Add black grid and labels (for Linux) 2018-08-23 10:10:51 +02:00
Holger Vogt 95a0e69678 update to the example:
change noise paramater to zero, then to more noise
re-running the simulation enforces creating new 1/f noise values
2018-08-22 22:32:32 +02:00
Holger Vogt b0537d7019 noise example with bip transistor 2018-08-18 11:28:56 +02:00
Holger Vogt 053a1ef15d Some hints how to use this file 2018-08-18 11:28:27 +02:00
Holger Vogt 39506dadee NMOS and PMOS dc input and output characteristics 2018-08-18 11:28:18 +02:00
Holger Vogt 9becf1313a complex model: a script loads two circuits with MOS and
bipolar table models, and run a sequence of dc simulations
with switching the circuit.
2018-08-18 11:28:13 +02:00
Holger Vogt bb86b137a7 add 'reset' to fix a huge memory leak 2018-08-18 11:27:38 +02:00
Holger Vogt e99985a156 add two commands 'reset' to avoid huge memory leak 2018-08-18 11:27:08 +02:00
Holger Vogt b0883ffc5d add the reset command to avoid huge memory leak 2018-08-18 11:26:55 +02:00
Holger Vogt 83db375fe8 add plotting with internal analog plot
and gtkwave for digital data
2018-08-10 19:55:52 +02:00
Holger Vogt ef9ba3d687 remove peronal file path 2018-08-10 19:43:22 +02:00
Holger Vogt e8e5823955 add a hint to run the table generator before
simulation is possible
2018-08-10 19:41:02 +02:00
Holger Vogt d4217f1256 update: use $inputdir instead of absolute path
outputpath not (yet?) available
2018-08-07 19:58:47 +02:00
Holger Vogt ab9ffc2319 small update of comment 2018-08-07 19:57:52 +02:00
Holger Vogt 1406114127 add POWER NMOS and PMOS example with quasi-saturation 2018-08-07 19:57:44 +02:00
Holger Vogt c8705147b0 Original examples fixed and moved to here 2018-07-28 13:45:41 +02:00
Holger Vogt 0de66ea3b8 XSPICE state machine example 2018-07-28 12:54:02 +02:00
Holger Vogt a5e382d0ea XSPICE d_source examples 2018-07-28 12:52:21 +02:00
Holger Vogt 6e452b1e7c xspice filesource example 2018-07-28 11:45:33 +02:00
Holger Vogt 1cbcd25cab various digital simulations of a 4-bit NAND gate full adder:
Bipolar, MOS, behavioral, and event based
2018-07-22 15:12:59 +02:00
Holger Vogt 5fa4f631fb MC input files 2018-07-22 15:12:32 +02:00
Holger Vogt 4add5be417 remove the quotation marks around $&run
whitespaces
2018-07-22 15:12:04 +02:00
Holger Vogt 1bf7f3004d tests for setting random numbers 2018-07-22 15:10:00 +02:00
Holger Vogt 73f8925c1e example update: sim_status, mc_source and others 2018-07-22 15:09:46 +02:00
Holger Vogt 8ffb3e29da example may be run with commervcial PDKs 2018-07-22 15:09:36 +02:00
Holger Vogt 7592644400 small update for README, hint to manual chapt. 16.13.5 2018-07-22 10:30:50 +02:00
Holger Vogt ea3ada107b small addition (hint to add 'set ngbehavior=ps') 2018-07-22 08:36:36 +02:00
Holger Vogt de644fe3ca 3rd and 4th node have to be the same for VDMOS 2018-07-22 00:31:29 +02:00
Holger Vogt d61fa145c1 Update to PSPICE-ngspice models
README with download information
2018-07-21 23:59:27 +02:00
Holger Vogt 5623996b33 give a hint where to download library
remove library from distribution
2018-06-01 21:57:03 +02:00
Holger Vogt 930ef32c83 path to library is the actual directory 2018-06-01 20:56:46 +02:00
Holger Vogt ad2047844f Due to licencing: show only the modified VDMOS models.
All others may be downloaded from the address given in the header.
2018-05-26 18:05:49 +02:00
Holger Vogt 5a825ffabf Monte-Carlo examples using new features: command 'mc_source',
variable 'sim_status' etc.
2018-05-26 15:41:32 +02:00
Holger Vogt 7b6cd86a62 re-write vswitch transformation code:
first scan: check for each .model with vswitch
second scan: check for switch instances
(s lines) using the models
2018-05-22 20:19:50 +02:00
Holger Vogt 210345c78a example for mixed vswitch, standard switch circuit 2018-05-21 23:37:50 +02:00
Holger Vogt 404fd7f3b9 move example files 2018-05-19 16:56:57 +02:00
Holger Vogt e06def0645 move vdmos examples to the examples directory 2018-05-18 15:58:45 +02:00
Holger Vogt 949299f2fc add examples for PSPICE -> ngspice transfer 2018-05-18 15:57:20 +02:00
h_vogt f46a003c59 example file for current measurement with function i(device) 2018-05-15 23:19:48 +02:00
h_vogt 40e3d4bf95 examples/various: tests and loops using alterparam 2018-05-15 23:00:33 +02:00
Holger Vogt 560cb6e970 plotting/grid.c, bug fix, avoid string buffer overflow
Prevent a crash of example/FFT_test.cir.
Buffer 'buf' in function drawlingrid() has been too small.
Increase 'buf' size, and add some protection.

The example file examples/plot/test-small-plot.cir
shows the limits of plotting:
  difference in two numbers at digit 14 is plotted well.
                            at digit 15 is plotted with bugs.
                            at digit 16 is reduced to integer.

consider compiling with
  -O1 -D_FORTIFY_SOURCE=2
for gcc, and
  /GS
for visual studio.
2018-01-27 21:58:15 +01:00
rlar 06f2ce9087 examples/tclspice, cleanup "wish" trampoline and add emacs mode specification 2017-10-19 17:57:37 +02:00
rlar fad7605c21 examples/tclspice, rename test bench scripts, .tcl --> .sh
Customers have been mislead to invoke them with tclsh or wish.
Actually some are indeed tcl scripts which could be invoked with "wish"
All these scripts include a #!/bin/sh trampoline to the proper interpreter.
No script was meant to be interpreted by tclsh
2017-10-19 17:57:03 +02:00
dwarning 22599ca096 examples/tclspice, explicit blt::vector create
in blt2.5 "create" is not the default vector operation anymore
2017-10-19 17:50:34 +02:00
dwarning 8539029e6d reduce simulation time for tcl examples 2017-10-12 11:22:17 +02:00
dwarning 8316af27cf autosclae for psd plot 2017-09-02 10:25:31 +02:00
dwarning a1d27b4257 dio, introduce qd as an alias for diode charge to get the right unit in plotting 2017-08-03 17:03:10 +02:00
dwarning 458be1a82e bjt and diode: examples for plotting small signal parameters in a dc sweep 2017-08-03 17:03:07 +02:00
Tim Edwards 6ac19b03a3 examples/xspice/d_lut/mult4bit.spi, example for d_lut and d_genlut 2017-05-01 22:11:50 +02:00
h_vogt 30aa5ec0b7 examples/xspice/table, examples for the table2d and table3d code models 2017-04-30 17:01:07 +02:00
h_vogt 370e52736f MC_ring.sp, replace variables by vectors in the loop 2017-02-09 22:06:04 +01:00
dwarning d45736855e binning constraints are wrong and obsolete for the examples 2017-02-03 13:32:13 +01:00
rlar 13decee3ed examples/inductive-systems/*, add test files 2017-01-02 20:02:19 +01:00
h_vogt 0252f7b9cb examples/various/ro_17_4.cir, a ring oscillator with BSIM4 using 'xmu' 2016-07-16 15:25:41 +02:00
h_vogt 494a58cca9 main.c, add variable 'batchmode'
which is set when command line option `-b' is active
2016-03-26 22:14:11 +01:00
h_vogt 8b709a394f cpitf.c, cp_istrue(), avoid surplus Warning Message when an `if' condition expands to nothing
When in expression
  if $var ...
the variable `var' was undefined, then
ngspice printed a surplus warning message
>  Warning: NULL arithmetic expression
in addition to the error message
>  Error: var: no such variable.

ngspice continues to process the conditional construct
  and evaluates the condition as "FALSE"
2016-03-26 21:58:39 +01:00
rlar dbb958fff8 introduce examples/control_structs/if-test-1.cir 2016-03-26 21:58:11 +01:00
dwarning 11a75fd1e3 move to the actual bsim4 version to avoid needless warnings 2014-09-10 13:33:22 +02:00
h_vogt fb90bebcab example for .options interp (reduces memory, speeds up plotting) 2014-02-01 14:31:38 +01:00
h_vogt dab52db6da monte carlo with control script and MOS parameter set containing AGAUSS parameter variations (like commercial parameter libraries) 2014-01-11 16:24:27 +01:00
dwarning d65e0fa855 two examples to show fft/ifft vector command 2014-01-02 09:54:02 +01:00
dwarning 29f6b5c618 soa check example 2014-01-02 09:32:57 +01:00
dwarning 5f5a22ec3e suppress a warning by inserting the default diode model 2013-12-31 16:19:54 +01:00
Stefano Perticaroli 79bffc78a1 next version of PSS2
which was reviewed and rewritten on branch `PSS-2-try-to-rebase+4'
by Stefano Perticaroli and Francesco Lannutti
2012-12-28 18:15:37 +01:00
rlar 0be61b3e5a remove PSS2 2012-12-28 18:10:05 +01:00
h_vogt f04bfb3a0b input examples drawn from manual 2012-11-17 16:32:08 +01:00
h_vogt 04adbd7d3b examples/snapshot: start, interrupt and resume simulation 2012-11-03 20:08:23 +01:00
h_vogt 5ed51c2668 example input file as cited in manual 2012-10-21 11:50:23 +02:00
rlar 2bcadae16c missing newline at end of file 2012-10-20 19:49:10 +02:00
h_vogt 3ca1235602 gnuplot.c: improve scaling of y axis 2012-10-09 19:47:24 +02:00
h_vogt 177964b4a6 XSPICE example: delta-sigma converter 2012-08-14 23:06:34 +02:00
h_vogt f1d0d40753 demonstrate effect of W crossing binning limits 2012-08-07 23:11:52 +02:00
h_vogt 5d0c3182d3 add BSIM3 model parameters for loop filer with transistor charge pump 2012-08-05 20:15:53 +02:00
h_vogt e1df8eb739 example, add 'alter @m1[w]=11u' using binning and model change 2012-08-05 20:06:06 +02:00
dwarning 96dd397251 correct the plot output 2012-08-05 12:06:11 +02:00
h_vogt 19a67fb7c5 pll: just include one of the two vco available
(avoid a bug which has been removed only recently)
2012-08-04 00:22:25 +02:00
h_vogt a0db6f0ccd update to XSPICE phase-locked loop example 2012-08-03 23:22:54 +02:00
h_vogt 6cd13e0475 pll-xspice-fstep.cir: pll with ref frequency steps 2012-07-31 18:05:10 +02:00
h_vogt c31fc334f6 pll-xspice.cir: save command added 2012-07-31 17:31:28 +02:00
h_vogt c0b5a78097 new XSPICE example: use trtol=1
less ripple, but longer simulation time
2012-07-30 00:01:56 +02:00
h_vogt 85ece25a3a new XSPICE example: mixed mode pll circuit 2012-07-29 13:52:23 +02:00
h_vogt d072ab80d1 memristor example, parameters changed 2012-06-13 19:15:26 +02:00
h_vogt fde8c46356 add ac and dc simulation to memristor model 2012-06-13 19:15:25 +02:00
h_vogt f53eb5cf78 memristor code model in extradev 2012-06-13 19:15:24 +02:00
h_vogt 1cbc41cc32 memristor subcircuit model example 2012-06-13 19:15:19 +02:00
rlar 3d34b22ebf fix file modes 2012-06-12 21:26:29 +02:00