Add bel.v3.txt, which carries per-arc BEL timing (Delay/SetupHold/
ClkToOut/Clock) with config-bit conditions, on top of bel.v2's structural
blocks. Timing is applied per instance: a representative per-type estimate in
prePlace, then each placed BEL's own arcs in postPlace (bel_timing_by_bel,
keyed by BelId).
Add placement_estimate.txt carrying BEL timing estimates and nextpnr
placer/router tunables (delayScale/delayOffset/delayEpsilon/ripupPenalty/
carryPredictDelay, each defaulting to nextpnr's historical hardcoded value).
A more detailed description of the FABulous model files can be found here:
https://fabulous.readthedocs.io/en/latest/user_guide/using_doc/pnr/nextpnr.html#bel-v3-txt-bel-timing
bel.v3.txt and placement_estimate.txt were added as separate files
to keep compatibility with older nextpnr versions and existing fabulous projects.
A few cosmetics and comments added.
When a PLL output is connected to a BUFG, it can only be connected to it.
The message is improved in mentioning it and listing all ports connected and the pll name.
This simplify debug.
Adding freeing of the addition/subtraction mode switch PIP.
We're limiting optimization to just one constant input—cases with two
constant inputs are rare, and this raises questions about how such ALUs
are generated in synthesis.
LUT knowledge calculations have been replaced with table
constants—faster and easier to verify.
Addresses https://github.com/YosysHQ/apicula/issues/514
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
POSIX allows any `int` value to be returned but specifies that only
the low 8 bits are available in some contexts:
https://pubs.opengroup.org/onlinepubs/9699919799/functions/_exit.html
For reasons that aren't entirely clear, WASI requires the value to be
in range [0;126), and this is enforced with an assertion at runtime
level in Wasmtime. This should probably be fixed in Wasmtime but until
it is done there doesn't seem to be any harm in returning `125` instead
of `-1`. This also removes any discrepancy due to truncation.
* generic: Fix Python path not including the examples/ directory in the example
It seems that at some point, the embedded Python stopped including the
directory that nextpnr-generic was executed in inside of its sys.path.
This likely happened by de3d5be8 specifying an explicit argv to
the interpreter init function.
* generic: Improve the example for K != 4
Configuring K < 4 used to result in "dangling" inputs to the cells being
generated (those are just not driven by anything in the resulting Verilog/JSON).
Configuring K > 4 used to result in an assertion crash in cells.cc.
The ctx.setLutK call fixes both cases.
Jonas K.
gatecat
Lofty
Michael Offel
mrcmry
YRabbit
Rowan Goemans
William D. Jones
Patrick Urban
Catherine
Josef Gajdusek