Fischer Moseley
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776d465ef2
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uart: fix bit-slicing bug in StreamUnpacker
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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b1643b3075
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uart: add random COBS decoder tests
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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0e22a8d563
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uart: COBS decoder working with both irritators
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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f47a415692
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uart: initial commit of updated COBS decoder
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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7e7b97a57f
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meta: add cobs package to pyproject.toml dependencies and re-lock
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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193d3c2001
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meta: autoformat with updated ruff config
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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1dc80502d0
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uart: add more cases to random COBS encoder tests
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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33cc96f198
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uart: tidy COBS encoder tests
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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fbe0d9623c
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uart: fix COBS encoder bug where 254th byte is zero
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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3387e1def1
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uart: handle case of 255 byte-long groups in COBS encoder
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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08c918d891
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uart: rewrite COBS encoder to allow backpressure
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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b062687dc3
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uart: use wiring.Component for internal bus
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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9d6caec132
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uart: remove unused bridge testbenches
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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f4e211fe92
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uart: fix tests for receiver and transmitter modules
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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84172773be
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uart: update top-level wiring in UARTInterface
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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094bb300bd
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uart: remove unused receive and transmit bridges
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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49bacc86c6
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uart: use wiring.Component instead of plain Elaborateable
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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9211205ce8
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uart: implement stream (un)packing, tidy interfaces on COBS encoder
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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41ad295a81
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meta: replace Signal(1) with Signal()
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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b6dc326018
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uart: add skeleton of new UART RTL, add COBS from fischermoseley/cobs
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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3bf02047d9
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ethernet: remove obsolete tests, fix naming
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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4dd8c77575
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logic_analyzer: use read_block when dumping sample memory for performance
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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907757cd28
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ethernet: remove debug print statement
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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3d710a6570
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memory_core: use 32-bit instead of 16-bit data words
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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06bfe46a3c
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ethernet: use context manager to read generated LiteEth Verilog
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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c83dede4f8
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ethernet: fix host-side UDP socket leak
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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71c54ba1e0
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logic_analyzer: use context manager for VCD file export
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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8d35f92848
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logic_analyzer: fix 100% CPU wait loop in capture function
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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d13d2c4062
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ethernet: use EthernetMessageHeader class
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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010397b86d
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ethernet: fix host-side perf bug causing unneccesary retransmits
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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bc6536ac41
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ethernet: fix bug where single-length write request does not send response
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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4b0176144f
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ethernet: send write reponses, fix write request addressing bug
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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195d5aa2a6
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ethernet: rewrite read and write methods, fix data ordering bug
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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09f4db144c
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ethernet: bugfix in read transmit logic
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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ebb8bb99cd
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ethernet: use new bridge in EthernetInterface
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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f2f5c622cf
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ethernet: add first draft of new bridge
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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a42d368d44
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docs: add --locked to uv sync instructions
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2026-03-11 10:23:48 -06:00 |
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Fischer Moseley
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3c67eaf399
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examples: use symlinked build scripts, remove per-directory gitignores
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2026-03-11 10:20:17 -06:00 |
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Fischer Moseley
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6e6cd6bfd7
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CI: manage environment with uv
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2026-02-25 14:57:38 -07:00 |
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Fischer Moseley
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1e5a247cf4
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meta: set ruff max line length to 100 characters
This should hopefully make the Amaranth source more readable, since indentation and the `m.d.sync +=` prefix take a bit of line space.
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2026-02-25 13:18:23 -07:00 |
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Fischer Moseley
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40d428614b
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meta: add uv.lock, update installation instructions
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2026-02-25 13:18:23 -07:00 |
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Fischer Moseley
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cc8e7bb08b
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meta: use amaranth-boards from PyPI, not git
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2026-02-25 13:18:23 -07:00 |
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Fischer Moseley
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10593c768e
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logic_analyzer: fix #35, patch typos in trigger set logic
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2025-04-08 11:18:44 -06:00 |
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Fischer Moseley
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b9a7e75355
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examples: fix #37, use proper indexing in Amaranth examples
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2025-04-06 20:15:08 -06:00 |
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Fischer Moseley
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9611c0b554
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uart: fix #36, explicitly handle scientific notation in YAML config
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2025-04-06 18:28:29 -06:00 |
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Fischer Moseley
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e11d9a8315
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ci: fix typo
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2024-12-03 22:35:16 -08:00 |
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Fischer Moseley
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5565a934f7
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docs: use absolute logo path
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2024-12-03 20:05:26 -08:00 |
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Fischer Moseley
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91d2f80dcc
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meta: update pyproject.toml
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2024-12-03 19:50:04 -08:00 |
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Fischer Moseley
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77b329438a
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ci: remove unnecessary codecov.yml
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2024-11-29 11:05:47 -07:00 |
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Fischer Moseley
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63efac4e92
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ci: install manta in editable mode
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2024-11-29 11:05:47 -07:00 |