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magic/extract/ExtBasic.c

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Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*
* ExtBasic.c --
*
* Circuit extraction.
* Flat extraction of a single CellDef.
*
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
* *********************************************************************
* * Copyright (C) 1985, 1990 Regents of the University of California. *
* * Permission to use, copy, modify, and distribute this *
* * software and its documentation for any purpose and without *
* * fee is hereby granted, provided that the above copyright *
* * notice appear in all copies. The University of California *
* * makes no representations about the suitability of this *
* * software for any purpose. It is provided "as is" without *
* * express or implied warranty. Export of this software outside *
* * of the United States of America may require an export license. *
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
* *********************************************************************
*/
#ifndef lint
static char sccsid[] = "@(#)ExtBasic.c 4.13 MAGIC (Berkeley) 12/5/85";
#endif /* not lint */
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <math.h>
Add missing includes A number of places are using isspace(), tolower(), toupper() and strcmp() without including the relevant header.
2022-01-07 20:56:43 +01:00
#include <ctype.h>
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
#include "tcltk/tclmagic.h"
#include "utils/magic.h"
#include "utils/geometry.h"
#include "utils/geofast.h"
#include "tiles/tile.h"
#include "utils/hash.h"
#include "database/database.h"
#include "utils/malloc.h"
#include "textio/textio.h"
#include "debug/debug.h"
#include "extract/extract.h"
#include "extract/extractInt.h"
#include "utils/signals.h"
#include "windows/windows.h"
#include "dbwind/dbwind.h"
#include "utils/styles.h"
#include "utils/stack.h"
#include "utils/utils.h"
/* These must be in the order of "known devices" in extract.h. */
/* Note: "fet" refers to the original fet type; "mosfet" refers to the */
/* new type. The main difference is that "fet" records area/perimeter */
/* while "mosfet" records length/width. */
/* Also: Note that this table is repeated in extflat/EFread.c when */
/* ext2spice/ext2sim are compiled as separate programs (i.e., non-Tcl) */
#ifdef MAGIC_WRAPPER
extract/ExtBasic.c: Lookup() constify call-site
2024-10-10 21:20:26 +02:00
const char * const extDevTable[] = {"fet", "mosfet", "asymmetric", "bjt", "devres",
Implemented a command option "ext2spice short voltage|resistor|none" that implements a method for handling ports in a subcircuit that have different port names and indexes but are shorted together. "none" is the default and backwards-compatible behavior that merges ports together, which will often cause one of the ports to be optimized out of the netlist. "resistor" will separate the port names with a 0-ohm ideal resistor. "voltage" will separate the port names with a 0-volt voltage source. This should work well for simulation and potentially for LVS, although its impact on LVS has not been fully investigated.
2021-07-11 03:13:24 +02:00
"devcap", "devcaprev", "vsource", "diode", "pdiode", "ndiode",
Updated the version to go along with the merge of pull request version 8.3.521 that, due to an argument size mismatch, causes device parameters in netlist output to be printed as zero. Also added a small extension to the list of extraction types to include "device veriloga", which has the same syntax as "device subcircuit" but generates a component type "N" (Verilog-A component) in the netlist output.
2025-08-07 17:54:49 +02:00
"subckt", "rsubckt", "msubckt", "csubckt", "veriloga", NULL};
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
#endif
/* --------------------- Data local to this file ---------------------- */
/*
* The following are used to accumulate perimeter and area
* on each layer when building up the node list. They are
* used to compute the resistance of each node. Each is
* indexed by sheet resistivity class.
*/
Made corrections to the extraction based on a pull request by Dan Moore for preventing integer overflow in the area calculations.
2021-01-05 18:25:25 +01:00
int extResistPerim[NT];
dlong extResistArea[NT];
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*
* The following structure is used in extracting transistors.
*
* A "terminal" below refers to any port on the transistor that
* is not the gate. In most cases, these are the "diffusion"
* ports of the transistor.
*/
#define MAXSD 10 /* Maximum # of terminals per transistor */
typedef struct /* Position of each terminal (below) tile position */
{
int pnum;
Point pt;
} TermTilePos;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
/* Field definitions for tr_devmatch */
#define MATCH_ID 0x01 /* Device matches identifier in devrec */
Added a new method to the extraction which allows parameter limits to be declared for each device model, so that different models can be specified for different parameter ranges. For example, this will simplify the definition of the high-sheet-rho poly resistors and the bipolar transistors in sky130 by removing the need for ID marker layers; it also allows the correct device model to be extracted when reading data from GDS that does not contain the extra (and not foundry-approved) ID markers.
2023-07-06 18:35:47 +02:00
#define MATCH_PARAM 0x02 /* Device is compatible with parameter range */
#define MATCH_SUB 0x04 /* Device matches substrate type in devrec */
#define MATCH_TERM 0x08 /* Device matches terminal in devrec */
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
/* (additional fields: bit shifts up by 1 for each defined device terminal) */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
struct transRec
{
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
ExtDevice *tr_devrec; /* Device record in ExtCurStyle */
int tr_devmatch; /* Fields of tr_devrec that match device */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
int tr_nterm; /* Number of terminals */
int tr_gatelen; /* Perimeter of connection to gate */
NodeRegion *tr_gatenode; /* Node region for gate terminal */
NodeRegion *tr_termnode[MAXSD]; /* Node region for each diff terminal */
NodeRegion *tr_subsnode; /* Substrate node */
int tr_termlen[MAXSD]; /* Length of each diff terminal edge,
* used for computing L/W for the fet.
*/
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
int tr_termarea[MAXSD]; /* Total area of the terminal */
int tr_termperim[MAXSD]; /* Total perimeter of the terminal */
int tr_termshared[MAXSD]; /* Number of devices sharing this terminal */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Point tr_termvector[MAXSD]; /* Perimeter traversal vector, used to
* find and calculate correct parameters
* for annular (ring) devices and other
* non-rectangular geometries.
*/
int tr_perim; /* Total perimeter */
Corrected an error with perimeter calculation of a device that was caused by other code that can move the plane of a device to match the plane of a port. Solved by retaining the original plane of the node in the extTransRec structure, and using that to determine the device plane for purposes of calculating perimeters and not double- counting contacts.
2022-08-30 16:13:18 +02:00
int tr_plane; /* Plane of device */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
TermTilePos tr_termpos[MAXSD]; /* lowest tile connecting to term */
} extTransRec;
typedef struct LB1
{
Rect r; /* Boundary segment */
int dir; /* Direction of travel */
struct LB1 *b_next;
} LinkedBoundary;
LinkedBoundary **extSpecialBounds; /* Linked Boundary List */
Additional coding to handle discovery of terminal types on different planes of a device that are connected to a multi-tile device. This is a more general solution than previously coded, in which only the first tile of a device would be searched for terminals on other planes, which was only guaranteed to work if the device was represented by a single tile.
2024-12-07 02:51:59 +01:00
typedef struct LT1
{
Tile *t;
struct LT1 *t_next;
} LinkedTile;
LinkedTile *extSpecialDevice; /* Linked tile list */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
NodeRegion *glob_subsnode = NULL; /* Global substrate node */
NodeRegion *temp_subsnode = NULL; /* Last subsnode found */
#define EDGENULL(r) ((r)->r_xbot > (r)->r_xtop || (r)->r_ybot > (r)->r_ytop)
/* Forward declarations */
void extOutputNodes();
int extTransTileFunc();
int extTransPerimFunc();
int extTransFindSubs();
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
int extTransFindId();
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
int extAnnularTileFunc();
int extResistorTileFunc();
int extSpecialPerimFunc();
void extFindDuplicateLabels();
void extOutputDevices();
void extOutputParameters();
void extTransOutTerminal();
void extTransBad();
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
ExtDevice *extDevFindMatch();
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
bool extLabType();
Set of changes updating version 8.2 to the level of 8.1, since 8.2 development had been halted since it was first created back in April. Version 8.2 is now the official development version, with the first development push to create a Cairo graphics interface.
2017-08-02 04:14:42 +02:00
/* Function returns 1 if a tile is found by DBTreeSrTiles() */
/* that is not in the topmost def of the search. */
int
extFoundFunc(tile, cxp)
Tile *tile;
TreeContext *cxp;
{
CellDef *def = (CellDef *)cxp->tc_filter->tf_arg;
return (def == cxp->tc_scx->scx_use->cu_def) ? 0 : 1;
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*
* ----------------------------------------------------------------------------
*
* extBasic --
*
* Extract a single CellDef, and output the result to the
* file 'outFile'.
*
* Results:
rename Region to ExtRegion On Macos, Tk includes X11, which has this define: #if !defined(MAC_OSX_TK) # include <X11/X.h> #endif #ifdef MAC_OSX_TK # include <X11/X.h> # define Cursor XCursor # define Region XRegion #endif This causes the keywords `Cursor` and `Region` to be reserved, which prevents magic from building. Rename `Region` to `ExtRegion` as suggested by @RTimothyEdwards in https://github.com/RTimothyEdwards/magic/issues/195#issuecomment-1298870983 and https://github.com/RTimothyEdwards/magic/pull/222#pullrequestreview-1334900670 Signed-off-by: Sean Cross <sean@xobs.io>
2023-02-24 03:27:08 +01:00
* Returns a list of ExtRegion structs that comprise all
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
* the nodes in 'def'. It is the caller's responsibility
* to call ExtResetTile() and ExtFreeLabRegions() to restore
* the CellDef to its original state and to free the list
* of regions we build up.
*
* Side effects:
* Writes the result of extracting just the paint of
* the CellDef 'def' to the output file 'outFile'.
* The following kinds of records are output:
*
* node
* substrate
* equiv
* fet
* device
*
Updated the version to go along with the merge of pull request 222 from Sean Cross. Corrected a few places where the blanket conversion "Region"->"ExtRegion" picked up some comment lines that were unrelated to the structure name.
2023-03-10 17:14:23 +01:00
* Interruptible in a limited sense. We will still return an
rename Region to ExtRegion On Macos, Tk includes X11, which has this define: #if !defined(MAC_OSX_TK) # include <X11/X.h> #endif #ifdef MAC_OSX_TK # include <X11/X.h> # define Cursor XCursor # define Region XRegion #endif This causes the keywords `Cursor` and `Region` to be reserved, which prevents magic from building. Rename `Region` to `ExtRegion` as suggested by @RTimothyEdwards in https://github.com/RTimothyEdwards/magic/issues/195#issuecomment-1298870983 and https://github.com/RTimothyEdwards/magic/pull/222#pullrequestreview-1334900670 Signed-off-by: Sean Cross <sean@xobs.io>
2023-02-24 03:27:08 +01:00
* ExtRegion list, but labels may not have been assigned, and
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
* nodes and fets may not have been output.
*
* ----------------------------------------------------------------------------
*/
NodeRegion *
extBasic(def, outFile)
CellDef *def; /* Cell being extracted */
FILE *outFile; /* Output file */
{
NodeRegion *nodeList, *extFindNodes();
bool coupleInitialized = FALSE;
Set of changes updating version 8.2 to the level of 8.1, since 8.2 development had been halted since it was first created back in April. Version 8.2 is now the official development version, with the first development push to create a Cairo graphics interface.
2017-08-02 04:14:42 +02:00
TransRegion *transList, *reg;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
HashTable extCoupleHash;
char *propptr;
bool propfound = FALSE;
Set of changes updating version 8.2 to the level of 8.1, since 8.2 development had been halted since it was first created back in April. Version 8.2 is now the official development version, with the first development push to create a Cairo graphics interface.
2017-08-02 04:14:42 +02:00
bool isabstract = FALSE;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
glob_subsnode = (NodeRegion *)NULL;
/*
* Build up a list of the device regions for extOutputDevices()
* below. We're only interested in pointers from each region to
* a tile in that region, not the back pointers from the tiles to
* the regions.
*/
transList = (TransRegion *) ExtFindRegions(def, &TiPlaneRect,
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
&ExtCurStyle->exts_deviceMask,
ExtCurStyle->exts_deviceConn,
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
extUnInit, extTransFirst, extTransEach);
ExtResetTiles(def, extUnInit);
Set of changes updating version 8.2 to the level of 8.1, since 8.2 development had been halted since it was first created back in April. Version 8.2 is now the official development version, with the first development push to create a Cairo graphics interface.
2017-08-02 04:14:42 +02:00
for (reg = transList; reg && !SigInterruptPending; reg = reg->treg_next)
{
/* For each transistor region, check if there is an equivalent */
/* region at the same location in a subcell. The device in the */
/* subcell is given priority. This avoids duplicating devices */
/* when, for example, a device contact is placed in another */
/* cell, which can happen for devices like capacitors and */
/* diodes, where the device identifier layer may include */
Fixed a recent addition to the extraction method that prevents generating duplicate devices that may have parts overlaid in different subcells; this failed to filter the check by plane of the device, and so if any two devices exist at the same point in two different planes (e.g., metal resistor and a transistor), one of them would get eliminated.
2020-03-18 02:26:46 +01:00
/* a contact type. NOTE: This routine needs to limit the */
/* search to devices in the same plane as the transistor under */
/* consideration. */
Set of changes updating version 8.2 to the level of 8.1, since 8.2 development had been halted since it was first created back in April. Version 8.2 is now the official development version, with the first development push to create a Cairo graphics interface.
2017-08-02 04:14:42 +02:00
SearchContext scontext;
CellUse dummy;
int extFoundFunc();
Fixed a recent addition to the extraction method that prevents generating duplicate devices that may have parts overlaid in different subcells; this failed to filter the check by plane of the device, and so if any two devices exist at the same point in two different planes (e.g., metal resistor and a transistor), one of them would get eliminated.
2020-03-18 02:26:46 +01:00
TileTypeBitMask transPlaneMask;
Set of changes updating version 8.2 to the level of 8.1, since 8.2 development had been halted since it was first created back in April. Version 8.2 is now the official development version, with the first development push to create a Cairo graphics interface.
2017-08-02 04:14:42 +02:00
scontext.scx_use = &dummy;
dummy.cu_def = def;
dummy.cu_id = NULL;
scontext.scx_trans = GeoIdentityTransform;
scontext.scx_area.r_ll = scontext.scx_area.r_ur = reg->treg_tile->ti_ll;
scontext.scx_area.r_ur.p_x++;
scontext.scx_area.r_ur.p_y++;
Fixed a recent addition to the extraction method that prevents generating duplicate devices that may have parts overlaid in different subcells; this failed to filter the check by plane of the device, and so if any two devices exist at the same point in two different planes (e.g., metal resistor and a transistor), one of them would get eliminated.
2020-03-18 02:26:46 +01:00
TTMaskAndMask3(&transPlaneMask, &ExtCurStyle->exts_deviceMask,
&DBPlaneTypes[reg->treg_pnum]);
if (DBTreeSrTiles(&scontext, &transPlaneMask, 0, extFoundFunc,
(ClientData)def) != 0)
Set of changes updating version 8.2 to the level of 8.1, since 8.2 development had been halted since it was first created back in April. Version 8.2 is now the official development version, with the first development push to create a Cairo graphics interface.
2017-08-02 04:14:42 +02:00
reg->treg_type = TT_SPACE; /* Disables the trans record */
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*
* Build up a list of the electrical nodes (equipotentials)
* for extOutputNodes() below. For this, we definitely want
rename Region to ExtRegion On Macos, Tk includes X11, which has this define: #if !defined(MAC_OSX_TK) # include <X11/X.h> #endif #ifdef MAC_OSX_TK # include <X11/X.h> # define Cursor XCursor # define Region XRegion #endif This causes the keywords `Cursor` and `Region` to be reserved, which prevents magic from building. Rename `Region` to `ExtRegion` as suggested by @RTimothyEdwards in https://github.com/RTimothyEdwards/magic/issues/195#issuecomment-1298870983 and https://github.com/RTimothyEdwards/magic/pull/222#pullrequestreview-1334900670 Signed-off-by: Sean Cross <sean@xobs.io>
2023-02-24 03:27:08 +01:00
* to leave each tile pointing to its associated ExtRegion struct.
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
* Compute resistance and capacitance on the fly.
* Use a special-purpose version of ExtFindRegions for speed.
*/
if (!SigInterruptPending)
nodeList = extFindNodes(def, (Rect *) NULL, FALSE);
Two improvements: (1) Command extension "ext2spice lvs" sets up all the settings normally used for LVS (hierarchy on, cthresh infinite, subcircuit top auto, etc.). (2) Extract and extract unique ignore cells marked as abstract views (property LEFview is set) when checking for unconnected nets with the same name label.
2018-10-31 19:33:24 +01:00
/* Check for "LEFview", for which special output handling */
/* can be specified in ext2spice. */
DBPropGet(def, "LEFview", &isabstract);
Made a change to basic extraction to avoid generating an extra node representing the global substrate on cells that are abstract views. Corrected a typecasting issue in ext2spice.c that throws a compiler warning. Added another check for a cell being editable when painting, which is a case that was not covered by the previous code change to address the same issue.
2022-01-13 18:56:20 +01:00
/* Keep a record of the def's substrate (unless this is an abstract view) */
glob_subsnode = (isabstract) ? NULL : temp_subsnode;
/* Assign the labels to their associated regions */
if (!SigInterruptPending)
ExtLabelRegions(def, ExtCurStyle->exts_nodeConn, &nodeList, &TiPlaneRect);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*
* Make sure all geometry with the same label is part of the
Two improvements: (1) Command extension "ext2spice lvs" sets up all the settings normally used for LVS (hierarchy on, cthresh infinite, subcircuit top auto, etc.). (2) Extract and extract unique ignore cells marked as abstract views (property LEFview is set) when checking for unconnected nets with the same name label.
2018-10-31 19:33:24 +01:00
* same electrical node. However: Unconnected labels are allowed
* on abstract views.
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
*/
Two improvements: (1) Command extension "ext2spice lvs" sets up all the settings normally used for LVS (hierarchy on, cthresh infinite, subcircuit top auto, etc.). (2) Extract and extract unique ignore cells marked as abstract views (property LEFview is set) when checking for unconnected nets with the same name label.
2018-10-31 19:33:24 +01:00
if (!SigInterruptPending && (ExtDoWarn & EXTWARN_DUP) && !isabstract)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
extFindDuplicateLabels(def, nodeList);
/*
* Build up table of coupling capacitances (overlap, sidewall).
* This comes before extOutputNodes because we may have to adjust
* node capacitances in this step.
*/
Made a change to basic extraction to avoid generating an extra node representing the global substrate on cells that are abstract views. Corrected a typecasting issue in ext2spice.c that throws a compiler warning. Added another check for a cell being editable when painting, which is a case that was not covered by the previous code change to address the same issue.
2022-01-13 18:56:20 +01:00
if (!SigInterruptPending && (ExtOptions & EXT_DOCOUPLING))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
coupleInitialized = TRUE;
HashInit(&extCoupleHash, 256, HashSize(sizeof (CoupleKey)));
extFindCoupling(def, &extCoupleHash, (Rect *) NULL);
/* Convert coupling capacitance to the substrate node to
* substrate capacitance on each node in nreg_cap
*/
if (ExtCurStyle->exts_globSubstratePlane != -1)
if (!SigInterruptPending && (ExtOptions&EXT_DOCOUPLING))
extRelocateSubstrateCoupling(&extCoupleHash, glob_subsnode);
}
/* Check for "device", as it modifies handling of parasitics */
propptr = (char *)DBPropGet(def, "device", &propfound);
if (propfound)
{
/* Remove parasitics from local nodes */
NodeRegion *tnode;
for (tnode = nodeList; tnode; tnode = tnode->nreg_next)
{
tnode->nreg_cap = (CapValue)0.0;
tnode->nreg_resist = (ResValue)0;
}
Added a 2nd use of the "device" property, which has long been needed, which instead of defining a device or subcircuit that exists inside the cell, instead redefines the cell itself as a device or subcircuit model that exists in the PDK. This is used where a specific layout subcell has its own associated device definition in the PDK. Instead of the "device" property value being the line that gets generated for a device in the subcells .ext file, the property value should be the word "primitive" optionally followed by any parameters that need to be passed to the subcircuit call.
2022-05-04 22:43:38 +02:00
/* If the device name is "primitive", then parameters */
/* are output here. */
if (!strncmp(propptr, "primitive ", 10))
fprintf(outFile, "parameters :%s %s\n", def->cd_name, propptr + 10);
}
Modified behavior of the "property device" value. It was previously ignoring the parameters of the entire cell including the device being overridden by the property, causing the output to be wrong. The parameters should always be written out to the .ext file, including the device whose output is being overridden.
2024-11-19 22:16:48 +01:00
/* Output device parameters for any subcircuit devices. */
/* This includes devices specified with the "device" parameter. */
if (!SigInterruptPending)
extOutputParameters(def, transList, outFile);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Set of changes updating version 8.2 to the level of 8.1, since 8.2 development had been halted since it was first created back in April. Version 8.2 is now the official development version, with the first development push to create a Cairo graphics interface.
2017-08-02 04:14:42 +02:00
if (isabstract) fprintf(outFile, "abstract\n");
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/* Output each node, along with its resistance and capacitance to substrate */
if (!SigInterruptPending)
Made a change to basic extraction to avoid generating an extra node representing the global substrate on cells that are abstract views. Corrected a typecasting issue in ext2spice.c that throws a compiler warning. Added another check for a cell being editable when painting, which is a case that was not covered by the previous code change to address the same issue.
2022-01-13 18:56:20 +01:00
extOutputNodes(nodeList, outFile);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/* Output coupling capacitances */
Made a change to basic extraction to avoid generating an extra node representing the global substrate on cells that are abstract views. Corrected a typecasting issue in ext2spice.c that throws a compiler warning. Added another check for a cell being editable when painting, which is a case that was not covered by the previous code change to address the same issue.
2022-01-13 18:56:20 +01:00
if (!SigInterruptPending && coupleInitialized && (ExtOptions & EXT_DOCOUPLING)
&& (!propfound))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
extOutputCoupling(&extCoupleHash, outFile);
/* Output devices and connectivity between nodes */
if (!SigInterruptPending)
{
int llx, lly, urx, ury, devidx, l, w;
char *token, *modelname, *subsnode;
char *propvalue;
modelname = NULL;
subsnode = NULL;
propvalue = NULL;
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
Added a 2nd use of the "device" property, which has long been needed, which instead of defining a device or subcircuit that exists inside the cell, instead redefines the cell itself as a device or subcircuit model that exists in the PDK. This is used where a specific layout subcell has its own associated device definition in the PDK. Instead of the "device" property value being the line that gets generated for a device in the subcells .ext file, the property value should be the word "primitive" optionally followed by any parameters that need to be passed to the subcircuit call.
2022-05-04 22:43:38 +02:00
/* Special case of device "primitive": The subcircuit has the */
/* name of a primitive device model and should be extracted as */
/* the same. The property string may contain parameters to */
/* pass to the subcircuit. */
if (propfound && (!strncmp(propptr, "primitive", 9)))
fprintf(outFile, "primitive\n");
else if (propfound)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
/* Sanity checking on syntax of property line, plus */
/* conversion of values to internal units. */
propvalue = StrDup((char **)NULL, propptr);
token = strtok(propvalue, " ");
Added a 2nd use of the "device" property, which has long been needed, which instead of defining a device or subcircuit that exists inside the cell, instead redefines the cell itself as a device or subcircuit model that exists in the PDK. This is used where a specific layout subcell has its own associated device definition in the PDK. Instead of the "device" property value being the line that gets generated for a device in the subcells .ext file, the property value should be the word "primitive" optionally followed by any parameters that need to be passed to the subcircuit call.
2022-05-04 22:43:38 +02:00
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
devidx = Lookup(token, extDevTable);
if (devidx < 0)
{
TxError("Extract error: \"device\" property has unknown "
gcc11 -Wall -Wpedantic cleanup (post __attribute__)
2025-01-06 17:25:38 +01:00
"device type: %s\n", token);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
propfound = FALSE;
}
if (propfound)
{
token = strtok(NULL, " ");
if (token == NULL)
propfound = FALSE;
else
modelname = StrDup((char **)NULL, token);
}
if (propfound)
{
token = strtok(NULL, " ");
extract/ExtBasic.c: Incorrect return-value check for a 'scanf'-like function Fix code scanning alert no. 138: Incorrect return-value check for a 'scanf'-like function (#22) Co-authored-by: Copilot Autofix powered by AI <62310815+github-advanced-security[bot]@users.noreply.github.com>
2024-09-30 05:54:46 +02:00
if ((token == NULL) || (sscanf(token, "%d", &llx) != 1))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
propfound = FALSE;
else
llx *= ExtCurStyle->exts_unitsPerLambda;
}
if (propfound)
{
token = strtok(NULL, " ");
extract/ExtBasic.c: Incorrect return-value check for a 'scanf'-like function Fix code scanning alert no. 138: Incorrect return-value check for a 'scanf'-like function (#22) Co-authored-by: Copilot Autofix powered by AI <62310815+github-advanced-security[bot]@users.noreply.github.com>
2024-09-30 05:54:46 +02:00
if ((token == NULL) || (sscanf(token, "%d", &lly) != 1))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
propfound = FALSE;
else
lly *= ExtCurStyle->exts_unitsPerLambda;
}
if (propfound)
{
token = strtok(NULL, " ");
extract/ExtBasic.c: Incorrect return-value check for a 'scanf'-like function Fix code scanning alert no. 140: Incorrect return-value check for a 'scanf'-like function (#23) Co-authored-by: Copilot Autofix powered by AI <62310815+github-advanced-security[bot]@users.noreply.github.com>
2024-09-30 05:54:59 +02:00
if ((token == NULL) || (sscanf(token, "%d", &urx) != 1))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
propfound = FALSE;
else
ExtBasic.c: warning: variable ... is used uninitialized whenever ExtBasic.c:408:7: warning: variable 'urx' is used uninitialized whenever '||' condition is true ExtBasic.c:417:7: warning: variable 'ury' is used uninitialized whenever '||' condition is true clang18 -Wall warning cleanup [-Wsometimes-uninitialized]
2024-10-04 20:39:45 +02:00
{
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
urx *= ExtCurStyle->exts_unitsPerLambda;
ExtBasic.c: warning: variable ... is used uninitialized whenever ExtBasic.c:408:7: warning: variable 'urx' is used uninitialized whenever '||' condition is true ExtBasic.c:417:7: warning: variable 'ury' is used uninitialized whenever '||' condition is true clang18 -Wall warning cleanup [-Wsometimes-uninitialized]
2024-10-04 20:39:45 +02:00
if (urx <= llx) urx++;
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
if (propfound)
{
token = strtok(NULL, " ");
extract/ExtBasic.c: Incorrect return-value check for a 'scanf'-like function Fix code scanning alert no. 140: Incorrect return-value check for a 'scanf'-like function (#23) Co-authored-by: Copilot Autofix powered by AI <62310815+github-advanced-security[bot]@users.noreply.github.com>
2024-09-30 05:54:59 +02:00
if ((token == NULL) || (sscanf(token, "%d", &ury) != 1))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
propfound = FALSE;
else
ExtBasic.c: warning: variable ... is used uninitialized whenever ExtBasic.c:408:7: warning: variable 'urx' is used uninitialized whenever '||' condition is true ExtBasic.c:417:7: warning: variable 'ury' is used uninitialized whenever '||' condition is true clang18 -Wall warning cleanup [-Wsometimes-uninitialized]
2024-10-04 20:39:45 +02:00
{
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
ury *= ExtCurStyle->exts_unitsPerLambda;
ExtBasic.c: warning: variable ... is used uninitialized whenever ExtBasic.c:408:7: warning: variable 'urx' is used uninitialized whenever '||' condition is true ExtBasic.c:417:7: warning: variable 'ury' is used uninitialized whenever '||' condition is true clang18 -Wall warning cleanup [-Wsometimes-uninitialized]
2024-10-04 20:39:45 +02:00
if (ury <= lly) ury++;
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
if (propfound)
{
switch (devidx)
{
case DEV_FET:
/* Read area */
token = strtok(NULL, " ");
extract/ExtBasic.c: Incorrect return-value check for a 'scanf'-like function Fix code scanning alert no. 149: Incorrect return-value check for a 'scanf'-like function (#10) * Create codeql.yml * Fix code scanning alert no. 149: Incorrect return-value check for a 'scanf'-like function Co-authored-by: Copilot Autofix powered by AI <62310815+github-advanced-security[bot]@users.noreply.github.com> --------- Co-authored-by: Copilot Autofix powered by AI <62310815+github-advanced-security[bot]@users.noreply.github.com>
2024-09-30 02:49:18 +02:00
if ((token == NULL) || (sscanf(token, "%d", &w) != 1))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
propfound = FALSE;
else
w *= ExtCurStyle->exts_unitsPerLambda *
ExtCurStyle->exts_unitsPerLambda;
/* Read perimeter */
token = strtok(NULL, " ");
extract/ExtBasic.c: Incorrect return-value check for a 'scanf'-like function Fix code scanning alert no. 149: Incorrect return-value check for a 'scanf'-like function (#10) * Create codeql.yml * Fix code scanning alert no. 149: Incorrect return-value check for a 'scanf'-like function Co-authored-by: Copilot Autofix powered by AI <62310815+github-advanced-security[bot]@users.noreply.github.com> --------- Co-authored-by: Copilot Autofix powered by AI <62310815+github-advanced-security[bot]@users.noreply.github.com>
2024-09-30 02:49:18 +02:00
if ((token == NULL) || (sscanf(token, "%d", &l) != 1))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
propfound = FALSE;
else
l *= ExtCurStyle->exts_unitsPerLambda;
break;
case DEV_MOSFET:
case DEV_ASYMMETRIC:
case DEV_BJT:
/* Read width */
token = strtok(NULL, " ");
extract/ExtBasic.c: Incorrect return-value check for a 'scanf'-like function Fix code scanning alert no. 149: Incorrect return-value check for a 'scanf'-like function (#10) * Create codeql.yml * Fix code scanning alert no. 149: Incorrect return-value check for a 'scanf'-like function Co-authored-by: Copilot Autofix powered by AI <62310815+github-advanced-security[bot]@users.noreply.github.com> --------- Co-authored-by: Copilot Autofix powered by AI <62310815+github-advanced-security[bot]@users.noreply.github.com>
2024-09-30 02:49:18 +02:00
if ((token == NULL) || (sscanf(token, "%d", &w) != 1))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
propfound = FALSE;
else
w *= ExtCurStyle->exts_unitsPerLambda;
/* Read length */
token = strtok(NULL, " ");
extract/ExtBasic.c: Incorrect return-value check for a 'scanf'-like function Fix code scanning alert no. 149: Incorrect return-value check for a 'scanf'-like function (#10) * Create codeql.yml * Fix code scanning alert no. 149: Incorrect return-value check for a 'scanf'-like function Co-authored-by: Copilot Autofix powered by AI <62310815+github-advanced-security[bot]@users.noreply.github.com> --------- Co-authored-by: Copilot Autofix powered by AI <62310815+github-advanced-security[bot]@users.noreply.github.com>
2024-09-30 02:49:18 +02:00
if ((token == NULL) || (sscanf(token, "%d", &l) != 1))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
propfound = FALSE;
else
l *= ExtCurStyle->exts_unitsPerLambda;
break;
case DEV_RES:
if (strcmp(modelname, "None"))
{
/* Read width */
token = strtok(NULL, " ");
extract/ExtBasic.c: Incorrect return-value check for a 'scanf'-like function Fix code scanning alert no. 149: Incorrect return-value check for a 'scanf'-like function (#10) * Create codeql.yml * Fix code scanning alert no. 149: Incorrect return-value check for a 'scanf'-like function Co-authored-by: Copilot Autofix powered by AI <62310815+github-advanced-security[bot]@users.noreply.github.com> --------- Co-authored-by: Copilot Autofix powered by AI <62310815+github-advanced-security[bot]@users.noreply.github.com>
2024-09-30 02:49:18 +02:00
if ((token == NULL) || (sscanf(token, "%d", &w) != 1))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
propfound = FALSE;
else
w *= ExtCurStyle->exts_unitsPerLambda;
/* Read length */
token = strtok(NULL, " ");
extract/ExtBasic.c: Incorrect return-value check for a 'scanf'-like function Fix code scanning alert no. 149: Incorrect return-value check for a 'scanf'-like function (#10) * Create codeql.yml * Fix code scanning alert no. 149: Incorrect return-value check for a 'scanf'-like function Co-authored-by: Copilot Autofix powered by AI <62310815+github-advanced-security[bot]@users.noreply.github.com> --------- Co-authored-by: Copilot Autofix powered by AI <62310815+github-advanced-security[bot]@users.noreply.github.com>
2024-09-30 02:49:18 +02:00
if ((token == NULL) || (sscanf(token, "%d", &l) != 1))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
propfound = FALSE;
else
l *= ExtCurStyle->exts_unitsPerLambda;
break;
}
break;
case DEV_CAP:
case DEV_CAPREV:
if (strcmp(modelname, "None"))
{
/* Read area */
token = strtok(NULL, " ");
extract/ExtBasic.c: Incorrect return-value check for a 'scanf'-like function Fix code scanning alert no. 149: Incorrect return-value check for a 'scanf'-like function (#10) * Create codeql.yml * Fix code scanning alert no. 149: Incorrect return-value check for a 'scanf'-like function Co-authored-by: Copilot Autofix powered by AI <62310815+github-advanced-security[bot]@users.noreply.github.com> --------- Co-authored-by: Copilot Autofix powered by AI <62310815+github-advanced-security[bot]@users.noreply.github.com>
2024-09-30 02:49:18 +02:00
if ((token == NULL) || (sscanf(token, "%d", &w) != 1))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
propfound = FALSE;
else
w *= ExtCurStyle->exts_unitsPerLambda *
ExtCurStyle->exts_unitsPerLambda;
/* Read perimeter */
token = strtok(NULL, " ");
extract/ExtBasic.c: Incorrect return-value check for a 'scanf'-like function Fix code scanning alert no. 149: Incorrect return-value check for a 'scanf'-like function (#10) * Create codeql.yml * Fix code scanning alert no. 149: Incorrect return-value check for a 'scanf'-like function Co-authored-by: Copilot Autofix powered by AI <62310815+github-advanced-security[bot]@users.noreply.github.com> --------- Co-authored-by: Copilot Autofix powered by AI <62310815+github-advanced-security[bot]@users.noreply.github.com>
2024-09-30 02:49:18 +02:00
if ((token == NULL) || (sscanf(token, "%d", &l) != 1))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
propfound = FALSE;
else
l *= ExtCurStyle->exts_unitsPerLambda;
break;
}
break;
}
}
if (propfound)
{
if (devidx == DEV_FET)
fprintf(outFile, "fet");
else
fprintf(outFile, "device %s", extDevTable[devidx]);
fprintf(outFile, " %s %d %d %d %d", modelname,
llx, lly, urx, ury);
switch (devidx) {
case DEV_FET:
case DEV_MOSFET:
case DEV_ASYMMETRIC:
case DEV_BJT:
fprintf(outFile, " %d %d", w, l);
break;
case DEV_RES:
case DEV_CAP:
case DEV_CAPREV:
if (strcmp(modelname, "None"))
fprintf(outFile, " %d %d", w, l);
break;
}
/* Print remainder of arguments verbatim. */
/* Note: There should be additional checks on */
/* node triplets including area and perim. conversions */
while (1) {
token = strtok(NULL, " ");
if (token == NULL)
break;
else
fprintf(outFile, " %s", token);
}
}
else if (devidx >= 0)
{
TxError("Extract error: \"device %s\" property syntax"
" error\n", extDevTable[devidx]);
}
if (modelname) freeMagic(modelname);
if (propvalue) freeMagic(propvalue);
}
if (!propfound)
extOutputDevices(def, transList, outFile);
}
/* Clean up */
if (coupleInitialized)
extCapHashKill(&extCoupleHash);
ExtFreeLabRegions((LabRegion *) transList);
return (nodeList);
}
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*
* ----------------------------------------------------------------------------
*
* extSetResist --
*
* The input to this procedure is a pointer to a NodeRegion.
* Its resistance is computed from the area and perimeter stored
* in the arrays extResistPerim[] and extResistArea[]. These arrays
* are then reset to zero.
*
* We approximate the resistive region as a collection of rectangles
* of width W and length L, one for each set of layers having a different
* sheet resistivity. We do so by noting that for a rectangle,
*
* Area = L * W
* Perimeter = 2 * (L + W)
*
* Solving the two simultaneous equations for L yields the following
* quadratic:
*
* 2 * (L**2) - Perimeter * L + 2 * Area = 0
*
* Solving this quadratic for L, the longer dimension, we get
*
* L = (Perimeter + S) / 4
*
* where
*
* S = sqrt( (Perimeter**2) - 16 * Area )
*
* The smaller dimension is W, ie,
*
* W = (Perimeter - S) / 4
*
* The resistance is L / W squares:
*
* Perimeter + S
* R = -------------
* Perimeter - S
*
* Results:
* None.
*
* Side effects:
* See the comments above.
*
* ----------------------------------------------------------------------------
*/
void
extSetResist(reg)
NodeRegion *reg;
{
Made corrections to the extraction based on a pull request by Dan Moore for preventing integer overflow in the area calculations.
2021-01-05 18:25:25 +01:00
int n, perim;
dlong area;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
float s, fperim, v;
for (n = 0; n < ExtCurStyle->exts_numResistClasses; n++)
{
reg->nreg_pa[n].pa_area = area = extResistArea[n];
reg->nreg_pa[n].pa_perim = perim = extResistPerim[n];
if (area > 0 && perim > 0)
{
extract/ExtBasic.c: Multiplication result converted to larger type Fix code scanning alert no. 52: Multiplication result converted to larger type (#49) Co-authored-by: Copilot Autofix powered by AI <62310815+github-advanced-security[bot]@users.noreply.github.com>
2024-09-30 08:13:59 +02:00
v = (double) ((dlong)perim * perim - 16 * area);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/* Approximate by one square if v < 0 */
if (v < 0) s = 0; else s = sqrt(v);
fperim = (float) perim;
reg->nreg_resist += (fperim + s) / (fperim - s)
* ExtCurStyle->exts_resistByResistClass[n];
}
/* Reset for the next pass */
extResistArea[n] = extResistPerim[n] = 0;
}
}
/*
* ----------------------------------------------------------------------------
*
* extOutputNodes --
*
* The resistance and capacitance of each node have already been
* computed, so all we need do is output them.
*
* Results:
* None.
*
* Side effects:
* Writes a number of 'node' and 'equiv' records to the file 'outFile'.
*
* Interruptible. If SigInterruptPending is detected, we stop outputting
* nodes and return.
*
* ----------------------------------------------------------------------------
*/
void
extOutputNodes(nodeList, outFile)
NodeRegion *nodeList; /* Nodes */
FILE *outFile; /* Output file */
{
ResValue rround = ExtCurStyle->exts_resistScale / 2;
CapValue finC;
int intR;
NodeRegion *reg;
LabelList *ll;
char *cp;
int n;
Label *lab;
char *text;
/* If this node is a subcircuit port, it gets special treatment. */
/* There may be multiple ports per node. */
for (reg = nodeList; reg && !SigInterruptPending; reg = reg->nreg_next)
for (ll = reg->nreg_labels; ll; ll = ll->ll_next)
if (ll->ll_attr == LL_PORTATTR)
{
fprintf(outFile, "port \"%s\" %d %d %d %d %d %s\n",
ll->ll_label->lab_text,
Corrected an issue with the limited bitfield dedicated to port numbers; this limited ports to 16384, which seemed reasonable at the time. However, the sky130_sram_macro layouts connect power and ground in a way that when coupled with "extract unique" can generate tens of thousands of ports and overrun the bit field, showing that automation can do the unexpected. The solution was to split out the port number from the label record as its own 32-bit value.
2021-12-13 04:09:31 +01:00
ll->ll_label->lab_port,
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
ll->ll_label->lab_rect.r_xbot,
ll->ll_label->lab_rect.r_ybot,
ll->ll_label->lab_rect.r_xtop,
ll->ll_label->lab_rect.r_ytop,
DBTypeShortName(ll->ll_label->lab_type));
/* If the port name matches the node name to be written */
/* to the node record, then reassign the node position */
/* and type to be that of the port, so we don't have a */
/* conflict. */
if (!strcmp(extNodeName((LabRegion *) reg),
ll->ll_label->lab_text))
{
reg->nreg_ll.p_x = ll->ll_label->lab_rect.r_xbot;
reg->nreg_ll.p_y = ll->ll_label->lab_rect.r_ybot;
reg->nreg_type = ll->ll_label->lab_type;
reg->nreg_pnum = DBPlane(reg->nreg_type);
}
}
for (reg = nodeList; reg && !SigInterruptPending; reg = reg->nreg_next)
{
/* Output the node */
text = extNodeName((LabRegion *) reg);
/* Check if this node is the substrate */
if (reg == glob_subsnode)
{
fprintf(outFile, "substrate \"%s\" 0 0", text);
}
else
{
intR = (reg->nreg_resist + rround) / ExtCurStyle->exts_resistScale;
finC = reg->nreg_cap/ExtCurStyle->exts_capScale;
Found one additional issue in the extraction that causes incorrect partitioning of unshielded areas reaching outward from any given edge, caused by using a boundary value in the 2nd recursion call that had been modified for the 1st recursion call and so was no longer valid.
2023-03-24 22:11:27 +01:00
/* Avoid negative capacitance caused by round-off near zero */
if (finC < 0.0) finC = 0.0;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
fprintf(outFile, "node \"%s\" %d %lg", text, intR, finC);
}
/* Output its location (lower-leftmost point and type name) */
if (reg->nreg_type & TT_DIAGONAL) {
/* Node may be recorded as a diagonal tile if no other */
/* non-diagonal tiles are adjoining it. */
TileType loctype = (reg->nreg_type & TT_SIDE) ? ((reg->nreg_type &
TT_RIGHTMASK) >> 14) : (reg->nreg_type & TT_LEFTMASK);
fprintf(outFile, " %d %d %s",
reg->nreg_ll.p_x, reg->nreg_ll.p_y,
DBTypeShortName(loctype));
}
else
{
fprintf(outFile, " %d %d %s",
reg->nreg_ll.p_x, reg->nreg_ll.p_y,
DBTypeShortName(reg->nreg_type));
}
/* Output its area and perimeter for each resistivity class */
for (n = 0; n < ExtCurStyle->exts_numResistClasses; n++)
Made corrections to the extraction based on a pull request by Dan Moore for preventing integer overflow in the area calculations.
2021-01-05 18:25:25 +01:00
fprintf(outFile, " %"DLONG_PREFIX"d %d", reg->nreg_pa[n].pa_area,
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
reg->nreg_pa[n].pa_perim);
(void) putc('\n', outFile);
/* Output its attribute list */
for (ll = reg->nreg_labels; ll; ll = ll->ll_next)
if (extLabType(ll->ll_label->lab_text, LABTYPE_NODEATTR))
{
/* Don't output the trailing character for node attributes */
lab = ll->ll_label;
fprintf(outFile, "attr %s %d %d %d %d %s \"",
text, lab->lab_rect.r_xbot, lab->lab_rect.r_ybot,
lab->lab_rect.r_xtop, lab->lab_rect.r_ytop,
DBTypeShortName(lab->lab_type));
cp = lab->lab_text;
n = strlen(cp) - 1;
while (n-- > 0)
putc(*cp++, outFile);
fprintf(outFile, "\"\n");
}
Correction from a recent commit; complicated sets of "equiv" statement in a .ext file require that all aliases of a node name be rehashed after a node merge, or else node loops can occur. Also prevented statements of the form "equiv A A" from being output in the .ext file, as they are useless.
2021-03-18 16:37:44 +01:00
/* Output the alternate names for the node. Avoid generating */
/* unnecessary "equiv A A" entries for labels on disconnected */
Modified the generation of "equiv" statements in "extract" some more, to eliminate all redundant names resulting from redundant labels. Changed the behavior of "goto" so that it will find local names with slashes, which are the result of using "flatten". A hierarchical search is done first, as before, but on failure to find a subcell component, the local cell is searched for the verbatim name.
2021-10-08 16:58:10 +02:00
/* nets. Also avoid multiple "equiv" statements with the same */
/* nets (happens when ports with the same name have different */
/* port numbers, which should probably just be prohibited), and */
/* raise an error if two ports with different names are being */
/* marked as equivalent. */
Correction from a recent commit; complicated sets of "equiv" statement in a .ext file require that all aliases of a node name be rehashed after a node merge, or else node loops can occur. Also prevented statements of the form "equiv A A" from being output in the .ext file, as they are useless.
2021-03-18 16:37:44 +01:00
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
for (ll = reg->nreg_labels; ll; ll = ll->ll_next)
Modified "ext2sim" behavior so that "=" statements are output (since these are interpreted by IRSIM, the only known program to parse .sim output)---the "ext2sim alias on" option now just moves such statements from the ".sim" file to a ".al" file. Corrected the ResSimMerge() routine to reverse the nodes, so that the devices belonging to the aliased node are added to the original node, instead of the other way around. This corrects "missing gate" and "missing SD" errors that occur due to nodes connected through the substrate.
2021-09-13 18:25:38 +02:00
{
One more correction to limit, by default, the generation of "equiv" statements in the .ext file output to those that mark a port as equivalent to the node name used elsewhere in the file. This limits unnecessary output of "equiv" statements that can bog down ext2spice and other commands that use the .ext file contents.
2021-10-08 03:36:10 +02:00
bool isPort;
/* Do not export aliases that are not ports unless the */
/* "extract do aliases" options was selected. */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
if (ll->ll_label->lab_text == text)
{
Modified the generation of "equiv" statements in "extract" some more, to eliminate all redundant names resulting from redundant labels. Changed the behavior of "goto" so that it will find local names with slashes, which are the result of using "flatten". A hierarchical search is done first, as before, but on failure to find a subcell component, the local cell is searched for the verbatim name.
2021-10-08 16:58:10 +02:00
char *portname = NULL;
char *lastname = NULL;
One more correction to limit, by default, the generation of "equiv" statements in the .ext file output to those that mark a port as equivalent to the node name used elsewhere in the file. This limits unnecessary output of "equiv" statements that can bog down ext2spice and other commands that use the .ext file contents.
2021-10-08 03:36:10 +02:00
isPort = (ll->ll_attr == LL_PORTATTR) ? TRUE : FALSE;
Modified the generation of "equiv" statements in "extract" some more, to eliminate all redundant names resulting from redundant labels. Changed the behavior of "goto" so that it will find local names with slashes, which are the result of using "flatten". A hierarchical search is done first, as before, but on failure to find a subcell component, the local cell is searched for the verbatim name.
2021-10-08 16:58:10 +02:00
if (isPort) portname = text;
One more correction to limit, by default, the generation of "equiv" statements in the .ext file output to those that mark a port as equivalent to the node name used elsewhere in the file. This limits unnecessary output of "equiv" statements that can bog down ext2spice and other commands that use the .ext file contents.
2021-10-08 03:36:10 +02:00
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
for (ll = ll->ll_next; ll; ll = ll->ll_next)
if (extLabType(ll->ll_label->lab_text, LABTYPE_NAME))
Correction from a recent commit; complicated sets of "equiv" statement in a .ext file require that all aliases of a node name be rehashed after a node merge, or else node loops can occur. Also prevented statements of the form "equiv A A" from being output in the .ext file, as they are useless.
2021-03-18 16:37:44 +01:00
if (strcmp(text, ll->ll_label->lab_text))
Modified "ext2sim" behavior so that "=" statements are output (since these are interpreted by IRSIM, the only known program to parse .sim output)---the "ext2sim alias on" option now just moves such statements from the ".sim" file to a ".al" file. Corrected the ResSimMerge() routine to reverse the nodes, so that the devices belonging to the aliased node are added to the original node, instead of the other way around. This corrects "missing gate" and "missing SD" errors that occur due to nodes connected through the substrate.
2021-09-13 18:25:38 +02:00
{
One more correction to limit, by default, the generation of "equiv" statements in the .ext file output to those that mark a port as equivalent to the node name used elsewhere in the file. This limits unnecessary output of "equiv" statements that can bog down ext2spice and other commands that use the .ext file contents.
2021-10-08 03:36:10 +02:00
if ((ll->ll_attr == LL_PORTATTR) ||
(ExtOptions & EXT_DOALIASES))
{
Modified the generation of "equiv" statements in "extract" some more, to eliminate all redundant names resulting from redundant labels. Changed the behavior of "goto" so that it will find local names with slashes, which are the result of using "flatten". A hierarchical search is done first, as before, but on failure to find a subcell component, the local cell is searched for the verbatim name.
2021-10-08 16:58:10 +02:00
if ((portname == NULL) ||
(strcmp(ll->ll_label->lab_text, portname)))
{
if ((lastname == NULL) ||
(strcmp(ll->ll_label->lab_text, lastname)))
fprintf(outFile, "equiv \"%s\" \"%s\"\n",
text, ll->ll_label->lab_text);
lastname = ll->ll_label->lab_text;
}
Corrected an issue that produces potentially incorrect output from ext2spice due to "equiv" statements in the .ext file. The algorithm was not properly keeping the port as the preferred name of the node, resulting in the non-preferred name being used instead of the port name in the output. This would happen only if there was a label on a net that had a different name than the port name. The error became much more prevalent after changing the extract behavior to make "extract do aliases" default. Also fixed a somewhat related minor error in which magic would print an error message about ports being shorted together on the same kind of net where both a port and a (different) label were attached to the net. Since the non-port label is not a preferred name, then there should be no warning message. The warning is only intended for cases where two (or more) ports are truly shorted together.
2023-06-13 23:14:36 +02:00
/* Don't print a warning unless both labels are
* really ports.
*/
Modified the generation of "equiv" statements in "extract" some more, to eliminate all redundant names resulting from redundant labels. Changed the behavior of "goto" so that it will find local names with slashes, which are the result of using "flatten". A hierarchical search is done first, as before, but on failure to find a subcell component, the local cell is searched for the verbatim name.
2021-10-08 16:58:10 +02:00
if ((portname != NULL) &&
Corrected an issue that produces potentially incorrect output from ext2spice due to "equiv" statements in the .ext file. The algorithm was not properly keeping the port as the preferred name of the node, resulting in the non-preferred name being used instead of the port name in the output. This would happen only if there was a label on a net that had a different name than the port name. The error became much more prevalent after changing the extract behavior to make "extract do aliases" default. Also fixed a somewhat related minor error in which magic would print an error message about ports being shorted together on the same kind of net where both a port and a (different) label were attached to the net. Since the non-port label is not a preferred name, then there should be no warning message. The warning is only intended for cases where two (or more) ports are truly shorted together.
2023-06-13 23:14:36 +02:00
(ll->ll_attr == LL_PORTATTR) &&
Modified the generation of "equiv" statements in "extract" some more, to eliminate all redundant names resulting from redundant labels. Changed the behavior of "goto" so that it will find local names with slashes, which are the result of using "flatten". A hierarchical search is done first, as before, but on failure to find a subcell component, the local cell is searched for the verbatim name.
2021-10-08 16:58:10 +02:00
(strcmp(ll->ll_label->lab_text, portname)))
One more correction to limit, by default, the generation of "equiv" statements in the .ext file output to those that mark a port as equivalent to the node name used elsewhere in the file. This limits unnecessary output of "equiv" statements that can bog down ext2spice and other commands that use the .ext file contents.
2021-10-08 03:36:10 +02:00
TxError("Warning: Ports \"%s\" and \"%s\" are"
" electrically shorted.\n",
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
text, ll->ll_label->lab_text);
Modified the generation of "equiv" statements in "extract" some more, to eliminate all redundant names resulting from redundant labels. Changed the behavior of "goto" so that it will find local names with slashes, which are the result of using "flatten". A hierarchical search is done first, as before, but on failure to find a subcell component, the local cell is searched for the verbatim name.
2021-10-08 16:58:10 +02:00
if (!isPort && (ll->ll_attr == LL_PORTATTR))
portname = ll->ll_label->lab_text;
One more correction to limit, by default, the generation of "equiv" statements in the .ext file output to those that mark a port as equivalent to the node name used elsewhere in the file. This limits unnecessary output of "equiv" statements that can bog down ext2spice and other commands that use the .ext file contents.
2021-10-08 03:36:10 +02:00
}
Modified the extraction code to work around a problem created some time ago by cleaning up excess usage of "equiv" lines in the .ext file output. The hierarchical extraction code did not distinguish between node names which were output and those that were not, requiring a setting "extract do aliases" to force all node aliases to be output with "equiv" statements. So hierarchical names might be any alias, whether output or not, and "merge" and "cap" lines might contain references to nodes that were not output, causing them to be disconnected nodes. This fix handles the "extract no aliases" (default) case by flagging node names that are redundant and not output, and not creating hierarchical names with them.
2022-01-14 22:13:36 +01:00
else
{
/* Label is not recorded an an alias, so */
/* mark the label so that it will not be */
/* used for extracting merges or caps. */
ll->ll_label->lab_port = INFINITY;
}
Modified "ext2sim" behavior so that "=" statements are output (since these are interpreted by IRSIM, the only known program to parse .sim output)---the "ext2sim alias on" option now just moves such statements from the ".sim" file to a ".al" file. Corrected the ResSimMerge() routine to reverse the nodes, so that the devices belonging to the aliased node are added to the original node, instead of the other way around. This corrects "missing gate" and "missing SD" errors that occur due to nodes connected through the substrate.
2021-09-13 18:25:38 +02:00
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
break;
}
Modified "ext2sim" behavior so that "=" statements are output (since these are interpreted by IRSIM, the only known program to parse .sim output)---the "ext2sim alias on" option now just moves such statements from the ".sim" file to a ".al" file. Corrected the ResSimMerge() routine to reverse the nodes, so that the devices belonging to the aliased node are added to the original node, instead of the other way around. This corrects "missing gate" and "missing SD" errors that occur due to nodes connected through the substrate.
2021-09-13 18:25:38 +02:00
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
}
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
Corrected the use of the global substrate node name; this has been restricted to its original intent, which is to replace the long name formed from the plane short name and the "minfinity" coordinate. This avoids issues with conflicting substrate names derived from a real layer such as pwell. Also, the global substrate node name now returns the variable name without the "$" in front if the variable has not been set to anything. This avoids potential syntax errors in the netlist.
2021-01-07 21:19:36 +01:00
/*
* ---------------------------------------------------------------------
*
* extSubsName --
*
* Return the name of the substrate node, if the node belongs to
* the substrate region and a global substrate node name has been
* specified by the tech file. If the substrate node name is a
* Tcl variable name, then perform the variable substitution.
*
* Results:
* Pointer to a character string.
*
* Side Effects:
* None.
*
* ---------------------------------------------------------------------
*/
char *
extSubsName(node)
LabRegion *node;
{
char *subsName;
/* If the techfile specifies a global name for the substrate, use */
/* that in preference to the default "p_x_y#" name. Use this name */
/* only to substitute for nodes with tiles at -(infinity). */
if (ExtCurStyle->exts_globSubstrateName != NULL)
{
if (node->lreg_ll.p_x <= (MINFINITY + 3))
{
Restored compiling of the non-Tcl/Tk version of magic. This has traditionally been kept for backwards compatibility. However, the operation of "ext2spice" and "ext2sim" as separate programs has become extremely difficult to maintain, and so it has been dropped in favor of folding both into the program as commands, as was done a long time ago in the Tcl/Tk version.
2022-02-08 22:12:07 +01:00
#ifdef MAGIC_WRAPPER
Corrected the use of the global substrate node name; this has been restricted to its original intent, which is to replace the long name formed from the plane short name and the "minfinity" coordinate. This avoids issues with conflicting substrate names derived from a real layer such as pwell. Also, the global substrate node name now returns the variable name without the "$" in front if the variable has not been set to anything. This avoids potential syntax errors in the netlist.
2021-01-07 21:19:36 +01:00
if (ExtCurStyle->exts_globSubstrateName[0] == '$' &&
ExtCurStyle->exts_globSubstrateName[1] != '$')
{
// If subsName is a Tcl variable (begins with "$"), make the
// variable substitution, if one exists. Ignore double-$.
// If the variable is undefined in the interpreter, then
// strip the "$" from the front as this is not legal in most
// netlist formats.
char *varsub = (char *)Tcl_GetVar(magicinterp,
&ExtCurStyle->exts_globSubstrateName[1],
TCL_GLOBAL_ONLY);
return (varsub != NULL) ? varsub : ExtCurStyle->exts_globSubstrateName
+ 1;
}
else
Restored compiling of the non-Tcl/Tk version of magic. This has traditionally been kept for backwards compatibility. However, the operation of "ext2spice" and "ext2sim" as separate programs has become extremely difficult to maintain, and so it has been dropped in favor of folding both into the program as commands, as was done a long time ago in the Tcl/Tk version.
2022-02-08 22:12:07 +01:00
#endif
Corrected the use of the global substrate node name; this has been restricted to its original intent, which is to replace the long name formed from the plane short name and the "minfinity" coordinate. This avoids issues with conflicting substrate names derived from a real layer such as pwell. Also, the global substrate node name now returns the variable name without the "$" in front if the variable has not been set to anything. This avoids potential syntax errors in the netlist.
2021-01-07 21:19:36 +01:00
return ExtCurStyle->exts_globSubstrateName;
}
else return NULL;
}
return NULL;
}
/*
* ----------------------------------------------------------------------------
*
* extMakeNodeNumPrint --
*
* Construct a node name from the plane number "plane" and lower left Point
* "coord", and place it in the string "buf" (which must be large enough).
*
* Results:
* None.
*
* Side Effects:
* Fills in string "buf".
*
* ----------------------------------------------------------------------------
*/
void
extMakeNodeNumPrint(buf, lreg)
char *buf;
LabRegion *lreg;
{
int plane = lreg->lreg_pnum;
Point *p = &lreg->lreg_ll;
char *subsName;
subsName = extSubsName(lreg);
if (subsName != NULL)
strcpy(buf, subsName);
else
sprintf(buf, "%s_%s%d_%s%d#",
DBPlaneShortName(plane),
(p->p_x < 0) ? "n": "", abs(p->p_x),
(p->p_y < 0) ? "n": "", abs(p->p_y));
}
/*
* ----------------------------------------------------------------------------
*
* extNodeName --
*
* Given a pointer to a LabRegion, return a pointer to a string
* that can be printed as the name of the node. If the LabRegion
* has a list of attached labels, use one of the labels; otherwise,
* use its node number.
*
* Results:
* Returns a pointer to a string. If the node had a label, this
* is a pointer to the lab_text field of the first label on the
* label list for the node; otherwise, it is a pointer to a static
* buffer into which we have printed the node number.
*
* Side effects:
* May overwrite the static buffer used to hold the printable
* version of a node number.
*
* ----------------------------------------------------------------------------
*/
char *
extNodeName(node)
LabRegion *node;
{
static char namebuf[256]; /* Big enough to hold a generated nodename */
LabelList *ll;
if (node == (LabRegion *) NULL || SigInterruptPending)
return ("(none)");
for (ll = node->lreg_labels; ll; ll = ll->ll_next)
if (extLabType(ll->ll_label->lab_text, LABTYPE_NAME))
return (ll->ll_label->lab_text);
extMakeNodeNumPrint(namebuf, node);
return (namebuf);
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*
* ----------------------------------------------------------------------------
*
* extFindDuplicateLabels --
*
* Verify that no node in the list 'nreg' has a label that appears in
* any other node in the list. Leave a warning turd if one is.
*
* Results:
* None.
*
* Side effects:
* Leaves feedback attached to each node that contains a label
* duplicated in another node.
*
* ----------------------------------------------------------------------------
*/
void
extFindDuplicateLabels(def, nreg)
CellDef *def;
NodeRegion *nreg;
{
static char *badmesg =
"Label \"%s\" attached to more than one unconnected node: %s";
bool hashInitialized = FALSE;
char message[512], name[512], *text;
NodeRegion *np, *np2;
LabelList *ll, *ll2;
HashEntry *he;
NodeRegion *lastreg;
NodeRegion badLabel;
HashTable labelHash;
Rect r;
for (np = nreg; np; np = np->nreg_next)
{
for (ll = np->nreg_labels; ll; ll = ll->ll_next)
{
text = ll->ll_label->lab_text;
if (!extLabType(text, LABTYPE_NAME))
continue;
if (!hashInitialized)
HashInit(&labelHash, 32, 0), hashInitialized = TRUE;
he = HashFind(&labelHash, text);
lastreg = (NodeRegion *) HashGetValue(he);
if (lastreg == (NodeRegion *) NULL)
HashSetValue(he, (ClientData) np);
else if (lastreg != np && lastreg != &badLabel)
{
/*
* Make a pass through all labels for all nodes.
* Leave a feedback turd over each instance of the
* offending label.
*/
for (np2 = nreg; np2; np2 = np2->nreg_next)
{
for (ll2 = np2->nreg_labels; ll2; ll2 = ll2->ll_next)
{
if (strcmp(ll2->ll_label->lab_text, text) == 0)
{
extNumWarnings++;
if (!DebugIsSet(extDebugID, extDebNoFeedback))
{
r.r_ll = r.r_ur = ll2->ll_label->lab_rect.r_ll;
r.r_xbot--, r.r_ybot--, r.r_xtop++, r.r_ytop++;
ExtBasic.c: warning: incompatible pointer types passing 'NodeRegion *' ... The NodeRegion is an extended form of LabRegion (which is smaller) and has the same layout. So we cast into the smaller type. ExtBasic.c:1025:31: warning: incompatible pointer types passing 'NodeRegion *' (aka 'struct nreg *') to parameter of type 'LabRegion *' (aka 'struct lreg *') ExtBasic.c:2291:29: warning: incompatible pointer types passing 'NodeRegion *' (aka 'struct nreg *') to parameter of type 'LabRegion *' (aka 'struct lreg *') ExtBasic.c:2335:46: warning: incompatible pointer types passing 'NodeRegion *' (aka 'struct nreg *') to parameter of type 'LabRegion *' (aka 'struct lreg *') ExtBasic.c:2339:47: warning: incompatible pointer types passing 'NodeRegion *' (aka 'struct nreg *') to parameter of type 'LabRegion *' (aka 'struct lreg *') clang18 default warning cleanup [-Wincompatible-pointer-types]
2024-10-04 19:54:24 +02:00
extMakeNodeNumPrint(name, (LabRegion *)np2);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
(void) sprintf(message, badmesg, text, name);
DBWFeedbackAdd(&r, message, def,
1, STYLE_PALEHIGHLIGHTS);
}
}
}
}
/* Mark this label as already having generated an error */
HashSetValue(he, (ClientData) &badLabel);
}
}
}
if (hashInitialized)
HashKill(&labelHash);
}
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*
* ---------------------------------------------------------------------
*
* ExtSortTerminals --
*
* Sort the terminals of a transistor so that the terminal with the
* lowest leftmost coordinate on the plane with the lowest number is
* output first.
*
* Results:
* None
*
* Side effects:
* The tr_termnode, tr_termlen, and tr_termpos entries may change.
*
* ---------------------------------------------------------------------
*/
void
ExtSortTerminals(tran, ll)
struct transRec *tran;
LabelList *ll;
{
int nsd, changed;
TermTilePos *p1, *p2;
NodeRegion *tmp_node;
TermTilePos tmp_pos;
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
int tmp_len, tmp_area, tmp_perim, tmp_shared;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
LabelList *lp;
do
{
changed = 0;
for( nsd = 0; nsd < tran->tr_nterm-1; nsd++ )
{
p1 = &(tran->tr_termpos[nsd]);
p2 = &(tran->tr_termpos[nsd+1]);
Updated the revision number to go along with the merge of pull request #325 from Daryl Miles. Made a few simple style changes to conform to (what is vaguely defined as) the overall programming style for magic (passed down from John Ousterhout).
2024-10-01 18:56:31 +02:00
if (p2->pnum > p1->pnum)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
continue;
Updated the revision number to go along with the merge of pull request #325 from Daryl Miles. Made a few simple style changes to conform to (what is vaguely defined as) the overall programming style for magic (passed down from John Ousterhout).
2024-10-01 18:56:31 +02:00
else if (p2->pnum == p1->pnum)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
Updated the revision number to go along with the merge of pull request #325 from Daryl Miles. Made a few simple style changes to conform to (what is vaguely defined as) the overall programming style for magic (passed down from John Ousterhout).
2024-10-01 18:56:31 +02:00
if (p2->pt.p_x > p1->pt.p_x)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
continue;
Updated the revision number to go along with the merge of pull request #325 from Daryl Miles. Made a few simple style changes to conform to (what is vaguely defined as) the overall programming style for magic (passed down from John Ousterhout).
2024-10-01 18:56:31 +02:00
else if (p2->pt.p_x == p1->pt.p_x && p2->pt.p_y > p1->pt.p_y)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
continue;
Updated the revision number to go along with the merge of pull request #325 from Daryl Miles. Made a few simple style changes to conform to (what is vaguely defined as) the overall programming style for magic (passed down from John Ousterhout).
2024-10-01 18:56:31 +02:00
else if (p2->pt.p_x == p1->pt.p_x && p2->pt.p_y == p1->pt.p_y)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
TxPrintf("Extract error: Duplicate tile position, ignoring\n");
continue;
}
}
changed = 1;
tmp_node = tran->tr_termnode[nsd];
tmp_pos = tran->tr_termpos[nsd];
tmp_len = tran->tr_termlen[nsd];
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
tmp_area = tran->tr_termarea[nsd];
tmp_perim = tran->tr_termperim[nsd];
tmp_shared = tran->tr_termshared[nsd];
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
tran->tr_termnode[nsd] = tran->tr_termnode[nsd+1];
tran->tr_termpos[nsd] = tran->tr_termpos[nsd+1];
tran->tr_termlen[nsd] = tran->tr_termlen[nsd+1];
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
tran->tr_termperim[nsd] = tran->tr_termperim[nsd+1];
tran->tr_termarea[nsd] = tran->tr_termarea[nsd+1];
tran->tr_termshared[nsd] = tran->tr_termshared[nsd+1];
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
tran->tr_termnode[nsd+1] = tmp_node;
tran->tr_termpos[nsd+1] = tmp_pos;
tran->tr_termlen[nsd+1] = tmp_len;
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
tran->tr_termarea[nsd+1] = tmp_area;
tran->tr_termperim[nsd+1] = tmp_perim;
tran->tr_termshared[nsd+1] = tmp_shared;
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
/* Need to SWAP the indices in the labRegion too.
* These for loops within the bubblesort in here are kinda slow
* but S,D attributes are not that common so it should not matter
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
* that much -- Stefanos 5/96 */
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
for ( lp = ll ; lp ; lp = lp->ll_next )
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
if ( lp->ll_attr == nsd ) lp->ll_attr = LL_SORTATTR ;
else if ( lp->ll_attr == nsd+1 ) lp->ll_attr = nsd ;
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
for ( lp = ll ; lp ; lp = lp->ll_next )
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
if ( lp->ll_attr == LL_SORTATTR ) lp->ll_attr = nsd+1;
}
}
while( changed );
}
/*
*----------------------------------------------------------------------
*
* extComputeCapLW --
*
* Determine effective length and width of a rectangular capacitor,
* based on the boundary vectors stored in extSpecialBounds. This
* routine should only be called for capacitors that have exactly
* one terminal.
*
* Results:
A number of changes: 1) Corrected spurious error messages about cells already existing in GDS when using "flatten" or "flatglob". 2) Fixed handling of resistance as a subcircuit parameter 3) Added area and perimeter resistance for a device; this is done through the "devresist" statement in the tech file, which is an extension of the original "fetresist" statement. Where "fetresist" only supported type "linear", "devresist" supports types "area" and "perimeter". 4) Support for CDL syntax, including generating subcircuit-like parameters for components starting with SPICE-standard prefixes like M, R, C, etc., adding "/" between pins and subcircuit name, and saving the file as ".cdl" instead of ".spice". 5) Estimated L and W for devices whose geometry is complex and do not reduce to a simple rectangle. L and W are estimated as the square root of the area. 6) Changed the method of extracting L and W for diodes to use the same method as capacitors. Note that diodes are not usually specified by L and W, but if they are, this will produce the right result. 7) Corrected the reported filename and line number when printing error messages related to errors inside a technology file, when the technology file uses "include" to combine multiple files.
2025-10-01 21:17:49 +02:00
* TRUE if L and W were computed, FALSE if not.
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
*
* Side Effects:
* Puts effective length and width into the pointers
* passed as arguments.
*----------------------------------------------------------------------
*/
A number of changes: 1) Corrected spurious error messages about cells already existing in GDS when using "flatten" or "flatglob". 2) Fixed handling of resistance as a subcircuit parameter 3) Added area and perimeter resistance for a device; this is done through the "devresist" statement in the tech file, which is an extension of the original "fetresist" statement. Where "fetresist" only supported type "linear", "devresist" supports types "area" and "perimeter". 4) Support for CDL syntax, including generating subcircuit-like parameters for components starting with SPICE-standard prefixes like M, R, C, etc., adding "/" between pins and subcircuit name, and saving the file as ".cdl" instead of ".spice". 5) Estimated L and W for devices whose geometry is complex and do not reduce to a simple rectangle. L and W are estimated as the square root of the area. 6) Changed the method of extracting L and W for diodes to use the same method as capacitors. Note that diodes are not usually specified by L and W, but if they are, this will produce the right result. 7) Corrected the reported filename and line number when printing error messages related to errors inside a technology file, when the technology file uses "include" to combine multiple files.
2025-10-01 21:17:49 +02:00
bool
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
extComputeCapLW(rlengthptr, rwidthptr)
int *rlengthptr, *rwidthptr;
{
LinkedBoundary *lb;
Rect bbox;
/* Quick algorithm---ignore tabs, compute max extents of */
/* the special bounds vector. */
lb = extSpecialBounds[0];
if (lb == NULL)
{
TxError("extract: Can't get capacitor L and W\n");
A number of changes: 1) Corrected spurious error messages about cells already existing in GDS when using "flatten" or "flatglob". 2) Fixed handling of resistance as a subcircuit parameter 3) Added area and perimeter resistance for a device; this is done through the "devresist" statement in the tech file, which is an extension of the original "fetresist" statement. Where "fetresist" only supported type "linear", "devresist" supports types "area" and "perimeter". 4) Support for CDL syntax, including generating subcircuit-like parameters for components starting with SPICE-standard prefixes like M, R, C, etc., adding "/" between pins and subcircuit name, and saving the file as ".cdl" instead of ".spice". 5) Estimated L and W for devices whose geometry is complex and do not reduce to a simple rectangle. L and W are estimated as the square root of the area. 6) Changed the method of extracting L and W for diodes to use the same method as capacitors. Note that diodes are not usually specified by L and W, but if they are, this will produce the right result. 7) Corrected the reported filename and line number when printing error messages related to errors inside a technology file, when the technology file uses "include" to combine multiple files.
2025-10-01 21:17:49 +02:00
return FALSE; /* error condition */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
bbox = lb->r;
for (lb = extSpecialBounds[0]; lb != NULL; lb = lb->b_next)
GeoIncludeAll(&lb->r, &bbox);
*rwidthptr = bbox.r_xtop - bbox.r_xbot;
*rlengthptr = bbox.r_ytop - bbox.r_ybot;
A number of changes: 1) Corrected spurious error messages about cells already existing in GDS when using "flatten" or "flatglob". 2) Fixed handling of resistance as a subcircuit parameter 3) Added area and perimeter resistance for a device; this is done through the "devresist" statement in the tech file, which is an extension of the original "fetresist" statement. Where "fetresist" only supported type "linear", "devresist" supports types "area" and "perimeter". 4) Support for CDL syntax, including generating subcircuit-like parameters for components starting with SPICE-standard prefixes like M, R, C, etc., adding "/" between pins and subcircuit name, and saving the file as ".cdl" instead of ".spice". 5) Estimated L and W for devices whose geometry is complex and do not reduce to a simple rectangle. L and W are estimated as the square root of the area. 6) Changed the method of extracting L and W for diodes to use the same method as capacitors. Note that diodes are not usually specified by L and W, but if they are, this will produce the right result. 7) Corrected the reported filename and line number when printing error messages related to errors inside a technology file, when the technology file uses "include" to combine multiple files.
2025-10-01 21:17:49 +02:00
return TRUE;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
/*
*----------------------------------------------------------------------
*
* extComputeEffectiveLW --
*
* Determine effective length and width of an annular (or otherwise
* non-rectangular) transistor structure, based on the boundary vectors
* stored in extSpecialBounds.
*
* Note that "L" and "W" are reversed when this routine is called
* to compute L and W for a resistor. The sense of "length" and
* "width" as used in the routine are appropriate for a transistor.
*
* Also note that this algorithm will tend to over-estimate the width
* of transistors with angled bends. This problem would be eliminated
* if non-Manhattan geometry were evaluated directly rather than being
* first converted to Manhattan geometry.
*
* Results:
* None.
*
* Side Effects:
* Puts effective length and width into the pointers
* passed as arguments.
*----------------------------------------------------------------------
*/
void
extComputeEffectiveLW(rlengthptr, rwidthptr, numregions, chop)
int *rlengthptr, *rwidthptr;
int numregions;
float chop;
{
int i, j, p, jmax;
LinkedBoundary *lb, *lb2;
int oppdir, length, loclength, testlen, width;
int locwidth, testwid, cornerw;
int segp, segn, segc, sege;
bool isComplex = FALSE;
/* First, check for MOScap-connected transistors. In such
* cases, one or more extSpecialBounds[] is NULL. Try to
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
* separate the existing extSpecialBounds[] vectors into
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
* independent (non-connecting) vectors.
*/
/* For each segment in the primary list, find the closest
* segment in the other list which lies on the opposite
* side of the gate area. Calculate the length, and check
* for overlap, treating the length as a corner extension.
*
* The primary list is chosen as the one with the largest
* number of elements. This helps prevent the algorithm from
* producing a different result for devices at different
* orientations.
*/
p = 0;
jmax = 0;
for (i = 0; i < numregions; i++)
{
j = 0;
for (lb = extSpecialBounds[i]; lb != NULL; lb = lb->b_next) j++;
if (j > jmax)
{
jmax = j;
p = i;
}
}
/* fprintf(stderr, "Annular transistor detailed L,W computation:\n"); */
width = 0;
length = 0;
for (lb = extSpecialBounds[p]; lb != NULL; lb = lb->b_next)
{
loclength = INFINITY;
switch (lb->dir)
{
case BD_LEFT: oppdir = BD_RIGHT; break;
case BD_RIGHT: oppdir = BD_LEFT; break;
case BD_TOP: oppdir = BD_BOTTOM; break;
case BD_BOTTOM: oppdir = BD_TOP; break;
ExtBasic.c: oppdir, The right operand of '==' is a garbage value BD_xxxxx are a bitmask. So it makes sense due to equality check to set to zero so it becomes a no-op situation. I assume lb->dir not matching one of the 4 BD_xxxxx labels would be a data error anyway and should never occur. SonarCloud The right operand of '==' is a garbage value https://sonarcloud.io/project/issues?open=AZJB16p0NGfDNup0RiW9&id=dlmiles_magic
2024-10-04 21:15:29 +02:00
default: ASSERT(FALSE, "oppdir"); /* should never happen */
oppdir = 0; break;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
/* First pass: Find the distance of the closest segment within */
/* the range of its corner extension. We do two passes because */
/* there may be more than one segment at this distance. */
for (i = 0; i < numregions; i++)
{
if ((i == p) && (numregions > 1)) continue;
for (lb2 = extSpecialBounds[i]; lb2 != NULL; lb2 = lb2->b_next)
{
if (lb2->dir == oppdir)
{
switch (lb->dir)
{
case BD_LEFT:
if (lb2->r.r_xbot > lb->r.r_xbot)
{
testlen = lb2->r.r_xbot - lb->r.r_xbot;
if (lb2->r.r_ybot < lb->r.r_ytop + testlen &&
lb2->r.r_ytop > lb->r.r_ybot - testlen)
{
/* Adjustments for offset segments */
if (lb2->r.r_ybot > lb->r.r_ytop)
testlen += lb2->r.r_ybot - lb->r.r_ytop;
else if (lb2->r.r_ytop < lb->r.r_ybot)
testlen += lb->r.r_ybot - lb2->r.r_ytop;
if (testlen < loclength) loclength = testlen;
}
}
break;
case BD_RIGHT:
if (lb2->r.r_xtop < lb->r.r_xtop)
{
testlen = lb->r.r_xtop - lb2->r.r_xtop;
if (lb2->r.r_ybot < lb->r.r_ytop + testlen &&
lb2->r.r_ytop > lb->r.r_ybot - testlen)
{
/* Adjustments for offset segments */
if (lb2->r.r_ybot > lb->r.r_ytop)
testlen += lb2->r.r_ybot - lb->r.r_ytop;
else if (lb2->r.r_ytop < lb->r.r_ybot)
testlen += lb->r.r_ybot - lb2->r.r_ytop;
if (testlen < loclength) loclength = testlen;
}
}
break;
case BD_TOP:
if (lb2->r.r_ytop < lb->r.r_ytop)
{
testlen = lb->r.r_ytop - lb2->r.r_ytop;
if (lb2->r.r_xbot < lb->r.r_xtop + testlen &&
lb2->r.r_xtop > lb->r.r_xbot - testlen)
{
/* Adjustments for offset segments */
if (lb2->r.r_xbot > lb->r.r_xtop)
testlen += lb2->r.r_xbot - lb->r.r_xtop;
else if (lb2->r.r_xtop < lb->r.r_xbot)
testlen += lb->r.r_xbot - lb2->r.r_xtop;
if (testlen < loclength) loclength = testlen;
}
}
break;
case BD_BOTTOM:
if (lb2->r.r_ybot > lb->r.r_ybot)
{
testlen = lb2->r.r_ybot - lb->r.r_ybot;
if (lb2->r.r_xbot < lb->r.r_xtop + testlen &&
lb2->r.r_xtop > lb->r.r_xbot - testlen)
{
/* Adjustments for offset segments */
if (lb2->r.r_xbot > lb->r.r_xtop)
testlen += lb2->r.r_xbot - lb->r.r_xtop;
else if (lb2->r.r_xtop < lb->r.r_xbot)
testlen += lb->r.r_xbot - lb2->r.r_xtop;
if (testlen < loclength) loclength = testlen;
}
}
break;
}
}
}
}
/* This segment should not be considered current-carrying; it */
/* only adds to the gate capacitance. Should we output the */
/* extra capacitance somewhere? */
if (loclength == INFINITY) continue;
/* Note that the L/W calculation ignores the possibility that a */
/* transistor may have multiple lengths. Such cases should */
/* either 1) scale the width to one of the lengths, or 2) out- */
/* put a separate transistor record for each length. */
if (length == 0)
length = loclength; /* Default length */
else if ((length != 0) && (length != loclength))
{
/* If the newly computed length is less than the */
/* original, scale the original. Otherwise, scale */
/* the new length. */
if (loclength < length)
{
width *= loclength;
width /= length;
length = loclength;
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
isComplex = TRUE;
}
/* fprintf(stderr, " segment length = %d\n", loclength); */
/* Second pass: All segments at "length" distance add to the */
/* length and width calculation. Sides opposite and corner */
/* extensions are treated separately. Areas outside the corner */
/* extension are ignored. */
locwidth = 0;
cornerw = 0;
for (i = 0; i < numregions; i++)
{
if ((i == p) && (numregions > 1)) continue;
for (lb2 = extSpecialBounds[i]; lb2 != NULL; lb2 = lb2->b_next)
{
if (lb2->dir == oppdir)
{
if (((lb->dir == BD_LEFT) &&
(lb2->r.r_xbot - lb->r.r_xbot == loclength)) ||
((lb->dir == BD_RIGHT) &&
(lb->r.r_xtop - lb2->r.r_xtop == loclength)))
{
/* opposite */
segp = MIN(lb2->r.r_ytop, lb->r.r_ytop);
segn = MAX(lb2->r.r_ybot, lb->r.r_ybot);
testwid = segp - segn;
if (testwid > 0) locwidth += testwid * 2;
if (testwid <= -loclength) continue;
/* corner extend top */
segc = MAX(lb2->r.r_ytop, lb->r.r_ytop);
sege = MAX(segp, segn);
testwid = segc - sege;
if (testwid > loclength) testwid = loclength;
if (testwid > 0) cornerw += testwid;
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/* corner extend bottom */
segc = MIN(lb2->r.r_ybot, lb->r.r_ybot);
sege = MIN(segp, segn);
testwid = sege - segc;
if (testwid > loclength) testwid = loclength;
if (testwid > 0) cornerw += testwid;
}
else if (((lb->dir == BD_TOP) &&
(lb->r.r_ytop - lb2->r.r_ytop == loclength)) ||
((lb->dir == BD_BOTTOM) &&
(lb2->r.r_ybot - lb->r.r_ybot == loclength)))
{
/* opposite */
segp = MIN(lb2->r.r_xtop, lb->r.r_xtop);
segn = MAX(lb2->r.r_xbot, lb->r.r_xbot);
testwid = segp - segn;
if (testwid > 0) locwidth += testwid * 2;
if (testwid <= -loclength) continue;
/* corner extend right */
segc = MAX(lb2->r.r_xtop, lb->r.r_xtop);
sege = MAX(segp, segn);
testwid = segc - sege;
if (testwid > loclength) testwid = loclength;
if (testwid > 0) cornerw += testwid;
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/* corner extend left */
segc = MIN(lb2->r.r_xbot, lb->r.r_xbot);
sege = MIN(segp, segn);
testwid = sege - segc;
if (testwid > loclength) testwid = loclength;
if (testwid > 0) cornerw += testwid;
}
}
}
}
/* if (width > 0)
fprintf(stderr, " segment width = %d\n", width); */
/* Width scaling for transistor sections with different lengths */
locwidth += (int)(0.5 + ((float)cornerw * chop));
if (loclength != length)
{
locwidth *= length;
locwidth /= loclength;
}
width += locwidth;
}
if ((length > 0) && (width > 0))
{
*rlengthptr = length;
// If numregions == 1 then everything was put in one record,
// and we have double-counted the width.
if (numregions == 1)
*rwidthptr = (width >> 2);
else
*rwidthptr = (width >> 1);
/* fprintf(stderr, "total L = %d, W = %d\n", length, width); */
/* fflush(stderr); */
if (isComplex)
TxError("Device has multiple lengths: scaling"
" all widths to length %d\n", length);
}
}
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*
* ----------------------------------------------------------------------------
*
* extSeparateBounds --
*
* Because the non-source/drain perimeter is not a node, all the
* boundary vectors end up in one record. So we have to pry them
* apart.
*
* Results:
* None.
*
* Side effects:
* Messes with the extSpecialBounds[] linked lists.
*
* ----------------------------------------------------------------------------
*/
void
extSeparateBounds(nterm)
int nterm; /* last terminal (# terminals - 1) */
{
Rect lbrect;
LinkedBoundary *lb, *lbstart, *lbend, *lblast, *lbnext;
bool found;
/* Avoid crash condition on a badly-defined extract definition */
if ((nterm < 0) || (extSpecialBounds[0] == NULL)) return;
if (extSpecialBounds[nterm] == NULL)
{
/* Put first record into the unused terminal entry */
extSpecialBounds[nterm] = extSpecialBounds[0];
extSpecialBounds[0] = extSpecialBounds[nterm]->b_next;
extSpecialBounds[nterm]->b_next = NULL;
/* Add connected segments until no more are found */
lbstart = lbend = extSpecialBounds[nterm];
lbrect = lbstart->r;
found = TRUE;
while (found == TRUE)
{
lblast = NULL;
found = FALSE;
for (lb = extSpecialBounds[0]; lb != NULL; lb = lbnext)
{
/* perhaps we should cut down on these cases by */
/* checking the direction of the segment. . . */
lbnext = lb->b_next;
if (((lb->r.r_xbot == lbrect.r_xbot) &&
(lb->r.r_ybot == lbrect.r_ybot)))
{
if (lblast == NULL)
extSpecialBounds[0] = lb->b_next;
else
lblast->b_next = lb->b_next;
// Insert lb after lbstart
lb->b_next = lbstart->b_next;
lbstart->b_next = lb;
lbstart = lb;
lbrect.r_xbot = lb->r.r_xtop;
lbrect.r_ybot = lb->r.r_ytop;
found = TRUE;
}
else if (((lb->r.r_xtop == lbrect.r_xbot) &&
(lb->r.r_ytop == lbrect.r_ybot)))
{
if (lblast == NULL)
extSpecialBounds[0] = lb->b_next;
else
lblast->b_next = lb->b_next;
lb->b_next = lbstart->b_next;
lbstart->b_next = lb;
lbstart = lb;
lbrect.r_xbot = lb->r.r_xbot;
lbrect.r_ybot = lb->r.r_ybot;
found = TRUE;
}
else if (((lb->r.r_xtop == lbrect.r_xtop) &&
(lb->r.r_ytop == lbrect.r_ytop)))
{
if (lblast == NULL)
extSpecialBounds[0] = lb->b_next;
else
lblast->b_next = lb->b_next;
lb->b_next = lbend->b_next;
lbend->b_next = lb;
lbend = lb;
lbrect.r_xtop = lb->r.r_xbot;
lbrect.r_ytop = lb->r.r_ybot;
found = TRUE;
}
else if (((lb->r.r_xbot == lbrect.r_xtop) &&
(lb->r.r_ybot == lbrect.r_ytop)))
{
if (lblast == NULL)
extSpecialBounds[0] = lb->b_next;
else
lblast->b_next = lb->b_next;
lb->b_next = lbend->b_next;
lbend->b_next = lb;
lbend = lb;
lbrect.r_xtop = lb->r.r_xtop;
lbrect.r_ytop = lb->r.r_ytop;
found = TRUE;
}
else
lblast = lb;
}
}
}
}
/*
* ----------------------------------------------------------------------------
*
* extOutputParameters --
*
* Scan through the TransRegion in the supplied list, and collect a mask of
* all transistor types used in the layout. Then for each transistor type,
* find if it belongs to a "subcircuit" (including "rsubcircuit" and
* "msubcircuit") definition. If it does, output a record containing the
* list of parameter names used by that subcircuit.
*
* Results:
* None.
*
* Side effects:
* Possibly writes to outFile. The purpose of this scan is not to have
* to write out shared parameter information for every individual device.
* ----------------------------------------------------------------------------
*/
void
extOutputParameters(def, transList, outFile)
CellDef *def; /* Cell being extracted */
TransRegion *transList; /* Transistor regions built up in first pass */
FILE *outFile; /* Output file */
{
ParamList *plist;
TransRegion *reg;
TileType t;
TileTypeBitMask tmask;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
ExtDevice *devptr;
Modified behavior of the "property device" value. It was previously ignoring the parameters of the entire cell including the device being overridden by the property, causing the output to be wrong. The parameters should always be written out to the .ext file, including the device whose output is being overridden.
2024-11-19 22:16:48 +01:00
bool propfound = FALSE;
char *propptr;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
TTMaskZero(&tmask);
for (reg = transList; reg && !SigInterruptPending; reg = reg->treg_next)
{
TileType loctype = reg->treg_type;
Set of changes updating version 8.2 to the level of 8.1, since 8.2 development had been halted since it was first created back in April. Version 8.2 is now the official development version, with the first development push to create a Cairo graphics interface.
2017-08-02 04:14:42 +02:00
if (loctype == TT_SPACE) continue; /* This has been disabled */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/* Watch for rare split reg->treg_type */
if (loctype & TT_DIAGONAL)
loctype = (reg->treg_type & TT_SIDE) ? ((reg->treg_type &
TT_RIGHTMASK) >> 14) : (reg->treg_type & TT_LEFTMASK);
TTMaskSetType(&tmask, loctype);
}
Modified behavior of the "property device" value. It was previously ignoring the parameters of the entire cell including the device being overridden by the property, causing the output to be wrong. The parameters should always be written out to the .ext file, including the device whose output is being overridden.
2024-11-19 22:16:48 +01:00
/* Check for the presence of property "device" followed by a device type
* and device name, and if detected, add the type corresponding to the
* device name to the mask so it gets handled, too.
*/
propptr = DBPropGet(def, "device", &propfound);
if (propfound)
{
char *devname;
devname = propptr;
while (!isspace(*devname)) devname++;
if (*devname != '\0')
while (isspace(*devname)) devname++;
if (*devname != '\0')
{
char replace = *(devname + strlen(devname));
*(devname + strlen(devname)) = '\0';
/* This is dreadfully inefficient but happens only once */
for (t = TT_TECHDEPBASE; t < DBNumTypes; t++)
{
for (devptr = ExtCurStyle->exts_device[t]; devptr;
devptr = devptr->exts_next)
{
if (!strcmp(devptr->exts_deviceName, devname))
{
TTMaskSetType(&tmask, t);
break;
}
}
}
*(devname + strlen(devname)) = replace;
}
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
for (t = TT_TECHDEPBASE; t < DBNumTypes; t++)
{
if (TTMaskHasType(&tmask, t))
{
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
/* Note: If there are multiple variants of a device type, they */
/* will all be listed even if they are not all present in the */
/* design. */
for (devptr = ExtCurStyle->exts_device[t]; devptr; devptr = devptr->exts_next)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
Added a new method to the extraction which allows parameter limits to be declared for each device model, so that different models can be specified for different parameter ranges. For example, this will simplify the definition of the high-sheet-rho poly resistors and the bipolar transistors in sky130 by removing the need for ID marker layers; it also allows the correct device model to be extracted when reading data from GDS that does not contain the extra (and not foundry-approved) ID markers.
2023-07-06 18:35:47 +02:00
bool has_output = FALSE;
Also added code to not put parameters for a device marked "Ignore" into the .ext file, in case such devices were assigned parameters.
2020-10-26 18:12:18 +01:00
/* Do not output parameters for ignored devices */
if (!strcmp(devptr->exts_deviceName, "Ignore")) continue;
Added a new method to the extraction which allows parameter limits to be declared for each device model, so that different models can be specified for different parameter ranges. For example, this will simplify the definition of the high-sheet-rho poly resistors and the bipolar transistors in sky130 by removing the need for ID marker layers; it also allows the correct device model to be extracted when reading data from GDS that does not contain the extra (and not foundry-approved) ID markers.
2023-07-06 18:35:47 +02:00
/* Do a quick first pass to determine if there is anything
* to output (only entries with non-NULL pl_name get output).
*/
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
plist = devptr->exts_deviceParams;
Added a new method to the extraction which allows parameter limits to be declared for each device model, so that different models can be specified for different parameter ranges. For example, this will simplify the definition of the high-sheet-rho poly resistors and the bipolar transistors in sky130 by removing the need for ID marker layers; it also allows the correct device model to be extracted when reading data from GDS that does not contain the extra (and not foundry-approved) ID markers.
2023-07-06 18:35:47 +02:00
for (; plist != NULL; plist = plist->pl_next)
if (plist->pl_name != NULL)
{
has_output = TRUE;
break;
}
if (has_output)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
fprintf(outFile, "parameters %s", devptr->exts_deviceName);
Added a new method to the extraction which allows parameter limits to be declared for each device model, so that different models can be specified for different parameter ranges. For example, this will simplify the definition of the high-sheet-rho poly resistors and the bipolar transistors in sky130 by removing the need for ID marker layers; it also allows the correct device model to be extracted when reading data from GDS that does not contain the extra (and not foundry-approved) ID markers.
2023-07-06 18:35:47 +02:00
plist = devptr->exts_deviceParams;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
for (; plist != NULL; plist = plist->pl_next)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
Added a new method to the extraction which allows parameter limits to be declared for each device model, so that different models can be specified for different parameter ranges. For example, this will simplify the definition of the high-sheet-rho poly resistors and the bipolar transistors in sky130 by removing the need for ID marker layers; it also allows the correct device model to be extracted when reading data from GDS that does not contain the extra (and not foundry-approved) ID markers.
2023-07-06 18:35:47 +02:00
if (plist->pl_name == NULL) continue;
else if (plist->pl_param[1] != '\0')
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
{
if (plist->pl_scale != 1.0)
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
fprintf(outFile, " %c%c=%s*%g",
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
plist->pl_param[0], plist->pl_param[1],
plist->pl_name, plist->pl_scale);
Extended the device parameter notation to include offsets using '+' and '-' in the same way that '*' is currently used for specifying a parameter scaling. The combination of a scale and offset for the same parameter has not (yet) been implemented.
2023-06-22 02:44:38 +02:00
else if (plist->pl_offset != 0.0)
Corrected the extraction offset, in which a parameter like "l" can provide a delta offset such as "l+0.06", indicating that the extraction model has a length larger than the drawn device. Previously the value was assumed to be in microns but did not scale between the .ext file and the SPICE netlist. Corrected so that it scales like the other parameter values, being converted to internal units and tracking the internal grid scale.
2023-10-25 02:29:04 +02:00
fprintf(outFile, " %c%c=%s%+d",
Extended the device parameter notation to include offsets using '+' and '-' in the same way that '*' is currently used for specifying a parameter scaling. The combination of a scale and offset for the same parameter has not (yet) been implemented.
2023-06-22 02:44:38 +02:00
plist->pl_param[0], plist->pl_param[1],
plist->pl_name, plist->pl_offset);
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
else
fprintf(outFile, " %c%c=%s", plist->pl_param[0],
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
plist->pl_param[1], plist->pl_name);
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
}
else
{
if (plist->pl_scale != 1.0)
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
fprintf(outFile, " %c=%s*%g",
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
plist->pl_param[0],
plist->pl_name, plist->pl_scale);
Corrected a typo in the previous commit that causes parameters to be output twice for scaled devices (such as diodes in the sky130 process). Above and beyond the typo, though, the implementation of offsets is not very well thought out and needs to be revised. For one, the +/- notation can be confused with signs in the parameter expression; that is also fixed in this commit. But there is currently no way to express both a scale and an offset for a device parameter.
2023-06-23 14:39:59 +02:00
else if (plist->pl_offset != 0.0)
Corrected the extraction offset, in which a parameter like "l" can provide a delta offset such as "l+0.06", indicating that the extraction model has a length larger than the drawn device. Previously the value was assumed to be in microns but did not scale between the .ext file and the SPICE netlist. Corrected so that it scales like the other parameter values, being converted to internal units and tracking the internal grid scale.
2023-10-25 02:29:04 +02:00
fprintf(outFile, " %c=%s%+d",
Extended the device parameter notation to include offsets using '+' and '-' in the same way that '*' is currently used for specifying a parameter scaling. The combination of a scale and offset for the same parameter has not (yet) been implemented.
2023-06-22 02:44:38 +02:00
plist->pl_param[0],
plist->pl_name, plist->pl_offset);
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
else
fprintf(outFile, " %c=%s", plist->pl_param[0],
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
plist->pl_name);
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
fprintf(outFile, "\n");
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
}
}
}
}
/*
* ----------------------------------------------------------------------------
*
* extOutputDevParams ---
*
* Write information to the output in the form of parameters
* representing pre-defined aspects of the device geometry
* that may be specified for any device.
*
* Results:
* None.
*
* Side effects:
* Writes non-terminated output to the file 'outFile'.
*
* ----------------------------------------------------------------------------
*/
void
Extended the device parameters to allow a terminal width that is different from the device (i.e., gate) width, for devices that do not define a MOS-like gate spanning the width of the device. This is restricted to the assumption that the terminal is rectangular and therefore a simple width and length can be derived from the area and perimeter. Also, length is defined as the smaller dimension and width as the larger dimension. For additional restrictions, see the updated documentation. This was added to allow correct width and length extraction of a bipolar emitter window, but may be more generally useful.
2024-12-06 22:42:43 +01:00
extOutputDevParams(reg, devptr, outFile, length, width, areavec, perimvec)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
TransRegion *reg;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
ExtDevice *devptr;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
FILE *outFile;
int length;
int width;
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
int *areavec;
Extended the device parameters to allow a terminal width that is different from the device (i.e., gate) width, for devices that do not define a MOS-like gate spanning the width of the device. This is restricted to the assumption that the terminal is rectangular and therefore a simple width and length can be derived from the area and perimeter. Also, length is defined as the smaller dimension and width as the larger dimension. For additional restrictions, see the updated documentation. This was added to allow correct width and length extraction of a bipolar emitter window, but may be more generally useful.
2024-12-06 22:42:43 +01:00
int *perimvec;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
ParamList *chkParam;
A number of changes: 1) Corrected spurious error messages about cells already existing in GDS when using "flatten" or "flatglob". 2) Fixed handling of resistance as a subcircuit parameter 3) Added area and perimeter resistance for a device; this is done through the "devresist" statement in the tech file, which is an extension of the original "fetresist" statement. Where "fetresist" only supported type "linear", "devresist" supports types "area" and "perimeter". 4) Support for CDL syntax, including generating subcircuit-like parameters for components starting with SPICE-standard prefixes like M, R, C, etc., adding "/" between pins and subcircuit name, and saving the file as ".cdl" instead of ".spice". 5) Estimated L and W for devices whose geometry is complex and do not reduce to a simple rectangle. L and W are estimated as the square root of the area. 6) Changed the method of extracting L and W for diodes to use the same method as capacitors. Note that diodes are not usually specified by L and W, but if they are, this will produce the right result. 7) Corrected the reported filename and line number when printing error messages related to errors inside a technology file, when the technology file uses "include" to combine multiple files.
2025-10-01 21:17:49 +02:00
HashEntry *he;
ResValue resvalue;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
for (chkParam = devptr->exts_deviceParams; chkParam
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
!= NULL; chkParam = chkParam->pl_next)
{
Added a new method to the extraction which allows parameter limits to be declared for each device model, so that different models can be specified for different parameter ranges. For example, this will simplify the definition of the high-sheet-rho poly resistors and the bipolar transistors in sky130 by removing the need for ID marker layers; it also allows the correct device model to be extracted when reading data from GDS that does not contain the extra (and not foundry-approved) ID markers.
2023-07-06 18:35:47 +02:00
if (chkParam->pl_name == NULL) continue;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
switch(tolower(chkParam->pl_param[0]))
{
case 'a':
if (chkParam->pl_param[1] == '\0' ||
chkParam->pl_param[1] == '0')
fprintf(outFile, " %c=%d", chkParam->pl_param[0],
reg->treg_area);
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
/* Note: a1, a2, etc., are standard output */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
break;
case 'p':
if (chkParam->pl_param[1] == '\0' ||
chkParam->pl_param[1] == '0')
fprintf(outFile, " %c=%d", chkParam->pl_param[0],
extTransRec.tr_perim);
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
/* Note: p1, p2, etc., are standard output */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
break;
case 'l':
Implemented simple drain and source length calculations as device parameters l1 and l2. Provides a way to pass the source or drain length as a parameter for, for example, an extended FET drain implemented as a resistor abutting the FET gate. Could potentially be used as a way to determine source/drain area and perimeter without resorting to measurements of a shared node.
2022-12-15 03:40:24 +01:00
if (chkParam->pl_param[1] == '\0' ||
chkParam->pl_param[1] == '0')
fprintf(outFile, " %c=%d", chkParam->pl_param[0],
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
length);
Implemented simple drain and source length calculations as device parameters l1 and l2. Provides a way to pass the source or drain length as a parameter for, for example, an extended FET drain implemented as a resistor abutting the FET gate. Could potentially be used as a way to determine source/drain area and perimeter without resorting to measurements of a shared node.
2022-12-15 03:40:24 +01:00
else if (chkParam->pl_param[1] > '0' && chkParam->pl_param[1] <= '9')
{
int tidx = chkParam->pl_param[1] - '1';
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
/* output length of terminal, assuming a rectangular
* shape, as simplified terminal area / width
*/
Implemented simple drain and source length calculations as device parameters l1 and l2. Provides a way to pass the source or drain length as a parameter for, for example, an extended FET drain implemented as a resistor abutting the FET gate. Could potentially be used as a way to determine source/drain area and perimeter without resorting to measurements of a shared node.
2022-12-15 03:40:24 +01:00
fprintf(outFile, " %c%c=%d", chkParam->pl_param[0],
chkParam->pl_param[1],
Additional coding to handle discovery of terminal types on different planes of a device that are connected to a multi-tile device. This is a more general solution than previously coded, in which only the first tile of a device would be searched for terminals on other planes, which was only guaranteed to work if the device was represented by a single tile.
2024-12-07 02:51:59 +01:00
((width == 0) ? 0 : areavec[tidx] / width));
Implemented simple drain and source length calculations as device parameters l1 and l2. Provides a way to pass the source or drain length as a parameter for, for example, an extended FET drain implemented as a resistor abutting the FET gate. Could potentially be used as a way to determine source/drain area and perimeter without resorting to measurements of a shared node.
2022-12-15 03:40:24 +01:00
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
break;
case 'w':
Extended the device parameters to allow a terminal width that is different from the device (i.e., gate) width, for devices that do not define a MOS-like gate spanning the width of the device. This is restricted to the assumption that the terminal is rectangular and therefore a simple width and length can be derived from the area and perimeter. Also, length is defined as the smaller dimension and width as the larger dimension. For additional restrictions, see the updated documentation. This was added to allow correct width and length extraction of a bipolar emitter window, but may be more generally useful.
2024-12-06 22:42:43 +01:00
if (chkParam->pl_param[1] == '\0' ||
chkParam->pl_param[1] == '0')
fprintf(outFile, " %c=%d", chkParam->pl_param[0],
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
width);
Extended the device parameters to allow a terminal width that is different from the device (i.e., gate) width, for devices that do not define a MOS-like gate spanning the width of the device. This is restricted to the assumption that the terminal is rectangular and therefore a simple width and length can be derived from the area and perimeter. Also, length is defined as the smaller dimension and width as the larger dimension. For additional restrictions, see the updated documentation. This was added to allow correct width and length extraction of a bipolar emitter window, but may be more generally useful.
2024-12-06 22:42:43 +01:00
else if (chkParam->pl_param[1] > '0' && chkParam->pl_param[1] <= '9')
{
int tidx = chkParam->pl_param[1] - '1';
/* NOTE: For a MOSFET, the gate width is the terminal
* width, and only "w" should be used as a parameter.
* For other devices, "w" with an index indicates that
* the device width is *not* the gate width. Since only
* the device area is maintained, then in this case the
* terminal must be a single rectangle, from which the
* length and width are extracted as the length of the
* short and long sides, respectively. This changes the
* value "width"; therefore, "w" with a suffix should
* come before "l" with a suffix in the device line in
* the tech file, since the "l" value will be derived
* from the area and width.
*/
double newwidth = (double)(perimvec[tidx] * perimvec[tidx]);
newwidth -= (double)(16 * areavec[tidx]);
newwidth = sqrt(newwidth);
newwidth += perimvec[tidx];
width = (int)(0.25 * newwidth);
fprintf(outFile, " %c%c=%d", chkParam->pl_param[0],
chkParam->pl_param[1], width);
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
break;
case 'c':
fprintf(outFile, " %c=%g", chkParam->pl_param[0],
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
(extTransRec.tr_devrec->exts_deviceGateCap
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
* reg->treg_area) +
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
(extTransRec.tr_devrec->exts_deviceSDCap
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
* extTransRec.tr_perim));
break;
A number of changes: 1) Corrected spurious error messages about cells already existing in GDS when using "flatten" or "flatglob". 2) Fixed handling of resistance as a subcircuit parameter 3) Added area and perimeter resistance for a device; this is done through the "devresist" statement in the tech file, which is an extension of the original "fetresist" statement. Where "fetresist" only supported type "linear", "devresist" supports types "area" and "perimeter". 4) Support for CDL syntax, including generating subcircuit-like parameters for components starting with SPICE-standard prefixes like M, R, C, etc., adding "/" between pins and subcircuit name, and saving the file as ".cdl" instead of ".spice". 5) Estimated L and W for devices whose geometry is complex and do not reduce to a simple rectangle. L and W are estimated as the square root of the area. 6) Changed the method of extracting L and W for diodes to use the same method as capacitors. Note that diodes are not usually specified by L and W, but if they are, this will produce the right result. 7) Corrected the reported filename and line number when printing error messages related to errors inside a technology file, when the technology file uses "include" to combine multiple files.
2025-10-01 21:17:49 +02:00
case 'r':
/* If the device has an "area" resistance specified
* by "devresist" in the tech file, use that. If
* it has a "perimeter" resistance specified, use
* that as well. If neither, then find the sheet
* resistance of the device identifier layer and
* use that.
*/
resvalue = (ResValue)0.0;
he = HashLookOnly(&extTransRec.tr_devrec->exts_deviceResist, "area");
if (he != NULL)
{
resvalue = (ResValue)(pointertype)HashGetValue(he);
resvalue /= (ResValue)reg->treg_area;
he = HashLookOnly(&extTransRec.tr_devrec->exts_deviceResist,
"perimeter");
if (he != NULL)
{
ResValue perimr;
perimr = (ResValue)(pointertype)HashGetValue(he);
perimr /= (ResValue)extTransRec.tr_perim;
resvalue += perimr;
}
}
else
{
resvalue = ExtCurStyle->exts_sheetResist[reg->treg_type]
* (double)length / (double)width;
}
fprintf(outFile, " %c=%g", chkParam->pl_param[0], (float)resvalue);
break;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
case 's':
case 'x':
case 'y':
/* Do nothing; these values are standard output */
break;
default:
fprintf(outFile, " %c=", chkParam->pl_param[0]);
break;
}
}
}
Added code to calculate area and perimeter of layers that are not on the same plane as a device identifier layer. This (finally!) allows proper calculation of area and perimeter of diodes and bipolars, for example.
2023-06-09 21:31:58 +02:00
/* Structures used by extTermAPFunc() for storing area and perimeter data */
typedef struct _nodelist {
struct _nodelist *nl_next;
NodeRegion *nl_node;
} ExtNodeList;
typedef struct _extareaperimdata {
int eapd_area;
int eapd_perim;
TileTypeBitMask eapd_mask;
TileTypeBitMask *eapd_gatemask;
NodeRegion *eapd_gatenode;
ExtNodeList *eapd_shared;
} ExtAreaPerimData;
Added a new method to the extraction which allows parameter limits to be declared for each device model, so that different models can be specified for different parameter ranges. For example, this will simplify the definition of the high-sheet-rho poly resistors and the bipolar transistors in sky130 by removing the need for ID marker layers; it also allows the correct device model to be extracted when reading data from GDS that does not contain the extra (and not foundry-approved) ID markers.
2023-07-06 18:35:47 +02:00
/*
* ----------------------------------------------------------------------------
*
* extDevFindParamMatch --
*
* Routine which checks parameter values of a device against parameter
* ranges specified for the device model. If the parameters of the
* current device do not match the ranges, then another device record
* with matching parameters will be sought, and returned if found.
* If no device with matching parameters is found, then the original
* device record is returned, and a warning about parameter mismatch
* is printed.
*
* When looking for alternate parameter ranges, all other parameter
* record values must be the same as the current one. A record with
* no range (min > max) always matches.
*
* Return value:
* Pointer to a device record.
*
* ----------------------------------------------------------------------------
*/
ExtDevice *
extDevFindParamMatch(devptr, length, width)
ExtDevice *devptr;
int length; /* Computed effective length of device */
int width; /* Computed effective width of device */
{
ExtDevice *newdevptr, *nextdev;
int i;
while (TRUE)
{
ParamList *chkParam;
bool out_of_bounds = FALSE;
newdevptr = devptr;
nextdev = devptr->exts_next;
for (chkParam = devptr->exts_deviceParams; chkParam != NULL;
chkParam = chkParam->pl_next)
{
if (chkParam->pl_minimum > chkParam->pl_maximum) continue;
switch (tolower(chkParam->pl_param[0]))
{
case 'a':
if (chkParam->pl_param[1] == '\0' ||
chkParam->pl_param[1] == '0')
{
int area = length * width;
if (area < chkParam->pl_minimum) out_of_bounds = TRUE;
if (area > chkParam->pl_maximum) out_of_bounds = TRUE;
}
else
{
int tidx = chkParam->pl_param[1] - '1';
int area = extTransRec.tr_termarea[tidx];
if (area < chkParam->pl_minimum) out_of_bounds = TRUE;
if (area > chkParam->pl_maximum) out_of_bounds = TRUE;
}
break;
case 'p':
if (chkParam->pl_param[1] == '\0' ||
chkParam->pl_param[1] == '0')
{
int perim = 2 * (length + width);
if (perim < chkParam->pl_minimum) out_of_bounds = TRUE;
if (perim > chkParam->pl_maximum) out_of_bounds = TRUE;
}
else
{
int tidx = chkParam->pl_param[1] - '1';
int perim = extTransRec.tr_termperim[tidx];
if (perim < chkParam->pl_minimum) out_of_bounds = TRUE;
if (perim > chkParam->pl_maximum) out_of_bounds = TRUE;
}
break;
case 'l':
if (chkParam->pl_param[1] == '\0' ||
chkParam->pl_param[1] == '0')
{
if (length < chkParam->pl_minimum) out_of_bounds = TRUE;
if (length > chkParam->pl_maximum) out_of_bounds = TRUE;
}
else if (chkParam->pl_param[1] > '0' && chkParam->pl_param[1] <= '9')
{
int tidx = chkParam->pl_param[1] - '1';
int len = extTransRec.tr_termlen[tidx];
if (len < chkParam->pl_minimum) out_of_bounds = TRUE;
if (len > chkParam->pl_maximum) out_of_bounds = TRUE;
}
break;
case 'w':
if (width < chkParam->pl_minimum) out_of_bounds = TRUE;
if (width > chkParam->pl_maximum) out_of_bounds = TRUE;
break;
default:
/* Do nothing; these parameters cannot be used for
* differentiating device models.
*/
break;
}
if (out_of_bounds) break;
}
if (chkParam == NULL) break;
/* Check that the next device record is compatible in all values
* except for parameters and name.
*/
if (nextdev != NULL)
{
if (nextdev->exts_deviceClass != devptr->exts_deviceClass)
nextdev = NULL;
else if (nextdev->exts_deviceSDCount != devptr->exts_deviceSDCount)
nextdev = NULL;
}
if (nextdev != NULL)
{
for (i = 0; i < nextdev->exts_deviceSDCount; i++)
{
if (!TTMaskEqual(&nextdev->exts_deviceSDTypes[i],
&devptr->exts_deviceSDTypes[i]))
{
nextdev = NULL;
break;
}
}
}
if (nextdev != NULL)
if (!TTMaskEqual(&nextdev->exts_deviceSubstrateTypes,
&devptr->exts_deviceSubstrateTypes))
nextdev = NULL;
if (nextdev != NULL)
if (!TTMaskEqual(&nextdev->exts_deviceIdentifierTypes,
&devptr->exts_deviceIdentifierTypes))
nextdev = NULL;
if (nextdev == NULL)
{
newdevptr = devptr; /* Return to original entry */
TxError("Device parameters do not match any extraction model.\n");
break;
}
else
devptr = nextdev;
}
return newdevptr;
}
Additional coding to handle discovery of terminal types on different planes of a device that are connected to a multi-tile device. This is a more general solution than previously coded, in which only the first tile of a device would be searched for terminals on other planes, which was only guaranteed to work if the device was represented by a single tile.
2024-12-07 02:51:59 +01:00
/*
* ----------------------------------------------------------------------------
*
* extSDTileFunc --
*
* Callback function to gather tiles belonging to a multiple-tile device
* region.
*
* Results:
* Always return 0 to keep the search going.
*
* Side effects:
* Allocates memory in the extSpecialDevice linked list.
*
* ----------------------------------------------------------------------------
*/
int
extSDTileFunc(tile, pNum)
Tile *tile;
int pNum;
{
LinkedTile *newdevtile;
newdevtile = (LinkedTile *)mallocMagic(sizeof(LinkedTile));
newdevtile->t = tile;
newdevtile->t_next = extSpecialDevice;
extSpecialDevice = newdevtile;
return 0;
}
Added code to calculate area and perimeter of layers that are not on the same plane as a device identifier layer. This (finally!) allows proper calculation of area and perimeter of diodes and bipolars, for example.
2023-06-09 21:31:58 +02:00
/*
* ----------------------------------------------------------------------------
*
* extTransFindTermArea --
*
* Callback function to find the area and perimeter of a terminal area in
* a plane other than the plane of the device identifier type. This routine
* searches around the first tile of the terminal for all connected terminal
* types and calculates area and perimeter.
*
* Return value:
* Always return 1 to stop the search, because we need only one tile
* under the identifier tile to start the search.
*
* ----------------------------------------------------------------------------
*/
int
extTransFindTermArea(tile, eapd)
Tile *tile;
ExtAreaPerimData *eapd;
{
int extTermAPFunc(); /* Forward declaration */
DBSrConnectOnePlane(tile, DBConnectTbl, extTermAPFunc, (ClientData)eapd);
return 1;
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*
* ----------------------------------------------------------------------------
*
* extOutputDevices --
*
* For each TransRegion in the supplied list, corresponding to a single
* transistor in the layout, compute and output:
* - Its type
* - Its area and perimeter OR length and width OR capacitance OR resistance
* - Its substrate node
* - For each of the gate, and the various diff terminals (eg,
* source, drain):
* Node to which the terminal connects
* Length of the terminal
* Attributes (comma-separated), or 0 if none.
*
* The tiles in 'def' don't point back to the TransRegions in this list,
* but rather to the NodeRegions corresponding to their electrical nodes.
*
* Results:
* None.
*
* Side effects:
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
* Writes a number of 'device' records to the file 'outFile'.
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
*
* Interruptible. If SigInterruptPending is detected, we stop traversing
* the transistor list and return.
*
* ----------------------------------------------------------------------------
*/
void
extOutputDevices(def, transList, outFile)
CellDef *def; /* Cell being extracted */
TransRegion *transList; /* Transistor regions built up in first pass */
FILE *outFile; /* Output file */
{
NodeRegion *node, *subsNode;
TransRegion *reg;
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
ExtDevice *devptr, *deventry;
A number of changes: 1) Corrected spurious error messages about cells already existing in GDS when using "flatten" or "flatglob". 2) Fixed handling of resistance as a subcircuit parameter 3) Added area and perimeter resistance for a device; this is done through the "devresist" statement in the tech file, which is an extension of the original "fetresist" statement. Where "fetresist" only supported type "linear", "devresist" supports types "area" and "perimeter". 4) Support for CDL syntax, including generating subcircuit-like parameters for components starting with SPICE-standard prefixes like M, R, C, etc., adding "/" between pins and subcircuit name, and saving the file as ".cdl" instead of ".spice". 5) Estimated L and W for devices whose geometry is complex and do not reduce to a simple rectangle. L and W are estimated as the square root of the area. 6) Changed the method of extracting L and W for diodes to use the same method as capacitors. Note that diodes are not usually specified by L and W, but if they are, this will produce the right result. 7) Corrected the reported filename and line number when printing error messages related to errors inside a technology file, when the technology file uses "include" to combine multiple files.
2025-10-01 21:17:49 +02:00
ParamList *chkParam;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
FindRegion arg;
LabelList *ll;
TileType t;
A number of changes: 1) Corrected spurious error messages about cells already existing in GDS when using "flatten" or "flatglob". 2) Fixed handling of resistance as a subcircuit parameter 3) Added area and perimeter resistance for a device; this is done through the "devresist" statement in the tech file, which is an extension of the original "fetresist" statement. Where "fetresist" only supported type "linear", "devresist" supports types "area" and "perimeter". 4) Support for CDL syntax, including generating subcircuit-like parameters for components starting with SPICE-standard prefixes like M, R, C, etc., adding "/" between pins and subcircuit name, and saving the file as ".cdl" instead of ".spice". 5) Estimated L and W for devices whose geometry is complex and do not reduce to a simple rectangle. L and W are estimated as the square root of the area. 6) Changed the method of extracting L and W for diodes to use the same method as capacitors. Note that diodes are not usually specified by L and W, but if they are, this will produce the right result. 7) Corrected the reported filename and line number when printing error messages related to errors inside a technology file, when the technology file uses "include" to combine multiple files.
2025-10-01 21:17:49 +02:00
char *subsName;
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
int nsd, length, width, n, i, ntiles, corners, tn, rc, termcount;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
double dres, dcap;
char mesg[256];
Corrected an extraction error that can cause an infinite loop depending on the order of extraction devices. Specifically, the case of a source-drain tied FET was breaking out of a loop when it should have been breaking out of a double loop.
2023-10-27 20:32:44 +02:00
bool isAnnular, hasModel, sd_is_tied;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
for (reg = transList; reg && !SigInterruptPending; reg = reg->treg_next)
{
Set of changes updating version 8.2 to the level of 8.1, since 8.2 development had been halted since it was first created back in April. Version 8.2 is now the official development version, with the first development push to create a Cairo graphics interface.
2017-08-02 04:14:42 +02:00
if (reg->treg_type == TT_SPACE) continue; /* This has been disabled */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*
* Visit all of the tiles in the transistor region, updating
* extTransRec.tr_termnode[] and extTransRec.tr_termlen[],
* and the attribute lists for this transistor.
*
* Algorithm: first visit all tiles in the transistor, marking
* them with 'reg', then visit them again re-marking them with
* the gate node (extGetRegion(reg->treg_tile)).
*/
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
extTransRec.tr_devrec = (ExtDevice *)NULL;
extTransRec.tr_devmatch = 0;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
extTransRec.tr_nterm = 0;
extTransRec.tr_gatelen = 0;
extTransRec.tr_perim = 0;
Corrected an error with perimeter calculation of a device that was caused by other code that can move the plane of a device to match the plane of a port. Solved by retaining the original plane of the node in the extTransRec structure, and using that to determine the device plane for purposes of calculating perimeters and not double- counting contacts.
2022-08-30 16:13:18 +02:00
extTransRec.tr_plane = reg->treg_pnum; /* Save this value! */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
extTransRec.tr_subsnode = (NodeRegion *)NULL;
(1) Corrected an error with extraction in which terminal area and perimeter are not initialized, and if a terminal perimeter/area calculation is missed (which is happening on devices with terminals in planes other than the plane of the identifying type), then the perimeter/area of a previously handled device will get output. (2) Corrected an error with "flatten -inplace" in which the command fails to deal with instance arrays.
2023-06-07 14:06:18 +02:00
for (i = 0; i < MAXSD; i++)
{
extTransRec.tr_termnode[i] = NULL;
extTransRec.tr_termlen[i] = 0;
extTransRec.tr_termarea[i] = 0;
extTransRec.tr_termperim[i] = 0;
extTransRec.tr_termshared[i] = 0;
extTransRec.tr_termvector[i].p_x = 0;
extTransRec.tr_termvector[i].p_y = 0;
extTransRec.tr_termpos[i].pnum = 0;
extTransRec.tr_termpos[i].pt.p_x = 0;
extTransRec.tr_termpos[i].pt.p_y = 0;
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
arg.fra_def = def;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
arg.fra_connectsTo = ExtCurStyle->exts_deviceConn;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
extTransRec.tr_gatenode = (NodeRegion *) extGetRegion(reg->treg_tile);
t = reg->treg_type;
/* Watch for rare split reg->treg_type */
if (t & TT_DIAGONAL)
t = (reg->treg_type & TT_SIDE) ? ((reg->treg_type &
TT_RIGHTMASK) >> 14) : (reg->treg_type & TT_LEFTMASK);
arg.fra_pNum = DBPlane(t);
/* Set all terminals to NULL to guard against */
/* asymmetric devices missing a terminal. */
/* 5/30/09---but, reinitialize the array out to MAXSD, */
/* or devices declaring minterms < maxterms screw up! */
for (i = 0; i < MAXSD; i++) extTransRec.tr_termnode[i] = NULL;
/* Mark with reg and process each perimeter segment */
arg.fra_uninit = (ClientData) extTransRec.tr_gatenode;
rename Region to ExtRegion On Macos, Tk includes X11, which has this define: #if !defined(MAC_OSX_TK) # include <X11/X.h> #endif #ifdef MAC_OSX_TK # include <X11/X.h> # define Cursor XCursor # define Region XRegion #endif This causes the keywords `Cursor` and `Region` to be reserved, which prevents magic from building. Rename `Region` to `ExtRegion` as suggested by @RTimothyEdwards in https://github.com/RTimothyEdwards/magic/issues/195#issuecomment-1298870983 and https://github.com/RTimothyEdwards/magic/pull/222#pullrequestreview-1334900670 Signed-off-by: Sean Cross <sean@xobs.io>
2023-02-24 03:27:08 +01:00
arg.fra_region = (ExtRegion *) reg;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
arg.fra_each = extTransTileFunc;
ntiles = ExtFindNeighbors(reg->treg_tile, arg.fra_pNum, &arg);
/* Re-mark with extTransRec.tr_gatenode */
arg.fra_uninit = (ClientData) reg;
rename Region to ExtRegion On Macos, Tk includes X11, which has this define: #if !defined(MAC_OSX_TK) # include <X11/X.h> #endif #ifdef MAC_OSX_TK # include <X11/X.h> # define Cursor XCursor # define Region XRegion #endif This causes the keywords `Cursor` and `Region` to be reserved, which prevents magic from building. Rename `Region` to `ExtRegion` as suggested by @RTimothyEdwards in https://github.com/RTimothyEdwards/magic/issues/195#issuecomment-1298870983 and https://github.com/RTimothyEdwards/magic/pull/222#pullrequestreview-1334900670 Signed-off-by: Sean Cross <sean@xobs.io>
2023-02-24 03:27:08 +01:00
arg.fra_region = (ExtRegion *) extTransRec.tr_gatenode;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
arg.fra_each = (int (*)()) NULL;
(void) ExtFindNeighbors(reg->treg_tile, arg.fra_pNum, &arg);
/* Are the terminal types on a compeletely different */
/* plane than the top type? If so, do an area search */
/* on that plane in the area under the device node. */
/* Devices may define one terminal per plane, but this */
/* method cannot handle several different layer types */
/* on one plane under the device identifier layer */
/* acting as separate device nodes. If any terminal */
/* search fails, give up and proceed with the reduced */
/* number of terminals. */
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
devptr = extTransRec.tr_devrec;
if (devptr == NULL) continue; /* Bad device; do not output */
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
deventry = devptr;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
/* Use devmatch flags to determine if the specific S/D */
/* terminal was handled by extTransPerimFunc already. */
/* Only look at required S/D terminals that have not */
/* yet been found. */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
while (TRUE)
{
Corrected an error in ext2spice caused by recent changes, that can generate an extra node in the extract output that comes out as a "(none)" node in the SPICE netlist from ext2spice.
2019-11-13 19:05:03 +01:00
if (devptr == NULL) break; /* Bad device */
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
nsd = devptr->exts_deviceSDCount;
Corrected an extraction error that can cause an infinite loop depending on the order of extraction devices. Specifically, the case of a source-drain tied FET was breaking out of a loop when it should have been breaking out of a double loop.
2023-10-27 20:32:44 +02:00
sd_is_tied = FALSE;
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
for (termcount = 0; termcount < nsd; termcount++)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
TileTypeBitMask *tmask;
if ((extTransRec.tr_devmatch & (MATCH_TERM << termcount)) != 0)
continue; /* This terminal already found by perimeter search */
tmask = &devptr->exts_deviceSDTypes[termcount];
Corrected an extraction error that prevented the use of the same device layer type to describe the extraction for both a regular FET and an extended-drain device. Note that the current code still requires that the extended-drain device be declared first, and does not check for this or attempt to reorder if incorrect.
2020-09-11 03:44:02 +02:00
if (TTMaskIsZero(tmask)) {
if (termcount < nsd) {
Corrected a problem in which extraction of MOS caps (or any device with two or more terminals other than the device identifier type tied together) would fail if there were not a device record specifically matching a one-S/D-terminal device. This is inconsistent with past behavior, and so has been fixed.
2020-10-17 18:43:22 +02:00
/* Not finding another device record just means that */
/* terminals are tied together on the same net, such as */
/* with a MOS cap. Accept this fact and move on. */
Corrected an extraction error that can cause an infinite loop depending on the order of extraction devices. Specifically, the case of a source-drain tied FET was breaking out of a loop when it should have been breaking out of a double loop.
2023-10-27 20:32:44 +02:00
sd_is_tied = TRUE;
Corrected an extraction error that prevented the use of the same device layer type to describe the extraction for both a regular FET and an extended-drain device. Note that the current code still requires that the extended-drain device be declared first, and does not check for this or attempt to reorder if incorrect.
2020-09-11 03:44:02 +02:00
}
break; /* End of SD terminals */
}
Fixed a problem with extraction. If an extraction line specifies one terminal of a device as the substrate, but also specifies shielding types for the substrate, then the extraction cannot just assume that a missing terminal is connected to the substrate without first checking that there are no substrate shielding types under the device.
2020-12-21 16:10:18 +01:00
else if (!TTMaskIntersect(tmask, &DBPlaneTypes[reg->treg_pnum])
|| (TTMaskHasType(tmask, TT_SPACE)))
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
{
Added code to calculate area and perimeter of layers that are not on the same plane as a device identifier layer. This (finally!) allows proper calculation of area and perimeter of diodes and bipolars, for example.
2023-06-09 21:31:58 +02:00
ExtAreaPerimData eapd;
TileType tt = TT_SPACE;
Rect r;
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
node = NULL;
Corrected the extraction method for devices with terminals on the implicit global substrate, as a block of code meant to handle this case was left unreachable by another recent code fix.
2021-01-21 15:57:03 +01:00
/* First try to find a region under the device */
Added code to calculate area and perimeter of layers that are not on the same plane as a device identifier layer. This (finally!) allows proper calculation of area and perimeter of diodes and bipolars, for example.
2023-06-09 21:31:58 +02:00
extTransFindSubs(reg->treg_tile, t, tmask, def, &node, &tt);
Fixed a problem with extraction. If an extraction line specifies one terminal of a device as the substrate, but also specifies shielding types for the substrate, then the extraction cannot just assume that a missing terminal is connected to the substrate without first checking that there are no substrate shielding types under the device.
2020-12-21 16:10:18 +01:00
Additional coding to handle discovery of terminal types on different planes of a device that are connected to a multi-tile device. This is a more general solution than previously coded, in which only the first tile of a device would be searched for terminals on other planes, which was only guaranteed to work if the device was represented by a single tile.
2024-12-07 02:51:59 +01:00
/* If the device has multiple tiles, then check all of them.
* This is inefficient, so this routine first assumes that
* the device is a single tile, and if nothing is found
* underneath, it then checks if the accumulated gate area
* is larger than the tile area. If so, it does a full
* search on all tiles.
*/
if (node == NULL)
{
int tarea;
tarea = (RIGHT(reg->treg_tile) - LEFT(reg->treg_tile)) *
(TOP(reg->treg_tile) - BOTTOM(reg->treg_tile));
if (tarea < reg->treg_area)
{
LinkedTile *lt;
extSpecialDevice = (LinkedTile *)NULL;
arg.fra_uninit = (ClientData)extTransRec.tr_gatenode;
arg.fra_region = (ExtRegion *)reg;
arg.fra_each = extSDTileFunc;
ExtFindNeighbors(reg->treg_tile, arg.fra_pNum, &arg);
arg.fra_uninit = (ClientData) reg;
arg.fra_region = (ExtRegion *) extTransRec.tr_gatenode;
arg.fra_each = (int (*)()) NULL;
ExtFindNeighbors(reg->treg_tile, arg.fra_pNum, &arg);
for (lt = extSpecialDevice; lt; lt = lt->t_next)
{
extTransFindSubs(lt->t, t, tmask, def, &node, &tt);
if (node != NULL)
{
TiToRect(lt->t, &r);
break;
}
}
for (lt = extSpecialDevice; lt; lt = lt->t_next)
freeMagic((char *)lt);
}
}
else
TiToRect(reg->treg_tile, &r);
if ((node == NULL) && (TTMaskHasType(tmask, TT_SPACE)))
{
Corrected an error causing weird and undefined behavior when extracting substrate regions, due to failure to clean up the tagged tiles after exiting a search due to finding a substrate type that was not the global substrate.
2021-04-05 20:16:28 +02:00
/* Device node is the global substrate. */
node = glob_subsnode;
Fixed a problem with extraction. If an extraction line specifies one terminal of a device as the substrate, but also specifies shielding types for the substrate, then the extraction cannot just assume that a missing terminal is connected to the substrate without first checking that there are no substrate shielding types under the device.
2020-12-21 16:10:18 +01:00
}
Corrected the extraction method for devices with terminals on the implicit global substrate, as a block of code meant to handle this case was left unreachable by another recent code fix.
2021-01-21 15:57:03 +01:00
else if (node == NULL) {
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
/* See if there is another matching device record */
/* with a different terminal type, and try again. */
devptr = extDevFindMatch(devptr, t);
break;
}
extTransRec.tr_devmatch |= (MATCH_TERM << termcount);
Corrected the extraction method for devices with terminals on the implicit global substrate, as a block of code meant to handle this case was left unreachable by another recent code fix.
2021-01-21 15:57:03 +01:00
extTransRec.tr_termnode[termcount] = node;
Added code to calculate area and perimeter of layers that are not on the same plane as a device identifier layer. This (finally!) allows proper calculation of area and perimeter of diodes and bipolars, for example.
2023-06-09 21:31:58 +02:00
/* Terminals on other planes will not have area and perimeter
* computed, so do that here.
*/
eapd.eapd_area = 0;
eapd.eapd_perim = 0;
eapd.eapd_shared = NULL;
/* NOTE: Currently there is no way to determine if a
* terminal on another plane belongs to multiple devices,
* so device sharing is not checked. Could be done by
* checking the terminal area for the gate mask (on its
* own plane) in extTermAPFunc().
*/
eapd.eapd_gatemask = &DBZeroTypeBits;
TTMaskCom2(&eapd.eapd_mask, tmask);
if (tt == TT_SPACE)
{
/* Terminal may be the substrate, in which case */
/* the device should not be recording area or */
/* perimeter, so leave them as zero. */
extTransRec.tr_termarea[termcount] = 0;
extTransRec.tr_termperim[termcount] = 0;
}
else
{
DBSrPaintArea((Tile *)NULL, def->cd_planes[DBPlane(tt)],
Added a new method to the extraction which allows parameter limits to be declared for each device model, so that different models can be specified for different parameter ranges. For example, this will simplify the definition of the high-sheet-rho poly resistors and the bipolar transistors in sky130 by removing the need for ID marker layers; it also allows the correct device model to be extracted when reading data from GDS that does not contain the extra (and not foundry-approved) ID markers.
2023-07-06 18:35:47 +02:00
&r, tmask, extTransFindTermArea, (ClientData)&eapd);
Added code to calculate area and perimeter of layers that are not on the same plane as a device identifier layer. This (finally!) allows proper calculation of area and perimeter of diodes and bipolars, for example.
2023-06-09 21:31:58 +02:00
extTransRec.tr_termarea[termcount] = eapd.eapd_area;
extTransRec.tr_termperim[termcount] = eapd.eapd_perim;
}
extTransRec.tr_termshared[termcount] = 1;
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
}
else {
/* Determine if there is another matching device record */
/* that has fewer required terminals. */
devptr = extDevFindMatch(devptr, t);
break;
}
Corrected an error in ext2spice caused by recent changes, that can generate an extra node in the extract output that comes out as a "(none)" node in the SPICE netlist from ext2spice.
2019-11-13 19:05:03 +01:00
if (termcount == nsd) break; /* All terminals accounted for */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
if (termcount == nsd) break; /* All terminals accounted for */
if (devptr == deventry) break; /* No other device records available */
Corrected an extraction error that can cause an infinite loop depending on the order of extraction devices. Specifically, the case of a source-drain tied FET was breaking out of a loop when it should have been breaking out of a double loop.
2023-10-27 20:32:44 +02:00
if (sd_is_tied) break; /* Legal case of tied source and drain */
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
/* Try again with a different device record */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
extTransRec.tr_nterm = termcount;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*
* For types that require a minimum number of terminals,
* check to make sure that they all exist. If they don't,
* issue a warning message and make believe the missing
* terminals are the same as the last terminal we do have.
*/
if (extTransRec.tr_nterm < nsd)
{
int missing = nsd - extTransRec.tr_nterm;
(void) sprintf(mesg, "device missing %d terminal%s", missing,
missing == 1 ? "" : "s");
if (extTransRec.tr_nterm > 0)
{
node = extTransRec.tr_termnode[extTransRec.tr_nterm - 1];
(void) strcat(mesg, ";\n connecting remainder to node ");
Corrected a buffer overrun situation in ExtBasic.c when printing the "connected other node to. . ." message when terminals of a device are shorted. A long enough node name, especially one created by concatenating hierarchy when flattening a cell, can easily overrun the short 256-byte string buffer. Fixed by changing strcat() to strncat().
2023-03-05 22:39:58 +01:00
(void) strncat(mesg, extNodeName((LabRegion *) node),
255 - strlen(mesg));
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
while (extTransRec.tr_nterm < nsd)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
extTransRec.tr_termlen[extTransRec.tr_nterm] = 0;
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
extTransRec.tr_termarea[extTransRec.tr_nterm] = 0;
extTransRec.tr_termperim[extTransRec.tr_nterm] = 0;
extTransRec.tr_termshared[extTransRec.tr_nterm] = 0;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
extTransRec.tr_termnode[extTransRec.tr_nterm++] = node;
}
}
if (ExtDoWarn & EXTWARN_FETS)
extTransBad(def, reg->treg_tile, mesg);
Set of changes updating version 8.2 to the level of 8.1, since 8.2 development had been halted since it was first created back in April. Version 8.2 is now the official development version, with the first development push to create a Cairo graphics interface.
2017-08-02 04:14:42 +02:00
/* Devices with no terminals or a null node are badly */
/* formed and should not be output. This can happen when */
/* parts of devices are split into different cells. */
if ((extTransRec.tr_nterm == 0) || (node == NULL))
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
continue;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
else if (extTransRec.tr_nterm > nsd)
{
/* It is not an error condition to have more terminals */
/* than the minimum. */
}
Corrected an error in ext2spice caused by recent changes, that can generate an extra node in the extract output that comes out as a "(none)" node in the SPICE netlist from ext2spice.
2019-11-13 19:05:03 +01:00
if (devptr == NULL) {
TxError("Warning: No matching extraction type for device at (%d %d)\n",
reg->treg_tile->ti_ll.p_x, reg->treg_tile->ti_ll.p_y);
continue;
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*
* Output the transistor record.
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
* The type is devptr->exts_deviceName, which should have
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
* some meaning to the simulator we are producing this file for.
* Use the default substrate node unless the transistor overlaps
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
* material whose type is in exts_deviceSubstrateTypes, in which
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
* case we use the node of the overlapped material.
*
* Technology files using the "substrate" keyword (magic-8.1 or
* newer) should have the text "error" in the substrate node
* name.
*/
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
subsName = devptr->exts_deviceSubstrateName;
if (!TTMaskIsZero(&devptr->exts_deviceSubstrateTypes)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
&& (subsNode = extTransRec.tr_subsnode))
{
ExtBasic.c: warning: incompatible pointer types passing 'NodeRegion *' ... The NodeRegion is an extended form of LabRegion (which is smaller) and has the same layout. So we cast into the smaller type. ExtBasic.c:1025:31: warning: incompatible pointer types passing 'NodeRegion *' (aka 'struct nreg *') to parameter of type 'LabRegion *' (aka 'struct lreg *') ExtBasic.c:2291:29: warning: incompatible pointer types passing 'NodeRegion *' (aka 'struct nreg *') to parameter of type 'LabRegion *' (aka 'struct lreg *') ExtBasic.c:2335:46: warning: incompatible pointer types passing 'NodeRegion *' (aka 'struct nreg *') to parameter of type 'LabRegion *' (aka 'struct lreg *') ExtBasic.c:2339:47: warning: incompatible pointer types passing 'NodeRegion *' (aka 'struct nreg *') to parameter of type 'LabRegion *' (aka 'struct lreg *') clang18 default warning cleanup [-Wincompatible-pointer-types]
2024-10-04 19:54:24 +02:00
subsName = extNodeName((LabRegion *)subsNode);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
#ifdef MAGIC_WRAPPER
// Substrate variable substitution when in backwards-compatibility
// substrate mode.
else if ((ExtCurStyle->exts_globSubstratePlane == -1) &&
(subsName && subsName[0] == '$' && subsName[1] != '$'))
{
// If subsName is a Tcl variable (begins with "$"), make the
// variable substitution, if one exists. Ignore double-$.
char *varsub = (char *)Tcl_GetVar(magicinterp, &subsName[1],
TCL_GLOBAL_ONLY);
if (varsub != NULL) subsName = varsub;
}
#endif
Also corrected an error where the bounds search uses the device type in the device record, which was not updated at the end of checking terminals for matching device extraction types. so the boundary survey might see the wrong device type and generate an incorrect boundary survey as a result.
2020-09-21 22:52:49 +02:00
extTransRec.tr_devrec = devptr;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Added a method to ignore a specific device extraction combination by setting the model name to "Ignore" in the tech file.
2020-10-26 16:41:36 +01:00
/* Model type "Ignore" in the techfile indicates a device */
/* to be ignored (i.e., a specific combination of layers */
/* does not form an extractable device, or overlaps another */
/* device type that should take precedence). */
if (!strcmp(devptr->exts_deviceName, "Ignore"))
continue;
Added a new special device model name "Short" which enables the use of a resistor type as a FET extended drain, allowing the FET drain node to short across to the other side of the resistor so that the resistor is absorbed into the FET device. Used with the GF180MCU process to describe the salicide-block ESD FET types.
2022-12-13 22:02:49 +01:00
/* Model type "Short" in the techfile indicates a device */
/* to short across the first two nodes (the gate and the */
/* source). This solves the specific issue of a transistor */
/* extended drain where the drain is a resistor but the */
/* resistor is part of the model and should not be output. */
if (!strcmp(devptr->exts_deviceName, "Short"))
{
fprintf(outFile, "equiv ");
/* To do: Use parameters to specify which terminals */
/* are shorted. */
/* gate */
node = (NodeRegion *)extGetRegion(reg->treg_tile);
ExtBasic.c: warning: incompatible pointer types passing 'NodeRegion *' ... The NodeRegion is an extended form of LabRegion (which is smaller) and has the same layout. So we cast into the smaller type. ExtBasic.c:1025:31: warning: incompatible pointer types passing 'NodeRegion *' (aka 'struct nreg *') to parameter of type 'LabRegion *' (aka 'struct lreg *') ExtBasic.c:2291:29: warning: incompatible pointer types passing 'NodeRegion *' (aka 'struct nreg *') to parameter of type 'LabRegion *' (aka 'struct lreg *') ExtBasic.c:2335:46: warning: incompatible pointer types passing 'NodeRegion *' (aka 'struct nreg *') to parameter of type 'LabRegion *' (aka 'struct lreg *') ExtBasic.c:2339:47: warning: incompatible pointer types passing 'NodeRegion *' (aka 'struct nreg *') to parameter of type 'LabRegion *' (aka 'struct lreg *') clang18 default warning cleanup [-Wincompatible-pointer-types]
2024-10-04 19:54:24 +02:00
fprintf(outFile, "\"%s\" ", extNodeName((LabRegion *)node));
Added a new special device model name "Short" which enables the use of a resistor type as a FET extended drain, allowing the FET drain node to short across to the other side of the resistor so that the resistor is absorbed into the FET device. Used with the GF180MCU process to describe the salicide-block ESD FET types.
2022-12-13 22:02:49 +01:00
/* First non-gate terminal */
node = (NodeRegion *)extTransRec.tr_termnode[0];
ExtBasic.c: warning: incompatible pointer types passing 'NodeRegion *' ... The NodeRegion is an extended form of LabRegion (which is smaller) and has the same layout. So we cast into the smaller type. ExtBasic.c:1025:31: warning: incompatible pointer types passing 'NodeRegion *' (aka 'struct nreg *') to parameter of type 'LabRegion *' (aka 'struct lreg *') ExtBasic.c:2291:29: warning: incompatible pointer types passing 'NodeRegion *' (aka 'struct nreg *') to parameter of type 'LabRegion *' (aka 'struct lreg *') ExtBasic.c:2335:46: warning: incompatible pointer types passing 'NodeRegion *' (aka 'struct nreg *') to parameter of type 'LabRegion *' (aka 'struct lreg *') ExtBasic.c:2339:47: warning: incompatible pointer types passing 'NodeRegion *' (aka 'struct nreg *') to parameter of type 'LabRegion *' (aka 'struct lreg *') clang18 default warning cleanup [-Wincompatible-pointer-types]
2024-10-04 19:54:24 +02:00
fprintf(outFile, "\"%s\"\n", extNodeName((LabRegion *)node));
Added a new special device model name "Short" which enables the use of a resistor type as a FET extended drain, allowing the FET drain node to short across to the other side of the resistor so that the resistor is absorbed into the FET device. Used with the GF180MCU process to describe the salicide-block ESD FET types.
2022-12-13 22:02:49 +01:00
continue;
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/* Original-style FET record backward compatibility */
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
if (devptr->exts_deviceClass != DEV_FET)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
fprintf(outFile, "device ");
Added a new method to the extraction which allows parameter limits to be declared for each device model, so that different models can be specified for different parameter ranges. For example, this will simplify the definition of the high-sheet-rho poly resistors and the bipolar transistors in sky130 by removing the need for ID marker layers; it also allows the correct device model to be extracted when reading data from GDS that does not contain the extra (and not foundry-approved) ID markers.
2023-07-06 18:35:47 +02:00
/* NOTE: The code for the old FET device makes unreasonable */
/* simplifying assumptions about how to calculate device length */
/* and width. The newer MOSFET and MSUBCKT and other devices */
/* compute proper length and width, including but not limited */
/* to dealing with bends and annular shapes. */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
switch (devptr->exts_deviceClass)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
case DEV_FET: /* old style, perimeter & area */
Added a new method to the extraction which allows parameter limits to be declared for each device model, so that different models can be specified for different parameter ranges. For example, this will simplify the definition of the high-sheet-rho poly resistors and the bipolar transistors in sky130 by removing the need for ID marker layers; it also allows the correct device model to be extracted when reading data from GDS that does not contain the extra (and not foundry-approved) ID markers.
2023-07-06 18:35:47 +02:00
fprintf(outFile, "%s %s",
37 x warning: array subscript has type 'char' Compiler is expressing range concern with the warning mitigated by using unsigned C array offsets. This also draws attention to the range concern when reading the code and making changes. DBundo.c:263:45: warning: array subscript has type 'char' DBundo.c:279:49: warning: array subscript has type 'char' DBundo.c:317:52: warning: array subscript has type 'char' DBundo.c:318:64: warning: array subscript has type 'char' DBundo.c:324:52: warning: array subscript has type 'char' DBundo.c:325:64: warning: array subscript has type 'char' DBundo.c:329:50: warning: array subscript has type 'char' DBundo.c:330:58: warning: array subscript has type 'char' DBundo.c:338:52: warning: array subscript has type 'char' DBundo.c:339:64: warning: array subscript has type 'char' DBundo.c:345:52: warning: array subscript has type 'char' DBundo.c:346:64: warning: array subscript has type 'char' DBundo.c:350:50: warning: array subscript has type 'char' DBundo.c:351:58: warning: array subscript has type 'char' DBundo.c:371:52: warning: array subscript has type 'char' DBundo.c:372:64: warning: array subscript has type 'char' DBundo.c:378:52: warning: array subscript has type 'char' DBundo.c:379:64: warning: array subscript has type 'char' DBundo.c:383:50: warning: array subscript has type 'char' DBundo.c:384:58: warning: array subscript has type 'char' DBundo.c:392:52: warning: array subscript has type 'char' DBundo.c:393:57: warning: array subscript has type 'char' DBundo.c:399:52: warning: array subscript has type 'char' DBundo.c:400:57: warning: array subscript has type 'char' DBundo.c:403:53: warning: array subscript has type 'char' DBundo.c:407:50: warning: array subscript has type 'char' DBundo.c:408:58: warning: array subscript has type 'char' EFbuild.c:1048:32: warning: array subscript has type 'char' EFbuild.c:1056:32: warning: array subscript has type 'char' ExtBasic.c:2358:43: warning: array subscript has type 'char' ExtBasic.c:2493:43: warning: array subscript has type 'char' ExtBasic.c:2519:43: warning: array subscript has type 'char' ExtBasic.c:2644:43: warning: array subscript has type 'char' ExtBasic.c:2678:43: warning: array subscript has type 'char' ResPrint.c:143:43: warning: array subscript has type 'char' plotRutils.c:713:34: warning: array subscript has type 'char' plotRutils.c:786:29: warning: array subscript has type 'char' GCC14 -Wall cleanup series [-Wchar-subscripts]
2024-10-04 18:15:21 +02:00
extDevTable[(unsigned char)devptr->exts_deviceClass],
Added a new method to the extraction which allows parameter limits to be declared for each device model, so that different models can be specified for different parameter ranges. For example, this will simplify the definition of the high-sheet-rho poly resistors and the bipolar transistors in sky130 by removing the need for ID marker layers; it also allows the correct device model to be extracted when reading data from GDS that does not contain the extra (and not foundry-approved) ID markers.
2023-07-06 18:35:47 +02:00
devptr->exts_deviceName);
fprintf(outFile, " %d %d %d %d",
reg->treg_ll.p_x, reg->treg_ll.p_y,
reg->treg_ll.p_x + 1, reg->treg_ll.p_y + 1);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
fprintf(outFile, " %d %d \"%s\"",
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
reg->treg_area, extTransRec.tr_perim,
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
(subsName == NULL) ? "None" : subsName);
break;
/* "device <class>" types, calculation of length & width */
case DEV_MOSFET:
case DEV_BJT:
case DEV_SUBCKT:
Updated the version to go along with the merge of pull request version 8.3.521 that, due to an argument size mismatch, causes device parameters in netlist output to be printed as zero. Also added a small extension to the list of extraction types to include "device veriloga", which has the same syntax as "device subcircuit" but generates a component type "N" (Verilog-A component) in the netlist output.
2025-08-07 17:54:49 +02:00
case DEV_VERILOGA:
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
case DEV_MSUBCKT:
case DEV_ASYMMETRIC:
Corrected the extraction of length and width of devices that are (truly) missing a terminal (such as a MOSCAP made with a gate extending into but not crossing a diffusion region). Added the most requested GUI feature, which is a vertical scrollbar on the parameterized device window (could be improved by maximizing window height without exceeding display height).
2023-03-12 21:57:47 +01:00
length = 0;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
width = 0;
isAnnular = FALSE;
/* Note that width is accumulated on one tr_termlen */
/* record when nodes are merged, so proper behavior */
/* for transistors w/connected S-D is to count over */
/* non-NULL termnodes, not non-zero termlens. */
for (n = 0; n < extTransRec.tr_nterm; n++)
{
if (extTransRec.tr_termnode[n] == NULL) continue;
width += extTransRec.tr_termlen[n];
/* Mark annular transistors as requiring extra processing */
if (extTransRec.tr_termvector[n].p_x == 0 &&
extTransRec.tr_termvector[n].p_y == 0)
isAnnular = TRUE;
}
Corrected the extraction of length and width of devices that are (truly) missing a terminal (such as a MOSCAP made with a gate extending into but not crossing a diffusion region). Added the most requested GUI feature, which is a vertical scrollbar on the parameterized device window (could be improved by maximizing window height without exceeding display height).
2023-03-12 21:57:47 +01:00
/* For devices missing a terminal, reduce n accordingly. */
/* This avoids errors in length and width calculations. */
while ((n > 0) && (extTransRec.tr_termnode[n - 1]) &&
(extTransRec.tr_termlen[n - 1] == 0) &&
(extTransRec.tr_termarea[n - 1] == 0) &&
(extTransRec.tr_termperim[n - 1] == 0)) n--;
if (n)
{
width /= n;
if (n > 1)
length = extTransRec.tr_gatelen / n;
Corrected issue with the commit of version 8.3.378, which can cause a crash when extracting some devices like bipolars with terminals on different plance.
2023-03-15 19:36:15 +01:00
else if (extTransRec.tr_gatelen < width)
length = extTransRec.tr_gatelen;
Corrected the extraction of length and width of devices that are (truly) missing a terminal (such as a MOSCAP made with a gate extending into but not crossing a diffusion region). Added the most requested GUI feature, which is a vertical scrollbar on the parameterized device window (could be improved by maximizing window height without exceeding display height).
2023-03-12 21:57:47 +01:00
else
{
/* Assumption: A device with a single terminal */
/* must be rectangular; an example is a MOSCAP */
/* with poly over three sides of diffusion. */
/* Length in this case is not properly defined, */
/* but it is only necessary for the model to */
/* get the correct area per W * L. If the */
/* device is annular, then this assumption will */
/* get corrected by extComputeEffectiveLW(). */
length = (extTransRec.tr_gatelen - width) / 2;
}
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*------------------------------------------------------*/
/* Note that the tr_termvector says a lot about the */
/* device geometry. If the sum of x and y for any */
/* vector is 0, then the terminal is enclosed (annular */
/* device). If the sum of x and y for all vectors is */
/* zero, then we have a normal rectangular device. But */
/* if the sum of all x and y is nonzero, then the */
/* device length changes along the device (including */
/* bends). This is a trigger to do a more extensive */
/* boundary search to find the exact dimensions of the */
/* device. */
/*------------------------------------------------------*/
if (n == 0)
{
/* Don't issue a warning on devices such as a */
/* vertical diode that may declare zero terminals */
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
/* because the default substrate node is the other */
/* terminal. */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
if (ExtDoWarn && (devptr->exts_deviceSDCount > 0))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
extTransBad(def, reg->treg_tile,
"Could not determine device boundary");
length = width = 0;
}
else
{
LinkedBoundary *lb;
Corrected issue with the commit of version 8.3.378, which can cause a crash when extracting some devices like bipolars with terminals on different plance.
2023-03-15 19:36:15 +01:00
extSpecialBounds = (LinkedBoundary **)mallocMagic(
extTransRec.tr_nterm *
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
sizeof(LinkedBoundary *));
Corrected issue with the commit of version 8.3.378, which can cause a crash when extracting some devices like bipolars with terminals on different plance.
2023-03-15 19:36:15 +01:00
for (i = 0; i < extTransRec.tr_nterm; i++)
extSpecialBounds[i] = NULL;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/* Mark with reg and process each perimeter segment */
arg.fra_uninit = (ClientData) extTransRec.tr_gatenode;
rename Region to ExtRegion On Macos, Tk includes X11, which has this define: #if !defined(MAC_OSX_TK) # include <X11/X.h> #endif #ifdef MAC_OSX_TK # include <X11/X.h> # define Cursor XCursor # define Region XRegion #endif This causes the keywords `Cursor` and `Region` to be reserved, which prevents magic from building. Rename `Region` to `ExtRegion` as suggested by @RTimothyEdwards in https://github.com/RTimothyEdwards/magic/issues/195#issuecomment-1298870983 and https://github.com/RTimothyEdwards/magic/pull/222#pullrequestreview-1334900670 Signed-off-by: Sean Cross <sean@xobs.io>
2023-02-24 03:27:08 +01:00
arg.fra_region = (ExtRegion *) reg;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
arg.fra_each = extAnnularTileFunc;
Also corrected an error where the bounds search uses the device type in the device record, which was not updated at the end of checking terminals for matching device extraction types. so the boundary survey might see the wrong device type and generate an incorrect boundary survey as a result.
2020-09-21 22:52:49 +02:00
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
(void) ExtFindNeighbors(reg->treg_tile, arg.fra_pNum, &arg);
extSeparateBounds(n - 1); /* Handle MOScaps (if necessary) */
extComputeEffectiveLW(&length, &width, n,
ExtCurStyle->exts_cornerChop[t]);
/* Free the lists */
Corrected issue with the commit of version 8.3.378, which can cause a crash when extracting some devices like bipolars with terminals on different plance.
2023-03-15 19:36:15 +01:00
for (i = 0; i < extTransRec.tr_nterm; i++)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
for (lb = extSpecialBounds[i]; lb != NULL; lb = lb->b_next)
freeMagic((char *)lb);
freeMagic((char *)extSpecialBounds);
/* Put the region list back the way we found it: */
/* Re-mark with extTransRec.tr_gatenode */
arg.fra_uninit = (ClientData) reg;
rename Region to ExtRegion On Macos, Tk includes X11, which has this define: #if !defined(MAC_OSX_TK) # include <X11/X.h> #endif #ifdef MAC_OSX_TK # include <X11/X.h> # define Cursor XCursor # define Region XRegion #endif This causes the keywords `Cursor` and `Region` to be reserved, which prevents magic from building. Rename `Region` to `ExtRegion` as suggested by @RTimothyEdwards in https://github.com/RTimothyEdwards/magic/issues/195#issuecomment-1298870983 and https://github.com/RTimothyEdwards/magic/pull/222#pullrequestreview-1334900670 Signed-off-by: Sean Cross <sean@xobs.io>
2023-02-24 03:27:08 +01:00
arg.fra_region = (ExtRegion *) extTransRec.tr_gatenode;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
arg.fra_each = (int (*)()) NULL;
(void) ExtFindNeighbors(reg->treg_tile, arg.fra_pNum, &arg);
}
Added a new method to the extraction which allows parameter limits to be declared for each device model, so that different models can be specified for different parameter ranges. For example, this will simplify the definition of the high-sheet-rho poly resistors and the bipolar transistors in sky130 by removing the need for ID marker layers; it also allows the correct device model to be extracted when reading data from GDS that does not contain the extra (and not foundry-approved) ID markers.
2023-07-06 18:35:47 +02:00
devptr = extDevFindParamMatch(devptr, length, width);
fprintf(outFile, "%s %s",
37 x warning: array subscript has type 'char' Compiler is expressing range concern with the warning mitigated by using unsigned C array offsets. This also draws attention to the range concern when reading the code and making changes. DBundo.c:263:45: warning: array subscript has type 'char' DBundo.c:279:49: warning: array subscript has type 'char' DBundo.c:317:52: warning: array subscript has type 'char' DBundo.c:318:64: warning: array subscript has type 'char' DBundo.c:324:52: warning: array subscript has type 'char' DBundo.c:325:64: warning: array subscript has type 'char' DBundo.c:329:50: warning: array subscript has type 'char' DBundo.c:330:58: warning: array subscript has type 'char' DBundo.c:338:52: warning: array subscript has type 'char' DBundo.c:339:64: warning: array subscript has type 'char' DBundo.c:345:52: warning: array subscript has type 'char' DBundo.c:346:64: warning: array subscript has type 'char' DBundo.c:350:50: warning: array subscript has type 'char' DBundo.c:351:58: warning: array subscript has type 'char' DBundo.c:371:52: warning: array subscript has type 'char' DBundo.c:372:64: warning: array subscript has type 'char' DBundo.c:378:52: warning: array subscript has type 'char' DBundo.c:379:64: warning: array subscript has type 'char' DBundo.c:383:50: warning: array subscript has type 'char' DBundo.c:384:58: warning: array subscript has type 'char' DBundo.c:392:52: warning: array subscript has type 'char' DBundo.c:393:57: warning: array subscript has type 'char' DBundo.c:399:52: warning: array subscript has type 'char' DBundo.c:400:57: warning: array subscript has type 'char' DBundo.c:403:53: warning: array subscript has type 'char' DBundo.c:407:50: warning: array subscript has type 'char' DBundo.c:408:58: warning: array subscript has type 'char' EFbuild.c:1048:32: warning: array subscript has type 'char' EFbuild.c:1056:32: warning: array subscript has type 'char' ExtBasic.c:2358:43: warning: array subscript has type 'char' ExtBasic.c:2493:43: warning: array subscript has type 'char' ExtBasic.c:2519:43: warning: array subscript has type 'char' ExtBasic.c:2644:43: warning: array subscript has type 'char' ExtBasic.c:2678:43: warning: array subscript has type 'char' ResPrint.c:143:43: warning: array subscript has type 'char' plotRutils.c:713:34: warning: array subscript has type 'char' plotRutils.c:786:29: warning: array subscript has type 'char' GCC14 -Wall cleanup series [-Wchar-subscripts]
2024-10-04 18:15:21 +02:00
extDevTable[(unsigned char)devptr->exts_deviceClass],
Added a new method to the extraction which allows parameter limits to be declared for each device model, so that different models can be specified for different parameter ranges. For example, this will simplify the definition of the high-sheet-rho poly resistors and the bipolar transistors in sky130 by removing the need for ID marker layers; it also allows the correct device model to be extracted when reading data from GDS that does not contain the extra (and not foundry-approved) ID markers.
2023-07-06 18:35:47 +02:00
devptr->exts_deviceName);
fprintf(outFile, " %d %d %d %d",
reg->treg_ll.p_x, reg->treg_ll.p_y,
reg->treg_ll.p_x + 1, reg->treg_ll.p_y + 1);
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
if (devptr->exts_deviceClass == DEV_MOSFET ||
devptr->exts_deviceClass == DEV_ASYMMETRIC ||
devptr->exts_deviceClass == DEV_BJT)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
fprintf(outFile, " %d %d", length, width);
}
Implemented simple drain and source length calculations as device parameters l1 and l2. Provides a way to pass the source or drain length as a parameter for, for example, an extended FET drain implemented as a resistor abutting the FET gate. Could potentially be used as a way to determine source/drain area and perimeter without resorting to measurements of a shared node.
2022-12-15 03:40:24 +01:00
extOutputDevParams(reg, devptr, outFile, length, width,
Extended the device parameters to allow a terminal width that is different from the device (i.e., gate) width, for devices that do not define a MOS-like gate spanning the width of the device. This is restricted to the assumption that the terminal is rectangular and therefore a simple width and length can be derived from the area and perimeter. Also, length is defined as the smaller dimension and width as the larger dimension. For additional restrictions, see the updated documentation. This was added to allow correct width and length extraction of a bipolar emitter window, but may be more generally useful.
2024-12-06 22:42:43 +01:00
extTransRec.tr_termarea, extTransRec.tr_termperim);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
fprintf(outFile, " \"%s\"", (subsName == NULL) ?
"None" : subsName);
break;
case DEV_DIODE: /* Only handle the optional substrate node */
case DEV_NDIODE:
case DEV_PDIODE:
A number of changes: 1) Corrected spurious error messages about cells already existing in GDS when using "flatten" or "flatglob". 2) Fixed handling of resistance as a subcircuit parameter 3) Added area and perimeter resistance for a device; this is done through the "devresist" statement in the tech file, which is an extension of the original "fetresist" statement. Where "fetresist" only supported type "linear", "devresist" supports types "area" and "perimeter". 4) Support for CDL syntax, including generating subcircuit-like parameters for components starting with SPICE-standard prefixes like M, R, C, etc., adding "/" between pins and subcircuit name, and saving the file as ".cdl" instead of ".spice". 5) Estimated L and W for devices whose geometry is complex and do not reduce to a simple rectangle. L and W are estimated as the square root of the area. 6) Changed the method of extracting L and W for diodes to use the same method as capacitors. Note that diodes are not usually specified by L and W, but if they are, this will produce the right result. 7) Corrected the reported filename and line number when printing error messages related to errors inside a technology file, when the technology file uses "include" to combine multiple files.
2025-10-01 21:17:49 +02:00
/* Diode length and width are computed like capacitor */
/* length and width. This operation is expensive, so */
/* do this ONLY if length and width are specified as */
/* parameters. */
Added a new method to the extraction which allows parameter limits to be declared for each device model, so that different models can be specified for different parameter ranges. For example, this will simplify the definition of the high-sheet-rho poly resistors and the bipolar transistors in sky130 by removing the need for ID marker layers; it also allows the correct device model to be extracted when reading data from GDS that does not contain the extra (and not foundry-approved) ID markers.
2023-07-06 18:35:47 +02:00
devptr = extDevFindParamMatch(devptr, length, width);
A number of changes: 1) Corrected spurious error messages about cells already existing in GDS when using "flatten" or "flatglob". 2) Fixed handling of resistance as a subcircuit parameter 3) Added area and perimeter resistance for a device; this is done through the "devresist" statement in the tech file, which is an extension of the original "fetresist" statement. Where "fetresist" only supported type "linear", "devresist" supports types "area" and "perimeter". 4) Support for CDL syntax, including generating subcircuit-like parameters for components starting with SPICE-standard prefixes like M, R, C, etc., adding "/" between pins and subcircuit name, and saving the file as ".cdl" instead of ".spice". 5) Estimated L and W for devices whose geometry is complex and do not reduce to a simple rectangle. L and W are estimated as the square root of the area. 6) Changed the method of extracting L and W for diodes to use the same method as capacitors. Note that diodes are not usually specified by L and W, but if they are, this will produce the right result. 7) Corrected the reported filename and line number when printing error messages related to errors inside a technology file, when the technology file uses "include" to combine multiple files.
2025-10-01 21:17:49 +02:00
for (chkParam = devptr->exts_deviceParams; chkParam != NULL;
chkParam = chkParam->pl_next)
{
char param0;
if (chkParam->pl_name == NULL) continue;
param0 = tolower(chkParam->pl_param[0]);
if (param0 == 'l' || param0 == 'w') break;
}
if (chkParam != NULL)
{
for (n = 0; n < extTransRec.tr_nterm &&
extTransRec.tr_termnode[n] != NULL; n++);
if (n > 0)
{
LinkedBoundary *lb;
extSpecialBounds = (LinkedBoundary **)mallocMagic(n *
sizeof(LinkedBoundary *));
for (i = 0; i < n; i++) extSpecialBounds[i] = NULL;
/* Mark with reg and process each perimeter segment */
arg.fra_uninit = (ClientData) extTransRec.tr_gatenode;
arg.fra_region = (ExtRegion *) reg;
arg.fra_each = extAnnularTileFunc;
(void) ExtFindNeighbors(reg->treg_tile, arg.fra_pNum, &arg);
if (extComputeCapLW(&length, &width) == FALSE)
{
/* May be a complex area; fall back on
* computing an equivalent square area.
*/
length = (int)(sqrt((double)extTransRec.tr_termarea[0])
+ 0.5);
width = length;
}
/* Free the lists */
for (i = 0; i < n; i++)
for (lb = extSpecialBounds[i]; lb != NULL; lb = lb->b_next)
freeMagic((char *)lb);
freeMagic((char *)extSpecialBounds);
/* Put the region list back the way we found it: */
/* Re-mark with extTransRec.tr_gatenode */
arg.fra_uninit = (ClientData) reg;
arg.fra_region = (ExtRegion *) extTransRec.tr_gatenode;
arg.fra_each = (int (*)()) NULL;
(void) ExtFindNeighbors(reg->treg_tile, arg.fra_pNum, &arg);
}
}
Added a new method to the extraction which allows parameter limits to be declared for each device model, so that different models can be specified for different parameter ranges. For example, this will simplify the definition of the high-sheet-rho poly resistors and the bipolar transistors in sky130 by removing the need for ID marker layers; it also allows the correct device model to be extracted when reading data from GDS that does not contain the extra (and not foundry-approved) ID markers.
2023-07-06 18:35:47 +02:00
fprintf(outFile, "%s %s",
37 x warning: array subscript has type 'char' Compiler is expressing range concern with the warning mitigated by using unsigned C array offsets. This also draws attention to the range concern when reading the code and making changes. DBundo.c:263:45: warning: array subscript has type 'char' DBundo.c:279:49: warning: array subscript has type 'char' DBundo.c:317:52: warning: array subscript has type 'char' DBundo.c:318:64: warning: array subscript has type 'char' DBundo.c:324:52: warning: array subscript has type 'char' DBundo.c:325:64: warning: array subscript has type 'char' DBundo.c:329:50: warning: array subscript has type 'char' DBundo.c:330:58: warning: array subscript has type 'char' DBundo.c:338:52: warning: array subscript has type 'char' DBundo.c:339:64: warning: array subscript has type 'char' DBundo.c:345:52: warning: array subscript has type 'char' DBundo.c:346:64: warning: array subscript has type 'char' DBundo.c:350:50: warning: array subscript has type 'char' DBundo.c:351:58: warning: array subscript has type 'char' DBundo.c:371:52: warning: array subscript has type 'char' DBundo.c:372:64: warning: array subscript has type 'char' DBundo.c:378:52: warning: array subscript has type 'char' DBundo.c:379:64: warning: array subscript has type 'char' DBundo.c:383:50: warning: array subscript has type 'char' DBundo.c:384:58: warning: array subscript has type 'char' DBundo.c:392:52: warning: array subscript has type 'char' DBundo.c:393:57: warning: array subscript has type 'char' DBundo.c:399:52: warning: array subscript has type 'char' DBundo.c:400:57: warning: array subscript has type 'char' DBundo.c:403:53: warning: array subscript has type 'char' DBundo.c:407:50: warning: array subscript has type 'char' DBundo.c:408:58: warning: array subscript has type 'char' EFbuild.c:1048:32: warning: array subscript has type 'char' EFbuild.c:1056:32: warning: array subscript has type 'char' ExtBasic.c:2358:43: warning: array subscript has type 'char' ExtBasic.c:2493:43: warning: array subscript has type 'char' ExtBasic.c:2519:43: warning: array subscript has type 'char' ExtBasic.c:2644:43: warning: array subscript has type 'char' ExtBasic.c:2678:43: warning: array subscript has type 'char' ResPrint.c:143:43: warning: array subscript has type 'char' plotRutils.c:713:34: warning: array subscript has type 'char' plotRutils.c:786:29: warning: array subscript has type 'char' GCC14 -Wall cleanup series [-Wchar-subscripts]
2024-10-04 18:15:21 +02:00
extDevTable[(unsigned char)devptr->exts_deviceClass],
Added a new method to the extraction which allows parameter limits to be declared for each device model, so that different models can be specified for different parameter ranges. For example, this will simplify the definition of the high-sheet-rho poly resistors and the bipolar transistors in sky130 by removing the need for ID marker layers; it also allows the correct device model to be extracted when reading data from GDS that does not contain the extra (and not foundry-approved) ID markers.
2023-07-06 18:35:47 +02:00
devptr->exts_deviceName);
fprintf(outFile, " %d %d %d %d",
reg->treg_ll.p_x, reg->treg_ll.p_y,
reg->treg_ll.p_x + 1, reg->treg_ll.p_y + 1);
Implemented simple drain and source length calculations as device parameters l1 and l2. Provides a way to pass the source or drain length as a parameter for, for example, an extended FET drain implemented as a resistor abutting the FET gate. Could potentially be used as a way to determine source/drain area and perimeter without resorting to measurements of a shared node.
2022-12-15 03:40:24 +01:00
extOutputDevParams(reg, devptr, outFile, length, width,
Extended the device parameters to allow a terminal width that is different from the device (i.e., gate) width, for devices that do not define a MOS-like gate spanning the width of the device. This is restricted to the assumption that the terminal is rectangular and therefore a simple width and length can be derived from the area and perimeter. Also, length is defined as the smaller dimension and width as the larger dimension. For additional restrictions, see the updated documentation. This was added to allow correct width and length extraction of a bipolar emitter window, but may be more generally useful.
2024-12-06 22:42:43 +01:00
extTransRec.tr_termarea, extTransRec.tr_termperim);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
if (subsName != NULL)
fprintf(outFile, " \"%s\"", subsName);
break;
case DEV_RES:
case DEV_RSUBCKT:
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
hasModel = strcmp(devptr->exts_deviceName, "None");
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
length = extTransRec.tr_perim;
isAnnular = FALSE;
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/* Boundary perimeter scan for resistors with more than */
/* one tile. */
for (n = 0; n < extTransRec.tr_nterm; n++)
{
if (extTransRec.tr_termnode[n] == NULL) continue;
/* Mark annular resistors as requiring extra processing */
if (extTransRec.tr_termvector[n].p_x == 0 &&
extTransRec.tr_termvector[n].p_y == 0)
Tracked down an obscure error that was causing a property mismatch in the SkyWater sky130_fd_io__top_pwrdetv2 circuit because a resistor with ends shorted together was being assigned an incorrect length and width. This was due to the similarity in characteristics of the boundary vector between a shorted resistor and an annular resistor. The terminals need to be checked for shorted ends to disambiguate the two cases.
2024-11-15 04:22:27 +01:00
{
/* Update: 11/14/2024: A snake resistor with terminals
* tied together also has a zero termvector and should
* not be treated as annular!
*/
if ((n == 0) || (extTransRec.tr_termnode[n] !=
extTransRec.tr_termnode[n - 1]))
isAnnular = TRUE;
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
Tracked down an obscure error that was causing a property mismatch in the SkyWater sky130_fd_io__top_pwrdetv2 circuit because a resistor with ends shorted together was being assigned an incorrect length and width. This was due to the similarity in characteristics of the boundary vector between a shorted resistor and an annular resistor. The terminals need to be checked for shorted ends to disambiguate the two cases.
2024-11-15 04:22:27 +01:00
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
if (n == 0)
width = length = 0;
else if (ntiles > 1)
{
LinkedBoundary *lb;
extSpecialBounds = (LinkedBoundary **)mallocMagic(n *
sizeof(LinkedBoundary *));
for (i = 0; i < n; i++) extSpecialBounds[i] = NULL;
/* Mark with reg and process each perimeter segment */
arg.fra_uninit = (ClientData) extTransRec.tr_gatenode;
rename Region to ExtRegion On Macos, Tk includes X11, which has this define: #if !defined(MAC_OSX_TK) # include <X11/X.h> #endif #ifdef MAC_OSX_TK # include <X11/X.h> # define Cursor XCursor # define Region XRegion #endif This causes the keywords `Cursor` and `Region` to be reserved, which prevents magic from building. Rename `Region` to `ExtRegion` as suggested by @RTimothyEdwards in https://github.com/RTimothyEdwards/magic/issues/195#issuecomment-1298870983 and https://github.com/RTimothyEdwards/magic/pull/222#pullrequestreview-1334900670 Signed-off-by: Sean Cross <sean@xobs.io>
2023-02-24 03:27:08 +01:00
arg.fra_region = (ExtRegion *) reg;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
if (isAnnular)
arg.fra_each = extAnnularTileFunc;
else
arg.fra_each = extResistorTileFunc;
(void) ExtFindNeighbors(reg->treg_tile, arg.fra_pNum, &arg);
if (extSpecialBounds[0] != NULL)
{
extSeparateBounds(n - 1);
if (isAnnular)
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
extComputeEffectiveLW(&length, &width, n,
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
ExtCurStyle->exts_cornerChop[t]);
else
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
extComputeEffectiveLW(&width, &length, n,
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
ExtCurStyle->exts_cornerChop[t]);
}
else
{
if (ExtDoWarn)
extTransBad(def, reg->treg_tile,
"Could not determine resistor boundary");
length = width = 0;
}
/* Free the lists */
for (i = 0; i < n; i++)
for (lb = extSpecialBounds[i]; lb != NULL; lb = lb->b_next)
freeMagic((char *)lb);
freeMagic((char *)extSpecialBounds);
/* Put the region list back the way we found it: */
/* Re-mark with extTransRec.tr_gatenode */
arg.fra_uninit = (ClientData) reg;
rename Region to ExtRegion On Macos, Tk includes X11, which has this define: #if !defined(MAC_OSX_TK) # include <X11/X.h> #endif #ifdef MAC_OSX_TK # include <X11/X.h> # define Cursor XCursor # define Region XRegion #endif This causes the keywords `Cursor` and `Region` to be reserved, which prevents magic from building. Rename `Region` to `ExtRegion` as suggested by @RTimothyEdwards in https://github.com/RTimothyEdwards/magic/issues/195#issuecomment-1298870983 and https://github.com/RTimothyEdwards/magic/pull/222#pullrequestreview-1334900670 Signed-off-by: Sean Cross <sean@xobs.io>
2023-02-24 03:27:08 +01:00
arg.fra_region = (ExtRegion *) extTransRec.tr_gatenode;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
arg.fra_each = (int (*)()) NULL;
(void) ExtFindNeighbors(reg->treg_tile, arg.fra_pNum, &arg);
}
else
{
/* Single tile resistor means a simple L,W */
/* calculation from perimeter & area. */
width = 0;
for (n = 0; extTransRec.tr_termlen[n] != 0; n++)
{
width += extTransRec.tr_termlen[n];
length -= extTransRec.tr_termlen[n];
}
width >>= 1;
length >>= 1;
}
if (width)
{
dres = ExtCurStyle->exts_sheetResist[t] * (double)length /
(double)width;
if (ExtDoWarn && (n > 2))
{
if (hasModel)
sprintf(mesg, "Resistor has %d terminals: "
"extracted L/W will be wrong", n);
else
sprintf(mesg, "Resistor has %d terminals: "
"extracted value will be wrong", n);
extTransBad(def, reg->treg_tile, mesg);
}
}
else {
dres = 0.0;
if (ExtDoWarn)
extTransBad(def, reg->treg_tile,
"Resistor has zero width");
}
Added a new method to the extraction which allows parameter limits to be declared for each device model, so that different models can be specified for different parameter ranges. For example, this will simplify the definition of the high-sheet-rho poly resistors and the bipolar transistors in sky130 by removing the need for ID marker layers; it also allows the correct device model to be extracted when reading data from GDS that does not contain the extra (and not foundry-approved) ID markers.
2023-07-06 18:35:47 +02:00
devptr = extDevFindParamMatch(devptr, length, width);
fprintf(outFile, "%s %s",
37 x warning: array subscript has type 'char' Compiler is expressing range concern with the warning mitigated by using unsigned C array offsets. This also draws attention to the range concern when reading the code and making changes. DBundo.c:263:45: warning: array subscript has type 'char' DBundo.c:279:49: warning: array subscript has type 'char' DBundo.c:317:52: warning: array subscript has type 'char' DBundo.c:318:64: warning: array subscript has type 'char' DBundo.c:324:52: warning: array subscript has type 'char' DBundo.c:325:64: warning: array subscript has type 'char' DBundo.c:329:50: warning: array subscript has type 'char' DBundo.c:330:58: warning: array subscript has type 'char' DBundo.c:338:52: warning: array subscript has type 'char' DBundo.c:339:64: warning: array subscript has type 'char' DBundo.c:345:52: warning: array subscript has type 'char' DBundo.c:346:64: warning: array subscript has type 'char' DBundo.c:350:50: warning: array subscript has type 'char' DBundo.c:351:58: warning: array subscript has type 'char' DBundo.c:371:52: warning: array subscript has type 'char' DBundo.c:372:64: warning: array subscript has type 'char' DBundo.c:378:52: warning: array subscript has type 'char' DBundo.c:379:64: warning: array subscript has type 'char' DBundo.c:383:50: warning: array subscript has type 'char' DBundo.c:384:58: warning: array subscript has type 'char' DBundo.c:392:52: warning: array subscript has type 'char' DBundo.c:393:57: warning: array subscript has type 'char' DBundo.c:399:52: warning: array subscript has type 'char' DBundo.c:400:57: warning: array subscript has type 'char' DBundo.c:403:53: warning: array subscript has type 'char' DBundo.c:407:50: warning: array subscript has type 'char' DBundo.c:408:58: warning: array subscript has type 'char' EFbuild.c:1048:32: warning: array subscript has type 'char' EFbuild.c:1056:32: warning: array subscript has type 'char' ExtBasic.c:2358:43: warning: array subscript has type 'char' ExtBasic.c:2493:43: warning: array subscript has type 'char' ExtBasic.c:2519:43: warning: array subscript has type 'char' ExtBasic.c:2644:43: warning: array subscript has type 'char' ExtBasic.c:2678:43: warning: array subscript has type 'char' ResPrint.c:143:43: warning: array subscript has type 'char' plotRutils.c:713:34: warning: array subscript has type 'char' plotRutils.c:786:29: warning: array subscript has type 'char' GCC14 -Wall cleanup series [-Wchar-subscripts]
2024-10-04 18:15:21 +02:00
extDevTable[(unsigned char)devptr->exts_deviceClass],
Added a new method to the extraction which allows parameter limits to be declared for each device model, so that different models can be specified for different parameter ranges. For example, this will simplify the definition of the high-sheet-rho poly resistors and the bipolar transistors in sky130 by removing the need for ID marker layers; it also allows the correct device model to be extracted when reading data from GDS that does not contain the extra (and not foundry-approved) ID markers.
2023-07-06 18:35:47 +02:00
devptr->exts_deviceName);
fprintf(outFile, " %d %d %d %d",
reg->treg_ll.p_x, reg->treg_ll.p_y,
reg->treg_ll.p_x + 1, reg->treg_ll.p_y + 1);
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
if (devptr->exts_deviceClass == DEV_RSUBCKT)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
Moved new work on magic-8.4 (experimental merging of micromagic bplane structure into magic-8.2) into the newly-reorganized git repo as branch "bplane".
2019-03-23 00:58:47 +01:00
/* (Nothing) */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
else if (hasModel) /* SPICE semiconductor resistor */
{
fprintf(outFile, " %d %d", length, width);
if (subsName != NULL)
fprintf(outFile, " \"%s\"", subsName);
}
else /* regular resistor */
fprintf(outFile, " %g", dres / 1000.0); /* mOhms -> Ohms */
Corrected an apparently long-standing (but relatively obscure) error where devices extracted as "device resistor" or "device capacitor" and defining parameters (e.g., area, perimeter) will generate the device arguments in the wrong order in the .ext file, resulting in incorrect readback when attempting to do ext2spice, resulting in the device being omitted from the resulting netlist.
2019-01-30 23:16:50 +01:00
Implemented simple drain and source length calculations as device parameters l1 and l2. Provides a way to pass the source or drain length as a parameter for, for example, an extended FET drain implemented as a resistor abutting the FET gate. Could potentially be used as a way to determine source/drain area and perimeter without resorting to measurements of a shared node.
2022-12-15 03:40:24 +01:00
extOutputDevParams(reg, devptr, outFile, length, width,
Extended the device parameters to allow a terminal width that is different from the device (i.e., gate) width, for devices that do not define a MOS-like gate spanning the width of the device. This is restricted to the assumption that the terminal is rectangular and therefore a simple width and length can be derived from the area and perimeter. Also, length is defined as the smaller dimension and width as the larger dimension. For additional restrictions, see the updated documentation. This was added to allow correct width and length extraction of a bipolar emitter window, but may be more generally useful.
2024-12-06 22:42:43 +01:00
extTransRec.tr_termarea, extTransRec.tr_termperim);
Corrected an apparently long-standing (but relatively obscure) error where devices extracted as "device resistor" or "device capacitor" and defining parameters (e.g., area, perimeter) will generate the device arguments in the wrong order in the .ext file, resulting in incorrect readback when attempting to do ext2spice, resulting in the device being omitted from the resulting netlist.
2019-01-30 23:16:50 +01:00
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
if (devptr->exts_deviceClass == DEV_RSUBCKT)
Corrected an apparently long-standing (but relatively obscure) error where devices extracted as "device resistor" or "device capacitor" and defining parameters (e.g., area, perimeter) will generate the device arguments in the wrong order in the .ext file, resulting in incorrect readback when attempting to do ext2spice, resulting in the device being omitted from the resulting netlist.
2019-01-30 23:16:50 +01:00
{
fprintf(outFile, " \"%s\"", (subsName == NULL) ?
"None" : subsName);
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
break;
case DEV_CAP:
case DEV_CAPREV:
Added extraction device type "csubcircuit", which should have been added a long time ago, since capacitors use a different method for calculating width and length than either transistors or resistors, so subcircuits need a special class designator or else the extraction may calculate the wrong dimensions for device width by totalling the perimeter between the device and terminal types, as it would for a MOSFET.
2018-10-30 21:19:20 +01:00
case DEV_CSUBCKT:
Added a new method to the extraction which allows parameter limits to be declared for each device model, so that different models can be specified for different parameter ranges. For example, this will simplify the definition of the high-sheet-rho poly resistors and the bipolar transistors in sky130 by removing the need for ID marker layers; it also allows the correct device model to be extracted when reading data from GDS that does not contain the extra (and not foundry-approved) ID markers.
2023-07-06 18:35:47 +02:00
fprintf(outFile, "%s %s",
37 x warning: array subscript has type 'char' Compiler is expressing range concern with the warning mitigated by using unsigned C array offsets. This also draws attention to the range concern when reading the code and making changes. DBundo.c:263:45: warning: array subscript has type 'char' DBundo.c:279:49: warning: array subscript has type 'char' DBundo.c:317:52: warning: array subscript has type 'char' DBundo.c:318:64: warning: array subscript has type 'char' DBundo.c:324:52: warning: array subscript has type 'char' DBundo.c:325:64: warning: array subscript has type 'char' DBundo.c:329:50: warning: array subscript has type 'char' DBundo.c:330:58: warning: array subscript has type 'char' DBundo.c:338:52: warning: array subscript has type 'char' DBundo.c:339:64: warning: array subscript has type 'char' DBundo.c:345:52: warning: array subscript has type 'char' DBundo.c:346:64: warning: array subscript has type 'char' DBundo.c:350:50: warning: array subscript has type 'char' DBundo.c:351:58: warning: array subscript has type 'char' DBundo.c:371:52: warning: array subscript has type 'char' DBundo.c:372:64: warning: array subscript has type 'char' DBundo.c:378:52: warning: array subscript has type 'char' DBundo.c:379:64: warning: array subscript has type 'char' DBundo.c:383:50: warning: array subscript has type 'char' DBundo.c:384:58: warning: array subscript has type 'char' DBundo.c:392:52: warning: array subscript has type 'char' DBundo.c:393:57: warning: array subscript has type 'char' DBundo.c:399:52: warning: array subscript has type 'char' DBundo.c:400:57: warning: array subscript has type 'char' DBundo.c:403:53: warning: array subscript has type 'char' DBundo.c:407:50: warning: array subscript has type 'char' DBundo.c:408:58: warning: array subscript has type 'char' EFbuild.c:1048:32: warning: array subscript has type 'char' EFbuild.c:1056:32: warning: array subscript has type 'char' ExtBasic.c:2358:43: warning: array subscript has type 'char' ExtBasic.c:2493:43: warning: array subscript has type 'char' ExtBasic.c:2519:43: warning: array subscript has type 'char' ExtBasic.c:2644:43: warning: array subscript has type 'char' ExtBasic.c:2678:43: warning: array subscript has type 'char' ResPrint.c:143:43: warning: array subscript has type 'char' plotRutils.c:713:34: warning: array subscript has type 'char' plotRutils.c:786:29: warning: array subscript has type 'char' GCC14 -Wall cleanup series [-Wchar-subscripts]
2024-10-04 18:15:21 +02:00
extDevTable[(unsigned char)devptr->exts_deviceClass],
Added a new method to the extraction which allows parameter limits to be declared for each device model, so that different models can be specified for different parameter ranges. For example, this will simplify the definition of the high-sheet-rho poly resistors and the bipolar transistors in sky130 by removing the need for ID marker layers; it also allows the correct device model to be extracted when reading data from GDS that does not contain the extra (and not foundry-approved) ID markers.
2023-07-06 18:35:47 +02:00
devptr->exts_deviceName);
fprintf(outFile, " %d %d %d %d",
reg->treg_ll.p_x, reg->treg_ll.p_y,
reg->treg_ll.p_x + 1, reg->treg_ll.p_y + 1);
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
hasModel = strcmp(devptr->exts_deviceName, "None");
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
if (hasModel)
{
for (n = 0; n < extTransRec.tr_nterm &&
extTransRec.tr_termnode[n] != NULL; n++);
/* Don't know what to do (yet) with capacitors */
/* multiple terminals (see below); treat them in */
/* the original naive manner. */
if (n == 0)
{
width = 0;
extTransBad(def, reg->treg_tile,
"Capacitor has zero size");
fprintf(outFile, " 0 0");
}
else
{
/* Special handling of multiple-tile areas. */
/* This algorithm assumes that the capacitor */
/* has one terminal and that the area is a */
/* rectangle. It should be extended to output */
/* multiple capacitors for multiple rectangular */
/* areas, combining to form any arbitrary shape */
LinkedBoundary *lb;
extSpecialBounds = (LinkedBoundary **)mallocMagic(n *
sizeof(LinkedBoundary *));
for (i = 0; i < n; i++) extSpecialBounds[i] = NULL;
/* Mark with reg and process each perimeter segment */
arg.fra_uninit = (ClientData) extTransRec.tr_gatenode;
rename Region to ExtRegion On Macos, Tk includes X11, which has this define: #if !defined(MAC_OSX_TK) # include <X11/X.h> #endif #ifdef MAC_OSX_TK # include <X11/X.h> # define Cursor XCursor # define Region XRegion #endif This causes the keywords `Cursor` and `Region` to be reserved, which prevents magic from building. Rename `Region` to `ExtRegion` as suggested by @RTimothyEdwards in https://github.com/RTimothyEdwards/magic/issues/195#issuecomment-1298870983 and https://github.com/RTimothyEdwards/magic/pull/222#pullrequestreview-1334900670 Signed-off-by: Sean Cross <sean@xobs.io>
2023-02-24 03:27:08 +01:00
arg.fra_region = (ExtRegion *) reg;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
arg.fra_each = extAnnularTileFunc;
(void) ExtFindNeighbors(reg->treg_tile, arg.fra_pNum, &arg);
A number of changes: 1) Corrected spurious error messages about cells already existing in GDS when using "flatten" or "flatglob". 2) Fixed handling of resistance as a subcircuit parameter 3) Added area and perimeter resistance for a device; this is done through the "devresist" statement in the tech file, which is an extension of the original "fetresist" statement. Where "fetresist" only supported type "linear", "devresist" supports types "area" and "perimeter". 4) Support for CDL syntax, including generating subcircuit-like parameters for components starting with SPICE-standard prefixes like M, R, C, etc., adding "/" between pins and subcircuit name, and saving the file as ".cdl" instead of ".spice". 5) Estimated L and W for devices whose geometry is complex and do not reduce to a simple rectangle. L and W are estimated as the square root of the area. 6) Changed the method of extracting L and W for diodes to use the same method as capacitors. Note that diodes are not usually specified by L and W, but if they are, this will produce the right result. 7) Corrected the reported filename and line number when printing error messages related to errors inside a technology file, when the technology file uses "include" to combine multiple files.
2025-10-01 21:17:49 +02:00
if (extComputeCapLW(&length, &width) == FALSE)
{
/* May be a complex area; fall back on
* computing an equivalent square area.
*/
length = (int)(sqrt((double)extTransRec.tr_termarea[0])
+ 0.5);
width = length;
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/* Free the lists */
for (i = 0; i < n; i++)
for (lb = extSpecialBounds[i]; lb != NULL; lb = lb->b_next)
freeMagic((char *)lb);
freeMagic((char *)extSpecialBounds);
/* Put the region list back the way we found it: */
/* Re-mark with extTransRec.tr_gatenode */
arg.fra_uninit = (ClientData) reg;
rename Region to ExtRegion On Macos, Tk includes X11, which has this define: #if !defined(MAC_OSX_TK) # include <X11/X.h> #endif #ifdef MAC_OSX_TK # include <X11/X.h> # define Cursor XCursor # define Region XRegion #endif This causes the keywords `Cursor` and `Region` to be reserved, which prevents magic from building. Rename `Region` to `ExtRegion` as suggested by @RTimothyEdwards in https://github.com/RTimothyEdwards/magic/issues/195#issuecomment-1298870983 and https://github.com/RTimothyEdwards/magic/pull/222#pullrequestreview-1334900670 Signed-off-by: Sean Cross <sean@xobs.io>
2023-02-24 03:27:08 +01:00
arg.fra_region = (ExtRegion *) extTransRec.tr_gatenode;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
arg.fra_each = (int (*)()) NULL;
(void) ExtFindNeighbors(reg->treg_tile, arg.fra_pNum, &arg);
}
Added extraction device type "csubcircuit", which should have been added a long time ago, since capacitors use a different method for calculating width and length than either transistors or resistors, so subcircuits need a special class designator or else the extraction may calculate the wrong dimensions for device width by totalling the perimeter between the device and terminal types, as it would for a MOSFET.
2018-10-30 21:19:20 +01:00
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
if (devptr->exts_deviceClass == DEV_CSUBCKT)
Added extraction device type "csubcircuit", which should have been added a long time ago, since capacitors use a different method for calculating width and length than either transistors or resistors, so subcircuits need a special class designator or else the extraction may calculate the wrong dimensions for device width by totalling the perimeter between the device and terminal types, as it would for a MOSFET.
2018-10-30 21:19:20 +01:00
{
Moved new work on magic-8.4 (experimental merging of micromagic bplane structure into magic-8.2) into the newly-reorganized git repo as branch "bplane".
2019-03-23 00:58:47 +01:00
/* (Nothing) */
Added extraction device type "csubcircuit", which should have been added a long time ago, since capacitors use a different method for calculating width and length than either transistors or resistors, so subcircuits need a special class designator or else the extraction may calculate the wrong dimensions for device width by totalling the perimeter between the device and terminal types, as it would for a MOSFET.
2018-10-30 21:19:20 +01:00
}
A number of changes: 1) Corrected spurious error messages about cells already existing in GDS when using "flatten" or "flatglob". 2) Fixed handling of resistance as a subcircuit parameter 3) Added area and perimeter resistance for a device; this is done through the "devresist" statement in the tech file, which is an extension of the original "fetresist" statement. Where "fetresist" only supported type "linear", "devresist" supports types "area" and "perimeter". 4) Support for CDL syntax, including generating subcircuit-like parameters for components starting with SPICE-standard prefixes like M, R, C, etc., adding "/" between pins and subcircuit name, and saving the file as ".cdl" instead of ".spice". 5) Estimated L and W for devices whose geometry is complex and do not reduce to a simple rectangle. L and W are estimated as the square root of the area. 6) Changed the method of extracting L and W for diodes to use the same method as capacitors. Note that diodes are not usually specified by L and W, but if they are, this will produce the right result. 7) Corrected the reported filename and line number when printing error messages related to errors inside a technology file, when the technology file uses "include" to combine multiple files.
2025-10-01 21:17:49 +02:00
else /* SPICE semiconductor capacitor */
Added extraction device type "csubcircuit", which should have been added a long time ago, since capacitors use a different method for calculating width and length than either transistors or resistors, so subcircuits need a special class designator or else the extraction may calculate the wrong dimensions for device width by totalling the perimeter between the device and terminal types, as it would for a MOSFET.
2018-10-30 21:19:20 +01:00
{
Corrected an error in the last commit that causes serious problems in the SPICE netlist when using new device "csubcircuit" due to a mismatch in the expected number of parameters. However, more work needs to be done to cover capacitor top and bottom plates on different planes.
2018-10-30 22:17:49 +01:00
if ((length * width) > reg->treg_area)
{
if (ExtDoWarn)
extTransBad(def, reg->treg_tile, "L,W estimated "
"for non-rectangular capacitor.");
fprintf(outFile, " %d %d", width,
reg->treg_area / width);
}
else
fprintf(outFile, " %d %d", length, width);
Added extraction device type "csubcircuit", which should have been added a long time ago, since capacitors use a different method for calculating width and length than either transistors or resistors, so subcircuits need a special class designator or else the extraction may calculate the wrong dimensions for device width by totalling the perimeter between the device and terminal types, as it would for a MOSFET.
2018-10-30 21:19:20 +01:00
if (subsName != NULL)
fprintf(outFile, " \"%s\"", subsName);
}
Corrected an apparently long-standing (but relatively obscure) error where devices extracted as "device resistor" or "device capacitor" and defining parameters (e.g., area, perimeter) will generate the device arguments in the wrong order in the .ext file, resulting in incorrect readback when attempting to do ext2spice, resulting in the device being omitted from the resulting netlist.
2019-01-30 23:16:50 +01:00
Implemented simple drain and source length calculations as device parameters l1 and l2. Provides a way to pass the source or drain length as a parameter for, for example, an extended FET drain implemented as a resistor abutting the FET gate. Could potentially be used as a way to determine source/drain area and perimeter without resorting to measurements of a shared node.
2022-12-15 03:40:24 +01:00
extOutputDevParams(reg, devptr, outFile, length, width,
Extended the device parameters to allow a terminal width that is different from the device (i.e., gate) width, for devices that do not define a MOS-like gate spanning the width of the device. This is restricted to the assumption that the terminal is rectangular and therefore a simple width and length can be derived from the area and perimeter. Also, length is defined as the smaller dimension and width as the larger dimension. For additional restrictions, see the updated documentation. This was added to allow correct width and length extraction of a bipolar emitter window, but may be more generally useful.
2024-12-06 22:42:43 +01:00
extTransRec.tr_termarea, extTransRec.tr_termperim);
Corrected an apparently long-standing (but relatively obscure) error where devices extracted as "device resistor" or "device capacitor" and defining parameters (e.g., area, perimeter) will generate the device arguments in the wrong order in the .ext file, resulting in incorrect readback when attempting to do ext2spice, resulting in the device being omitted from the resulting netlist.
2019-01-30 23:16:50 +01:00
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
if (devptr->exts_deviceClass == DEV_CSUBCKT)
Corrected an apparently long-standing (but relatively obscure) error where devices extracted as "device resistor" or "device capacitor" and defining parameters (e.g., area, perimeter) will generate the device arguments in the wrong order in the .ext file, resulting in incorrect readback when attempting to do ext2spice, resulting in the device being omitted from the resulting netlist.
2019-01-30 23:16:50 +01:00
{
fprintf(outFile, " \"%s\"", (subsName == NULL) ?
"None" : subsName);
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
else
{
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
dcap = (devptr->exts_deviceGateCap * reg->treg_area) +
(devptr->exts_deviceSDCap * extTransRec.tr_perim);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
fprintf(outFile, " %g", dcap / 1000.0); /* aF -> fF */
}
break;
}
/* gate */
node = (NodeRegion *) extGetRegion(reg->treg_tile);
ll = node->nreg_labels;
extTransOutTerminal((LabRegion *) node, ll, LL_GATEATTR,
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
extTransRec.tr_gatelen, 0, 0, 0, outFile);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/* Sort source and drain terminals by position, unless the */
/* device is asymmetric, in which case source and drain do not */
/* permute, and the terminal order is fixed. */
Corrected an error in search for substrate under a device. If "space" is considered part of the substrate, then the check for planes to search should exclude "space" from the type mask first. Otherwise, all planes get searched, not just the substrate. Also: The same routine can falsely flag a device terminal as substrate if a split tile is marked as the device's region. This was also fixed.
2023-04-24 23:30:40 +02:00
switch (devptr->exts_deviceClass)
{
case DEV_FET:
case DEV_MOSFET:
case DEV_MSUBCKT:
if (TTMaskIsZero(&devptr->exts_deviceSDTypes[1]))
ExtSortTerminals(&extTransRec, ll);
break;
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/* each non-gate terminal */
for (nsd = 0; nsd < extTransRec.tr_nterm; nsd++)
extTransOutTerminal((LabRegion *) extTransRec.tr_termnode[nsd], ll,
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
nsd, extTransRec.tr_termlen[nsd],
extTransRec.tr_termarea[nsd],
extTransRec.tr_termperim[nsd],
extTransRec.tr_termshared[nsd], outFile);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
(void) fputs("\n", outFile);
}
}
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
/* Structure to hold a node region and a tile type */
typedef struct _node_type {
NodeRegion *region;
TileType layer;
} NodeAndType;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
int
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
extTransFindSubs(tile, t, mask, def, sn, layerptr)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Tile *tile;
TileType t;
TileTypeBitMask *mask;
CellDef *def;
NodeRegion **sn;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
TileType *layerptr;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
Corrected one final case of extracting an extended-drain pFET because the opposite type (pwell) is not directly underneath the gate, but touches it on the plane below. Because the pwell may be represented by space tiles on the well plane, it was also necessary to deal with the space type in the bitmask.
2020-09-22 02:23:37 +02:00
Rect tileArea, tileAreaPlus;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
int pNum;
int extTransFindSubsFunc1(); /* Forward declaration */
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
NodeAndType noderec;
Corrected an error in search for substrate under a device. If "space" is considered part of the substrate, then the check for planes to search should exclude "space" from the type mask first. Otherwise, all planes get searched, not just the substrate. Also: The same routine can falsely flag a device terminal as substrate if a split tile is marked as the device's region. This was also fixed.
2023-04-24 23:30:40 +02:00
TileTypeBitMask lmask;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
noderec.region = (NodeRegion *)NULL;
noderec.layer = TT_SPACE;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
TiToRect(tile, &tileArea);
Corrected one final case of extracting an extended-drain pFET because the opposite type (pwell) is not directly underneath the gate, but touches it on the plane below. Because the pwell may be represented by space tiles on the well plane, it was also necessary to deal with the space type in the bitmask.
2020-09-22 02:23:37 +02:00
/* Expand tile area by 1 in all directions. This catches terminals */
/* on certain extended drain MOSFET devices. */
GEO_EXPAND(&tileArea, 1, &tileAreaPlus);
Corrected an error in search for substrate under a device. If "space" is considered part of the substrate, then the check for planes to search should exclude "space" from the type mask first. Otherwise, all planes get searched, not just the substrate. Also: The same routine can falsely flag a device terminal as substrate if a split tile is marked as the device's region. This was also fixed.
2023-04-24 23:30:40 +02:00
/* If mask includes TT_SPACE, make sure that is removed before */
/* determining a plane intersection (because space intersects all */
/* planes). */
lmask = *mask;
TTMaskClearType(&lmask, TT_SPACE);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
for (pNum = PL_TECHDEPBASE; pNum < DBNumPlanes; pNum++)
{
Corrected an error in search for substrate under a device. If "space" is considered part of the substrate, then the check for planes to search should exclude "space" from the type mask first. Otherwise, all planes get searched, not just the substrate. Also: The same routine can falsely flag a device terminal as substrate if a split tile is marked as the device's region. This was also fixed.
2023-04-24 23:30:40 +02:00
if (TTMaskIntersect(&DBPlaneTypes[pNum], &lmask))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
Corrected one final case of extracting an extended-drain pFET because the opposite type (pwell) is not directly underneath the gate, but touches it on the plane below. Because the pwell may be represented by space tiles on the well plane, it was also necessary to deal with the space type in the bitmask.
2020-09-22 02:23:37 +02:00
if (DBSrPaintArea((Tile *) NULL, def->cd_planes[pNum], &tileAreaPlus,
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
mask, extTransFindSubsFunc1, (ClientData)&noderec))
{
*sn = noderec.region;
if (layerptr) *layerptr = noderec.layer;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
return 1;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
}
return 0;
}
int
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
extTransFindSubsFunc1(tile, noderecptr)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Tile *tile;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
NodeAndType *noderecptr;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
TileType type;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/* Report split substrate region errors (two different substrate
* regions under the same device)
*/
TiGetClient() excessive use hotspots This is reducing nearby calls to TiGetClient() API when the value can be looked up one time and stored in a local variable to make other decisions about. This is due to TiGetClient() potentially having a slightly higher cost to call than previously, this is a kind of peephole optimization approach (if I can see multiple getters used within the window it got optmized). 'ticlient' was used for retrieval as ClientData so that future greps across the codebase for `ti_client` should only match naked access.
2025-02-21 18:57:13 +01:00
ClientData ticlient = TiGetClient(tile);
if (ticlient != extUnInit)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
TiGetClient() excessive use hotspots This is reducing nearby calls to TiGetClient() API when the value can be looked up one time and stored in a local variable to make other decisions about. This is due to TiGetClient() potentially having a slightly higher cost to call than previously, this is a kind of peephole optimization approach (if I can see multiple getters used within the window it got optmized). 'ticlient' was used for retrieval as ClientData so that future greps across the codebase for `ti_client` should only match naked access.
2025-02-21 18:57:13 +01:00
NodeRegion *reg = (NodeRegion *) CD2PTR(ticlient);
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
if ((noderecptr->region != (NodeRegion *)NULL) &&
TiGetClient() excessive use hotspots This is reducing nearby calls to TiGetClient() API when the value can be looked up one time and stored in a local variable to make other decisions about. This is due to TiGetClient() potentially having a slightly higher cost to call than previously, this is a kind of peephole optimization approach (if I can see multiple getters used within the window it got optmized). 'ticlient' was used for retrieval as ClientData so that future greps across the codebase for `ti_client` should only match naked access.
2025-02-21 18:57:13 +01:00
(noderecptr->region != reg))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
TxError("Warning: Split substrate under device at (%d %d)\n",
tile->ti_ll.p_x, tile->ti_ll.p_y);
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
if (IsSplit(tile))
Corrected an error in search for substrate under a device. If "space" is considered part of the substrate, then the check for planes to search should exclude "space" from the type mask first. Otherwise, all planes get searched, not just the substrate. Also: The same routine can falsely flag a device terminal as substrate if a split tile is marked as the device's region. This was also fixed.
2023-04-24 23:30:40 +02:00
{
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
type = (SplitSide(tile)) ? SplitRightType(tile): SplitLeftType(tile);
Corrected an error in search for substrate under a device. If "space" is considered part of the substrate, then the check for planes to search should exclude "space" from the type mask first. Otherwise, all planes get searched, not just the substrate. Also: The same routine can falsely flag a device terminal as substrate if a split tile is marked as the device's region. This was also fixed.
2023-04-24 23:30:40 +02:00
if (type == TT_SPACE) return 0; /* Ignore space in split tiles */
}
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
else
type = TiGetTypeExact(tile);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
TiGetClient() excessive use hotspots This is reducing nearby calls to TiGetClient() API when the value can be looked up one time and stored in a local variable to make other decisions about. This is due to TiGetClient() potentially having a slightly higher cost to call than previously, this is a kind of peephole optimization approach (if I can see multiple getters used within the window it got optmized). 'ticlient' was used for retrieval as ClientData so that future greps across the codebase for `ti_client` should only match naked access.
2025-02-21 18:57:13 +01:00
noderecptr->region = (NodeRegion *) reg;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
noderecptr->layer = type;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
return 1;
}
return 0;
}
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
int
extTransFindId(tile, mask, def, idtypeptr)
Tile *tile;
TileTypeBitMask *mask;
CellDef *def;
TileType *idtypeptr;
{
TileType type;
Rect tileArea;
int pNum;
int extTransFindIdFunc1(); /* Forward declaration */
TiToRect(tile, &tileArea);
for (pNum = PL_TECHDEPBASE; pNum < DBNumPlanes; pNum++)
{
if (TTMaskIntersect(&DBPlaneTypes[pNum], mask))
{
if (DBSrPaintArea((Tile *) NULL, def->cd_planes[pNum], &tileArea,
mask, extTransFindIdFunc1, (ClientData)idtypeptr))
return 1;
}
}
return 0;
}
int
extTransFindIdFunc1(tile, idtypeptr)
Tile *tile;
TileType *idtypeptr;
{
/*
* ID Layer found overlapping device area, so return 1 to halt search.
*/
if (IsSplit(tile))
*idtypeptr = (SplitSide(tile)) ? SplitRightType(tile): SplitLeftType(tile);
else
*idtypeptr = TiGetTypeExact(tile);
return 1;
}
/*
* ----------------------------------------------------------------------------
*
* extDevFindMatch --
*
* Find and return the next matching device record. extTransRec is queried
* to find how many fields have been matched to the device already. Then
* it finds the next record with the same matching fields. Because records
* are in no specific order, it will loop to the beginning of the records
* after reaching the end. It is the responsibility of the calling routine to
* determine if all matching devices have been tested.
*
* deventry is the record position to start the search.
* t is the tile type of the device.
* ----------------------------------------------------------------------------
*/
ExtDevice *
extDevFindMatch(deventry, t)
ExtDevice *deventry;
TileType t;
{
ExtDevice *devptr;
Modified the new extraction method with multiple records for each device type so that it is now properly backwards compatible with the old-style "fet" records. Also corrected the record matching such that it properly matches according to the number of terminals while allowing the traditional interpretation that there may be fewer S/D type records than terminals if the S/D types are the same for all terminals.
2019-10-14 17:09:58 +02:00
int i, j, k, matchflags;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
bool match;
matchflags = extTransRec.tr_devmatch;
if (deventry->exts_next == NULL)
devptr = ExtCurStyle->exts_device[t];
else
devptr = deventry->exts_next;
for (; devptr != deventry;
devptr = (devptr->exts_next) ? devptr->exts_next :
ExtCurStyle->exts_device[t])
{
if (matchflags == 0) break; /* Always return next entry */
if (matchflags & MATCH_ID) /* Must have the same identifier */
if (!TTMaskEqual(&devptr->exts_deviceIdentifierTypes,
&deventry->exts_deviceIdentifierTypes)) continue;
if (matchflags & MATCH_SUB) /* Must have the same substrate type */
if (!TTMaskEqual(&devptr->exts_deviceSubstrateTypes,
&deventry->exts_deviceSubstrateTypes)) continue;
Added a new method to the extraction which allows parameter limits to be declared for each device model, so that different models can be specified for different parameter ranges. For example, this will simplify the definition of the high-sheet-rho poly resistors and the bipolar transistors in sky130 by removing the need for ID marker layers; it also allows the correct device model to be extracted when reading data from GDS that does not contain the extra (and not foundry-approved) ID markers.
2023-07-06 18:35:47 +02:00
if (matchflags & MATCH_PARAM) /* Must have compatible parameter range */
/* To be completed */
;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
j = MATCH_TERM;
Modified the new extraction method with multiple records for each device type so that it is now properly backwards compatible with the old-style "fet" records. Also corrected the record matching such that it properly matches according to the number of terminals while allowing the traditional interpretation that there may be fewer S/D type records than terminals if the S/D types are the same for all terminals.
2019-10-14 17:09:58 +02:00
i = 0;
Restored compiling of the non-Tcl/Tk version of magic. This has traditionally been kept for backwards compatibility. However, the operation of "ext2spice" and "ext2sim" as separate programs has become extremely difficult to maintain, and so it has been dropped in favor of folding both into the program as commands, as was done a long time ago in the Tcl/Tk version.
2022-02-08 22:12:07 +01:00
match = TRUE;
Modified the new extraction method with multiple records for each device type so that it is now properly backwards compatible with the old-style "fet" records. Also corrected the record matching such that it properly matches according to the number of terminals while allowing the traditional interpretation that there may be fewer S/D type records than terminals if the S/D types are the same for all terminals.
2019-10-14 17:09:58 +02:00
for (k = 0; k < devptr->exts_deviceSDCount; k++)
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
{
Modified the new extraction method with multiple records for each device type so that it is now properly backwards compatible with the old-style "fet" records. Also corrected the record matching such that it properly matches according to the number of terminals while allowing the traditional interpretation that there may be fewer S/D type records than terminals if the S/D types are the same for all terminals.
2019-10-14 17:09:58 +02:00
if (extTransRec.tr_termnode[k] == NULL) break;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
if (matchflags & j) /* Must have the same terminal type */
{
if (TTMaskIsZero(&devptr->exts_deviceSDTypes[i]))
{
Restored compiling of the non-Tcl/Tk version of magic. This has traditionally been kept for backwards compatibility. However, the operation of "ext2spice" and "ext2sim" as separate programs has become extremely difficult to maintain, and so it has been dropped in favor of folding both into the program as commands, as was done a long time ago in the Tcl/Tk version.
2022-02-08 22:12:07 +01:00
match = FALSE;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
break;
}
if (!TTMaskEqual(&devptr->exts_deviceSDTypes[i],
&deventry->exts_deviceSDTypes[i]))
{
Restored compiling of the non-Tcl/Tk version of magic. This has traditionally been kept for backwards compatibility. However, the operation of "ext2spice" and "ext2sim" as separate programs has become extremely difficult to maintain, and so it has been dropped in favor of folding both into the program as commands, as was done a long time ago in the Tcl/Tk version.
2022-02-08 22:12:07 +01:00
match = FALSE;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
break;
}
}
Modified the new extraction method with multiple records for each device type so that it is now properly backwards compatible with the old-style "fet" records. Also corrected the record matching such that it properly matches according to the number of terminals while allowing the traditional interpretation that there may be fewer S/D type records than terminals if the S/D types are the same for all terminals.
2019-10-14 17:09:58 +02:00
j <<= 1;
/* NOTE: There are fewer exts_deviceSDTypes records than */
/* terminals if all S/D terminals are the same type. In */
/* that case k increments and j bit shifts but i remains */
/* the same. */
if (!TTMaskIsZero(&devptr->exts_deviceSDTypes[i + 1])) i++;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
}
if (match) break;
}
return (devptr == deventry) ? NULL : devptr;
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*
* ----------------------------------------------------------------------------
*
* extTransTileFunc --
*
* Filter function called by ExtFindNeighbors for each tile in a
* transistor. Responsible for collecting the nodes, lengths,
* and attributes of all the terminals on this transistor.
*
* Results:
* Returns 0 always.
*
* Side effects:
* Fills in the transRec structure extTransRec.
*
* ----------------------------------------------------------------------------
*/
int
extTransTileFunc(tile, pNum, arg)
Tile *tile;
int pNum;
FindRegion *arg;
{
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
TileTypeBitMask mask, cmask, *smask;
TileType loctype, idlayer, sublayer;
Added code to calculate area and perimeter of layers that are not on the same plane as a device identifier layer. This (finally!) allows proper calculation of area and perimeter of diodes and bipolars, for example.
2023-06-09 21:31:58 +02:00
int perim, result, i;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
bool allow_globsubsnode;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
ExtDevice *devptr, *deventry, *devtest;
NodeRegion *region;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
LabelList *ll;
Label *lab;
Rect r;
Added code to calculate area and perimeter of layers that are not on the same plane as a device identifier layer. This (finally!) allows proper calculation of area and perimeter of diodes and bipolars, for example.
2023-06-09 21:31:58 +02:00
TITORECT(tile, &r);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
for (ll = extTransRec.tr_gatenode->nreg_labels; ll; ll = ll->ll_next)
{
/* Skip if already marked */
if (ll->ll_attr != LL_NOATTR) continue;
lab = ll->ll_label;
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
if (GEO_TOUCH(&r, &lab->lab_rect) &&
extLabType(lab->lab_text, LABTYPE_GATEATTR))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
ll->ll_attr = LL_GATEATTR;
}
}
/*
* Visit each segment of the perimeter of this tile that
* that borders on something of a different type.
*/
if (IsSplit(tile))
{
loctype = (SplitSide(tile)) ? SplitRightType(tile): SplitLeftType(tile);
// return (0); /* Hack alert! We must properly handle diagonals! */
}
else
loctype = TiGetTypeExact(tile);
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
mask = ExtCurStyle->exts_deviceConn[loctype];
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
TTMaskCom(&mask);
/* NOTE: DO NOT USE extTransRec.tr_perim += extEnumTilePerim(...) */
/* The AMD target gcc compile works and the Intel target gcc */
/* compile doesn't! The following code works the same on both. */
ExtPerim.c: extEnumTilePerim() pass by-pointer const TileTypeBitMask* instead of by-value sizeof(TileTypeBitMask) == 32
2025-02-17 10:44:49 +01:00
perim = extEnumTilePerim(tile, &mask, pNum,
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
extTransPerimFunc, (ClientData)NULL);
extTransRec.tr_perim += perim;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
devptr = extTransRec.tr_devrec;
if (devptr == NULL) return 0; /* No matching devices, so forget it. */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
allow_globsubsnode = FALSE;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
/* Create a mask of all substrate types of all device records, and */
/* search for substrate types on this combined mask. */
TTMaskZero(&cmask);
for (devtest = ExtCurStyle->exts_device[loctype]; devtest;
devtest = devtest->exts_next)
TTMaskSetMask(&cmask, &devtest->exts_deviceSubstrateTypes);
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
if (!TTMaskIsZero(&cmask))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
if (TTMaskHasType(&cmask, TT_SPACE))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
allow_globsubsnode = TRUE;
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
TTMaskClearType(&cmask, TT_SPACE);
}
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
if (extTransRec.tr_subsnode == (NodeRegion *)NULL)
{
sublayer = TT_SPACE;
region = NULL;
extTransFindSubs(tile, loctype, &cmask, arg->fra_def, &region, &sublayer);
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
/* If the device does not connect to a defined node, and
* the substrate types include "space", then it is assumed to
* connect to the global substrate.
*/
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
if (region == (NodeRegion *)NULL)
if (allow_globsubsnode)
region = glob_subsnode;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
extTransRec.tr_subsnode = region;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
if ((region != (NodeRegion *)NULL) &&
!(TTMaskHasType(&devptr->exts_deviceSubstrateTypes, sublayer)))
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
{
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
/* A substrate layer was found but is not compatible with the */
/* current device. Find a device record with the substrate */
/* layer that was found, and set the substrate match flag. */
deventry = devptr;
while (devptr != NULL)
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
{
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
devptr = extDevFindMatch(devptr, loctype);
if ((devptr == NULL) || (devptr == deventry))
{
TxError("No matching device for %s with substrate layer %s\n",
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
DBTypeLongNameTbl[loctype], DBTypeLongNameTbl[sublayer]);
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
devptr = NULL;
break;
}
if (TTMaskHasType(&devptr->exts_deviceSubstrateTypes, sublayer))
{
extTransRec.tr_devmatch |= MATCH_SUB;
break;
}
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
}
}
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
else if (region == (NodeRegion *)NULL)
{
Modified the new extraction method with multiple records for each device type so that it is now properly backwards compatible with the old-style "fet" records. Also corrected the record matching such that it properly matches according to the number of terminals while allowing the traditional interpretation that there may be fewer S/D type records than terminals if the S/D types are the same for all terminals.
2019-10-14 17:09:58 +02:00
/* If ExtCurStyle->exts_globSubstrateTypes contains no types */
/* then this is an older style techfile without a "substrate" */
/* definition in the extract section. In that case, it is */
/* expected that the substrate name in the device line will be */
/* used. */
if (!TTMaskIsZero(&ExtCurStyle->exts_globSubstrateTypes) ||
(devptr->exts_deviceSubstrateName == NULL))
{
TxError("Device %s does not have a compatible substrate node!\n",
DBTypeLongNameTbl[loctype]);
devptr = NULL;
}
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
extTransRec.tr_devrec = devptr;
if (devptr == NULL) return 0; /* No matching devices, so forget it. */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
/* If at least one device type declares an ID layer, then make a */
/* mask of all device ID types, and search on the area of the */
/* device to see if any device identifier layers are found. */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
TTMaskZero(&cmask);
for (devtest = ExtCurStyle->exts_device[loctype]; devtest;
devtest = devtest->exts_next)
TTMaskSetMask(&cmask, &devtest->exts_deviceIdentifierTypes);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
if (!TTMaskIsZero(&cmask))
{
idlayer = TT_SPACE;
extTransFindId(tile, &cmask, arg->fra_def, &idlayer);
if ((idlayer == TT_SPACE) && !TTMaskIsZero(&devptr->exts_deviceIdentifierTypes))
{
/* Device expected an ID layer but none was present. Find a device */
/* record with no ID layer, and set the ID match flag. */
deventry = devptr;
while (devptr != NULL)
{
devptr = extDevFindMatch(devptr, loctype);
if ((devptr == NULL) || (devptr == deventry))
{
TxError("No matching device for %s with no ID layer\n",
DBTypeLongNameTbl[loctype]);
devptr = NULL;
break;
}
if (TTMaskIsZero(&devptr->exts_deviceIdentifierTypes))
{
extTransRec.tr_devmatch |= MATCH_ID;
break;
}
}
}
else if ((idlayer != TT_SPACE) &&
!TTMaskHasType(&devptr->exts_deviceIdentifierTypes, idlayer))
{
/* Device expected no ID layer but one was present. Find a device */
/* record with the ID layer and set the ID match flag. If there is */
/* a valid device without the ID layer, then ignore the ID layer */
/* and flag a warning. */
deventry = devptr;
while (devptr != NULL)
{
devptr = extDevFindMatch(devptr, loctype);
if ((devptr == NULL) || (devptr == deventry))
{
TxError("ID layer %s on non-matching device %s was ignored.\n",
DBTypeLongNameTbl[idlayer], DBTypeLongNameTbl[loctype]);
devptr = deventry;
break;
}
if (TTMaskHasType(&devptr->exts_deviceIdentifierTypes, idlayer))
{
extTransRec.tr_devmatch |= MATCH_ID;
break;
}
}
}
else
extTransRec.tr_devmatch |= MATCH_ID;
}
extTransRec.tr_devrec = devptr;
return 0;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
/*
* ----------------------------------------------------------------------------
*
* extAddSharedDevice --
*
* Add a node region representing a device to the list of nodes
* kept in the structure passed to extTermAPFunc(), to keep track
* of how many devices share the same terminal area.
*
* ----------------------------------------------------------------------------
*/
void
extAddSharedDevice(eapd, node)
ExtAreaPerimData *eapd;
NodeRegion *node;
{
ExtNodeList *nl, *newnl;
for (nl = eapd->eapd_shared; nl; nl = nl->nl_next)
if (nl->nl_node == node) break;
if (nl == NULL)
{
newnl = (ExtNodeList *)mallocMagic(sizeof(ExtNodeList));
newnl->nl_node = node;
newnl->nl_next = eapd->eapd_shared;
eapd->eapd_shared = newnl;
}
}
/*
* ----------------------------------------------------------------------------
*
* extTermAPFunc --
*
* Callback function used by extTransPerimFunc() to find the largest
* area encompassing a device terminal. This is the bounding box of
* the area containing terminal types connected to a device tile.
*
* This routine is redundant with the area and perimeter calculations
* in extFindNodes(), but that routine traverses an entire net. This
* routine finds the area and perimeter belonging to material on a
* single plane extending from a device (e.g., diffusion and contacts
* on a FET source or drain).
*
* Note that this definition is not necessarily accurate for defining
* terminal area and perimeter, as the area of terminal types may not
* be rectangular, making an approximation using length and width
* inappropriate.
*
* ----------------------------------------------------------------------------
*/
int
extTermAPFunc(tile, pNum, eapd)
Tile *tile; /* Tile extending a device terminal */
int pNum; /* Plane of tile (unused, set to -1) */
ExtAreaPerimData *eapd; /* Area and perimeter totals for terminal */
{
TileType type;
Tile *tp;
Rect r;
TiToRect(tile, &r);
eapd->eapd_area += (r.r_xtop - r.r_xbot) * (r.r_ytop - r.r_ybot);
/* Diagonal */
if (IsSplit(tile))
{
int w, h, l;
type = (SplitSide(tile)) ? SplitLeftType(tile): SplitRightType(tile);
w = RIGHT(tile) - LEFT(tile);
h = TOP(tile) - BOTTOM(tile);
l = w * w + h * h;
eapd->eapd_perim += (int)sqrt((double)l);
}
/* Top */
for (tp = RT(tile); RIGHT(tp) > LEFT(tile); tp = BL(tp))
{
type = TiGetBottomType(tp);
if (TTMaskHasType(&eapd->eapd_mask, type))
{
eapd->eapd_perim += MIN(RIGHT(tile), RIGHT(tp)) -
MAX(LEFT(tile), LEFT(tp));
if (TTMaskHasType(eapd->eapd_gatemask, type))
Ti[GS]etClient() usage enforcement All naked access to `ti_client` now uses the function-like-macro to encapsulate this action. This macro existed before this just makes all sites utilize it. Added additional INT and PTR variants to remove the programmer load on thinking about casing and casts polluting the point of use. So the use now looks cleaner. Equivalent prototypes: void TiSetClient(Tile*, ClientData) void TiSetClientINT(Tile*, intptr_t) /* pointertype */ void TiSetClientPTR(Tile*, void*) ClientData TiGetClient(Tile*) intptr_t TiGetClientINT(Tile*) /* pointertype */ void *TiGetClientPTR(Tile*)
2025-02-21 18:54:11 +01:00
if (TiGetClientPTR(tp) != eapd->eapd_gatenode)
extAddSharedDevice(eapd, (NodeRegion *)TiGetClientPTR(tp));
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
}
}
/* Bottom */
for (tp = LB(tile); LEFT(tp) < RIGHT(tile); tp = TR(tp))
{
type = TiGetTopType(tp);
if (TTMaskHasType(&eapd->eapd_mask, type))
{
eapd->eapd_perim += MIN(RIGHT(tile), RIGHT(tp)) -
MAX(LEFT(tile), LEFT(tp));
if (TTMaskHasType(eapd->eapd_gatemask, type))
Ti[GS]etClient() usage enforcement All naked access to `ti_client` now uses the function-like-macro to encapsulate this action. This macro existed before this just makes all sites utilize it. Added additional INT and PTR variants to remove the programmer load on thinking about casing and casts polluting the point of use. So the use now looks cleaner. Equivalent prototypes: void TiSetClient(Tile*, ClientData) void TiSetClientINT(Tile*, intptr_t) /* pointertype */ void TiSetClientPTR(Tile*, void*) ClientData TiGetClient(Tile*) intptr_t TiGetClientINT(Tile*) /* pointertype */ void *TiGetClientPTR(Tile*)
2025-02-21 18:54:11 +01:00
if (TiGetClientPTR(tp) != eapd->eapd_gatenode)
extAddSharedDevice(eapd, (NodeRegion *)TiGetClientPTR(tp));
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
}
}
/* Left */
for (tp = BL(tile); BOTTOM(tp) < TOP(tile); tp = RT(tp))
{
type = TiGetRightType(tp);
if (TTMaskHasType(&eapd->eapd_mask, type))
{
eapd->eapd_perim += MIN(TOP(tile), TOP(tp)) -
MAX(BOTTOM(tile), BOTTOM(tp));
if (TTMaskHasType(eapd->eapd_gatemask, type))
Ti[GS]etClient() usage enforcement All naked access to `ti_client` now uses the function-like-macro to encapsulate this action. This macro existed before this just makes all sites utilize it. Added additional INT and PTR variants to remove the programmer load on thinking about casing and casts polluting the point of use. So the use now looks cleaner. Equivalent prototypes: void TiSetClient(Tile*, ClientData) void TiSetClientINT(Tile*, intptr_t) /* pointertype */ void TiSetClientPTR(Tile*, void*) ClientData TiGetClient(Tile*) intptr_t TiGetClientINT(Tile*) /* pointertype */ void *TiGetClientPTR(Tile*)
2025-02-21 18:54:11 +01:00
if (TiGetClientPTR(tp) != eapd->eapd_gatenode)
extAddSharedDevice(eapd, (NodeRegion *)TiGetClientPTR(tp));
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
}
}
/* Right */
for (tp = TR(tile); TOP(tp) > BOTTOM(tile); tp = LB(tp))
{
type = TiGetLeftType(tp);
if (TTMaskHasType(&eapd->eapd_mask, type))
{
eapd->eapd_perim += MIN(TOP(tile), TOP(tp)) -
MAX(BOTTOM(tile), BOTTOM(tp));
if (TTMaskHasType(eapd->eapd_gatemask, type))
Ti[GS]etClient() usage enforcement All naked access to `ti_client` now uses the function-like-macro to encapsulate this action. This macro existed before this just makes all sites utilize it. Added additional INT and PTR variants to remove the programmer load on thinking about casing and casts polluting the point of use. So the use now looks cleaner. Equivalent prototypes: void TiSetClient(Tile*, ClientData) void TiSetClientINT(Tile*, intptr_t) /* pointertype */ void TiSetClientPTR(Tile*, void*) ClientData TiGetClient(Tile*) intptr_t TiGetClientINT(Tile*) /* pointertype */ void *TiGetClientPTR(Tile*)
2025-02-21 18:54:11 +01:00
if (TiGetClientPTR(tp) != eapd->eapd_gatenode)
extAddSharedDevice(eapd, (NodeRegion *)TiGetClientPTR(tp));
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
}
}
return 0;
}
/*
* ----------------------------------------------------------------------------
*
* extTransPerimFunc --
*
* Callback function for exploring the perimeter of a device to find
* areas connected to the device (e.g., gate) and areas adjacent but
* not connected (e.g., source and drain).
*
* ----------------------------------------------------------------------------
*/
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
int
extTransPerimFunc(bp)
Boundary *bp;
{
TileType tinside, toutside;
Tile *tile;
NodeRegion *diffNode = (NodeRegion *) extGetRegion(bp->b_outside);
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
ExtDevice *devptr, *deventry;
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
int i, area, perim, len = BoundaryLength(bp);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
int thisterm;
LabelList *ll;
Label *lab;
bool SDterm = FALSE;
Corrected a long-standing but rare error in which diagonal tiles surrounding a device tile may cause the device to be extracted with the wrong node (picking up the node from the wrong side of the diagonal tile). Added extra handling to capture the case where two ports on two different nets are merged when using "ext2spice short" (previously it was handling only ports on the same net). Also: Removed the redundant readline-4.3 from the readline/ directory; only readline/readline is left, which is version 4.3.
2024-11-02 16:00:05 +01:00
/* NOTE: The tile side bit is not guaranteed to be correct
* when entering this routine. For split tiles, determine
* the correct type (type on left, right, bottom, or top)
* based on the recorded boundary direction.
*/
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
tile = bp->b_inside;
if (IsSplit(tile))
Corrected a long-standing but rare error in which diagonal tiles surrounding a device tile may cause the device to be extracted with the wrong node (picking up the node from the wrong side of the diagonal tile). Added extra handling to capture the case where two ports on two different nets are merged when using "ext2spice short" (previously it was handling only ports on the same net). Also: Removed the redundant readline-4.3 from the readline/ directory; only readline/readline is left, which is version 4.3.
2024-11-02 16:00:05 +01:00
{
switch (bp->b_direction)
{
case BD_LEFT:
tinside = TiGetLeftType(tile);
break;
case BD_TOP:
tinside = TiGetTopType(tile);
break;
case BD_RIGHT:
tinside = TiGetRightType(tile);
break;
case BD_BOTTOM:
tinside = TiGetBottomType(tile);
break;
}
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
else
tinside = TiGetTypeExact(bp->b_inside);
tile = bp->b_outside;
if (IsSplit(tile))
Corrected a long-standing but rare error in which diagonal tiles surrounding a device tile may cause the device to be extracted with the wrong node (picking up the node from the wrong side of the diagonal tile). Added extra handling to capture the case where two ports on two different nets are merged when using "ext2spice short" (previously it was handling only ports on the same net). Also: Removed the redundant readline-4.3 from the readline/ directory; only readline/readline is left, which is version 4.3.
2024-11-02 16:00:05 +01:00
{
switch (bp->b_direction)
{
case BD_LEFT:
toutside = TiGetRightType(tile);
break;
case BD_TOP:
toutside = TiGetBottomType(tile);
break;
case BD_RIGHT:
toutside = TiGetLeftType(tile);
break;
case BD_BOTTOM:
toutside = TiGetTopType(tile);
break;
}
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
else
toutside = TiGetTypeExact(bp->b_outside);
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
if (extTransRec.tr_devrec != NULL)
devptr = extTransRec.tr_devrec;
else
devptr = ExtCurStyle->exts_device[tinside];
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
deventry = devptr;
while(devptr)
{
extTransRec.tr_devrec = devptr;
for (i = 0; !TTMaskIsZero(&devptr->exts_deviceSDTypes[i]); i++)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
/* TT_SPACE is allowed, for declaring that a device terminal is */
/* the substrate. However, it should not be in the plane of */
/* the device identifier layer, so space tiles should never be */
/* flagged during a device perimeter search. */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
if (toutside == TT_SPACE) break;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
if (TTMaskHasType(&devptr->exts_deviceSDTypes[i], toutside))
{
/*
* It's a diffusion terminal (source or drain). See if the node is
* already in our table; add it if it wasn't already there.
* Asymmetric devices must have terminals in order.
*/
if (TTMaskIsZero(&devptr->exts_deviceSDTypes[1]))
{
for (thisterm = 0; thisterm < extTransRec.tr_nterm; thisterm++)
if (extTransRec.tr_termnode[thisterm] == diffNode)
break;
}
else
thisterm = i;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
if (extTransRec.tr_termnode[thisterm] == NULL)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
extTransRec.tr_nterm++;
extTransRec.tr_termnode[thisterm] = diffNode;
extTransRec.tr_termlen[thisterm] = 0;
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
extTransRec.tr_termarea[thisterm] = 0;
extTransRec.tr_termperim[thisterm] = 0;
extTransRec.tr_termshared[thisterm] = 0;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
extTransRec.tr_termvector[thisterm].p_x = 0;
extTransRec.tr_termvector[thisterm].p_y = 0;
extTransRec.tr_termpos[thisterm].pnum = DBPlane(toutside);
extTransRec.tr_termpos[thisterm].pt = bp->b_outside->ti_ll;
/* Find the total area of this terminal */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
else if (extTransRec.tr_termnode[thisterm] == diffNode)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
TermTilePos *pos = &(extTransRec.tr_termpos[thisterm]);
Tile *otile = bp->b_outside;
/* update the region tile position */
Updated the revision number to go along with the merge of pull request #325 from Daryl Miles. Made a few simple style changes to conform to (what is vaguely defined as) the overall programming style for magic (passed down from John Ousterhout).
2024-10-01 18:56:31 +02:00
if (DBPlane(TiGetType(otile)) < pos->pnum)
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
{
pos->pnum = DBPlane(TiGetType(otile));
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
pos->pt = otile->ti_ll;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
}
Updated the revision number to go along with the merge of pull request #325 from Daryl Miles. Made a few simple style changes to conform to (what is vaguely defined as) the overall programming style for magic (passed down from John Ousterhout).
2024-10-01 18:56:31 +02:00
else if (DBPlane(TiGetType(otile)) == pos->pnum)
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
{
Updated the revision number to go along with the merge of pull request #325 from Daryl Miles. Made a few simple style changes to conform to (what is vaguely defined as) the overall programming style for magic (passed down from John Ousterhout).
2024-10-01 18:56:31 +02:00
if (LEFT(otile) < pos->pt.p_x)
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
pos->pt = otile->ti_ll;
Updated the revision number to go along with the merge of pull request #325 from Daryl Miles. Made a few simple style changes to conform to (what is vaguely defined as) the overall programming style for magic (passed down from John Ousterhout).
2024-10-01 18:56:31 +02:00
else if (LEFT(otile) == pos->pt.p_x &&
BOTTOM(otile) < pos->pt.p_y)
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
pos->pt.p_y = BOTTOM(otile);
}
}
else
Corrected an extraction issue in which an error message about "unexpected asymmetric device" is printed prematurely, as it is inside a loop checking over all device entries compatible with a device type. Also: Flagged an issue with the "label" keyword in the "cifinput" section of a tech file. The "label" keyword cannot be used in conjunction with boolean operators. It can only connect labels on a specific GDS type to one magic type. Unfortunately, because this was not flagged before as an error or warning, the incorrect usage has crept into a lot of tech files. This uncovers an underlying issue that labels must be allowed to automatically reconnect types, which is undermined by the "no-reconnect-labels" cifinput option. That issue will be addressed in an upcoming commit.
2023-10-16 23:29:05 +02:00
/* Do not print error messages here, as errors may
* be resolved when checking the next device entry.
Added a new special device model name "Short" which enables the use of a resistor type as a FET extended drain, allowing the FET drain node to short across to the other side of the resistor so that the resistor is absorbed into the FET device. Used with the GF180MCU process to describe the salicide-block ESD FET types.
2022-12-13 22:02:49 +01:00
*/
Corrected an extraction error that prevented the use of the same device layer type to describe the extraction for both a regular FET and an extended-drain device. Note that the current code still requires that the extended-drain device be declared first, and does not check for this or attempt to reorder if incorrect.
2020-09-11 03:44:02 +02:00
break;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
/* Add the length to this terminal's perimeter */
extTransRec.tr_termlen[thisterm] += len;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
if (extTransRec.tr_termarea[thisterm] == 0)
{
/* Find the area and perimeter of the terminal area (connected
* area outside the boundary on a single plane). Note that
* this does not consider terminal area outside of the cell
* or how area or perimeter may be shared or overlap between
* devices.
*/
ExtAreaPerimData eapd;
int shared;
eapd.eapd_area = eapd.eapd_perim = 0;
TTMaskCom2(&eapd.eapd_mask, &DBConnectTbl[toutside]);
eapd.eapd_gatemask = &ExtCurStyle->exts_deviceMask;
eapd.eapd_gatenode = (NodeRegion *)extGetRegion(bp->b_inside);
eapd.eapd_shared = NULL;
DBSrConnectOnePlane(bp->b_outside, DBConnectTbl,
extTermAPFunc, (ClientData)&eapd);
shared = 1;
while (eapd.eapd_shared)
{
shared++;
freeMagic(eapd.eapd_shared);
eapd.eapd_shared = eapd.eapd_shared->nl_next;
}
extTransRec.tr_termarea[thisterm] = eapd.eapd_area;
extTransRec.tr_termperim[thisterm] = eapd.eapd_perim;
extTransRec.tr_termshared[thisterm] = shared;
}
Implemented simple drain and source length calculations as device parameters l1 and l2. Provides a way to pass the source or drain length as a parameter for, for example, an extended FET drain implemented as a resistor abutting the FET gate. Could potentially be used as a way to determine source/drain area and perimeter without resorting to measurements of a shared node.
2022-12-15 03:40:24 +01:00
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
/* Update the boundary traversal vector */
switch(bp->b_direction) {
case BD_LEFT:
extTransRec.tr_termvector[thisterm].p_y += len;
break;
case BD_TOP:
extTransRec.tr_termvector[thisterm].p_x += len;
break;
case BD_RIGHT:
extTransRec.tr_termvector[thisterm].p_y -= len;
break;
case BD_BOTTOM:
extTransRec.tr_termvector[thisterm].p_x -= len;
break;
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
/*
* Mark this attribute as belonging to this transistor
* if it is either:
* (1) a terminal attribute whose LL corner touches bp->b_segment,
* or (2) a gate attribute that lies inside bp->b_inside.
*/
for (ll = extTransRec.tr_gatenode->nreg_labels; ll; ll = ll->ll_next)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
/* Skip if already marked */
if (ll->ll_attr != LL_NOATTR)
continue;
lab = ll->ll_label;
if (GEO_ENCLOSE(&lab->lab_rect.r_ll, &bp->b_segment)
&& extLabType(lab->lab_text, LABTYPE_TERMATTR))
{
ll->ll_attr = thisterm;
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
Modified the new extraction method with multiple records for each device type so that it is now properly backwards compatible with the old-style "fet" records. Also corrected the record matching such that it properly matches according to the number of terminals while allowing the traditional interpretation that there may be fewer S/D type records than terminals if the S/D types are the same for all terminals.
2019-10-14 17:09:58 +02:00
/* Check if number of terminals exceeds the number allowed in */
/* this device record. If so, check if there is another device */
/* record with a different number of terminals. */
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
extTransRec.tr_devmatch |= (MATCH_TERM << thisterm);
Modified the new extraction method with multiple records for each device type so that it is now properly backwards compatible with the old-style "fet" records. Also corrected the record matching such that it properly matches according to the number of terminals while allowing the traditional interpretation that there may be fewer S/D type records than terminals if the S/D types are the same for all terminals.
2019-10-14 17:09:58 +02:00
if (thisterm >= devptr->exts_deviceSDCount)
{
devptr = extDevFindMatch(devptr, tinside);
/* Should this be an error instead of a warning? */
/* Traditionally more terminals than defined was allowed */
/* but not necessarily handled correctly by ext2spice. */
if (devptr == deventry)
TxError("Warning: Device has more terminals than defined "
"for type!\n");
else
extTransRec.tr_devrec = devptr;
}
SDterm = TRUE;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
break;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
}
Minor correction to device extraction using the new device structure format with multiple devices per magic tile type. The code was left incompatible with diodes defined with one terminal as substrate (and therefore no source/drain-like types connecting to the device type). This has been fixed.
2019-08-23 20:01:28 +02:00
if (toutside == TT_SPACE) break;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
if (SDterm) break;
if (extConnectsTo(tinside, toutside, ExtCurStyle->exts_nodeConn))
{
/* Not in a terminal, but are in something that connects to gate */
extTransRec.tr_gatelen += len;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
break;
}
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
/* Did not find a matching terminal, so see if a different extraction */
/* record matches the terminal type. */
Minor correction to device extraction using the new device structure format with multiple devices per magic tile type. The code was left incompatible with diodes defined with one terminal as substrate (and therefore no source/drain-like types connecting to the device type). This has been fixed.
2019-08-23 20:01:28 +02:00
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
devptr = extDevFindMatch(devptr, tinside);
if (devptr == deventry) devptr = NULL;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
if (devptr == NULL)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
Changed extraction to avoid generating an error message for devices like resistors where a tile other than space may border the resistor device on its non-terminal sides (which is handled correctly, and should not be considered an error).
2019-11-19 17:39:59 +01:00
/* Outside type is not a terminal, so return to the original */
/* device record. NOTE: Should probably check if this device */
/* type is a FET, as being here would indicate an error. */
/* However, failure to find all terminals will be flagged as an */
/* error elsewhere. */
extTransRec.tr_devrec = deventry;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
/*
* Total perimeter (separate from terminals, for dcaps
* that might not be surrounded by terminals on all sides).
*/
Corrected an error with perimeter calculation of a device that was caused by other code that can move the plane of a device to match the plane of a port. Solved by retaining the original plane of the node in the extTransRec structure, and using that to determine the device plane for purposes of calculating perimeters and not double- counting contacts.
2022-08-30 16:13:18 +02:00
/* Don't double-count contact perimeters (added by Tim 1/9/07) */
/* 8/30/2022: The code at line 681 can reassign a transistor */
/* gate node off of the device plane, so the original plane of */
/* the gate node is saved in extTransRec.tr_plane and used here. */
/* Do *not* user extTransRec.tr_gatenode->nreg_pnum! */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
if ((!DBIsContact(toutside) && !DBIsContact(tinside)) ||
Corrected an error with perimeter calculation of a device that was caused by other code that can move the plane of a device to match the plane of a port. Solved by retaining the original plane of the node in the extTransRec structure, and using that to determine the device plane for purposes of calculating perimeters and not double- counting contacts.
2022-08-30 16:13:18 +02:00
(bp->b_plane == extTransRec.tr_plane))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
extTransRec.tr_perim += len;
return (0);
}
/*
* ----------------------------------------------------------------------------
*
* extAnnularTileFunc --
*
* Filter function called by ExtFindNeighbors for each tile in a
* transistor. Responsible for doing an extensive boundary
* survey to determine the length of the transistor.
* This is basically a subset of the code in extTransTileFunc()
* but passes a different function to extEnumTilePerim().
*
* Results:
* Returns 0 always.
*
* Side effects:
*
* ----------------------------------------------------------------------------
*/
int
extAnnularTileFunc(tile, pNum)
Tile *tile;
int pNum;
{
TileTypeBitMask mask;
TileType loctype;
/*
* Visit each segment of the perimeter of this tile that
* that borders on something of a different type.
*/
if (IsSplit(tile))
{
loctype = (SplitSide(tile)) ? SplitRightType(tile): SplitLeftType(tile);
}
else
loctype = TiGetTypeExact(tile);
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
mask = ExtCurStyle->exts_deviceConn[loctype];
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
TTMaskCom(&mask);
ExtPerim.c: extEnumTilePerim() pass by-pointer const TileTypeBitMask* instead of by-value sizeof(TileTypeBitMask) == 32
2025-02-17 10:44:49 +01:00
extEnumTilePerim(tile, &mask, pNum, extSpecialPerimFunc, (ClientData) TRUE);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
return (0);
}
/*
* ----------------------------------------------------------------------------
*
* extResistorTileFunc --
*
* Filter function called by ExtFindNeighbors for each tile in a
* resistor. This is very similar to the extAnnularTileFunc
* above, but it looks a boundaries with non-source/drain types
* rather than the source/drain boundaries themselves. This is
* correct for tracing the detailed perimeter of a device where
* L > W.
*
* Ideally, one wants to call both of these functions to check
* both the case of L > W and the case W > L, assuming that both
* are legal resistor layouts.
*
* Results:
* Returns 0 always.
*
* Side effects:
*
* ----------------------------------------------------------------------------
*/
int
extResistorTileFunc(tile, pNum)
Tile *tile;
int pNum;
{
TileTypeBitMask mask;
TileType loctype;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
ExtDevice *devptr;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*
* Visit each segment of the perimeter of this tile that
* that borders on something of a different type.
*/
if (IsSplit(tile))
{
loctype = (SplitSide(tile)) ? SplitRightType(tile): SplitLeftType(tile);
}
else
loctype = TiGetTypeExact(tile);
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
mask = ExtCurStyle->exts_deviceConn[loctype];
devptr = extTransRec.tr_devrec;
if (devptr == NULL) devptr = ExtCurStyle->exts_device[loctype];
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
while (devptr)
{
TTMaskSetMask(&mask, &devptr->exts_deviceSDTypes[0]);
TTMaskCom(&mask);
ExtPerim.c: extEnumTilePerim() pass by-pointer const TileTypeBitMask* instead of by-value sizeof(TileTypeBitMask) == 32
2025-02-17 10:44:49 +01:00
extEnumTilePerim(tile, &mask, pNum, extSpecialPerimFunc, (ClientData)FALSE);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Corrected an error introduced with the extension of extraction methods to multiple entries per device; the resistor length and width calculating routine lost a break statement and would go into an infinite loop for resistors with bends in them.
2019-11-13 20:29:19 +01:00
if (extSpecialBounds[0] != NULL) break;
devptr = devptr->exts_next;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
}
if (devptr != NULL) extTransRec.tr_devrec = devptr;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
return (0);
}
/*----------------------------------------------------------------------*/
/* Detailed boundary survey for unusual transistor geometries (esp. */
/* annular). If "sense" is TRUE, look at boundaries with source/drain */
/* types. If "sense" is FALSE, looks at non-source/drain boundaries. */
/*----------------------------------------------------------------------*/
int
extSpecialPerimFunc(bp, sense)
Boundary *bp;
bool sense;
{
TileType tinside, toutside;
NodeRegion *diffNode = (NodeRegion *) extGetRegion(bp->b_outside);
int thisterm, extended, i;
LinkedBoundary *newBound, *lb, *lastlb;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
ExtDevice *devptr;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
bool needSurvey;
/* Note that extEnumTilePerim() assumes for the non-Manhattan case */
/* that non-Manhattan tiles should be incorporated into the device */
/* gate for purposes of computing effective length and width. In */
/* most cases this will be only a slight deviation from the true */
/* result. */
switch (bp->b_direction)
{
case BD_TOP:
tinside = TiGetTopType(bp->b_inside);
toutside = TiGetBottomType(bp->b_outside);
break;
case BD_BOTTOM:
tinside = TiGetBottomType(bp->b_inside);
toutside = TiGetTopType(bp->b_outside);
break;
case BD_RIGHT:
tinside = TiGetRightType(bp->b_inside);
toutside = TiGetLeftType(bp->b_outside);
break;
case BD_LEFT:
tinside = TiGetLeftType(bp->b_inside);
toutside = TiGetRightType(bp->b_outside);
break;
}
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
/* Required to use the same device record that was used to find */
/* the terminals. */
if ((devptr = extTransRec.tr_devrec) == NULL) return 0;
Revised the method for multiple extraction models per device type to be more robust and not depend on the ordering of the devices in the techfile. The extraction method now keeps a mask of which properties of the device (source/drain types, substrate type, identifier type) have been found, and will look only for device records that match what is known about the device. Added a device identifier record which is the last record before parameters if the record begins with "+". This allows marker layers to be placed over a device such that it will extract with a different type. This helps reduce the complexity of the techfile and allows certain specialized devices like RF or ESD to be identified without a separate layer type for the device.
2019-08-19 20:11:02 +02:00
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/* Check all terminal classes for a matching type */
needSurvey = FALSE;
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
for (i = 0; !TTMaskIsZero(&devptr->exts_deviceSDTypes[i]); i++)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
Hopefully final correction to new extraction method. Now correctly handles diodes or other devices with source/drain on planes other than the plane of the device type. This no longer requires that the non-connecting type be in any given terminal position. The device type boundary is surveyed for all types, connecting or overlapping, and at least one of each required type must be present.
2019-08-24 20:18:03 +02:00
if (TTMaskHasType(&devptr->exts_deviceSDTypes[i], toutside))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
needSurvey = TRUE;
break;
}
}
if (!sense || needSurvey)
{
if (toutside == TT_SPACE)
if (glob_subsnode != NULL)
diffNode = glob_subsnode;
Modified the extraction code to properly handle length and width of devices that have a terminal underneath the device. Code not yet tested.
2020-09-21 22:03:37 +02:00
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Modified the extraction code to properly handle length and width of devices that have a terminal underneath the device. Code not yet tested.
2020-09-21 22:03:37 +02:00
/* Check for terminal on different plane than the device */
if (!needSurvey)
{
for (i = 0; !TTMaskIsZero(&devptr->exts_deviceSDTypes[i]); i++)
{
Corrected one final case of extracting an extended-drain pFET because the opposite type (pwell) is not directly underneath the gate, but touches it on the plane below. Because the pwell may be represented by space tiles on the well plane, it was also necessary to deal with the space type in the bitmask.
2020-09-22 02:23:37 +02:00
TileTypeBitMask mmask;
PlaneMask pmask;
mmask = devptr->exts_deviceSDTypes[i];
if (toutside != TT_SPACE) TTMaskClearType(&mmask, TT_SPACE);
pmask = DBTechTypesToPlanes(&mmask);
Modified the extraction code to properly handle length and width of devices that have a terminal underneath the device. Code not yet tested.
2020-09-21 22:03:37 +02:00
if (!PlaneMaskHasPlane(pmask, DBPlane(tinside)))
{
diffNode = extTransRec.tr_termnode[i];
needSurvey = TRUE;
break;
}
}
}
if (!sense || needSurvey)
{
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*
* Since we're repeating the search, all terminals should be there.
*/
if (!sense)
thisterm = 0;
else
{
for (thisterm = 0; thisterm < extTransRec.tr_nterm; thisterm++)
if (extTransRec.tr_termnode[thisterm] == diffNode)
break;
if (thisterm >= extTransRec.tr_nterm)
{
Corrected the extraction method for devices with terminals on the implicit global substrate, as a block of code meant to handle this case was left unreachable by another recent code fix.
2021-01-21 15:57:03 +01:00
/* This is not necessarily an error; e.g., happens for */
/* a device like a diode with TT_SPACE in the source/ */
/* drain list. */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
return 1;
}
}
/*
* Check the existing segment list to see if this segment
* extends an existing segment.
*/
extended = 0;
for (lb = extSpecialBounds[thisterm]; lb != NULL; lb = lb->b_next)
{
if (bp->b_direction == lb->dir)
{
switch(lb->dir)
{
case BD_LEFT:
case BD_RIGHT:
if (bp->b_segment.r_xbot == lb->r.r_xbot)
{
if (bp->b_segment.r_ybot == lb->r.r_ytop)
{
if (extended)
lastlb->r.r_ybot = lb->r.r_ybot;
else
lb->r.r_ytop = bp->b_segment.r_ytop;
extended++;
lastlb = lb;
}
else if (bp->b_segment.r_ytop == lb->r.r_ybot)
{
if (extended)
lastlb->r.r_ytop = lb->r.r_ytop;
else
lb->r.r_ybot = bp->b_segment.r_ybot;
extended++;
lastlb = lb;
}
}
break;
case BD_TOP:
case BD_BOTTOM:
if (bp->b_segment.r_ybot == lb->r.r_ybot)
{
if (bp->b_segment.r_xbot == lb->r.r_xtop)
{
if (extended)
lastlb->r.r_xbot = lb->r.r_xbot;
else
lb->r.r_xtop = bp->b_segment.r_xtop;
extended++;
lastlb = lb;
}
else if (bp->b_segment.r_xtop == lb->r.r_xbot)
{
if (extended)
lastlb->r.r_xtop = lb->r.r_xtop;
else
lb->r.r_xbot = bp->b_segment.r_xbot;
extended++;
lastlb = lb;
}
}
break;
}
}
if (extended == 2)
{
/* Connected two existing entries---need to remove lastlb, */
/* which is now a redundant segment. */
if (lastlb == extSpecialBounds[thisterm])
extSpecialBounds[thisterm] = lastlb->b_next;
else
{
for (lb = extSpecialBounds[thisterm]; lb != NULL;
lb = lb->b_next)
{
if (lastlb == lb->b_next)
{
lb->b_next = lastlb->b_next;
break;
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
}
freeMagic((char *)lastlb);
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/* New segment cannot extend more than two existing segments */
break;
}
}
if (!extended)
{
newBound = (LinkedBoundary *)mallocMagic(sizeof(LinkedBoundary));
newBound->r = bp->b_segment;
newBound->dir = bp->b_direction;
newBound->b_next = extSpecialBounds[thisterm];
extSpecialBounds[thisterm] = newBound;
}
}
return (0);
}
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*
* ----------------------------------------------------------------------------
*
* extTransOutTerminal --
*
* Output the information associated with one terminal of a
* transistor. This consists of three things:
* - the name of the node to which the terminal is connected
* - the length of the terminal along the perimeter of the transistor
* - a list of attributes pertinent to this terminal.
*
* If 'whichTerm' is LL_GATEATTR, this is the gate; otherwise, it is one
* of the diffusion terminals.
*
* Results:
* None.
*
* Side effects:
* Writes the above information to 'outFile'.
* Resets ll_attr for each attribute we output to LL_NOATTR.
*
* ----------------------------------------------------------------------------
*/
void
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
extTransOutTerminal(lreg, ll, whichTerm, len, area, perim, shared, outFile)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
LabRegion *lreg; /* Node connected to terminal */
LabelList *ll; /* Gate's label list */
int whichTerm; /* Which terminal we are processing. The gate
* is indicated by LL_GATEATTR.
*/
int len; /* Length of perimeter along terminal */
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
int area; /* Total area of terminal */
int perim; /* Total perimeter of terminal (includes len) */
int shared; /* Number of devices sharing the terminal */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
FILE *outFile; /* Output file */
{
char *cp;
int n;
char fmt;
fprintf(outFile, " \"%s\" %d", extNodeName(lreg), len);
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
for (fmt = ' '; ll; ll = ll->ll_next)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
if (ll->ll_attr == whichTerm)
{
fprintf(outFile, "%c\"", fmt);
cp = ll->ll_label->lab_text;
n = strlen(cp) - 1;
while (n-- > 0)
putc(*cp++, outFile);
ll->ll_attr = LL_NOATTR;
fprintf(outFile, "\"");
fmt = ',';
}
Important update: Reworked the extraction method to properly isolate the terminal areas of a device (e.g., source and drain) and calculate their area and perimeter individually for the device (in addition to the traditional method of calculating area and perimeter of each resistance class for the entire node). Also: Reworked the SPICE syntax output to generate SI values in the range 1-1000 with the appropriate suffix (e.g., "20u") instead of defaulting to "u" for lengths and "p" for areas. This prevents it from producing weird units like "150000u" when a process definition already includes a scalefactor. Reworked the "extresist" code to use the device terminal area and perimeter. This fixes an error in which "extresist" would lose these values and "ext2spice" with option "extresist on" would generate a new netlist output with zero terminal areas and perimeters.
2023-02-16 17:59:13 +01:00
/* NOTE: The area and perimeter of a terminal are divided equally
* among devices that share the same terminal area. This may not
* necessarily be the best way to handle shared terminals; in
* particular, it is preferable to detect and output fingered
* devices separately.
*/
if ((whichTerm != LL_GATEATTR) && (area != 0) && (perim != 0))
fprintf(outFile, "%c%d,%d", fmt, (area / shared), (perim / shared));
else if (fmt == ' ')
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
fprintf(outFile, " 0");
}
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*
* ----------------------------------------------------------------------------
*
* extTransBad --
*
* For a transistor where an error was encountered, give feedback
* as to the location of the error.
*
* Results:
* None.
*
* Side effects:
* Complains to the user.
*
* ----------------------------------------------------------------------------
*/
void
extTransBad(def, tp, mesg)
CellDef *def;
Tile *tp;
char *mesg;
{
Rect r;
if (!DebugIsSet(extDebugID, extDebNoFeedback))
{
TiToRect(tp, &r);
DBWFeedbackAdd(&r, mesg, def, 1, STYLE_PALEHIGHLIGHTS);
}
extNumWarnings++;
}
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*
* ----------------------------------------------------------------------------
*
* extLabType --
*
* Check to see whether the text passed as an argument satisfies
* any of the label types in 'typeMask'.
*
* Results:
* TRUE if the text is of one of the label types in 'typeMask',
* FALSE if not.
*
* Side effects:
* None.
*
* ----------------------------------------------------------------------------
*/
bool
extLabType(text, typeMask)
char *text;
int typeMask;
{
if (*text == '\0')
return (FALSE);
while (*text) text++;
switch (*--text)
{
case '@': /* Node attribute */
return ((bool)(typeMask & LABTYPE_NODEATTR));
case '$': /* Terminal (source/drain) attribute */
return ((bool)(typeMask & LABTYPE_TERMATTR));
case '^': /* Gate attribute */
return ((bool)(typeMask & LABTYPE_GATEATTR));
default:
return ((bool)(typeMask & LABTYPE_NAME));
}
/*NOTREACHED*/
}
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*
* ----------------------------------------------------------------------------
* extNodeToTile --
*
* Sets tp to be the tile containing the lower-leftmost point of the
* NodeRegion *np, but in the tile planes of the ExtTree *et instead
* of the tile planes originally containing *np. This routine used
* to be defined as the macro NODETOTILE().
*
* Results:
* Returns a pointer to the tile
*
* Side effects:
* None.
* ----------------------------------------------------------------------------
*/
Tile *extNodeToTile(np, et)
NodeRegion *np;
ExtTree *et;
{
Tile *tp;
Plane *myplane;
myplane = et->et_use->cu_def->cd_planes[np->nreg_pnum];
Plane[GS]etHint() added to encapsulate access to Plane->pl_hint This is ground work to intercept usage and validate changes in this area. Fixed conflicts with earler patch in extract/ExtNghbors.c
2025-02-21 19:15:02 +01:00
tp = PlaneGetHint(myplane);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
GOTOPOINT(tp, &np->nreg_ll);
Plane[GS]etHint() added to encapsulate access to Plane->pl_hint This is ground work to intercept usage and validate changes in this area. Fixed conflicts with earler patch in extract/ExtNghbors.c
2025-02-21 19:15:02 +01:00
PlaneSetHint(myplane, tp);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
if (IsSplit(tp))
{
TileType tpt = TiGetTypeExact(tp);
if ((tpt & TT_LEFTMASK) == (np->nreg_type & TT_LEFTMASK))
TiSetBody(tp, tpt & ~TT_SIDE);
else
TiSetBody(tp, tpt | TT_SIDE);
}
return tp;
}
/*
* ----------------------------------------------------------------------------
*
* extSetNodeNum --
*
* Update reg->lreg_ll and reg->lreg_pnum so that they are always the
* lowest leftmost coordinate in a cell, on the plane with the lowest
* number (formerly a macro in extractInt.h).
*
* (10/1/05: Changed from a macro to a subroutine and modified for
* handling non-Manhattan geometry)
*
* Results:
* None.
*
* Side effects:
* None.
*
* ----------------------------------------------------------------------------
*/
void
extSetNodeNum(reg, plane, tile)
LabRegion *reg;
int plane;
Tile *tile;
{
TileType type;
if (IsSplit(tile))
{
/* Only consider split tiles if the lower-left-hand corner */
/* is only the type under consideration. */
if (!SplitSide(tile) && SplitDirection(tile))
type = SplitSide(tile) ? SplitRightType(tile) : SplitLeftType(tile);
Changed the behavior of GDS writing to halt with an error if an attempt is made to write an abstract view to GDS. This behavior can be overridded with the new command option "gds abstract [enable|disable]". Also: Corrected extraction to allow split tiles to be set as the reference tile for a node. Previously this was allowed only if the tile was the first to be searched, but that can cause different tiles to be marked as the reference depending on where the search starts, resulting in different names for the same node in .ext files, which is bad. Also: Modified the LEF annotation to avoid bad entries in the LEF that would create layers in the layout where none exist.
2022-11-02 14:40:20 +01:00
else
Corrected an issue in the extraction where a region could be set to a split tile type, causing a crash if the node name had to be discovered by a "hard search".
2022-05-04 18:00:09 +02:00
{
type = SplitSide(tile) ? SplitRightType(tile) : SplitLeftType(tile);
Changed the behavior of GDS writing to halt with an error if an attempt is made to write an abstract view to GDS. This behavior can be overridded with the new command option "gds abstract [enable|disable]". Also: Corrected extraction to allow split tiles to be set as the reference tile for a node. Previously this was allowed only if the tile was the first to be searched, but that can cause different tiles to be marked as the reference depending on where the search starts, resulting in different names for the same node in .ext files, which is bad. Also: Modified the LEF annotation to avoid bad entries in the LEF that would create layers in the layout where none exist.
2022-11-02 14:40:20 +01:00
/* (Are these type checks necessary?) */
Corrected an issue in the extraction where a region could be set to a split tile type, causing a crash if the node name had to be discovered by a "hard search".
2022-05-04 18:00:09 +02:00
if ((type == TT_SPACE) || !TTMaskHasType(&DBPlaneTypes[plane], type))
type = SplitSide(tile) ? SplitLeftType(tile) : SplitRightType(tile);
if ((type == TT_SPACE) || !TTMaskHasType(&DBPlaneTypes[plane], type))
return;
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
else
type = TiGetType(tile);
if ((plane < reg->lreg_pnum) || (reg->lreg_type & TT_DIAGONAL))
{
reg->lreg_type = type;
reg->lreg_pnum = plane;
reg->lreg_ll = tile->ti_ll;
}
else if (plane == reg->lreg_pnum)
{
if (LEFT(tile) < reg->lreg_ll.p_x)
{
reg->lreg_ll = tile->ti_ll;
reg->lreg_type = type;
}
else if (LEFT(tile) == reg->lreg_ll.p_x
&& BOTTOM(tile) < reg->lreg_ll.p_y)
{
reg->lreg_ll.p_y = BOTTOM(tile);
reg->lreg_type = type;
}
}
}
/*
* ----------------------------------------------------------------------------
*
* extTransFirst --
* extTransEach --
*
* Filter functions passed to ExtFindRegions when tracing out transistor
* regions as part of flat circuit extraction.
*
* Results:
* extTransFirst returns a pointer to a new TransRegion.
* extTransEach returns NULL.
*
* Side effects:
* Memory is allocated by extTransFirst.
* We cons the newly allocated region onto the front of the existing
* region list.
*
* The area of each transistor is updated by extTransEach.
*
* ----------------------------------------------------------------------------
*/
rename Region to ExtRegion On Macos, Tk includes X11, which has this define: #if !defined(MAC_OSX_TK) # include <X11/X.h> #endif #ifdef MAC_OSX_TK # include <X11/X.h> # define Cursor XCursor # define Region XRegion #endif This causes the keywords `Cursor` and `Region` to be reserved, which prevents magic from building. Rename `Region` to `ExtRegion` as suggested by @RTimothyEdwards in https://github.com/RTimothyEdwards/magic/issues/195#issuecomment-1298870983 and https://github.com/RTimothyEdwards/magic/pull/222#pullrequestreview-1334900670 Signed-off-by: Sean Cross <sean@xobs.io>
2023-02-24 03:27:08 +01:00
ExtRegion *
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
extTransFirst(tile, arg)
Tile *tile;
FindRegion *arg;
{
TransRegion *reg;
reg = (TransRegion *) mallocMagic((unsigned) (sizeof (TransRegion)));
reg->treg_next = (TransRegion *) NULL;
reg->treg_labels = (LabelList *) NULL;
reg->treg_area = 0;
reg->treg_tile = tile;
reg->treg_pnum = DBNumPlanes;
if (IsSplit(tile))
reg->treg_type = SplitSide(tile) ? SplitRightType(tile) : SplitLeftType(tile);
else
reg->treg_type = TiGetTypeExact(tile);
/* Prepend it to the region list */
reg->treg_next = (TransRegion *) arg->fra_region;
rename Region to ExtRegion On Macos, Tk includes X11, which has this define: #if !defined(MAC_OSX_TK) # include <X11/X.h> #endif #ifdef MAC_OSX_TK # include <X11/X.h> # define Cursor XCursor # define Region XRegion #endif This causes the keywords `Cursor` and `Region` to be reserved, which prevents magic from building. Rename `Region` to `ExtRegion` as suggested by @RTimothyEdwards in https://github.com/RTimothyEdwards/magic/issues/195#issuecomment-1298870983 and https://github.com/RTimothyEdwards/magic/pull/222#pullrequestreview-1334900670 Signed-off-by: Sean Cross <sean@xobs.io>
2023-02-24 03:27:08 +01:00
arg->fra_region = (ExtRegion *) reg;
return ((ExtRegion *) reg);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
/*ARGSUSED*/
int
extTransEach(tile, pNum, arg)
Tile *tile;
int pNum;
FindRegion *arg;
{
TransRegion *reg = (TransRegion *) arg->fra_region;
int area = TILEAREA(tile);
if (IsSplit(tile)) area /= 2; /* Split tiles are 1/2 area! */
else if (IsSplit(reg->treg_tile))
{
/* Avoid setting the region's tile pointer to a split tile */
reg->treg_tile = tile;
reg->treg_type = TiGetTypeExact(tile);
}
/* The following is non-ideal. It assumes that the lowest plane of */
/* types connected to a device is the plane of the device itself. */
/* Otherwise, the area of the device will be miscalculated. */
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
if (pNum < reg->treg_pnum) reg->treg_area = 0;
extSetNodeNum((LabRegion *) reg, pNum, tile);
if (pNum == reg->treg_pnum) reg->treg_area += area;
return (0);
}
/*
* ----------------------------------------------------------------------------
*
* extFindNodes --
*
* Build up, in the manner of ExtFindRegions, a list of all the
* node regions in the CellDef 'def'. This procedure is heavily
* optimized for speed.
*
* Results:
* Returns a pointer to a NULL-terminated list of NodeRegions
* that correspond to the nodes in the circuit. The label lists
* for each node region have not yet been filled in.
*
* Side effects:
* Memory is allocated.
*
* ----------------------------------------------------------------------------
*/
Stack *extNodeStack = NULL;
Rect *extNodeClipArea = NULL;
NodeRegion *
extFindNodes(def, clipArea, subonly)
CellDef *def; /* Def whose nodes are being found */
Rect *clipArea; /* If non-NULL, ignore perimeter and area that extend
* outside this rectangle.
*/
bool subonly; /* If true, only find the substrate node, and return */
{
int extNodeAreaFunc();
int extSubsFunc();
Revised the substrate extraction method: Instead of searching on all types specified in the "substrate" statement, split such types into those on the declared well plane, and everything else. Any types on the well plane are searched as before. Types not on the well plane (e.g., psd on active) are searched and added to the substrate node *only* if overlapping nothing on the well plane. This allows a type such as "psd" to be used on, e.g., both space (substrate) and deep pwell, but only be extracted as part of the substrate when found over space. Note that if there is NO implicit substrate, the substrate connections will always be found through the usual connection rules.
2019-08-20 14:42:07 +02:00
int extSubsFunc2();
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
FindRegion arg;
int pNum, n;
TileTypeBitMask subsTypesNonSpace;
Revised the substrate extraction method: Instead of searching on all types specified in the "substrate" statement, split such types into those on the declared well plane, and everything else. Any types on the well plane are searched as before. Types not on the well plane (e.g., psd on active) are searched and added to the substrate node *only* if overlapping nothing on the well plane. This allows a type such as "psd" to be used on, e.g., both space (substrate) and deep pwell, but only be extracted as part of the substrate when found over space. Note that if there is NO implicit substrate, the substrate connections will always be found through the usual connection rules.
2019-08-20 14:42:07 +02:00
bool space_is_substrate;
Made a change to basic extraction to avoid generating an extra node representing the global substrate on cells that are abstract views. Corrected a typecasting issue in ext2spice.c that throws a compiler warning. Added another check for a cell being editable when painting, which is a case that was not covered by the previous code change to address the same issue.
2022-01-13 18:56:20 +01:00
bool isabstract;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/* Reset perimeter and area prior to node extraction */
for (n = 0; n < ExtCurStyle->exts_numResistClasses; n++)
extResistArea[n] = extResistPerim[n] = 0;
extNodeClipArea = clipArea;
if (extNodeStack == (Stack *) NULL)
extNodeStack = StackNew(64);
arg.fra_def = def;
rename Region to ExtRegion On Macos, Tk includes X11, which has this define: #if !defined(MAC_OSX_TK) # include <X11/X.h> #endif #ifdef MAC_OSX_TK # include <X11/X.h> # define Cursor XCursor # define Region XRegion #endif This causes the keywords `Cursor` and `Region` to be reserved, which prevents magic from building. Rename `Region` to `ExtRegion` as suggested by @RTimothyEdwards in https://github.com/RTimothyEdwards/magic/issues/195#issuecomment-1298870983 and https://github.com/RTimothyEdwards/magic/pull/222#pullrequestreview-1334900670 Signed-off-by: Sean Cross <sean@xobs.io>
2023-02-24 03:27:08 +01:00
arg.fra_region = (ExtRegion *) NULL;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
SigDisableInterrupts();
temp_subsnode = (NodeRegion *)NULL; // Reset for new search
Made a change to basic extraction to avoid generating an extra node representing the global substrate on cells that are abstract views. Corrected a typecasting issue in ext2spice.c that throws a compiler warning. Added another check for a cell being editable when painting, which is a case that was not covered by the previous code change to address the same issue.
2022-01-13 18:56:20 +01:00
isabstract = FALSE;
Changed the behavior of "extract" routine extFindNodes() to not check for abstract views to determine how to handle the substrate node. Running tests to check if this has any negative impact on the extraction of abstract views that do not specify substrate and well types.
2022-02-17 17:27:43 +01:00
This commit adds an additional function to the substrate generation, effectively forcing the substrate type (e.g., "pwell") to be defined as delineating isolated substrate areas only (e.g., pwell in deep nwell or isosub a.k.a. subcut). It does so by erasing all of the substrate type out of a cell prior to extraction before redrawing it in the isolated areas. This avoids issues caused by pwell drawn in separate unconnected areas of a cell, as these are removed and the area treated as the default substrate everywhere. Has worked on all layouts tested so far.
2022-02-17 23:06:25 +01:00
// Do not treat abstract cells differently per the substrate.
Changed the behavior of "extract" routine extFindNodes() to not check for abstract views to determine how to handle the substrate node. Running tests to check if this has any negative impact on the extraction of abstract views that do not specify substrate and well types.
2022-02-17 17:27:43 +01:00
/* DBPropGet(def, "LEFview", &isabstract); */
Made a change to basic extraction to avoid generating an extra node representing the global substrate on cells that are abstract views. Corrected a typecasting issue in ext2spice.c that throws a compiler warning. Added another check for a cell being editable when painting, which is a case that was not covered by the previous code change to address the same issue.
2022-01-13 18:56:20 +01:00
if (!isabstract)
Revised the substrate extraction method: Instead of searching on all types specified in the "substrate" statement, split such types into those on the declared well plane, and everything else. Any types on the well plane are searched as before. Types not on the well plane (e.g., psd on active) are searched and added to the substrate node *only* if overlapping nothing on the well plane. This allows a type such as "psd" to be used on, e.g., both space (substrate) and deep pwell, but only be extracted as part of the substrate when found over space. Note that if there is NO implicit substrate, the substrate connections will always be found through the usual connection rules.
2019-08-20 14:42:07 +02:00
{
Made a change to basic extraction to avoid generating an extra node representing the global substrate on cells that are abstract views. Corrected a typecasting issue in ext2spice.c that throws a compiler warning. Added another check for a cell being editable when painting, which is a case that was not covered by the previous code change to address the same issue.
2022-01-13 18:56:20 +01:00
/* First pass: Find substrate. Collect all tiles belonging */
/* to the substrate and push them onto the stack. Then */
/* call extNodeAreaFunc() on the first of these to generate */
/* a single substrate node. */
/* Refinement: Split search into two parts, one on the */
/* globSubstratePlane and one on all other planes. ONLY */
/* search other planes if TT_SPACE is in the list of */
/* substrate types, and then only consider those types to */
/* be part of the substrate node if they have only space */
/* below them on the globSubstratePlane. This method lets */
/* a single type like "psd" operate on, for example, both */
/* the substrate and an isolated pwell, without implicitly */
/* connecting the isolated pwell to the substrate. */
if (TTMaskHasType(&ExtCurStyle->exts_globSubstrateTypes, TT_SPACE))
Restored compiling of the non-Tcl/Tk version of magic. This has traditionally been kept for backwards compatibility. However, the operation of "ext2spice" and "ext2sim" as separate programs has become extremely difficult to maintain, and so it has been dropped in favor of folding both into the program as commands, as was done a long time ago in the Tcl/Tk version.
2022-02-08 22:12:07 +01:00
space_is_substrate = TRUE;
Made a change to basic extraction to avoid generating an extra node representing the global substrate on cells that are abstract views. Corrected a typecasting issue in ext2spice.c that throws a compiler warning. Added another check for a cell being editable when painting, which is a case that was not covered by the previous code change to address the same issue.
2022-01-13 18:56:20 +01:00
else
Restored compiling of the non-Tcl/Tk version of magic. This has traditionally been kept for backwards compatibility. However, the operation of "ext2spice" and "ext2sim" as separate programs has become extremely difficult to maintain, and so it has been dropped in favor of folding both into the program as commands, as was done a long time ago in the Tcl/Tk version.
2022-02-08 22:12:07 +01:00
space_is_substrate = FALSE;
Revised the substrate extraction method: Instead of searching on all types specified in the "substrate" statement, split such types into those on the declared well plane, and everything else. Any types on the well plane are searched as before. Types not on the well plane (e.g., psd on active) are searched and added to the substrate node *only* if overlapping nothing on the well plane. This allows a type such as "psd" to be used on, e.g., both space (substrate) and deep pwell, but only be extracted as part of the substrate when found over space. Note that if there is NO implicit substrate, the substrate connections will always be found through the usual connection rules.
2019-08-20 14:42:07 +02:00
Made a change to basic extraction to avoid generating an extra node representing the global substrate on cells that are abstract views. Corrected a typecasting issue in ext2spice.c that throws a compiler warning. Added another check for a cell being editable when painting, which is a case that was not covered by the previous code change to address the same issue.
2022-01-13 18:56:20 +01:00
TTMaskZero(&subsTypesNonSpace);
TTMaskSetMask(&subsTypesNonSpace, &ExtCurStyle->exts_globSubstrateTypes);
TTMaskClearType(&subsTypesNonSpace, TT_SPACE);
Revised the substrate extraction method: Instead of searching on all types specified in the "substrate" statement, split such types into those on the declared well plane, and everything else. Any types on the well plane are searched as before. Types not on the well plane (e.g., psd on active) are searched and added to the substrate node *only* if overlapping nothing on the well plane. This allows a type such as "psd" to be used on, e.g., both space (substrate) and deep pwell, but only be extracted as part of the substrate when found over space. Note that if there is NO implicit substrate, the substrate connections will always be found through the usual connection rules.
2019-08-20 14:42:07 +02:00
Corrected some issues related to the handling of substrate hierarchy. Most of this had to do with the incorrect use of the parent's substrate name in extHierSubstrate(). After the correction, there still remains an issue that is caused when a labeled isolated substrate region overlaps an extraction tile boundary. I believe that this particular error has existed for some time and is not new, so I am committing these changes.
2022-02-24 22:47:11 +01:00
/* If the default substrate type is set, it is used *only* for */
/* isolated substrate regions and does not mark the default */
/* substrate, so remove it from the list of substrate types. */
if (ExtCurStyle->exts_globSubstrateDefaultType != -1)
TTMaskClearType(&subsTypesNonSpace,
ExtCurStyle->exts_globSubstrateDefaultType);
Made a change to basic extraction to avoid generating an extra node representing the global substrate on cells that are abstract views. Corrected a typecasting issue in ext2spice.c that throws a compiler warning. Added another check for a cell being editable when painting, which is a case that was not covered by the previous code change to address the same issue.
2022-01-13 18:56:20 +01:00
pNum = ExtCurStyle->exts_globSubstratePlane;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/* Does the type set of this plane intersect the substrate types? */
if (TTMaskIntersect(&DBPlaneTypes[pNum], &subsTypesNonSpace))
Made a change to basic extraction to avoid generating an extra node representing the global substrate on cells that are abstract views. Corrected a typecasting issue in ext2spice.c that throws a compiler warning. Added another check for a cell being editable when painting, which is a case that was not covered by the previous code change to address the same issue.
2022-01-13 18:56:20 +01:00
{
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
arg.fra_pNum = pNum;
Made a change to basic extraction to avoid generating an extra node representing the global substrate on cells that are abstract views. Corrected a typecasting issue in ext2spice.c that throws a compiler warning. Added another check for a cell being editable when painting, which is a case that was not covered by the previous code change to address the same issue.
2022-01-13 18:56:20 +01:00
DBSrPaintClient((Tile *) NULL, def->cd_planes[pNum],
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
&TiPlaneRect, &subsTypesNonSpace, extUnInit,
extSubsFunc, (ClientData) &arg);
Made a change to basic extraction to avoid generating an extra node representing the global substrate on cells that are abstract views. Corrected a typecasting issue in ext2spice.c that throws a compiler warning. Added another check for a cell being editable when painting, which is a case that was not covered by the previous code change to address the same issue.
2022-01-13 18:56:20 +01:00
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Made a change to basic extraction to avoid generating an extra node representing the global substrate on cells that are abstract views. Corrected a typecasting issue in ext2spice.c that throws a compiler warning. Added another check for a cell being editable when painting, which is a case that was not covered by the previous code change to address the same issue.
2022-01-13 18:56:20 +01:00
for (pNum = PL_TECHDEPBASE; pNum < DBNumPlanes; pNum++)
{
if (pNum == ExtCurStyle->exts_globSubstratePlane) continue;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Made a change to basic extraction to avoid generating an extra node representing the global substrate on cells that are abstract views. Corrected a typecasting issue in ext2spice.c that throws a compiler warning. Added another check for a cell being editable when painting, which is a case that was not covered by the previous code change to address the same issue.
2022-01-13 18:56:20 +01:00
/* Does the type set of this plane intersect the substrate types? */
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Made a change to basic extraction to avoid generating an extra node representing the global substrate on cells that are abstract views. Corrected a typecasting issue in ext2spice.c that throws a compiler warning. Added another check for a cell being editable when painting, which is a case that was not covered by the previous code change to address the same issue.
2022-01-13 18:56:20 +01:00
if (TTMaskIntersect(&DBPlaneTypes[pNum], &subsTypesNonSpace))
{
arg.fra_pNum = pNum;
if (space_is_substrate)
DBSrPaintClient((Tile *) NULL, def->cd_planes[pNum],
&TiPlaneRect, &subsTypesNonSpace, extUnInit,
extSubsFunc2, (ClientData) &arg);
else
DBSrPaintClient((Tile *) NULL, def->cd_planes[pNum],
&TiPlaneRect, &subsTypesNonSpace, extUnInit,
extSubsFunc, (ClientData) &arg);
}
}
/* If there was a substrate connection, process it and */
/* everything that was connected to it. If not, then create a */
/* new node to represent the substrate. */
if (!StackEmpty(extNodeStack))
{
Tile *tile;
int tilePlaneNum;
POPTILE(tile, tilePlaneNum);
arg.fra_pNum = tilePlaneNum;
extNodeAreaFunc(tile, &arg);
temp_subsnode = (NodeRegion *)arg.fra_region;
}
else if (ExtCurStyle->exts_globSubstratePlane != -1)
{
NodeRegion *loc_subsnode;
extNodeAreaFunc((Tile *)NULL, (FindRegion *)&arg);
loc_subsnode = (NodeRegion *)arg.fra_region;
loc_subsnode->nreg_pnum = ExtCurStyle->exts_globSubstratePlane;
loc_subsnode->nreg_type = TT_SPACE;
loc_subsnode->nreg_ll.p_x = MINFINITY + 3;
loc_subsnode->nreg_ll.p_y = MINFINITY + 3;
loc_subsnode->nreg_labels = NULL;
temp_subsnode = loc_subsnode;
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
if (subonly == TRUE) return ((NodeRegion *) arg.fra_region);
/* Second pass: Find all other nodes */
for (pNum = PL_TECHDEPBASE; pNum < DBNumPlanes; pNum++)
{
arg.fra_pNum = pNum;
(void) DBSrPaintClient((Tile *) NULL, def->cd_planes[pNum],
&TiPlaneRect, &ExtCurStyle->exts_activeTypes,
extUnInit, extNodeAreaFunc, (ClientData) &arg);
}
SigEnableInterrupts();
/* Compute resistance for last node */
if (arg.fra_region && (ExtOptions & EXT_DORESISTANCE))
extSetResist((NodeRegion *) arg.fra_region);
return ((NodeRegion *) arg.fra_region);
}
int
extSubsFunc(tile, arg)
Tile *tile;
FindRegion *arg;
{
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
int pNum;
Corrected an error that causes alias names for layers to become the principle layer name, which should not happen (especially in the case of space, where layers may be aliased to "space" to make them ignored on input). Also: Implemented a "-<types>" option to the "substrate" record in the techfile to declare types which shield layers from the substrate. This allows types like pwell to be used in different contexts, e.g., as part of the substrate, or as a P-well in deep N-well, without requiring a different type. This works in conjunction with the recently-implemented "+<types>" ID types for devices. All of this may seem unnecessary but helps to reduce the number of layers needing to be defined, and the subsequent complexity of the DRC rulesets.
2019-09-19 02:48:33 +02:00
Rect tileArea;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
TileType type;
Corrected an error that causes alias names for layers to become the principle layer name, which should not happen (especially in the case of space, where layers may be aliased to "space" to make them ignored on input). Also: Implemented a "-<types>" option to the "substrate" record in the techfile to declare types which shield layers from the substrate. This allows types like pwell to be used in different contexts, e.g., as part of the substrate, or as a P-well in deep N-well, without requiring a different type. This works in conjunction with the recently-implemented "+<types>" ID types for devices. All of this may seem unnecessary but helps to reduce the number of layers needing to be defined, and the subsequent complexity of the DRC rulesets.
2019-09-19 02:48:33 +02:00
TileTypeBitMask *smask;
int extSubsFunc3();
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
if (IsSplit(tile))
{
type = (SplitSide(tile)) ? SplitRightType(tile) : SplitLeftType(tile);
if (type == TT_SPACE) return 0; /* Should not happen */
}
Corrected an error that causes alias names for layers to become the principle layer name, which should not happen (especially in the case of space, where layers may be aliased to "space" to make them ignored on input). Also: Implemented a "-<types>" option to the "substrate" record in the techfile to declare types which shield layers from the substrate. This allows types like pwell to be used in different contexts, e.g., as part of the substrate, or as a P-well in deep N-well, without requiring a different type. This works in conjunction with the recently-implemented "+<types>" ID types for devices. All of this may seem unnecessary but helps to reduce the number of layers needing to be defined, and the subsequent complexity of the DRC rulesets.
2019-09-19 02:48:33 +02:00
/* Run second search in the area of the tile on the substrate plane */
/* to make sure that no shield types are covering this tile. */
TiToRect(tile, &tileArea);
smask = &ExtCurStyle->exts_globSubstrateShieldTypes;
for (pNum = PL_TECHDEPBASE; pNum < DBNumPlanes; pNum++)
if (TTMaskIntersect(&DBPlaneTypes[pNum], smask))
if (DBSrPaintArea((Tile *) NULL, arg->fra_def->cd_planes[pNum],
&tileArea, smask, extSubsFunc3, (ClientData)NULL) != 0)
Corrected an error that prematurely exists the substrate search if a shielded type is found, preventing any other substrate types from being discovered and processed.
2021-08-26 03:40:27 +02:00
return (0);
Corrected an error that causes alias names for layers to become the principle layer name, which should not happen (especially in the case of space, where layers may be aliased to "space" to make them ignored on input). Also: Implemented a "-<types>" option to the "substrate" record in the techfile to declare types which shield layers from the substrate. This allows types like pwell to be used in different contexts, e.g., as part of the substrate, or as a P-well in deep N-well, without requiring a different type. This works in conjunction with the recently-implemented "+<types>" ID types for devices. All of this may seem unnecessary but helps to reduce the number of layers needing to be defined, and the subsequent complexity of the DRC rulesets.
2019-09-19 02:48:33 +02:00
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/* Mark this tile as pending and push it */
PUSHTILE(tile, arg->fra_pNum);
/* That's all we do */
return (0);
}
Revised the substrate extraction method: Instead of searching on all types specified in the "substrate" statement, split such types into those on the declared well plane, and everything else. Any types on the well plane are searched as before. Types not on the well plane (e.g., psd on active) are searched and added to the substrate node *only* if overlapping nothing on the well plane. This allows a type such as "psd" to be used on, e.g., both space (substrate) and deep pwell, but only be extracted as part of the substrate when found over space. Note that if there is NO implicit substrate, the substrate connections will always be found through the usual connection rules.
2019-08-20 14:42:07 +02:00
int
extSubsFunc2(tile, arg)
Tile *tile;
FindRegion *arg;
{
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
int pNum;
Revised the substrate extraction method: Instead of searching on all types specified in the "substrate" statement, split such types into those on the declared well plane, and everything else. Any types on the well plane are searched as before. Types not on the well plane (e.g., psd on active) are searched and added to the substrate node *only* if overlapping nothing on the well plane. This allows a type such as "psd" to be used on, e.g., both space (substrate) and deep pwell, but only be extracted as part of the substrate when found over space. Note that if there is NO implicit substrate, the substrate connections will always be found through the usual connection rules.
2019-08-20 14:42:07 +02:00
Rect tileArea;
Corrected an error that causes alias names for layers to become the principle layer name, which should not happen (especially in the case of space, where layers may be aliased to "space" to make them ignored on input). Also: Implemented a "-<types>" option to the "substrate" record in the techfile to declare types which shield layers from the substrate. This allows types like pwell to be used in different contexts, e.g., as part of the substrate, or as a P-well in deep N-well, without requiring a different type. This works in conjunction with the recently-implemented "+<types>" ID types for devices. All of this may seem unnecessary but helps to reduce the number of layers needing to be defined, and the subsequent complexity of the DRC rulesets.
2019-09-19 02:48:33 +02:00
TileTypeBitMask *smask;
Revised the substrate extraction method: Instead of searching on all types specified in the "substrate" statement, split such types into those on the declared well plane, and everything else. Any types on the well plane are searched as before. Types not on the well plane (e.g., psd on active) are searched and added to the substrate node *only* if overlapping nothing on the well plane. This allows a type such as "psd" to be used on, e.g., both space (substrate) and deep pwell, but only be extracted as part of the substrate when found over space. Note that if there is NO implicit substrate, the substrate connections will always be found through the usual connection rules.
2019-08-20 14:42:07 +02:00
int extSubsFunc3();
TiToRect(tile, &tileArea);
/* Run second search in the area of the tile on the substrate plane */
Corrected an error that causes alias names for layers to become the principle layer name, which should not happen (especially in the case of space, where layers may be aliased to "space" to make them ignored on input). Also: Implemented a "-<types>" option to the "substrate" record in the techfile to declare types which shield layers from the substrate. This allows types like pwell to be used in different contexts, e.g., as part of the substrate, or as a P-well in deep N-well, without requiring a different type. This works in conjunction with the recently-implemented "+<types>" ID types for devices. All of this may seem unnecessary but helps to reduce the number of layers needing to be defined, and the subsequent complexity of the DRC rulesets.
2019-09-19 02:48:33 +02:00
/* to make sure that no shield types are covering this tile. */
smask = &ExtCurStyle->exts_globSubstrateShieldTypes;
for (pNum = PL_TECHDEPBASE; pNum < DBNumPlanes; pNum++)
if (TTMaskIntersect(&DBPlaneTypes[pNum], smask))
if (DBSrPaintArea((Tile *) NULL, arg->fra_def->cd_planes[pNum],
&tileArea, smask, extSubsFunc3, (ClientData)NULL) != 0)
Corrected the return value of extSubsFunc2(), which was returning value 1 after finding a substrate connecting type shielded (by deep nwell, in the example) from the substrate, thus preventing the search from processing any remaining substrate types. Solved by changing the return value to zero to keep the search going.
2021-12-23 22:31:34 +01:00
/* Keep the search going, as there may be other tiles to check */
return (0);
Corrected an error that causes alias names for layers to become the principle layer name, which should not happen (especially in the case of space, where layers may be aliased to "space" to make them ignored on input). Also: Implemented a "-<types>" option to the "substrate" record in the techfile to declare types which shield layers from the substrate. This allows types like pwell to be used in different contexts, e.g., as part of the substrate, or as a P-well in deep N-well, without requiring a different type. This works in conjunction with the recently-implemented "+<types>" ID types for devices. All of this may seem unnecessary but helps to reduce the number of layers needing to be defined, and the subsequent complexity of the DRC rulesets.
2019-09-19 02:48:33 +02:00
/* Run third search in the area of the tile on the substrate plane */
Revised the substrate extraction method: Instead of searching on all types specified in the "substrate" statement, split such types into those on the declared well plane, and everything else. Any types on the well plane are searched as before. Types not on the well plane (e.g., psd on active) are searched and added to the substrate node *only* if overlapping nothing on the well plane. This allows a type such as "psd" to be used on, e.g., both space (substrate) and deep pwell, but only be extracted as part of the substrate when found over space. Note that if there is NO implicit substrate, the substrate connections will always be found through the usual connection rules.
2019-08-20 14:42:07 +02:00
/* to make sure that nothing but space is under these tiles. */
pNum = ExtCurStyle->exts_globSubstratePlane;
if (DBSrPaintArea((Tile *) NULL, arg->fra_def->cd_planes[pNum],
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
&tileArea, &DBAllButSpaceBits,
Revised the substrate extraction method: Instead of searching on all types specified in the "substrate" statement, split such types into those on the declared well plane, and everything else. Any types on the well plane are searched as before. Types not on the well plane (e.g., psd on active) are searched and added to the substrate node *only* if overlapping nothing on the well plane. This allows a type such as "psd" to be used on, e.g., both space (substrate) and deep pwell, but only be extracted as part of the substrate when found over space. Note that if there is NO implicit substrate, the substrate connections will always be found through the usual connection rules.
2019-08-20 14:42:07 +02:00
extSubsFunc3, (ClientData)NULL) == 0)
{
/* Mark this tile as pending and push it */
PUSHTILE(tile, arg->fra_pNum);
}
return (0);
}
int
extSubsFunc3(tile)
Tile *tile;
{
/* Stops the search because something that was not space was found */
return 1;
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
int
extNodeAreaFunc(tile, arg)
Tile *tile;
FindRegion *arg;
{
Made corrections to the extraction based on a pull request by Dan Moore for preventing integer overflow in the area calculations.
2021-01-05 18:25:25 +01:00
int tilePlaneNum, pNum, len, resistClass, n, nclasses;
dlong area;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
PlaneMask pMask;
CapValue capval;
TileTypeBitMask *mask, *resMask;
NodeRegion *reg;
Tile *tp;
TileType type, t, residue, tres;
NodeRegion *old;
Rect r;
PlaneAndArea pla;
if (tile && IsSplit(tile))
{
type = (SplitSide(tile)) ? SplitRightType(tile) : SplitLeftType(tile);
if (type == TT_SPACE) return 0; /* Should not happen */
}
/* Compute the resistance for the previous region */
42 x warning: suggest parentheses around assignment used as truth value EFbuild.c:466:9: warning: suggest parentheses around assignment used as truth value EFbuild.c:662:20: warning: suggest parentheses around assignment used as truth value EFbuild.c:682:24: warning: suggest parentheses around assignment used as truth value EFbuild.c:690:24: warning: suggest parentheses around assignment used as truth value EFbuild.c:1760:12: warning: suggest parentheses around assignment used as truth value EFbuild.c:1973:9: warning: suggest parentheses around assignment used as truth value EFbuild.c:2062:12: warning: suggest parentheses around assignment used as truth value EFbuild.c:2063:13: warning: suggest parentheses around assignment used as truth value EFbuild.c:2091:12: warning: suggest parentheses around assignment used as truth value EFbuild.c:2134:12: warning: suggest parentheses around assignment used as truth value EFbuild.c:2135:13: warning: suggest parentheses around assignment used as truth value EFread.c:673:12: warning: suggest parentheses around assignment used as truth value ExtArray.c:693:12: warning: suggest parentheses around assignment used as truth value ExtArray.c:800:13: warning: suggest parentheses around assignment used as truth value ExtBasic.c:4569:9: warning: suggest parentheses around assignment used as truth value ExtBasic.c:4949:13: warning: suggest parentheses around assignment used as truth value ExtBasic.c:5032:12: warning: suggest parentheses around assignment used as truth value ExtCell.c:218:13: warning: suggest parentheses around assignment used as truth value ExtCouple.c:222:12: warning: suggest parentheses around assignment used as truth value ExtCouple.c:278:12: warning: suggest parentheses around assignment used as truth value ExtCouple.c:467:9: warning: suggest parentheses around assignment used as truth value ExtHard.c:379:12: warning: suggest parentheses around assignment used as truth value ExtHard.c:458:12: warning: suggest parentheses around assignment used as truth value ExtHier.c:740:16: warning: suggest parentheses around assignment used as truth value ExtHier.c:831:12: warning: suggest parentheses around assignment used as truth value ExtHier.c:841:13: warning: suggest parentheses around assignment used as truth value ExtHier.c:851:17: warning: suggest parentheses around assignment used as truth value ExtHier.c:865:34: warning: suggest parentheses around assignment used as truth value ExtLength.c:264:12: warning: suggest parentheses around assignment used as truth value ExtLength.c:276:12: warning: suggest parentheses around assignment used as truth value ExtLength.c:878:9: warning: suggest parentheses around assignment used as truth value ExtMain.c:499:12: warning: suggest parentheses around assignment used as truth value ExtMain.c:970:12: warning: suggest parentheses around assignment used as truth value ExtNghbors.c:298:13: warning: suggest parentheses around assignment used as truth value ExtSubtree.c:683:12: warning: suggest parentheses around assignment used as truth value ExtTest.c:457:21: warning: suggest parentheses around assignment used as truth value ExtTest.c:466:21: warning: suggest parentheses around assignment used as truth value ExtTimes.c:216:12: warning: suggest parentheses around assignment used as truth value ExtTimes.c:226:12: warning: suggest parentheses around assignment used as truth value ExtTimes.c:235:12: warning: suggest parentheses around assignment used as truth value ExtYank.c:236:34: warning: suggest parentheses around assignment used as truth value ExtYank.c:238:42: warning: suggest parentheses around assignment used as truth value GCC14 -Wall cleanup series [-Wparentheses]
2024-10-04 18:20:25 +02:00
if ((old = (NodeRegion *) arg->fra_region))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
if (ExtOptions & EXT_DORESISTANCE)
extSetResist(old);
/* Allocate a new node */
nclasses = ExtCurStyle->exts_numResistClasses;
n = sizeof (NodeRegion) + (sizeof (PerimArea) * (nclasses - 1));
reg = (NodeRegion *) mallocMagic((unsigned) n);
reg->nreg_labels = (LabelList *) NULL;
reg->nreg_cap = (CapValue) 0;
reg->nreg_resist = 0;
reg->nreg_pnum = DBNumPlanes;
reg->nreg_next = (NodeRegion *) NULL;
for (n = 0; n < nclasses; n++)
reg->nreg_pa[n].pa_perim = reg->nreg_pa[n].pa_area = 0;
/* Prepend the new node to the region list */
reg->nreg_next = (NodeRegion *) arg->fra_region;
rename Region to ExtRegion On Macos, Tk includes X11, which has this define: #if !defined(MAC_OSX_TK) # include <X11/X.h> #endif #ifdef MAC_OSX_TK # include <X11/X.h> # define Cursor XCursor # define Region XRegion #endif This causes the keywords `Cursor` and `Region` to be reserved, which prevents magic from building. Rename `Region` to `ExtRegion` as suggested by @RTimothyEdwards in https://github.com/RTimothyEdwards/magic/issues/195#issuecomment-1298870983 and https://github.com/RTimothyEdwards/magic/pull/222#pullrequestreview-1334900670 Signed-off-by: Sean Cross <sean@xobs.io>
2023-02-24 03:27:08 +01:00
arg->fra_region = (ExtRegion *) reg;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/* Used by substrate generating routine */
if (tile == NULL) return 1;
/* Mark this tile as pending and push it */
PUSHTILE(tile, arg->fra_pNum);
/* Continue processing tiles until there are none left */
while (!StackEmpty(extNodeStack))
{
POPTILE(tile, tilePlaneNum);
/*
* Since tile was pushed on the stack, we know that it
* belongs to this region. Check to see that it hasn't
* been visited in the meantime. If it's still unvisited,
* visit it and process its neighbors.
*/
Ti[GS]etClient() usage enforcement All naked access to `ti_client` now uses the function-like-macro to encapsulate this action. This macro existed before this just makes all sites utilize it. Added additional INT and PTR variants to remove the programmer load on thinking about casing and casts polluting the point of use. So the use now looks cleaner. Equivalent prototypes: void TiSetClient(Tile*, ClientData) void TiSetClientINT(Tile*, intptr_t) /* pointertype */ void TiSetClientPTR(Tile*, void*) ClientData TiGetClient(Tile*) intptr_t TiGetClientINT(Tile*) /* pointertype */ void *TiGetClientPTR(Tile*)
2025-02-21 18:54:11 +01:00
if (TiGetClientPTR(tile) == reg)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
continue;
Ti[GS]etClient() usage enforcement All naked access to `ti_client` now uses the function-like-macro to encapsulate this action. This macro existed before this just makes all sites utilize it. Added additional INT and PTR variants to remove the programmer load on thinking about casing and casts polluting the point of use. So the use now looks cleaner. Equivalent prototypes: void TiSetClient(Tile*, ClientData) void TiSetClientINT(Tile*, intptr_t) /* pointertype */ void TiSetClientPTR(Tile*, void*) ClientData TiGetClient(Tile*) intptr_t TiGetClientINT(Tile*) /* pointertype */ void *TiGetClientPTR(Tile*)
2025-02-21 18:54:11 +01:00
TiSetClientPTR(tile, reg);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
if (DebugIsSet(extDebugID, extDebNeighbor))
extShowTile(tile, "neighbor", 1);
if (IsSplit(tile))
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
{
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
type = (SplitSide(tile)) ? SplitRightType(tile):
SplitLeftType(tile);
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
}
else
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
type = TiGetTypeExact(tile);
/* Contacts are replaced by their residues when calculating */
/* area/perimeter capacitance and resistance. */
residue = (DBIsContact(type)) ?
DBPlaneToResidue(type, tilePlaneNum) : type;
mask = &ExtCurStyle->exts_nodeConn[type];
resMask = &ExtCurStyle->exts_typesResistChanged[residue];
resistClass = ExtCurStyle->exts_typeToResistClass[residue];
/*
* Make sure the lower-leftmost point in the node is
* kept up to date, so we can generate an internal
* node name that does not depend on any other nodes
* in this cell.
*/
extSetNodeNum((LabRegion *) reg, tilePlaneNum, tile);
/*
* Keep track of the total area of this node, and the
* contribution to parasitic ground capacitance resulting
* from area.
*/
if (extNodeClipArea)
{
TITORECT(tile, &r);
Found another place where a bounds check on the clip area was not done (at all), again resulting in negative capacitances.
2022-06-01 06:54:59 +02:00
/* Check if the tile is outside the clip area */
Found one more error that was causing issues with the hierarchical capacitance adjustments, and may have caused issues with basic hierarchical extraction as well (although I have not checked or proven the latter).
2022-06-05 03:09:54 +02:00
if (GEO_OVERLAP(&r, extNodeClipArea))
{
GEOCLIP(&r, extNodeClipArea);
area = (dlong)(r.r_xtop - r.r_xbot) * (dlong)(r.r_ytop - r.r_ybot);
}
else
area = (dlong)0;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
}
One last change for issue #50
2021-01-14 06:38:14 +01:00
else area = (dlong)(TOP(tile) - BOTTOM(tile)) * (dlong)(RIGHT(tile) - LEFT(tile));
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
if (IsSplit(tile)) area /= 2; /* Split tiles are 1/2 area! */
if (resistClass != -1)
extResistArea[resistClass] += area;
reg->nreg_cap += area * ExtCurStyle->exts_areaCap[residue];
/* Compute perimeter of nonManhattan edges */
if (IsSplit(tile))
{
len = ((RIGHT(tile) - LEFT(tile)) * (RIGHT(tile) - LEFT(tile))) +
((TOP(tile) - BOTTOM(tile)) * (TOP(tile) - BOTTOM(tile)));
len = (int)sqrt((double)len);
if (extNodeClipArea)
{
/* To-do: Find perimeter length of clipped edge */
}
/* Find the type on the other side of the tile */
t = (SplitSide(tile)) ? SplitLeftType(tile):
SplitRightType(tile);
tres = (DBIsContact(t)) ? DBPlaneToResidue(t, tilePlaneNum) : t;
if ((capval = ExtCurStyle->exts_perimCap[residue][tres]) != (CapValue) 0)
reg->nreg_cap += capval * len;
if (TTMaskHasType(resMask, tres) && resistClass != -1)
extResistPerim[resistClass] += len;
}
/*
* Walk along all four sides of tile.
* Sum perimeter capacitance as we go.
* Keep track of the contribution to the total perimeter
* of this node, for computing resistance.
*/
/* Top */
topside:
if (IsSplit(tile) && (SplitSide(tile) ^ SplitDirection(tile))) goto leftside;
for (tp = RT(tile); RIGHT(tp) > LEFT(tile); tp = BL(tp))
{
if (extNodeClipArea)
{
r.r_ybot = r.r_ytop = TOP(tile);
r.r_xtop = MIN(RIGHT(tile), RIGHT(tp));
r.r_xbot = MAX(LEFT(tile), LEFT(tp));
GEOCLIP(&r, extNodeClipArea);
len = EDGENULL(&r) ? 0 : r.r_xtop - r.r_xbot;
}
else len = MIN(RIGHT(tile), RIGHT(tp)) - MAX(LEFT(tile), LEFT(tp));
TiGetClient() excessive use hotspots This is reducing nearby calls to TiGetClient() API when the value can be looked up one time and stored in a local variable to make other decisions about. This is due to TiGetClient() potentially having a slightly higher cost to call than previously, this is a kind of peephole optimization approach (if I can see multiple getters used within the window it got optmized). 'ticlient' was used for retrieval as ClientData so that future greps across the codebase for `ti_client` should only match naked access.
2025-02-21 18:57:13 +01:00
ClientData ticlient = TiGetClient(tp);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
if (IsSplit(tp))
{
t = SplitBottomType(tp);
TiGetClient() excessive use hotspots This is reducing nearby calls to TiGetClient() API when the value can be looked up one time and stored in a local variable to make other decisions about. This is due to TiGetClient() potentially having a slightly higher cost to call than previously, this is a kind of peephole optimization approach (if I can see multiple getters used within the window it got optmized). 'ticlient' was used for retrieval as ClientData so that future greps across the codebase for `ti_client` should only match naked access.
2025-02-21 18:57:13 +01:00
if (ticlient == extUnInit && TTMaskHasType(mask, t))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
PUSHTILEBOTTOM(tp, tilePlaneNum);
}
TiGetClient() excessive use hotspots This is reducing nearby calls to TiGetClient() API when the value can be looked up one time and stored in a local variable to make other decisions about. This is due to TiGetClient() potentially having a slightly higher cost to call than previously, this is a kind of peephole optimization approach (if I can see multiple getters used within the window it got optmized). 'ticlient' was used for retrieval as ClientData so that future greps across the codebase for `ti_client` should only match naked access.
2025-02-21 18:57:13 +01:00
else if ((NodeRegion *)CD2PTR(ticlient) != reg && TTMaskHasType(mask, t))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
/* Count split tile twice, once for each node it belongs to. */
Ti[GS]etClient() usage enforcement All naked access to `ti_client` now uses the function-like-macro to encapsulate this action. This macro existed before this just makes all sites utilize it. Added additional INT and PTR variants to remove the programmer load on thinking about casing and casts polluting the point of use. So the use now looks cleaner. Equivalent prototypes: void TiSetClient(Tile*, ClientData) void TiSetClientINT(Tile*, intptr_t) /* pointertype */ void TiSetClientPTR(Tile*, void*) ClientData TiGetClient(Tile*) intptr_t TiGetClientINT(Tile*) /* pointertype */ void *TiGetClientPTR(Tile*)
2025-02-21 18:54:11 +01:00
TiSetClient(tp, extUnInit);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
PUSHTILEBOTTOM(tp, tilePlaneNum);
}
}
else
{
t = TiGetTypeExact(tp);
TiGetClient() excessive use hotspots This is reducing nearby calls to TiGetClient() API when the value can be looked up one time and stored in a local variable to make other decisions about. This is due to TiGetClient() potentially having a slightly higher cost to call than previously, this is a kind of peephole optimization approach (if I can see multiple getters used within the window it got optmized). 'ticlient' was used for retrieval as ClientData so that future greps across the codebase for `ti_client` should only match naked access.
2025-02-21 18:57:13 +01:00
if (ticlient == extUnInit && TTMaskHasType(mask, t))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
PUSHTILE(tp, tilePlaneNum);
}
}
tres = (DBIsContact(t)) ? DBPlaneToResidue(t, tilePlaneNum) : t;
if ((capval = ExtCurStyle->exts_perimCap[residue][tres]) != (CapValue) 0)
reg->nreg_cap += capval * len;
if (TTMaskHasType(resMask, tres) && resistClass != -1)
extResistPerim[resistClass] += len;
}
/* Left */
leftside:
if (IsSplit(tile) && SplitSide(tile)) goto bottomside;
for (tp = BL(tile); BOTTOM(tp) < TOP(tile); tp = RT(tp))
{
if (extNodeClipArea)
{
r.r_xbot = r.r_xtop = LEFT(tile);
r.r_ytop = MIN(TOP(tile), TOP(tp));
r.r_ybot = MAX(BOTTOM(tile), BOTTOM(tp));
GEOCLIP(&r, extNodeClipArea);
len = EDGENULL(&r) ? 0 : r.r_ytop - r.r_ybot;
}
else len = MIN(TOP(tile), TOP(tp)) - MAX(BOTTOM(tile), BOTTOM(tp));
TiGetClient() excessive use hotspots This is reducing nearby calls to TiGetClient() API when the value can be looked up one time and stored in a local variable to make other decisions about. This is due to TiGetClient() potentially having a slightly higher cost to call than previously, this is a kind of peephole optimization approach (if I can see multiple getters used within the window it got optmized). 'ticlient' was used for retrieval as ClientData so that future greps across the codebase for `ti_client` should only match naked access.
2025-02-21 18:57:13 +01:00
ClientData ticlient = TiGetClient(tp);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
if (IsSplit(tp))
{
t = SplitRightType(tp);
TiGetClient() excessive use hotspots This is reducing nearby calls to TiGetClient() API when the value can be looked up one time and stored in a local variable to make other decisions about. This is due to TiGetClient() potentially having a slightly higher cost to call than previously, this is a kind of peephole optimization approach (if I can see multiple getters used within the window it got optmized). 'ticlient' was used for retrieval as ClientData so that future greps across the codebase for `ti_client` should only match naked access.
2025-02-21 18:57:13 +01:00
if (ticlient == extUnInit && TTMaskHasType(mask, t))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
PUSHTILERIGHT(tp, tilePlaneNum);
}
TiGetClient() excessive use hotspots This is reducing nearby calls to TiGetClient() API when the value can be looked up one time and stored in a local variable to make other decisions about. This is due to TiGetClient() potentially having a slightly higher cost to call than previously, this is a kind of peephole optimization approach (if I can see multiple getters used within the window it got optmized). 'ticlient' was used for retrieval as ClientData so that future greps across the codebase for `ti_client` should only match naked access.
2025-02-21 18:57:13 +01:00
else if ((NodeRegion *)CD2PTR(ticlient) != reg && TTMaskHasType(mask, t))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
/* Count split tile twice, once for each node it belongs to. */
Ti[GS]etClient() usage enforcement All naked access to `ti_client` now uses the function-like-macro to encapsulate this action. This macro existed before this just makes all sites utilize it. Added additional INT and PTR variants to remove the programmer load on thinking about casing and casts polluting the point of use. So the use now looks cleaner. Equivalent prototypes: void TiSetClient(Tile*, ClientData) void TiSetClientINT(Tile*, intptr_t) /* pointertype */ void TiSetClientPTR(Tile*, void*) ClientData TiGetClient(Tile*) intptr_t TiGetClientINT(Tile*) /* pointertype */ void *TiGetClientPTR(Tile*)
2025-02-21 18:54:11 +01:00
TiSetClient(tp, extUnInit);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
PUSHTILERIGHT(tp, tilePlaneNum);
}
}
else
{
t = TiGetTypeExact(tp);
TiGetClient() excessive use hotspots This is reducing nearby calls to TiGetClient() API when the value can be looked up one time and stored in a local variable to make other decisions about. This is due to TiGetClient() potentially having a slightly higher cost to call than previously, this is a kind of peephole optimization approach (if I can see multiple getters used within the window it got optmized). 'ticlient' was used for retrieval as ClientData so that future greps across the codebase for `ti_client` should only match naked access.
2025-02-21 18:57:13 +01:00
if (ticlient == extUnInit && TTMaskHasType(mask, t))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
PUSHTILE(tp, tilePlaneNum);
}
}
tres = (DBIsContact(t)) ? DBPlaneToResidue(t, tilePlaneNum) : t;
if ((capval = ExtCurStyle->exts_perimCap[residue][tres]) != (CapValue) 0)
reg->nreg_cap += capval * len;
if (TTMaskHasType(resMask, tres) && resistClass != -1)
extResistPerim[resistClass] += len;
}
/* Bottom */
bottomside:
if (IsSplit(tile) && (!(SplitSide(tile) ^ SplitDirection(tile))))
goto rightside;
for (tp = LB(tile); LEFT(tp) < RIGHT(tile); tp = TR(tp))
{
if (extNodeClipArea)
{
r.r_ybot = r.r_ytop = BOTTOM(tile);
r.r_xtop = MIN(RIGHT(tile), RIGHT(tp));
r.r_xbot = MAX(LEFT(tile), LEFT(tp));
GEOCLIP(&r, extNodeClipArea);
len = EDGENULL(&r) ? 0 : r.r_xtop - r.r_xbot;
}
else len = MIN(RIGHT(tile), RIGHT(tp)) - MAX(LEFT(tile), LEFT(tp));
TiGetClient() excessive use hotspots This is reducing nearby calls to TiGetClient() API when the value can be looked up one time and stored in a local variable to make other decisions about. This is due to TiGetClient() potentially having a slightly higher cost to call than previously, this is a kind of peephole optimization approach (if I can see multiple getters used within the window it got optmized). 'ticlient' was used for retrieval as ClientData so that future greps across the codebase for `ti_client` should only match naked access.
2025-02-21 18:57:13 +01:00
ClientData ticlient = TiGetClient(tp);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
if (IsSplit(tp))
{
t = SplitTopType(tp);
TiGetClient() excessive use hotspots This is reducing nearby calls to TiGetClient() API when the value can be looked up one time and stored in a local variable to make other decisions about. This is due to TiGetClient() potentially having a slightly higher cost to call than previously, this is a kind of peephole optimization approach (if I can see multiple getters used within the window it got optmized). 'ticlient' was used for retrieval as ClientData so that future greps across the codebase for `ti_client` should only match naked access.
2025-02-21 18:57:13 +01:00
if (ticlient == extUnInit && TTMaskHasType(mask, t))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
PUSHTILETOP(tp, tilePlaneNum);
}
TiGetClient() excessive use hotspots This is reducing nearby calls to TiGetClient() API when the value can be looked up one time and stored in a local variable to make other decisions about. This is due to TiGetClient() potentially having a slightly higher cost to call than previously, this is a kind of peephole optimization approach (if I can see multiple getters used within the window it got optmized). 'ticlient' was used for retrieval as ClientData so that future greps across the codebase for `ti_client` should only match naked access.
2025-02-21 18:57:13 +01:00
else if ((NodeRegion *)CD2PTR(ticlient) != reg && TTMaskHasType(mask, t))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
/* Count split tile twice, once for each node it belongs to. */
Ti[GS]etClient() usage enforcement All naked access to `ti_client` now uses the function-like-macro to encapsulate this action. This macro existed before this just makes all sites utilize it. Added additional INT and PTR variants to remove the programmer load on thinking about casing and casts polluting the point of use. So the use now looks cleaner. Equivalent prototypes: void TiSetClient(Tile*, ClientData) void TiSetClientINT(Tile*, intptr_t) /* pointertype */ void TiSetClientPTR(Tile*, void*) ClientData TiGetClient(Tile*) intptr_t TiGetClientINT(Tile*) /* pointertype */ void *TiGetClientPTR(Tile*)
2025-02-21 18:54:11 +01:00
TiSetClient(tp, extUnInit);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
PUSHTILETOP(tp, tilePlaneNum);
}
}
else
{
t = TiGetTypeExact(tp);
TiGetClient() excessive use hotspots This is reducing nearby calls to TiGetClient() API when the value can be looked up one time and stored in a local variable to make other decisions about. This is due to TiGetClient() potentially having a slightly higher cost to call than previously, this is a kind of peephole optimization approach (if I can see multiple getters used within the window it got optmized). 'ticlient' was used for retrieval as ClientData so that future greps across the codebase for `ti_client` should only match naked access.
2025-02-21 18:57:13 +01:00
if (ticlient == extUnInit && TTMaskHasType(mask, t))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
PUSHTILE(tp, tilePlaneNum);
}
}
tres = (DBIsContact(t)) ? DBPlaneToResidue(t, tilePlaneNum) : t;
if ((capval = ExtCurStyle->exts_perimCap[residue][tres]) != (CapValue) 0)
reg->nreg_cap += capval * len;
if (TTMaskHasType(resMask, tres) && resistClass != -1)
extResistPerim[resistClass] += len;
}
/* Right */
rightside:
if (IsSplit(tile) && !SplitSide(tile)) goto donesides;
for (tp = TR(tile); TOP(tp) > BOTTOM(tile); tp = LB(tp))
{
if (extNodeClipArea)
{
r.r_xbot = r.r_xtop = RIGHT(tile);
r.r_ytop = MIN(TOP(tile), TOP(tp));
r.r_ybot = MAX(BOTTOM(tile), BOTTOM(tp));
GEOCLIP(&r, extNodeClipArea);
len = EDGENULL(&r) ? 0 : r.r_ytop - r.r_ybot;
}
else len = MIN(TOP(tile), TOP(tp)) - MAX(BOTTOM(tile), BOTTOM(tp));
TiGetClient() excessive use hotspots This is reducing nearby calls to TiGetClient() API when the value can be looked up one time and stored in a local variable to make other decisions about. This is due to TiGetClient() potentially having a slightly higher cost to call than previously, this is a kind of peephole optimization approach (if I can see multiple getters used within the window it got optmized). 'ticlient' was used for retrieval as ClientData so that future greps across the codebase for `ti_client` should only match naked access.
2025-02-21 18:57:13 +01:00
ClientData ticlient = TiGetClient(tp);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
if (IsSplit(tp))
{
t = SplitLeftType(tp);
TiGetClient() excessive use hotspots This is reducing nearby calls to TiGetClient() API when the value can be looked up one time and stored in a local variable to make other decisions about. This is due to TiGetClient() potentially having a slightly higher cost to call than previously, this is a kind of peephole optimization approach (if I can see multiple getters used within the window it got optmized). 'ticlient' was used for retrieval as ClientData so that future greps across the codebase for `ti_client` should only match naked access.
2025-02-21 18:57:13 +01:00
if (ticlient == extUnInit && TTMaskHasType(mask, t))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
PUSHTILELEFT(tp, tilePlaneNum);
}
TiGetClient() excessive use hotspots This is reducing nearby calls to TiGetClient() API when the value can be looked up one time and stored in a local variable to make other decisions about. This is due to TiGetClient() potentially having a slightly higher cost to call than previously, this is a kind of peephole optimization approach (if I can see multiple getters used within the window it got optmized). 'ticlient' was used for retrieval as ClientData so that future greps across the codebase for `ti_client` should only match naked access.
2025-02-21 18:57:13 +01:00
else if ((NodeRegion *)CD2PTR(ticlient) != reg && TTMaskHasType(mask, t))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
/* Count split tile twice, once for each node it belongs to */
Ti[GS]etClient() usage enforcement All naked access to `ti_client` now uses the function-like-macro to encapsulate this action. This macro existed before this just makes all sites utilize it. Added additional INT and PTR variants to remove the programmer load on thinking about casing and casts polluting the point of use. So the use now looks cleaner. Equivalent prototypes: void TiSetClient(Tile*, ClientData) void TiSetClientINT(Tile*, intptr_t) /* pointertype */ void TiSetClientPTR(Tile*, void*) ClientData TiGetClient(Tile*) intptr_t TiGetClientINT(Tile*) /* pointertype */ void *TiGetClientPTR(Tile*)
2025-02-21 18:54:11 +01:00
TiSetClient(tp, extUnInit);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
PUSHTILELEFT(tp, tilePlaneNum);
}
}
else
{
t = TiGetTypeExact(tp);
TiGetClient() excessive use hotspots This is reducing nearby calls to TiGetClient() API when the value can be looked up one time and stored in a local variable to make other decisions about. This is due to TiGetClient() potentially having a slightly higher cost to call than previously, this is a kind of peephole optimization approach (if I can see multiple getters used within the window it got optmized). 'ticlient' was used for retrieval as ClientData so that future greps across the codebase for `ti_client` should only match naked access.
2025-02-21 18:57:13 +01:00
if (ticlient == extUnInit && TTMaskHasType(mask, t))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
PUSHTILE(tp, tilePlaneNum);
}
}
tres = (DBIsContact(t)) ? DBPlaneToResidue(t, tilePlaneNum) : t;
if ((capval = ExtCurStyle->exts_perimCap[residue][tres]) != (CapValue) 0)
reg->nreg_cap += capval * len;
if (TTMaskHasType(resMask, tres) && resistClass != -1)
extResistPerim[resistClass] += len;
}
donesides:
/* No capacitance */
if ((ExtOptions & EXT_DOCAPACITANCE) == 0)
reg->nreg_cap = (CapValue) 0;
/* If this is a contact, visit all the other planes */
if (DBIsContact(type))
{
pMask = DBConnPlanes[type];
pMask &= ~(PlaneNumToMaskBit(tilePlaneNum));
for (pNum = PL_TECHDEPBASE; pNum < DBNumPlanes; pNum++)
if (PlaneMaskHasPlane(pMask, pNum))
{
Plane *plane = arg->fra_def->cd_planes[pNum];
Plane[GS]etHint() added to encapsulate access to Plane->pl_hint This is ground work to intercept usage and validate changes in this area. Fixed conflicts with earler patch in extract/ExtNghbors.c
2025-02-21 19:15:02 +01:00
tp = PlaneGetHint(plane);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
GOTOPOINT(tp, &tile->ti_ll);
Plane[GS]etHint() added to encapsulate access to Plane->pl_hint This is ground work to intercept usage and validate changes in this area. Fixed conflicts with earler patch in extract/ExtNghbors.c
2025-02-21 19:15:02 +01:00
PlaneSetHint(plane, tp);
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
Ti[GS]etClient() usage enforcement All naked access to `ti_client` now uses the function-like-macro to encapsulate this action. This macro existed before this just makes all sites utilize it. Added additional INT and PTR variants to remove the programmer load on thinking about casing and casts polluting the point of use. So the use now looks cleaner. Equivalent prototypes: void TiSetClient(Tile*, ClientData) void TiSetClientINT(Tile*, intptr_t) /* pointertype */ void TiSetClientPTR(Tile*, void*) ClientData TiGetClient(Tile*) intptr_t TiGetClientINT(Tile*) /* pointertype */ void *TiGetClientPTR(Tile*)
2025-02-21 18:54:11 +01:00
if (TiGetClient(tp) != extUnInit) continue;
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/* tp and tile should have the same geometry for a contact */
if (IsSplit(tile) && IsSplit(tp))
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
{
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
if (SplitSide(tile))
{
t = SplitRightType(tp);
if (TTMaskHasType(mask, t))
{
PUSHTILERIGHT(tp, pNum);
}
}
else
{
t = SplitLeftType(tp);
if (TTMaskHasType(mask, t))
{
PUSHTILELEFT(tp, pNum);
}
}
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
}
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
else if (IsSplit(tp))
{
/* Need to test both sides of the tile */
t = SplitRightType(tp);
if (TTMaskHasType(mask, t))
{
PUSHTILERIGHT(tp, pNum);
}
t = SplitLeftType(tp);
if (TTMaskHasType(mask, t))
{
PUSHTILELEFT(tp, pNum);
}
}
else
{
t = TiGetTypeExact(tp);
if (TTMaskHasType(mask, t))
{
PUSHTILE(tp, pNum);
}
}
}
}
/*
* The hairiest case is when this type connects to stuff on
* other planes, but isn't itself connected as a contact.
* For example, a CMOS pwell connects to diffusion of the
* same doping (p substrate diff). In a case like this,
* we need to search the entire AREA of the tile plus a
* 1-lambda halo to find everything it overlaps or touches
* on the other plane.
*/
42 x warning: suggest parentheses around assignment used as truth value EFbuild.c:466:9: warning: suggest parentheses around assignment used as truth value EFbuild.c:662:20: warning: suggest parentheses around assignment used as truth value EFbuild.c:682:24: warning: suggest parentheses around assignment used as truth value EFbuild.c:690:24: warning: suggest parentheses around assignment used as truth value EFbuild.c:1760:12: warning: suggest parentheses around assignment used as truth value EFbuild.c:1973:9: warning: suggest parentheses around assignment used as truth value EFbuild.c:2062:12: warning: suggest parentheses around assignment used as truth value EFbuild.c:2063:13: warning: suggest parentheses around assignment used as truth value EFbuild.c:2091:12: warning: suggest parentheses around assignment used as truth value EFbuild.c:2134:12: warning: suggest parentheses around assignment used as truth value EFbuild.c:2135:13: warning: suggest parentheses around assignment used as truth value EFread.c:673:12: warning: suggest parentheses around assignment used as truth value ExtArray.c:693:12: warning: suggest parentheses around assignment used as truth value ExtArray.c:800:13: warning: suggest parentheses around assignment used as truth value ExtBasic.c:4569:9: warning: suggest parentheses around assignment used as truth value ExtBasic.c:4949:13: warning: suggest parentheses around assignment used as truth value ExtBasic.c:5032:12: warning: suggest parentheses around assignment used as truth value ExtCell.c:218:13: warning: suggest parentheses around assignment used as truth value ExtCouple.c:222:12: warning: suggest parentheses around assignment used as truth value ExtCouple.c:278:12: warning: suggest parentheses around assignment used as truth value ExtCouple.c:467:9: warning: suggest parentheses around assignment used as truth value ExtHard.c:379:12: warning: suggest parentheses around assignment used as truth value ExtHard.c:458:12: warning: suggest parentheses around assignment used as truth value ExtHier.c:740:16: warning: suggest parentheses around assignment used as truth value ExtHier.c:831:12: warning: suggest parentheses around assignment used as truth value ExtHier.c:841:13: warning: suggest parentheses around assignment used as truth value ExtHier.c:851:17: warning: suggest parentheses around assignment used as truth value ExtHier.c:865:34: warning: suggest parentheses around assignment used as truth value ExtLength.c:264:12: warning: suggest parentheses around assignment used as truth value ExtLength.c:276:12: warning: suggest parentheses around assignment used as truth value ExtLength.c:878:9: warning: suggest parentheses around assignment used as truth value ExtMain.c:499:12: warning: suggest parentheses around assignment used as truth value ExtMain.c:970:12: warning: suggest parentheses around assignment used as truth value ExtNghbors.c:298:13: warning: suggest parentheses around assignment used as truth value ExtSubtree.c:683:12: warning: suggest parentheses around assignment used as truth value ExtTest.c:457:21: warning: suggest parentheses around assignment used as truth value ExtTest.c:466:21: warning: suggest parentheses around assignment used as truth value ExtTimes.c:216:12: warning: suggest parentheses around assignment used as truth value ExtTimes.c:226:12: warning: suggest parentheses around assignment used as truth value ExtTimes.c:235:12: warning: suggest parentheses around assignment used as truth value ExtYank.c:236:34: warning: suggest parentheses around assignment used as truth value ExtYank.c:238:42: warning: suggest parentheses around assignment used as truth value GCC14 -Wall cleanup series [-Wparentheses]
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if ((pMask = DBAllConnPlanes[type]))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
Rect biggerArea;
bool is_split = IsSplit(tile);
extNbrUn = extUnInit;
TITORECT(tile, &pla.area);
GEO_EXPAND(&pla.area, 1, &biggerArea);
for (pNum = PL_TECHDEPBASE; pNum < DBNumPlanes; pNum++)
if ((pNum != tilePlaneNum) && PlaneMaskHasPlane(pMask, pNum))
{
pla.plane = pNum;
if (is_split)
DBSrPaintNMArea((Tile *) NULL,
arg->fra_def->cd_planes[pNum],
TiGetTypeExact(tile) &
(TT_DIAGONAL | TT_SIDE | TT_DIRECTION),
&biggerArea, mask, extNbrPushFunc,
(ClientData) &pla);
else
DBSrPaintArea((Tile *) NULL,
arg->fra_def->cd_planes[pNum], &biggerArea,
mask, extNbrPushFunc, (ClientData) &pla);
}
}
}
return (0);
}
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*
* ----------------------------------------------------------------------------
*
* extGetCapValue --
* extSetCapValue --
*
* Procedures to get/set a value from our capacitance tables.
*
* ----------------------------------------------------------------------------
*/
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
void
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
extSetCapValue(he, value)
HashEntry *he;
CapValue value;
{
if (HashGetValue(he) == NULL)
HashSetValue(he, (CapValue *) mallocMagic(sizeof(CapValue)));
*( (CapValue *) HashGetValue(he)) = value;
}
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
CapValue
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
extGetCapValue(he)
HashEntry *he;
{
if (HashGetValue(he) == NULL)
extSetCapValue(he, (CapValue) 0);
return *( (CapValue *) HashGetValue(he));
}
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
/*
* ----------------------------------------------------------------------------
*
* extCapHashKill --
*
* Kill off a coupling capacitance hash table.
*
* Results:
* None.
*
* Side effects:
* Frees up storage in the table.
* ----------------------------------------------------------------------------
*/
void
extCapHashKill(ht)
HashTable *ht;
{
HashSearch hs;
HashEntry *he;
HashStartSearch(&hs);
42 x warning: suggest parentheses around assignment used as truth value EFbuild.c:466:9: warning: suggest parentheses around assignment used as truth value EFbuild.c:662:20: warning: suggest parentheses around assignment used as truth value EFbuild.c:682:24: warning: suggest parentheses around assignment used as truth value EFbuild.c:690:24: warning: suggest parentheses around assignment used as truth value EFbuild.c:1760:12: warning: suggest parentheses around assignment used as truth value EFbuild.c:1973:9: warning: suggest parentheses around assignment used as truth value EFbuild.c:2062:12: warning: suggest parentheses around assignment used as truth value EFbuild.c:2063:13: warning: suggest parentheses around assignment used as truth value EFbuild.c:2091:12: warning: suggest parentheses around assignment used as truth value EFbuild.c:2134:12: warning: suggest parentheses around assignment used as truth value EFbuild.c:2135:13: warning: suggest parentheses around assignment used as truth value EFread.c:673:12: warning: suggest parentheses around assignment used as truth value ExtArray.c:693:12: warning: suggest parentheses around assignment used as truth value ExtArray.c:800:13: warning: suggest parentheses around assignment used as truth value ExtBasic.c:4569:9: warning: suggest parentheses around assignment used as truth value ExtBasic.c:4949:13: warning: suggest parentheses around assignment used as truth value ExtBasic.c:5032:12: warning: suggest parentheses around assignment used as truth value ExtCell.c:218:13: warning: suggest parentheses around assignment used as truth value ExtCouple.c:222:12: warning: suggest parentheses around assignment used as truth value ExtCouple.c:278:12: warning: suggest parentheses around assignment used as truth value ExtCouple.c:467:9: warning: suggest parentheses around assignment used as truth value ExtHard.c:379:12: warning: suggest parentheses around assignment used as truth value ExtHard.c:458:12: warning: suggest parentheses around assignment used as truth value ExtHier.c:740:16: warning: suggest parentheses around assignment used as truth value ExtHier.c:831:12: warning: suggest parentheses around assignment used as truth value ExtHier.c:841:13: warning: suggest parentheses around assignment used as truth value ExtHier.c:851:17: warning: suggest parentheses around assignment used as truth value ExtHier.c:865:34: warning: suggest parentheses around assignment used as truth value ExtLength.c:264:12: warning: suggest parentheses around assignment used as truth value ExtLength.c:276:12: warning: suggest parentheses around assignment used as truth value ExtLength.c:878:9: warning: suggest parentheses around assignment used as truth value ExtMain.c:499:12: warning: suggest parentheses around assignment used as truth value ExtMain.c:970:12: warning: suggest parentheses around assignment used as truth value ExtNghbors.c:298:13: warning: suggest parentheses around assignment used as truth value ExtSubtree.c:683:12: warning: suggest parentheses around assignment used as truth value ExtTest.c:457:21: warning: suggest parentheses around assignment used as truth value ExtTest.c:466:21: warning: suggest parentheses around assignment used as truth value ExtTimes.c:216:12: warning: suggest parentheses around assignment used as truth value ExtTimes.c:226:12: warning: suggest parentheses around assignment used as truth value ExtTimes.c:235:12: warning: suggest parentheses around assignment used as truth value ExtYank.c:236:34: warning: suggest parentheses around assignment used as truth value ExtYank.c:238:42: warning: suggest parentheses around assignment used as truth value GCC14 -Wall cleanup series [-Wparentheses]
2024-10-04 18:20:25 +02:00
while ((he = HashNext(ht, &hs)))
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
Updates from running the fix-ending-whitespace script.
2020-05-23 23:13:14 +02:00
if (HashGetValue(he) != NULL)
Initial commit at Tue Apr 25 08:41:48 EDT 2017 by tim on stravinsky
2017-04-25 14:41:48 +02:00
{
freeMagic(HashGetValue(he)); /* Free a malloc'ed CapValue */
HashSetValue(he, (ClientData) NULL);
}
}
HashKill(ht);
}