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One more correction to limit, by default, the generation of "equiv" 

statements in the .ext file output to those that mark a port as
equivalent to the node name used elsewhere in the file.  This
limits unnecessary output of "equiv" statements that can bog down
ext2spice and other commands that use the .ext file contents.
This commit is contained in:
Tim Edwards 2021-10-07 21:36:10 -04:00
parent 6b1365708d
commit 4fae7a1a2b
3 changed files with 22 additions and 6 deletions
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3
commands/CmdE.c
View File

@ -881,6 +881,7 @@ cmdExpandFunc(use, windowMask)
#define DOLOCAL 5
#define DORESISTANCE 6
#define DOLABELCHECK 7
#define DOALIASES 8
#define LENCLEAR 0
#define LENDRIVER 1
@ -1148,6 +1149,7 @@ CmdExtract(w, cmd)
TxPrintf("%s local\n", OPTSET(EXT_DOLOCAL));
TxPrintf("%s resistance\n", OPTSET(EXT_DORESISTANCE));
TxPrintf("%s label check\n", OPTSET(EXT_DOLABELCHECK));
TxPrintf("%s aliases\n", OPTSET(EXT_DOALIASES));
return;
#undef OPTSET
}
@ -1177,6 +1179,7 @@ CmdExtract(w, cmd)
case DOLOCAL: option = EXT_DOLOCAL; break;
case DORESISTANCE: option = EXT_DORESISTANCE; break;
case DOLABELCHECK: option = EXT_DOLABELCHECK; break;
case DOALIASES: option = EXT_DOALIASES; break;
}
if (no) ExtOptions &= ~option;
else ExtOptions |= option;

24
extract/ExtBasic.c
View File

@ -733,19 +733,31 @@ extOutputNodes(nodeList, outFile)
for (ll = reg->nreg_labels; ll; ll = ll->ll_next)
{
bool isPort = (ll->ll_attr == LL_PORTATTR) ? TRUE : FALSE;
bool isPort;
/* Do not export aliases that are not ports unless the */
/* "extract do aliases" options was selected. */
if (!(ExtOptions & EXT_DOALIASES) && (!isPort)) continue;
if (ll->ll_label->lab_text == text)
{
isPort = (ll->ll_attr == LL_PORTATTR) ? TRUE : FALSE;
for (ll = ll->ll_next; ll; ll = ll->ll_next)
if (extLabType(ll->ll_label->lab_text, LABTYPE_NAME))
if (strcmp(text, ll->ll_label->lab_text))
{
fprintf(outFile, "equiv \"%s\" \"%s\"\n",
if ((ll->ll_attr == LL_PORTATTR) ||
(ExtOptions & EXT_DOALIASES))
{
fprintf(outFile, "equiv \"%s\" \"%s\"\n",
text, ll->ll_label->lab_text);
if (isPort && (ll->ll_attr == LL_PORTATTR))
TxError("Warning: Ports \"%s\" and \"%s\" are"
" electrically shorted.\n",
text, ll->ll_label->lab_text);
if (isPort && (ll->ll_attr == LL_PORTATTR))
TxError("Warning: Ports \"%s\" and \"%s\" are"
" electrically shorted.\n",
text, ll->ll_label->lab_text);
}
}
break;
}

1
extract/extract.h
View File

@ -70,6 +70,7 @@ extern char *extDevTable[];
#define EXT_DOALL 0x01f /* ALL OF THE ABOVE */
#define EXT_DOLOCAL 0x020 /* Write to local directory only */
#define EXT_DOLABELCHECK 0x040 /* Check for connections by label */
#define EXT_DOALIASES 0x080 /* Output all node aliases */
extern int ExtOptions; /* Bitmask of above */