Detect and ignore specify edge expressions

to handle more general combinations of heirarch and bit selects.

.cvsignore

@@ -17,6 +17,7 @@ configure
 Makefile
 check
 check.cc
+check.vvp
 config.status
 config.log
 config.cache

BUGS.txt

@@ -104,7 +104,7 @@ module may not be needed as long as the ``-s <name>'' switch is
 given.
 
 So when you send a test case, ask yourself "Can poor overworked Steve
-invoke the error without any Verilog other then what is included?" And
+invoke the error without any Verilog other than what is included?" And
 while we are at it, please place a copyright notice in your test
 program and include a GPL license statement if you can. Your test
 program may find its way into the test suite, and the notices will
@@ -160,8 +160,11 @@ I must insist that any copyright material submitted for inclusion
 include the GPL license notice as shown in the rest of the source.
 
 
-$Id: BUGS.txt,v 1.4 2003/02/19 04:36:31 steve Exp $
+$Id: BUGS.txt,v 1.5 2007/03/22 16:08:14 steve Exp $
 $Log: BUGS.txt,v $
+Revision 1.5  2007/03/22 16:08:14  steve
+ Spelling fixes from Larry
+
 Revision 1.4  2003/02/19 04:36:31  steve
  Notes on hte bug database.
 

HName.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: HName.cc,v 1.5 2002/11/02 03:27:52 steve Exp $"
+#ident "$Id: HName.cc,v 1.8 2007/06/02 03:42:12 steve Exp $"
 #endif
 
 # include  "config.h"
@@ -29,235 +29,107 @@
 # include  <malloc.h>
 #endif
 
+
 hname_t::hname_t()
 {
-      item_ = 0;
-      count_ = 0;
+      number_ = INT_MIN;
 }
 
-hname_t::hname_t(const char*text)
+hname_t::hname_t(perm_string text)
 {
-      item_ = strdup(text);
-      count_ = 1;
+      name_ = text;
+      number_ = INT_MIN;
+}
+
+hname_t::hname_t(perm_string text, int num)
+{
+      name_ = text;
+      number_ = num;
 }
 
 hname_t::hname_t(const hname_t&that)
 {
-      count_ = that.count_;
-      switch (count_) {
-	  case 0:
-	    item_ = 0;
-	    break;
-	  case 1:
-	    item_ = strdup(that.item_);
-	    break;
-	  default:
-	    array_ = new char*[count_];
-	    for (unsigned idx = 0 ;  idx < count_ ;  idx += 1)
-		  array_[idx] = strdup(that.array_[idx]);
-	    break;
-      }
+      name_ = that.name_;
+      number_ = that.number_;
+}
+
+hname_t& hname_t::operator = (const hname_t&that)
+{
+      name_ = that.name_;
+      number_ = that.number_;
+      return *this;
 }
 
 hname_t::~hname_t()
 {
-      switch (count_) {
-	  case 0:
-	    break;
-	  case 1:
-	    free(item_);
-	    break;
-	  default:
-	    for (unsigned idx = 0 ;  idx < count_ ;  idx += 1)
-		  free(array_[idx]);
-	    delete[]array_;
-	    break;
-      }
 }
 
-unsigned hname_t::component_count() const
+perm_string hname_t::peek_name(void) const
 {
-      return count_;
+      return name_;
 }
 
-void hname_t::append(const char*text)
+bool hname_t::has_number() const
 {
-      char**tmp;
-
-      switch (count_) {
-	  case 0:
-	    count_ = 1;
-	    item_ = strdup(text);
-	    break;
-	  case 1:
-	    count_ = 2;
-	    tmp = new char*[2];
-	    tmp[0] = item_;
-	    tmp[1] = strdup(text);
-	    array_ = tmp;
-	    break;
-	  default:
-	    tmp = new char*[count_+1];
-	    for (unsigned idx = 0 ;  idx < count_ ;  idx += 1)
-		  tmp[idx] = array_[idx];
-	    delete[]array_;
-	    array_ = tmp;
-	    array_[count_] = strdup(text);
-	    count_ += 1;
-      }
+      return number_ != INT_MIN;
 }
 
-void hname_t::prepend(const char*text)
+int hname_t::peek_number() const
 {
-      char**tmp;
-
-      switch (count_) {
-	  case 0:
-	    count_ = 1;
-	    item_ = strdup(text);
-	    break;
-	  case 1:
-	    count_ = 2;
-	    tmp = new char*[2];
-	    tmp[0] = strdup(text);
-	    tmp[1] = item_;
-	    array_ = tmp;
-	    break;
-	  default:
-	    tmp = new char*[count_+1];
-	    tmp[0] = strdup(text);
-	    for (unsigned idx = 0 ;  idx < count_ ;  idx += 1)
-		  tmp[idx+1] = array_[idx];
-	    delete[]array_;
-	    array_ = tmp;
-	    count_ += 1;
-      }
-}
-
-char* hname_t::remove_tail_name()
-{
-      if (count_ == 0)
-	    return 0;
-
-      if (count_ == 1) {
-	    char*tmp = item_;
-	    count_ = 0;
-	    item_ = 0;
-	    return tmp;
-      }
-
-      if (count_ == 2) {
-	    char*tmp1 = array_[0];
-	    char*tmp2 = array_[1];
-	    delete[]array_;
-	    count_ = 1;
-	    item_ = tmp1;
-	    return tmp2;
-      }
-
-      char*tmpo = array_[count_-1];
-      char**tmpa = new char*[count_-1];
-      for (unsigned idx = 0 ;  idx < count_-1 ;  idx += 1)
-	    tmpa[idx] = array_[idx];
-
-      delete[]array_;
-      array_ = tmpa;
-      count_ -= 1;
-      return tmpo;
-}
-
-const char* hname_t::peek_name(unsigned idx) const
-{
-      if (idx >= count_)
-	    return 0;
-
-      if (count_ == 1)
-	    return item_;
-
-      return array_[idx];
-}
-
-const char* hname_t::peek_tail_name() const
-{
-      switch (count_) {
-	  case 0:
-	    return 0;
-	  case 1:
-	    return item_;
-	  default:
-	    return array_[count_-1];
-      }
+      return number_;
 }
 
 bool operator < (const hname_t&l, const hname_t&r)
 {
-      unsigned idx = 0;
-      const char*lc = l.peek_name(idx);
-      const char*rc = r.peek_name(idx);
-
-      while (lc && rc) {
-	    int cmp = strcmp(lc, rc);
-	    if (cmp < 0)
-		  return true;
-	    if (cmp > 0)
-		  return false;
-	    idx += 1;
-	    lc = l.peek_name(idx);
-	    rc = r.peek_name(idx);
-      }
-
-      if (lc && !rc)
+      int cmp = strcmp(l.peek_name(), r.peek_name());
+      if (cmp < 0) return true;
+      if (cmp > 0) return false;
+      if (l.has_number() && r.has_number())
+	    return l.peek_number() < r.peek_number();
+      else
 	    return false;
-      if (rc && !lc)
-	    return true;
-
-	// Must be ==
-      return false;
 }
 
 bool operator == (const hname_t&l, const hname_t&r)
 {
-      unsigned idx = 0;
-      const char*lc = l.peek_name(idx);
-      const char*rc = r.peek_name(idx);
-
-      while (lc && rc) {
-	    int cmp = strcmp(lc, rc);
-	    if (cmp != 0)
-		  return false;
-	    idx += 1;
-	    lc = l.peek_name(idx);
-	    rc = r.peek_name(idx);
+      if (l.peek_name() == r.peek_name()) {
+	    if (l.has_number() && r.has_number())
+		  return l.peek_number() == r.peek_number();
+	    else
+		  return true;
       }
 
-      if (lc || rc)
-	    return false;
-
-	// Must be ==
-      return true;
+      return false;
 }
 
+bool operator != (const hname_t&l, const hname_t&r)
+{ return ! (l==r); }
+
 ostream& operator<< (ostream&out, const hname_t&that)
 {
-      switch (that.count_) {
-	  case 0:
+      if (that.peek_name() == 0) {
 	    out << "";
 	    return out;
-	  case 1:
-	    out << that.item_;
-	    return out;
-
-	  default:
-	    out << that.array_[0];
-	    for (unsigned idx = 1 ;  idx < that.count_ ;  idx += 1)
-		  out << "." << that.array_[idx];
-
-	    return out;
       }
+
+      out << that.peek_name();
+      if (that.has_number())
+	    out << "[" << that.peek_number() << "]";
+
+      return out;
 }
 
 /*
  * $Log: HName.cc,v $
+ * Revision 1.8  2007/06/02 03:42:12  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.7  2007/05/16 19:12:33  steve
+ *  Fix hname_t use of space for 1 perm_string.
+ *
+ * Revision 1.6  2007/04/26 03:06:21  steve
+ *  Rework hname_t to use perm_strings.
+ *
  * Revision 1.5  2002/11/02 03:27:52  steve
  *  Allow named events to be referenced by
  *  hierarchical names.

HName.h

@@ -1,7 +1,7 @@
 #ifndef __HName_H
 #define __HName_H
 /*
- * Copyright (c) 2001 Stephen Williams ([email protected])
+ * Copyright (c) 2001-2007 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -19,10 +19,11 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: HName.h,v 1.4 2002/11/02 03:27:51 steve Exp $"
+#ident "$Id: HName.h,v 1.7 2007/06/02 03:42:12 steve Exp $"
 #endif
 
 # include  <iostream>
+# include  "StringHeap.h"
 #ifdef __GNUC__
 #if __GNUC__ > 2
 using namespace std;
@@ -30,59 +31,56 @@ using namespace std;
 #endif
 
 /*
- * This class represents a Verilog hierarchical name. A hierarchical
- * name is an ordered list of simple names.
+ * This class represents a component of a Verilog hierarchical name. A
+ * hierarchical component contains a name string (prepresented here
+ * with a perm_string) and an optional signed number. This signed
+ * number is used if the scope is part of an array, for example an
+ * array of module instances or a loop generated scope.
  */
 
 class hname_t {
 
     public:
       hname_t ();
-      explicit hname_t (const char*text);
+      explicit hname_t (perm_string text);
+      explicit hname_t (perm_string text, int num);
       hname_t (const hname_t&that);
       ~hname_t();
 
-	// This method adds a name to the end of the hierarchical
-	// path. This becomes a new base name.
-      void append(const char*text);
+      hname_t& operator= (const hname_t&);
 
-	// This method adds a name to the *front* of the hierarchical
-	// path. The base name remains the same, unless this is the
-	// only component.
-      void prepend(const char*text);
+	// Return the string part of the hname_t.
+      perm_string peek_name(void) const;
 
-	// This method removes the tail name from the hierarchy, and
-	// returns a pointer to that tail name. That tail name now
-	// must be removed by the caller.
-      char* remove_tail_name();
-
-	// Return the given component in the hierarchical name. If the
-	// idx is too large, return 0.
-      const char*peek_name(unsigned idx) const;
-      const char*peek_tail_name() const;
-
-	// Return the number of components in the hierarchical
-	// name. If this is a simple name, this will return 1.
-      unsigned component_count() const;
-
-      friend ostream& operator<< (ostream&, const hname_t&);
+      bool has_number() const;
+      int peek_number() const;
 
     private:
-      union {
-	    char**array_;
-	    char* item_;
-      };
-      unsigned count_;
+      perm_string name_;
+	// If the number is anything other then INT_MIN, then this is
+	// the numeric part of the name. Otherwise, it is not part of
+	// the name at all.
+      int number_;
 
     private: // not implemented
-      hname_t& operator= (const hname_t&);
 };
 
 extern bool operator <  (const hname_t&, const hname_t&);
 extern bool operator == (const hname_t&, const hname_t&);
+extern bool operator != (const hname_t&, const hname_t&);
+extern ostream& operator<< (ostream&, const hname_t&);
 
 /*
  * $Log: HName.h,v $
+ * Revision 1.7  2007/06/02 03:42:12  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.6  2007/05/16 19:12:33  steve
+ *  Fix hname_t use of space for 1 perm_string.
+ *
+ * Revision 1.5  2007/04/26 03:06:21  steve
+ *  Rework hname_t to use perm_strings.
+ *
  * Revision 1.4  2002/11/02 03:27:51  steve
  *  Allow named events to be referenced by
  *  hierarchical names.

Makefile.in

@@ -16,7 +16,7 @@
 #    59 Temple Place - Suite 330
 #    Boston, MA 02111-1307, USA
 #
-#ident "$Id: Makefile.in,v 1.173 2005/08/06 17:58:16 steve Exp $"
+#ident "$Id: Makefile.in,v 1.181 2007/05/24 04:07:11 steve Exp $"
 #
 #
 SHELL = /bin/sh
@@ -43,7 +43,6 @@ mandir = @mandir@
 libdir64 = @libdir64@
 
 dllib=@DLLIB@
-strip_dynamic=@strip_dynamic@
 
 CC = @CC@
 CXX = @CXX@
@@ -51,7 +50,6 @@ INSTALL = @INSTALL@
 INSTALL_SCRIPT = @INSTALL_SCRIPT@
 INSTALL_PROGRAM = @INSTALL_PROGRAM@
 INSTALL_DATA = @INSTALL_DATA@
-STRIP = @STRIP@
 LEX = @LEX@
 YACC = @YACC@
 
@@ -60,21 +58,15 @@ CXXFLAGS = -Wall @CXXFLAGS@
 PICFLAGS = @PICFLAG@
 LDFLAGS = @rdynamic@ @LDFLAGS@
 
-# The TARGETS variable lists the target modules that can be build and
-# installed. Some of them depend on external things, so are only
-# compiled if the prerequisites are installed.
-TARGETS = tgt-null
-
 all: dep ivl@EXEEXT@
 	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
-	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
-	for dir in ivlpp tgt-verilog tgt-stub; \
+	for dir in ivlpp ; \
 	    do (cd $$dir ; $(MAKE) $@); done
 	cd driver ; $(MAKE) VERSION=$(VERSION) $@
 
 # In the windows world, the installer will need a dosify program to
 # dosify text files.
-ifeq (@WIN32@,yes)
+ifeq (@MING32@,yes)
 all: dep dosify.exe
 dosify.exe: dosify.c
 	$(CC) -o dosify.exe dosify.c
@@ -90,19 +82,20 @@ check: all
 
 clean:
 	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
-	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
-	for dir in vpi ivlpp tgt-verilog tgt-stub driver; \
+	for dir in vpi ivlpp tgt-verilog tgt-pal driver driver-vpi; \
 	    do (cd $$dir ; $(MAKE) $@); done
 	rm -f *.o parse.cc parse.cc.output parse.h lexor.cc
+	rm -f ivl.exp iverilog-vpi.pdf iverilog-vpi.ps parse.output
+	rm -f syn-rules.output dosify.exe ivl@EXEEXT@ check.vvp
 	rm -f lexor_keyword.cc libivl.a libvpi.a iverilog-vpi syn-rules.cc*
-	rm -rf dep ivl@EXEEXT@
+	rm -rf dep
 
 distclean: clean
 	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
-	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
-	for dir in vpi ivlpp tgt-verilog tgt-stub driver; \
+	for dir in vpi ivlpp tgt-verilog tgt-pal driver driver-vpi; \
 	    do (cd $$dir ; $(MAKE) $@); done
 	rm -f Makefile config.status config.log config.cache config.h
+	rm -f _pli_types.h
 
 TT = t-dll.o t-dll-api.o t-dll-expr.o t-dll-proc.o
 FF = cprop.o nodangle.o synth.o synth2.o syn-rules.o
@@ -115,11 +108,11 @@ load_module.o netlist.o netmisc.o net_assign.o \
 net_design.o net_event.o net_expr.o net_force.o net_func.o \
 net_link.o net_modulo.o net_nex_input.o net_nex_output.o \
 net_proc.o net_scope.o net_udp.o pad_to_width.o \
-parse.o parse_misc.o pform.o pform_dump.o \
+parse.o parse_misc.o pform.o pform_dump.o pform_types.o \
 set_width.o symbol_search.o sync.o sys_funcs.o \
 verinum.o verireal.o target.o targets.o \
 Attrib.o HName.o LineInfo.o Module.o PDelays.o PEvent.o \
-PExpr.o PGate.o \
+PExpr.o PGate.o PGenerate.o PSpec.o \
 PTask.o PUdp.o PFunction.o PWire.o Statement.o StringHeap.o \
 $(FF) $(TT)
 
@@ -136,11 +129,10 @@ ivl@EXEEXT@: $O ivl.def
 	$(CXX) -o ivl@EXEEXT@ $O $(dllib) @EXTRALIBS@
 	dlltool --dllname ivl@EXEEXT@ --def ivl.def \
 		--output-lib libivl.a --output-exp ivl.exp
-	$(CXX) -o ivl@EXEEXT@ ivl.exp $O $(dllib) @EXTRALIBS@
+	$(CXX) $(LDFLAGS) -o ivl@EXEEXT@ ivl.exp $O $(dllib) @EXTRALIBS@
 else
 ivl@EXEEXT@: $O
 	$(CXX) $(LDFLAGS) -o ivl@EXEEXT@ $O $(dllib)
-
 endif
 
 ifeq (@MINGW32@,yes)
@@ -150,6 +142,9 @@ all: dep iverilog-vpi
 
 iverilog-vpi: iverilog-vpi.sh
 	sed -e 's;@SHARED@;@shared@;' -e 's;@PIC@;@PICFLAG@;' \
+	    -e 's;@IVCC@;$(CC);' \
+	    -e 's;@IVCXX@;$(CXX);' \
+	    -e 's;@IVCFLAGS@;$(CXXFLAGS);' \
 	    -e 's;@INCLUDEDIR@;@includedir@;' \
 	    -e 's;@LIBDIR64@;@libdir64@;' \
 	    -e 's;@VPIDIR1@;@vpidir1@;' -e 's;@VPIDIR2@;@vpidir2@;' \
@@ -169,10 +164,8 @@ lexor.o: lexor.cc parse.h
 
 parse.o: parse.cc
 
-parse.cc: $(srcdir)/parse.y
+parse.cc parse.h: $(srcdir)/parse.y
 	$(YACC) --verbose -t -p VL -d -o parse.cc $(srcdir)/parse.y
-
-parse.h: parse.cc
 	mv parse.cc.h parse.h 2>/dev/null || mv parse.hh parse.h
 
 syn-rules.cc: $(srcdir)/syn-rules.y
@@ -192,7 +185,7 @@ iverilog-vpi.ps: $(srcdir)/iverilog-vpi.man
 iverilog-vpi.pdf: iverilog-vpi.ps
 	ps2pdf iverilog-vpi.ps iverilog-vpi.pdf
 
-ifeq (@WIN32@,yes)
+ifeq (@MING32@,yes)
 INSTALL_DOC = $(prefix)/iverilog-vpi.pdf $(mandir)/man1/iverilog-vpi.1
 INSTALL_DOCDIR = $(mandir)/man1
 all: dep iverilog-vpi.pdf
@@ -209,9 +202,8 @@ endif
 
 XNF_INSTALL = $(libdir)/ivl/xnf.conf $(libdir)/ivl/xnf-s.conf
 
-install: all installdirs $(libdir)/ivl/ivl@EXEEXT@  $(includedir)/ivl_target.h $(includedir)/_pli_types.h $(includedir)/vpi_user.h $(includedir)/acc_user.h $(includedir)/veriuser.h $(WIN32_INSTALL) $(INSTALL_DOC) $(XNF_INSTALL)
+install: all installdirs $(libdir)/ivl/ivl@EXEEXT@  $(includedir)/ivl_target.h $(includedir)/_pli_types.h $(includedir)/vpi_user.h $(includedir)/acc_user.h $(includedir)/veriuser.h $(WIN32_INSTALL) $(INSTALL_DOC)
 	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
-	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
 	for dir in vpi ivlpp driver; \
 	    do (cd $$dir ; $(MAKE) $@); done
 
@@ -220,7 +212,6 @@ $(bindir)/iverilog-vpi: ./iverilog-vpi
 
 $(libdir)/ivl/ivl@EXEEXT@: ./ivl@EXEEXT@
 	$(INSTALL_PROGRAM) ./ivl@EXEEXT@ $(libdir)/ivl/ivl@EXEEXT@
-	$(STRIP) $(strip_dynamic) $(libdir)/ivl/ivl@EXEEXT@
 
 $(libdir)/ivl/xnf-s.conf: $(srcdir)/xnf-s.conf
 	$(INSTALL_DATA) $(srcdir)/xnf-s.conf $(libdir)/ivl/xnf-s.conf
@@ -275,17 +266,16 @@ installdirs: mkinstalldirs
 
 uninstall:
 	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
-	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
 	for dir in vpi ivlpp driver; \
 	    do (cd $$dir ; $(MAKE) $@); done
-	for f in xnf.conf xnf-s.conf ivl; \
+	for f in xnf.conf xnf-s.conf ivl@EXEEXT@; \
 	    do rm -f $(libdir)/ivl/$$f; done
 	-rmdir $(libdir)/ivl
 	for f in verilog iverilog-vpi gverilog@EXEEXT@; \
 	    do rm -f $(bindir)/$$f; done
 	for f in ivl_target.h vpi_user.h _pli_types.h acc_user.h veriuser.h; \
 	    do rm -f $(includedir)/$$f; done
-	rm -f $(mandir)/man1/iverilog-vpi.1
+	rm -f $(mandir)/man1/iverilog-vpi.1 $(prefix)/iverilog-vpi.pdf
 
 
 -include $(patsubst %.o, dep/%.d, $O)

Module.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: Module.cc,v 1.25 2004/10/04 01:10:51 steve Exp $"
+#ident "$Id: Module.cc,v 1.27 2007/05/24 04:07:11 steve Exp $"
 #endif
 
 # include "config.h"
@@ -31,6 +31,7 @@
 Module::Module(perm_string n)
 : name_(n)
 {
+      library_flag = false;
       default_nettype = NetNet::NONE;
 }
 
@@ -110,9 +111,9 @@ unsigned Module::find_port(const char*name) const
 }
 
 
-PWire* Module::get_wire(const hname_t&name) const
+PWire* Module::get_wire(const pform_name_t&name) const
 {
-      map<hname_t,PWire*>::const_iterator obj = wires_.find(name);
+      map<pform_name_t,PWire*>::const_iterator obj = wires_.find(name);
       if (obj == wires_.end())
 	    return 0;
       else
@@ -132,11 +133,6 @@ PGate* Module::get_gate(perm_string name)
       return 0;
 }
 
-const map<hname_t,PWire*>& Module::get_wires() const
-{
-      return wires_;
-}
-
 const list<PGate*>& Module::get_gates() const
 {
       return gates_;
@@ -150,6 +146,13 @@ const list<PProcess*>& Module::get_behaviors() const
 
 /*
  * $Log: Module.cc,v $
+ * Revision 1.27  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.26  2007/04/19 02:52:53  steve
+ *  Add support for -v flag in command file.
+ *
  * Revision 1.25  2004/10/04 01:10:51  steve
  *  Clean up spurious trailing white space.
  *

Module.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: Module.h,v 1.38 2005/07/11 16:56:50 steve Exp $"
+#ident "$Id: Module.h,v 1.43 2007/05/24 04:07:11 steve Exp $"
 #endif
 
 # include  <list>
@@ -30,10 +30,13 @@
 # include  "named.h"
 # include  "LineInfo.h"
 # include  "netlist.h"
+# include  "pform_types.h"
 class PEvent;
 class PExpr;
 class PEIdent;
 class PGate;
+class PGenerate;
+class PSpecPath;
 class PTask;
 class PFunction;
 class PWire;
@@ -66,6 +69,12 @@ class Module : public LineInfo {
       explicit Module(perm_string name);
       ~Module();
 
+	/* Initially false. This is set to true if the module has been
+	   declared as a library module. This makes the module
+	   ineligible for being chosen as an implicit root. It has no
+	   other effect. */
+      bool library_flag;
+
       NetNet::Type default_nettype;
 
 	/* The module has parameters that are evaluated when the
@@ -90,7 +99,7 @@ class Module : public LineInfo {
 	   new parameters within the module, but may be used to set
 	   values within this module (when instantiated) or in other
 	   instantiated modules. */
-      map<hname_t,PExpr*>defparms;
+      map<pform_name_t,PExpr*>defparms;
 
         /* Parameters may be overridden at instantiation time;
            the overrides do not contain explicit parameter names,
@@ -113,6 +122,16 @@ class Module : public LineInfo {
 	   set by the `timescale directive. */
       int time_unit, time_precision;
 
+	/* The module has a list of genvars that may be used in
+	   various generate schemes. */
+      list<perm_string> genvars;
+
+	/* the module has a list of generate schemes that appear in
+	   the module definition. These are used at elaboration time. */
+      list<PGenerate*> generate_schemes;
+
+      list<PSpecPath*> specify_paths;
+
       perm_string mod_name() const { return name_; }
 
       void add_gate(PGate*gate);
@@ -132,24 +151,24 @@ class Module : public LineInfo {
 
 	// Find a wire by name. This is used for connecting gates to
 	// existing wires, etc.
-      PWire* get_wire(const hname_t&name) const;
+      PWire* get_wire(const pform_name_t&name) const;
       PGate* get_gate(perm_string name);
 
-      const map<hname_t,PWire*>& get_wires() const;
       const list<PGate*>& get_gates() const;
       const list<PProcess*>& get_behaviors() const;
 
       void dump(ostream&out) const;
       bool elaborate(Design*, NetScope*scope) const;
 
-      bool elaborate_scope(Design*, NetScope*scope) const;
+      typedef map<perm_string,NetExpr*> replace_t;
+      bool elaborate_scope(Design*, NetScope*scope, const replace_t&rep) const;
 
       bool elaborate_sig(Design*, NetScope*scope) const;
 
     private:
       perm_string name_;
 
-      map<hname_t,PWire*> wires_;
+      map<pform_name_t,PWire*> wires_;
       list<PGate*> gates_;
       list<PProcess*> behaviors_;
       map<perm_string,PTask*> tasks_;
@@ -163,48 +182,23 @@ class Module : public LineInfo {
 
 /*
  * $Log: Module.h,v $
+ * Revision 1.43  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.42  2007/04/19 02:52:53  steve
+ *  Add support for -v flag in command file.
+ *
+ * Revision 1.41  2006/09/23 04:57:19  steve
+ *  Basic support for specify timing.
+ *
+ * Revision 1.40  2006/04/10 00:37:42  steve
+ *  Add support for generate loops w/ wires and gates.
+ *
+ * Revision 1.39  2006/03/30 01:49:07  steve
+ *  Fix instance arrays indexed by overridden parameters.
+ *
  * Revision 1.38  2005/07/11 16:56:50  steve
  *  Remove NetVariable and ivl_variable_t structures.
- *
- * Revision 1.37  2004/06/13 04:56:53  steve
- *  Add support for the default_nettype directive.
- *
- * Revision 1.36  2004/05/25 19:21:06  steve
- *  More identifier lists use perm_strings.
- *
- * Revision 1.35  2004/02/20 18:53:33  steve
- *  Addtrbute keys are perm_strings.
- *
- * Revision 1.34  2004/02/20 06:22:56  steve
- *  parameter keys are per_strings.
- *
- * Revision 1.33  2004/02/18 17:11:54  steve
- *  Use perm_strings for named langiage items.
- *
- * Revision 1.32  2003/06/20 00:53:19  steve
- *  Module attributes from the parser
- *  through to elaborated form.
- *
- * Revision 1.31  2003/06/13 19:10:45  steve
- *  Properly manage real variables in subscopes.
- *
- * Revision 1.30  2003/03/06 04:37:12  steve
- *  lex_strings.add module names earlier.
- *
- * Revision 1.29  2003/02/27 06:45:11  steve
- *  specparams as far as pform.
- *
- * Revision 1.28  2003/01/26 21:15:58  steve
- *  Rework expression parsing and elaboration to
- *  accommodate real/realtime values and expressions.
- *
- * Revision 1.27  2002/08/19 02:39:16  steve
- *  Support parameters with defined ranges.
- *
- * Revision 1.26  2002/08/12 01:34:58  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.25  2002/05/19 23:37:28  steve
- *  Parse port_declaration_lists from the 2001 Standard.
  */
 #endif

PDelays.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PDelays.cc,v 1.11 2003/06/21 01:21:42 steve Exp $"
+#ident "$Id: PDelays.cc,v 1.15 2006/07/08 21:48:46 steve Exp $"
 #endif
 
 # include "config.h"
@@ -62,11 +62,10 @@ void PDelays::set_delays(const svector<PExpr*>*del, bool df)
       delete_flag_ = df;
 }
 
-static unsigned long calculate_val(Design*des, NetScope*scope,
-				   const PExpr*expr)
+static NetExpr*calculate_val(Design*des, NetScope*scope, const PExpr*expr)
 {
 
-      NetExpr*dex = expr->elaborate_expr(des, scope);
+      NetExpr*dex = expr->elaborate_expr(des, scope, -1, false);
       if (NetExpr*tmp = dex->eval_tree()) {
 	    delete dex;
 	    dex = tmp;
@@ -85,7 +84,9 @@ static unsigned long calculate_val(Design*des, NetScope*scope,
 		  delay = 0;
 
 	    delete tmp;
-	    return delay;
+	    NetEConst*tmp2 = new NetEConst(verinum(delay));
+	    tmp2->set_line(*expr);
+	    return tmp2;
       }
 
 
@@ -96,35 +97,57 @@ static unsigned long calculate_val(Design*des, NetScope*scope,
 		  des->scale_to_precision(fn.as_ulong(), scope);
 
 	    delete tmp;
-	    return delay;
+	    NetEConst*tmp2 = new NetEConst(verinum(delay));
+	    tmp2->set_line(*expr);
+	    return tmp2;
       }
 
-	/* Oops, cannot evaluate down to a constant. Error message. */
-      delete dex;
+	/* Oops, cannot evaluate down to a constant. */
+      return dex;
+}
 
-      cerr << expr->get_line() << ": sorry: non-constant "
-	   << "delays not supported here: " << *expr << endl;
-      des->errors += 1;
-      return 0;
+static NetExpr* make_delay_nets(Design*des, NetExpr*expr)
+{
+      if (dynamic_cast<NetESignal*> (expr))
+	    return expr;
 
+      if (dynamic_cast<NetEConst*> (expr))
+	    return expr;
+
+      NetNet*sig = expr->synthesize(des);
+      if (sig == 0) {
+	    cerr << expr->get_line() << ": error: Expression " << *expr
+		 << " is not suitable for delay expression." << endl;
+	    return 0;
+      }
+
+      expr = new NetESignal(sig);
+      return expr;
 }
 
 void PDelays::eval_delays(Design*des, NetScope*scope,
-			  unsigned long&rise_time,
-			  unsigned long&fall_time,
-			  unsigned long&decay_time) const
+			  NetExpr*&rise_time,
+			  NetExpr*&fall_time,
+			  NetExpr*&decay_time,
+			  bool as_nets_flag) const
 {
       assert(scope);
 
 
       if (delay_[0]) {
 	    rise_time = calculate_val(des, scope, delay_[0]);
+	    if (as_nets_flag)
+		  rise_time = make_delay_nets(des, rise_time);
 
 	    if (delay_[1]) {
 		  fall_time = calculate_val(des, scope, delay_[1]);
+		  if (as_nets_flag)
+			fall_time = make_delay_nets(des, fall_time);
 
 		  if (delay_[2]) {
 			decay_time = calculate_val(des, scope, delay_[2]);
+		  if (as_nets_flag)
+			decay_time = make_delay_nets(des, decay_time);
 
 		  } else {
 			if (rise_time < fall_time)
@@ -146,6 +169,20 @@ void PDelays::eval_delays(Design*des, NetScope*scope,
 
 /*
  * $Log: PDelays.cc,v $
+ * Revision 1.15  2006/07/08 21:48:46  steve
+ *  Handle real valued literals in net contexts.
+ *
+ * Revision 1.14  2006/06/02 04:48:49  steve
+ *  Make elaborate_expr methods aware of the width that the context
+ *  requires of it. In the process, fix sizing of the width of unary
+ *  minus is context determined sizes.
+ *
+ * Revision 1.13  2006/01/03 05:22:14  steve
+ *  Handle complex net node delays.
+ *
+ * Revision 1.12  2006/01/02 05:33:19  steve
+ *  Node delays can be more general expressions in structural contexts.
+ *
  * Revision 1.11  2003/06/21 01:21:42  steve
  *  Harmless fixup of warnings.
  *

PDelays.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PDelays.h,v 1.7 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: PDelays.h,v 1.9 2006/01/03 05:22:14 steve Exp $"
 #endif
 
 # include  "svector.h"
@@ -34,6 +34,7 @@ using namespace std;
 
 class Design;
 class NetScope;
+class NetExpr;
 class PExpr;
 
 /*
@@ -53,9 +54,10 @@ class PDelays {
       void set_delays(const svector<PExpr*>*del, bool delete_flag=true);
 
       void eval_delays(Design*des, NetScope*scope,
-		       unsigned long&rise_time,
-		       unsigned long&fall_time,
-		       unsigned long&decay_time) const;
+		       NetExpr*&rise_time,
+		       NetExpr*&fall_time,
+		       NetExpr*&decay_time,
+		       bool as_nets_flag =false) const;
 
       void dump_delays(ostream&out) const;
 
@@ -72,6 +74,12 @@ ostream& operator << (ostream&o, const PDelays&);
 
 /*
  * $Log: PDelays.h,v $
+ * Revision 1.9  2006/01/03 05:22:14  steve
+ *  Handle complex net node delays.
+ *
+ * Revision 1.8  2006/01/02 05:33:19  steve
+ *  Node delays can be more general expressions in structural contexts.
+ *
  * Revision 1.7  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

PExpr.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PExpr.cc,v 1.37 2005/10/04 04:09:25 steve Exp $"
+#ident "$Id: PExpr.cc,v 1.39 2007/05/24 04:07:11 steve Exp $"
 #endif
 
 # include "config.h"
@@ -75,13 +75,44 @@ bool PEBinary::is_constant(Module*mod) const
       return left_->is_constant(mod) && right_->is_constant(mod);
 }
 
-PECallFunction::PECallFunction(const hname_t&n, const svector<PExpr *> &parms)
+PEBComp::PEBComp(char op, PExpr*l, PExpr*r)
+: PEBinary(op, l, r)
+{
+}
+
+PEBComp::~PEBComp()
+{
+}
+
+PEBShift::PEBShift(char op, PExpr*l, PExpr*r)
+: PEBinary(op, l, r)
+{
+}
+
+PEBShift::~PEBShift()
+{
+}
+
+PECallFunction::PECallFunction(const pform_name_t&n, const svector<PExpr *> &parms)
 : path_(n), parms_(parms)
 {
 }
 
-PECallFunction::PECallFunction(const hname_t&n)
-: path_(n)
+static pform_name_t pn_from_ps(perm_string n)
+{
+      name_component_t tmp_name (n);
+      pform_name_t tmp;
+      tmp.push_back(tmp_name);
+      return tmp;
+}
+
+PECallFunction::PECallFunction(perm_string n, const svector<PExpr*>&parms)
+: path_(pn_from_ps(n)), parms_(parms)
+{
+}
+
+PECallFunction::PECallFunction(perm_string n)
+: path_(pn_from_ps(n))
 {
 }
 
@@ -147,33 +178,32 @@ bool PEFNumber::is_constant(Module*) const
       return true;
 }
 
-PEIdent::PEIdent(const hname_t&s)
-: path_(s), msb_(0), lsb_(0), sel_(SEL_NONE), idx_(0)
+PEIdent::PEIdent(const pform_name_t&that)
+: path_(that)
 {
 }
 
+PEIdent::PEIdent(perm_string s)
+{
+      path_.push_back(name_component_t(s));
+}
+
 PEIdent::~PEIdent()
 {
 }
 
-const hname_t& PEIdent::path() const
-{
-      return path_;
-}
-
 /*
  * An identifier can be in a constant expression if (and only if) it is
  * a parameter.
+ *
+ * NOTE: This test does not work if the name is hierarchical!
  */
 bool PEIdent::is_constant(Module*mod) const
 {
       if (mod == 0) return false;
 
-	/* This is a work-around for map not matching < even when
-	   there is a perm_string operator that can do the comprare.
-
-	   The real fix is to make the path_ carry perm_strings. */
-      perm_string tmp = perm_string::literal(path_.peek_name(0));
+	/*  */
+      perm_string tmp = path_.back().name;
 
       { map<perm_string,Module::param_expr_t>::const_iterator cur;
         cur = mod->parameters.find(tmp);
@@ -270,6 +300,13 @@ bool PEUnary::is_constant(Module*m) const
 
 /*
  * $Log: PExpr.cc,v $
+ * Revision 1.39  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.38  2006/10/30 05:44:49  steve
+ *  Expression widths with unsized literals are pseudo-infinite width.
+ *
  * Revision 1.37  2005/10/04 04:09:25  steve
  *  Add support for indexed select attached to parameters.
  *

PExpr.h

@@ -19,13 +19,15 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PExpr.h,v 1.71 2005/10/04 04:09:25 steve Exp $"
+#ident "$Id: PExpr.h,v 1.90 2007/06/04 19:14:06 steve Exp $"
 #endif
 
 # include  <string>
+# include  <vector>
 # include  "netlist.h"
 # include  "verinum.h"
 # include  "LineInfo.h"
+# include  "pform_types.h"
 
 class Design;
 class Module;
@@ -50,11 +52,38 @@ class PExpr : public LineInfo {
 
       virtual void dump(ostream&) const;
 
-	// Procedural elaboration of the expression. Set the
-	// bare_memory_ok flag if the result is allowed to be a
-	// NetEMemory without an index.
+	// This method tests the width that the expression wants to
+	// be. It is used by elaboration of assignments to figure out
+	// the width of the expression.
+	//
+	// The "min" is the width of the local context, so it the
+	// minimum width that this function should return. Initially
+	// this is the same as the lval width.
+	//
+	// The "lval" is the width of the destination where this
+	// result is going to go. This can be used to constrain the
+	// amount that an expression can reasonably expand. For
+	// example, there is no point expanding an addition to beyond
+	// the lval. This extra bit of information allows the
+	// expression to optimize itself a bit. If the lval==0, then
+	// the subexpression should not make l-value related
+	// optimizations.
+	//
+	// The unsigned_flag is set to true if the expression is
+	// unsized and therefore expandable. This happens if a
+	// sub-expression is an unsized literal. Some expressions make
+	// special use of that.
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  bool&unsized_flag) const;
+
+	// Procedural elaboration of the expression. The expr_width is
+	// the width of the context of the expression (i.e. the
+	// l-value width of an assignment) or -1 if the expression is
+	// self-determinted. The sys_task_arg flag is true if
+	// expressions are allowed to be incomplete.
       virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
-				     bool sys_task_arg =false) const;
+				     int expr_width, bool sys_task_arg) const;
 
 	// Elaborate expressions that are the r-value of parameter
 	// assignments. This elaboration follows the restrictions of
@@ -66,9 +95,9 @@ class PExpr : public LineInfo {
 	// continuous assign or other wholly structural context.
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned lwidth,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0 =Link::STRONG,
 				    Link::strength_t drive1 =Link::STRONG)
 	    const;
@@ -96,7 +125,7 @@ class PExpr : public LineInfo {
 	// This attempts to evaluate a constant expression, and return
 	// a verinum as a result. If the expression cannot be
 	// evaluated, return 0.
-      virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
+      virtual verinum* eval_const(Design*des, NetScope*sc) const;
 
 	// This method returns true if that expression is the same as
 	// this expression. This method is used for comparing
@@ -122,25 +151,31 @@ class PEConcat : public PExpr {
       PEConcat(const svector<PExpr*>&p, PExpr*r =0);
       ~PEConcat();
 
+      virtual verinum* eval_const(Design*des, NetScope*sc) const;
       virtual void dump(ostream&) const;
 
       virtual NetNet* elaborate_lnet(Design*des, NetScope*scope,
 				     bool implicit_net_ok =false) const;
+      virtual NetNet* elaborate_bi_net(Design*des, NetScope*scope) const;
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned width,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
       virtual NetExpr*elaborate_expr(Design*des, NetScope*,
-				     bool sys_task_arg =false) const;
+				     int expr_width, bool sys_task_arg) const;
       virtual NetEConcat*elaborate_pexpr(Design*des, NetScope*) const;
       virtual NetAssign_* elaborate_lval(Design*des,
 					 NetScope*scope,
 					 bool is_force) const;
       virtual bool is_constant(Module*) const;
 
+    private:
+      NetNet* elaborate_lnet_common_(Design*des, NetScope*scope,
+				     bool implicit_net_ok,
+				     bool bidirectional_flag) const;
     private:
       svector<PExpr*>parms_;
       PExpr*repeat_;
@@ -187,20 +222,20 @@ class PEFNumber : public PExpr {
 	/* The eval_const method as applied to a floating point number
 	   gets the *integer* value of the number. This accounts for
 	   any rounding that is needed to get the value. */
-      virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
+      virtual verinum* eval_const(Design*des, NetScope*sc) const;
 
 	/* A PEFNumber is a constant, so this returns true. */
       virtual bool is_constant(Module*) const;
 
       virtual NetExpr*elaborate_expr(Design*des, NetScope*,
-				     bool sys_task_arg =false) const;
+				     int expr_width, bool sys_task_arg) const;
       virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
 
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned lwidth,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
 
@@ -213,10 +248,18 @@ class PEFNumber : public PExpr {
 class PEIdent : public PExpr {
 
     public:
-      explicit PEIdent(const hname_t&s);
+      explicit PEIdent(perm_string);
+      explicit PEIdent(const pform_name_t&);
       ~PEIdent();
 
+	// Add another name to the string of heirarchy that is the
+	// current identifier.
+      void append_name(perm_string);
+
       virtual void dump(ostream&) const;
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  bool&unsized_flag) const;
 
 	// Identifiers are allowed (with restrictions) is assign l-values.
       virtual NetNet* elaborate_lnet(Design*des, NetScope*scope,
@@ -232,14 +275,14 @@ class PEIdent : public PExpr {
 	// Structural r-values are OK.
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned lwidth,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
 
       virtual NetExpr*elaborate_expr(Design*des, NetScope*,
-				     bool sys_task_arg =false) const;
+				     int expr_width, bool sys_task_arg) const;
       virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
 
 	// Elaborate the PEIdent as a port to a module. This method
@@ -247,46 +290,77 @@ class PEIdent : public PExpr {
       NetNet* elaborate_port(Design*des, NetScope*sc) const;
 
       virtual bool is_constant(Module*) const;
-      verinum* eval_const(const Design*des, const NetScope*sc) const;
+      verinum* eval_const(Design*des, NetScope*sc) const;
 
-      const hname_t& path() const;
+      const pform_name_t& path() const { return path_; }
+
+    private:
+      pform_name_t path_;
+
+    private:
+	// Common functions to calculate parts of part/bit selects.
+      bool calculate_parts_(Design*, NetScope*, long&msb, long&lsb) const;
+      bool calculate_up_do_width_(Design*, NetScope*, unsigned long&wid) const;
+
+    private:
+      NetAssign_*elaborate_lval_net_word_(Design*, NetScope*, NetNet*) const;
+      bool elaborate_lval_net_part_(Design*, NetScope*, NetAssign_*) const;
+      bool elaborate_lval_net_idx_up_(Design*, NetScope*, NetAssign_*) const;
+      bool elaborate_lval_net_idx_do_(Design*, NetScope*, NetAssign_*) const;
 
     private:
       NetExpr*elaborate_expr_param(Design*des,
 				   NetScope*scope,
 				   const NetExpr*par,
+				   NetScope*found,
+				   const NetExpr*par_msb,
+				   const NetExpr*par_lsb) const;
+      NetExpr*elaborate_expr_net(Design*des,
+				 NetScope*scope,
+				 NetNet*net,
+				 NetScope*found,
+				 bool sys_task_arg) const;
+      NetExpr*elaborate_expr_net_word_(Design*des,
+				       NetScope*scope,
+				       NetNet*net,
+				       NetScope*found,
+				       bool sys_task_arg) const;
+      NetExpr*elaborate_expr_net_part_(Design*des,
+				   NetScope*scope,
+				   NetESignal*net,
+				   NetScope*found) const;
+      NetExpr*elaborate_expr_net_idx_up_(Design*des,
+				   NetScope*scope,
+				   NetESignal*net,
+				   NetScope*found) const;
+      NetExpr*elaborate_expr_net_idx_do_(Design*des,
+				   NetScope*scope,
+				   NetESignal*net,
+				   NetScope*found) const;
+      NetExpr*elaborate_expr_net_bit_(Design*des,
+				   NetScope*scope,
+				   NetESignal*net,
 				   NetScope*found) const;
-      hname_t path_;
 
     public:
-	// Use these to support bit- and part-select operators.
-      PExpr*msb_;
-      PExpr*lsb_;
 
-      enum { SEL_NONE, SEL_BIT, SEL_PART, SEL_IDX_UP, SEL_IDX_DO } sel_;
-
-	// If this is a reference to a memory, this is the index
-	// expression.
-      PExpr*idx_;
-
-      NetNet* elaborate_net_ram_(Design*des, NetScope*scope,
-				 NetMemory*mem, unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+      NetNet* elaborate_net_array_(Design*des, NetScope*scope,
+				   NetNet*sig, unsigned lwidth,
+				   const NetExpr* rise,
+				   const NetExpr* fall,
+				   const NetExpr* decay,
+				   Link::strength_t drive0,
+				   Link::strength_t drive1) const;
 
       NetNet* elaborate_net_bitmux_(Design*des, NetScope*scope,
 				    NetNet*sig,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
 
     private:
-      NetAssign_* elaborate_mem_lval_(Design*des, NetScope*scope,
-				      NetMemory*mem) const;
-
       NetNet* elaborate_lnet_common_(Design*des, NetScope*scope,
 				     bool implicit_net_ok,
 				     bool bidirectional_flag) const;
@@ -295,6 +369,7 @@ class PEIdent : public PExpr {
 
       bool eval_part_select_(Design*des, NetScope*scope, NetNet*sig,
 			     unsigned&midx, unsigned&lidx) const;
+      NetNet*process_select_(Design*des, NetScope*scope, NetNet*sig) const;
 
 };
 
@@ -307,21 +382,25 @@ class PENumber : public PExpr {
       const verinum& value() const;
 
       virtual void dump(ostream&) const;
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  bool&unsized_flag) const;
+
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned lwidth,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
       virtual NetEConst*elaborate_expr(Design*des, NetScope*,
-				     bool sys_task_arg =false) const;
+				       int expr_width, bool) const;
       virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
       virtual NetAssign_* elaborate_lval(Design*des,
 					 NetScope*scope,
 					 bool is_force) const;
 
-      virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
+      virtual verinum* eval_const(Design*des, NetScope*sc) const;
 
       virtual bool is_the_same(const PExpr*that) const;
       virtual bool is_constant(Module*) const;
@@ -345,17 +424,22 @@ class PEString : public PExpr {
 
       string value() const;
       virtual void dump(ostream&) const;
+
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  bool&unsized_flag) const;
+
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned width,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
       virtual NetEConst*elaborate_expr(Design*des, NetScope*,
-				     bool sys_task_arg =false) const;
+				       int expr_width, bool) const;
       virtual NetEConst*elaborate_pexpr(Design*des, NetScope*sc) const;
-      verinum* PEString::eval_const(const Design*, const NetScope*) const;
+      verinum* eval_const(Design*, NetScope*) const;
 
       virtual bool is_constant(Module*) const;
 
@@ -370,17 +454,18 @@ class PEUnary : public PExpr {
       ~PEUnary();
 
       virtual void dump(ostream&out) const;
+
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned width,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
       virtual NetExpr*elaborate_expr(Design*des, NetScope*,
-				     bool sys_task_arg =false) const;
+				     int expr_width, bool sys_task_arg) const;
       virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
-      virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
+      virtual verinum* eval_const(Design*des, NetScope*sc) const;
 
       virtual bool is_constant(Module*) const;
 
@@ -398,65 +483,100 @@ class PEBinary : public PExpr {
       virtual bool is_constant(Module*) const;
 
       virtual void dump(ostream&out) const;
+
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  bool&unsized_flag) const;
+
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned width,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
       virtual NetEBinary*elaborate_expr(Design*des, NetScope*,
-					bool sys_task_arg =false) const;
+					int expr_width, bool sys_task_arg) const;
       virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
-      virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
+      virtual verinum* eval_const(Design*des, NetScope*sc) const;
 
-    private:
+    protected:
       char op_;
       PExpr*left_;
       PExpr*right_;
 
-      NetEBinary*elaborate_expr_base_(Design*, NetExpr*lp, NetExpr*rp) const;
+      NetEBinary*elaborate_expr_base_(Design*, NetExpr*lp, NetExpr*rp, int use_wid) const;
+      NetEBinary*elaborate_eval_expr_base_(Design*, NetExpr*lp, NetExpr*rp, int use_wid) const;
 
+    private:
       NetNet* elaborate_net_add_(Design*des, NetScope*scope,
 				 unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay) const;
       NetNet* elaborate_net_bit_(Design*des, NetScope*scope,
 				 unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay) const;
       NetNet* elaborate_net_cmp_(Design*des, NetScope*scope,
 				 unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay) const;
       NetNet* elaborate_net_div_(Design*des, NetScope*scope,
 				 unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay) const;
       NetNet* elaborate_net_mod_(Design*des, NetScope*scope,
 				 unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay) const;
       NetNet* elaborate_net_log_(Design*des, NetScope*scope,
 				 unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay) const;
       NetNet* elaborate_net_mul_(Design*des, NetScope*scope,
 				 unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay) const;
       NetNet* elaborate_net_shift_(Design*des, NetScope*scope,
 				   unsigned lwidth,
-				   unsigned long rise,
-				   unsigned long fall,
-				   unsigned long decay) const;
+				   const NetExpr* rise,
+				   const NetExpr* fall,
+				   const NetExpr* decay) const;
+};
+
+/*
+ * Here are a few specilized classes for handling specific binary
+ * operators.
+ */
+class PEBComp  : public PEBinary {
+
+    public:
+      explicit PEBComp(char op, PExpr*l, PExpr*r);
+      ~PEBComp();
+
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  bool&flag) const;
+
+      NetEBinary* elaborate_expr(Design*des, NetScope*scope,
+				 int expr_width, bool sys_task_arg) const;
+};
+
+class PEBShift  : public PEBinary {
+
+    public:
+      explicit PEBShift(char op, PExpr*l, PExpr*r);
+      ~PEBShift();
+
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval, bool&flag) const;
 };
 
 /*
@@ -472,17 +592,21 @@ class PETernary : public PExpr {
       virtual bool is_constant(Module*) const;
 
       virtual void dump(ostream&out) const;
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  bool&unsized_flag) const;
+
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned width,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
       virtual NetETernary*elaborate_expr(Design*des, NetScope*,
-					 bool sys_task_arg =false) const;
+					 int expr_width, bool sys_task_arg) const;
       virtual NetETernary*elaborate_pexpr(Design*des, NetScope*sc) const;
-      virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
+      virtual verinum* eval_const(Design*des, NetScope*sc) const;
 
     private:
       PExpr*expr_;
@@ -497,32 +621,111 @@ class PETernary : public PExpr {
  */
 class PECallFunction : public PExpr {
     public:
-      explicit PECallFunction(const hname_t&n, const svector<PExpr *> &parms);
-      explicit PECallFunction(const hname_t&n);
+      explicit PECallFunction(const pform_name_t&n, const svector<PExpr *> &parms);
+	// Call of system function (name is not heirarchical)
+      explicit PECallFunction(perm_string n, const svector<PExpr *> &parms);
+      explicit PECallFunction(perm_string n);
       ~PECallFunction();
 
       virtual void dump(ostream &) const;
+
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned width,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
       virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
-				     bool sys_task_arg =false) const;
+				     int expr_wid, bool sys_task_arg) const;
 
     private:
-      hname_t path_;
+      pform_name_t path_;
       svector<PExpr *> parms_;
 
       bool check_call_matches_definition_(Design*des, NetScope*dscope) const;
 
       NetExpr* elaborate_sfunc_(Design*des, NetScope*scope) const;
+      NetNet* elaborate_net_sfunc_(Design*des, NetScope*scope,
+				   unsigned width,
+				   const NetExpr* rise,
+				   const NetExpr* fall,
+				   const NetExpr* decay,
+				   Link::strength_t drive0,
+				   Link::strength_t drive1) const;
 };
 
 /*
  * $Log: PExpr.h,v $
+ * Revision 1.90  2007/06/04 19:14:06  steve
+ *  Build errors in picky GCC compilers.
+ *
+ * Revision 1.89  2007/06/04 02:19:07  steve
+ *  Handle bit/part select of array words in nets.
+ *
+ * Revision 1.88  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.87  2007/01/16 05:44:14  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
+ *
+ * Revision 1.86  2006/11/10 04:54:26  steve
+ *  Add test_width methods for PETernary and PEString.
+ *
+ * Revision 1.85  2006/11/04 06:19:24  steve
+ *  Remove last bits of relax_width methods, and use test_width
+ *  to calculate the width of an r-value expression that may
+ *  contain unsized numbers.
+ *
+ * Revision 1.84  2006/10/30 05:44:49  steve
+ *  Expression widths with unsized literals are pseudo-infinite width.
+ *
+ * Revision 1.83  2006/06/18 04:15:50  steve
+ *  Add support for system functions in continuous assignments.
+ *
+ * Revision 1.82  2006/06/02 04:48:49  steve
+ *  Make elaborate_expr methods aware of the width that the context
+ *  requires of it. In the process, fix sizing of the width of unary
+ *  minus is context determined sizes.
+ *
+ * Revision 1.81  2006/04/28 04:28:35  steve
+ *  Allow concatenations as arguments to inout ports.
+ *
+ * Revision 1.80  2006/04/16 00:54:04  steve
+ *  Cleanup lval part select handling.
+ *
+ * Revision 1.79  2006/04/16 00:15:43  steve
+ *  Fix part selects in l-values.
+ *
+ * Revision 1.78  2006/03/25 02:36:26  steve
+ *  Get rid of excess PESTring:: prefix within class declaration.
+ *
+ * Revision 1.77  2006/02/02 02:43:57  steve
+ *  Allow part selects of memory words in l-values.
+ *
+ * Revision 1.76  2006/01/02 05:33:19  steve
+ *  Node delays can be more general expressions in structural contexts.
+ *
+ * Revision 1.75  2005/12/07 04:04:23  steve
+ *  Allow constant concat expressions.
+ *
+ * Revision 1.74  2005/11/27 17:01:56  steve
+ *  Fix for stubborn compiler.
+ *
+ * Revision 1.73  2005/11/27 05:56:20  steve
+ *  Handle bit select of parameter with ranges.
+ *
+ * Revision 1.72  2005/11/10 13:28:11  steve
+ *  Reorganize signal part select handling, and add support for
+ *  indexed part selects.
+ *
+ *  Expand expression constant propagation to eliminate extra
+ *  sums in certain cases.
+ *
  * Revision 1.71  2005/10/04 04:09:25  steve
  *  Add support for indexed select attached to parameters.
  *

PGate.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PGate.cc,v 1.16 2004/02/18 17:11:54 steve Exp $"
+#ident "$Id: PGate.cc,v 1.18 2006/01/03 05:22:14 steve Exp $"
 #endif
 
 # include "config.h"
@@ -90,12 +90,69 @@ void PGate::elaborate_scope(Design*, NetScope*) const
  * parameters. This method understands how to handle the different
  * numbers of expressions.
  */
+
+void PGate::eval_delays(Design*des, NetScope*scope,
+			NetExpr*&rise_expr,
+			NetExpr*&fall_expr,
+			NetExpr*&decay_expr,
+			bool as_net_flag) const
+{
+      delay_.eval_delays(des, scope,
+			 rise_expr, fall_expr, decay_expr,
+			 as_net_flag);
+}
+
 void PGate::eval_delays(Design*des, NetScope*scope,
 			unsigned long&rise_time,
 			unsigned long&fall_time,
 			unsigned long&decay_time) const
 {
-      delay_.eval_delays(des, scope, rise_time, fall_time, decay_time);
+      NetExpr*rise_expr, *fall_expr, *decay_expr;
+      delay_.eval_delays(des, scope, rise_expr, fall_expr, decay_expr);
+
+      if (rise_expr == 0) {
+	    rise_time = 0;
+	    fall_time = 0;
+	    decay_time = 0;
+      }
+
+      if (NetEConst*tmp = dynamic_cast<NetEConst*> (rise_expr)) {
+	    rise_time = tmp->value().as_ulong();
+
+      } else {
+	    cerr << get_line() << ": error: Delay expressions must be "
+		 << "constant here." << endl;
+	    cerr << get_line() << ":      : Cannot calculate "
+		 << *rise_expr << endl;
+	    des->errors += 1;
+	    rise_time = 0;
+      }
+
+      if (NetEConst*tmp = dynamic_cast<NetEConst*> (fall_expr)) {
+	    fall_time = tmp->value().as_ulong();
+
+      } else {
+	    if (fall_expr != rise_expr) {
+		  cerr << get_line() << ": error: Delay expressions must be "
+		       << "constant here." << endl;
+		  cerr << get_line() << ":      : Cannot calculate "
+		       << *rise_expr << endl;
+	    }
+	    des->errors += 1;
+	    fall_time = 0;
+      }
+
+      if (NetEConst*tmp = dynamic_cast<NetEConst*> (decay_expr)) {
+	    decay_time = tmp->value().as_ulong();
+
+      } else {
+	    cerr << get_line() << ": error: Delay expressions must be "
+		 << "constant here." << endl;
+	    cerr << get_line() << ":      : Cannot calculate "
+		 << *rise_expr << endl;
+	    des->errors += 1;
+	    decay_time = 0;
+      }
 }
 
 PGAssign::PGAssign(svector<PExpr*>*pins)
@@ -191,6 +248,12 @@ perm_string PGModule::get_type()
 
 /*
  * $Log: PGate.cc,v $
+ * Revision 1.18  2006/01/03 05:22:14  steve
+ *  Handle complex net node delays.
+ *
+ * Revision 1.17  2006/01/02 05:33:19  steve
+ *  Node delays can be more general expressions in structural contexts.
+ *
  * Revision 1.16  2004/02/18 17:11:54  steve
  *  Use perm_strings for named langiage items.
  *

PGate.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PGate.h,v 1.29 2004/10/04 01:10:52 steve Exp $"
+#ident "$Id: PGate.h,v 1.32 2006/04/10 00:37:42 steve Exp $"
 #endif
 
 # include  "svector.h"
@@ -66,11 +66,23 @@ class PGate : public LineInfo {
 
       perm_string get_name() const { return name_; }
 
+	// This method evaluates the delays all the way to an
+	// integer. If the delay is non-constant, then set the times
+	// to 0, print an error message and mark an error to the
+	// design.
       void eval_delays(Design*des, NetScope*scope,
 		       unsigned long&rise_time,
 		       unsigned long&fall_time,
 		       unsigned long&decay_time) const;
 
+	// This evaluates the delays as far as possible, but returns
+	// an expression, and do not signal errors.
+      void eval_delays(Design*des, NetScope*scope,
+		       NetExpr*&rise_time,
+		       NetExpr*&fall_time,
+		       NetExpr*&decay_time,
+		       bool as_net_flag =false) const;
+
       unsigned pin_count() const { return pins_? pins_->count() : 0; }
       const PExpr*pin(unsigned idx) const { return (*pins_)[idx]; }
 
@@ -82,7 +94,7 @@ class PGate : public LineInfo {
 
       map<perm_string,PExpr*> attributes;
 
-      virtual void dump(ostream&out) const;
+      virtual void dump(ostream&out, unsigned ind =4) const;
       virtual void elaborate(Design*des, NetScope*scope) const;
       virtual void elaborate_scope(Design*des, NetScope*sc) const;
       virtual bool elaborate_sig(Design*des, NetScope*scope) const;
@@ -116,7 +128,7 @@ class PGAssign  : public PGate {
       explicit PGAssign(svector<PExpr*>*pins, svector<PExpr*>*dels);
       ~PGAssign();
 
-      void dump(ostream&out) const;
+      void dump(ostream&out, unsigned ind =4) const;
       virtual void elaborate(Design*des, NetScope*scope) const;
 
     private:
@@ -153,7 +165,7 @@ class PGBuiltin  : public PGate {
       Type type() const { return type_; }
       void set_range(PExpr*msb, PExpr*lsb);
 
-      virtual void dump(ostream&out) const;
+      virtual void dump(ostream&out, unsigned ind =4) const;
       virtual void elaborate(Design*, NetScope*scope) const;
 
     private:
@@ -196,7 +208,7 @@ class PGModule  : public PGate {
 	// method to pass the range to the pform.
       void set_range(PExpr*msb, PExpr*lsb);
 
-      virtual void dump(ostream&out) const;
+      virtual void dump(ostream&out, unsigned ind =4) const;
       virtual void elaborate(Design*, NetScope*scope) const;
       virtual void elaborate_scope(Design*des, NetScope*sc) const;
       virtual bool elaborate_sig(Design*des, NetScope*scope) const;
@@ -227,6 +239,15 @@ class PGModule  : public PGate {
 
 /*
  * $Log: PGate.h,v $
+ * Revision 1.32  2006/04/10 00:37:42  steve
+ *  Add support for generate loops w/ wires and gates.
+ *
+ * Revision 1.31  2006/01/03 05:22:14  steve
+ *  Handle complex net node delays.
+ *
+ * Revision 1.30  2006/01/02 05:33:19  steve
+ *  Node delays can be more general expressions in structural contexts.
+ *
  * Revision 1.29  2004/10/04 01:10:52  steve
  *  Clean up spurious trailing white space.
  *

PGenerate.cc

@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2006 Stephen Williams ([email protected])
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: PGenerate.cc,v 1.4 2007/06/02 03:42:12 steve Exp $"
+#endif
+
+# include  "PGenerate.h"
+# include  "PWire.h"
+
+PGenerate::PGenerate(unsigned id)
+: id_number(id)
+{
+      parent = 0;
+}
+
+PGenerate::~PGenerate()
+{
+}
+
+PWire* PGenerate::add_wire(PWire*wire)
+{
+      PWire*&ep = wires[wire->path()];
+      if (ep) return ep;
+
+      assert(ep == 0);
+      ep = wire;
+      return wire;
+}
+
+PWire* PGenerate::get_wire(const pform_name_t&name) const
+{
+      map<pform_name_t,PWire*>::const_iterator obj = wires.find(name);
+      if (obj == wires.end())
+	    return 0;
+      else
+	    return (*obj).second;
+}
+
+void PGenerate::add_gate(PGate*gate)
+{
+      gates.push_back(gate);
+}
+
+void PGenerate::add_behavior(PProcess*proc)
+{
+      behaviors.push_back(proc);
+}

PGenerate.h

@@ -0,0 +1,100 @@
+#ifndef __PGenerate_H
+#define __PGenerate_H
+/*
+ * Copyright (c) 2006 Stephen Williams ([email protected])
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: PGenerate.h,v 1.4 2007/06/02 03:42:12 steve Exp $"
+#endif
+
+# include  "LineInfo.h"
+# include  "StringHeap.h"
+# include  "HName.h"
+# include  <list>
+# include  <map>
+# include  "pform_types.h"
+
+class Design;
+class NetScope;
+class PExpr;
+class PProcess;
+class PGate;
+class PWire;
+
+/*
+ * This represents a generate scheme.
+ */
+class PGenerate : public LineInfo {
+
+    public:
+      PGenerate(unsigned id_number);
+      ~PGenerate();
+
+	// Generate schemes have an ID number, for when the scope is
+	// implicit.
+      const unsigned id_number;
+      perm_string scope_name;
+
+      enum scheme_t {GS_NONE, GS_LOOP, GS_CONDIT};
+      scheme_t scheme_type;
+
+	// generate loops have an index variable and three
+	// expressions: for (index = <init>; <test>; index=<step>)
+      perm_string loop_index;
+      PExpr*loop_init;
+      PExpr*loop_test;
+      PExpr*loop_step;
+
+      map<pform_name_t,PWire*>wires;
+      PWire* add_wire(PWire*);
+      PWire* get_wire(const pform_name_t&name) const;
+
+      list<PGate*> gates;
+      void add_gate(PGate*);
+
+      list<PProcess*> behaviors;
+      void add_behavior(PProcess*behave);
+
+      list<PGenerate*> generates;
+      PGenerate*parent;
+
+	// This method is called by the elaboration of a module to
+	// generate scopes. the container is the scope that is to
+	// contain the generated scope.
+      bool generate_scope(Design*des, NetScope*container);
+
+      bool elaborate_sig(Design*des) const;
+      bool elaborate(Design*des) const;
+
+      void dump(ostream&out, unsigned indent) const;
+
+    private:
+      bool generate_scope_loop_(Design*des, NetScope*container);
+
+	// These are the scopes created by generate_scope.
+      list<NetScope*>scope_list_;
+	// internal function called on each scope generated by this scheme.
+      bool elaborate_sig_(Design*des, NetScope*scope) const;
+      bool elaborate_(Design*des, NetScope*scope) const;
+
+    private: // not implemented
+      PGenerate(const PGenerate&);
+      PGenerate& operator= (const PGenerate&);
+};
+
+#endif

PSpec.cc

@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2006 Stephen Williams <[email protected]>
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: PSpec.cc,v 1.2 2007/02/12 01:52:21 steve Exp $"
+#endif
+
+# include  "PSpec.h"
+
+PSpecPath::PSpecPath(unsigned src_cnt, unsigned dst_cnt)
+: conditional(false), condition(0), edge(0),
+  src(src_cnt), dst(dst_cnt),
+  data_source_expression(0)
+{
+}
+
+PSpecPath::~PSpecPath()
+{
+}

PSpec.h

@@ -0,0 +1,79 @@
+#ifndef __PSpec_H
+#define __PSpec_H
+/*
+ * Copyright (c) 2006 Stephen Williams <[email protected]>
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: PSpec.h,v 1.3 2007/04/13 02:34:35 steve Exp $"
+#endif
+
+# include  "LineInfo.h"
+# include  "StringHeap.h"
+# include  <vector>
+
+class PExpr;
+
+/*
+* The PSpecPath is the parse of a specify path, which is in its most
+* general form <path> = <delays>. The <delays> are collected into the
+* "delays" vector in all cases, and the variety is in the other
+* members.
+*
+* All paths also have a list of source names in the src vector, and a
+* list of destination names in the dst vector. These pairs are the
+* actual paths.
+*
+* If the path is a simple path, then:
+*      condition == nil
+*      edge == 0
+*      data_source_expression == nil
+*
+* If the path is conditional, then conditional == true and condition
+* is the condition expression. If the condition expression is nil,
+* then this is an ifnone conditional path.
+*
+* If data_source_expression != nil, then the path is edge sensitive
+* and the edge might not be 0.
+*/
+class PSpecPath  : public LineInfo {
+
+    public:
+      PSpecPath(unsigned src_cnt, unsigned dst_cnt);
+      ~PSpecPath();
+
+      void elaborate(class Design*des, class NetScope*scope) const;
+
+      void dump(std::ostream&out, unsigned ind) const;
+
+    public:
+	// Condition expression, if present.
+      bool conditional;
+      class PExpr* condition;
+	// Edge specification (-1==negedge, 0 = no edge, 1==posedge)
+      int edge;
+	// Ordered set of source nodes of a path
+      std::vector<perm_string> src;
+	// Ordered set of destination nodes of a path
+      std::vector<perm_string> dst;
+	// Data source expression
+      class PExpr* data_source_expression;
+
+      std::vector<class PExpr*>delays;
+};
+
+#endif

PTask.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PTask.h,v 1.13 2004/05/31 23:34:36 steve Exp $"
+#ident "$Id: PTask.h,v 1.14 2007/03/06 05:22:49 steve Exp $"
 #endif
 
 # include  "LineInfo.h"
@@ -35,6 +35,7 @@ class PExpr;
 enum PTaskFuncEnum {
       PTF_NONE,
       PTF_REG,
+      PTF_REG_S,
       PTF_INTEGER,
       PTF_REAL,
       PTF_REALTIME,
@@ -117,6 +118,9 @@ class PFunction : public LineInfo {
 
 /*
  * $Log: PTask.h,v $
+ * Revision 1.14  2007/03/06 05:22:49  steve
+ *  Support signed function return values.
+ *
  * Revision 1.13  2004/05/31 23:34:36  steve
  *  Rewire/generalize parsing an elaboration of
  *  function return values to allow for better

PWire.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999-2005 Stephen Williams ([email protected])
+ * Copyright (c) 1999-2007 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -17,29 +17,14 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PWire.cc,v 1.11 2005/07/07 16:22:49 steve Exp $"
+#ident "$Id: PWire.cc,v 1.14 2007/05/24 04:07:11 steve Exp $"
 #endif
 
 # include "config.h"
 # include  "PWire.h"
 # include  <assert.h>
 
-PWire::PWire(const hname_t&n,
-	     NetNet::Type t,
-	     NetNet::PortType pt,
-	     ivl_variable_type_t dt)
-: hname_(n), type_(t), port_type_(pt), data_type_(dt),
-  signed_(false), isint_(false),
-lidx_(0), ridx_(0)
-{
-      if (t == NetNet::INTEGER) {
-	    type_ = NetNet::REG;
-	    signed_ = true;
-	    isint_ = true;
-      }
-}
-
-PWire::PWire(char*n,
+PWire::PWire(const pform_name_t&n,
 	     NetNet::Type t,
 	     NetNet::PortType pt,
 	     ivl_variable_type_t dt)
@@ -59,7 +44,7 @@ NetNet::Type PWire::get_wire_type() const
       return type_;
 }
 
-const hname_t& PWire::path() const
+const pform_name_t& PWire::path() const
 {
       return hname_;
 }
@@ -154,13 +139,25 @@ void PWire::set_memory_idx(PExpr*ldx, PExpr*rdx)
 {
       assert(lidx_ == 0);
       assert(ridx_ == 0);
-      assert(type_ == NetNet::REG);
       lidx_ = ldx;
       ridx_ = rdx;
 }
 
 /*
  * $Log: PWire.cc,v $
+ * Revision 1.14  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.13  2007/04/26 03:06:21  steve
+ *  Rework hname_t to use perm_strings.
+ *
+ * Revision 1.12  2007/01/16 05:44:14  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
+ *
  * Revision 1.11  2005/07/07 16:22:49  steve
  *  Generalize signals to carry types.
  *

PWire.h

@@ -1,7 +1,7 @@
 #ifndef __PWire_H
 #define __PWire_H
 /*
- * Copyright (c) 1998-2000 Stephen Williams ([email protected])
+ * Copyright (c) 1998-2007 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -19,13 +19,14 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PWire.h,v 1.18 2005/07/07 16:22:49 steve Exp $"
+#ident "$Id: PWire.h,v 1.21 2007/05/24 04:07:11 steve Exp $"
 #endif
 
 # include  "netlist.h"
 # include  "LineInfo.h"
 # include  <map>
 # include  "svector.h"
+# include  "StringHeap.h"
 
 #ifdef HAVE_IOSFWD
 # include  <iosfwd>
@@ -42,24 +43,21 @@ class Design;
  * identifies a port by keeping it in its port list.
  *
  * The hname parameter to the constructor is a hierarchical name. It
- * is an array of strings starting with the root, running towards
- * the base name, and terminated by a null pointer. The environment
- * allocates the memory for me.
+ * is the name of the wire within a module, so does not include the
+ * current scope or any instances. Modules contain all the wires, so
+ * from that perspective, sub-scopes within the module are a part of
+ * the wire name.
  */
 class PWire : public LineInfo {
 
     public:
-      PWire(const hname_t&hname,
-	    NetNet::Type t,
-	    NetNet::PortType pt,
-	    ivl_variable_type_t dt);
-      PWire(char*name,
+      PWire(const pform_name_t&hname,
 	    NetNet::Type t,
 	    NetNet::PortType pt,
 	    ivl_variable_type_t dt);
 
 	// Return a hierarchical name.
-      const hname_t&path() const;
+      const pform_name_t&path() const;
 
       NetNet::Type get_wire_type() const;
       bool set_wire_type(NetNet::Type);
@@ -81,12 +79,12 @@ class PWire : public LineInfo {
       map<perm_string,PExpr*> attributes;
 
 	// Write myself to the specified stream.
-      void dump(ostream&out) const;
+      void dump(ostream&out, unsigned ind=4) const;
 
-      void elaborate_sig(Design*, NetScope*scope) const;
+      NetNet* elaborate_sig(Design*, NetScope*scope) const;
 
     private:
-      hname_t hname_;
+      pform_name_t hname_;
       NetNet::Type type_;
       NetNet::PortType port_type_;
       ivl_variable_type_t data_type_;
@@ -110,6 +108,16 @@ class PWire : public LineInfo {
 
 /*
  * $Log: PWire.h,v $
+ * Revision 1.21  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.20  2007/04/26 03:06:22  steve
+ *  Rework hname_t to use perm_strings.
+ *
+ * Revision 1.19  2006/04/10 00:37:42  steve
+ *  Add support for generate loops w/ wires and gates.
+ *
  * Revision 1.18  2005/07/07 16:22:49  steve
  *  Generalize signals to carry types.
  *
@@ -143,40 +151,5 @@ class PWire : public LineInfo {
  *
  * Revision 1.10  2001/01/16 02:44:18  steve
  *  Use the iosfwd header if available.
- *
- * Revision 1.9  2000/12/11 00:31:43  steve
- *  Add support for signed reg variables,
- *  simulate in t-vvm signed comparisons.
- *
- * Revision 1.8  2000/05/02 16:27:38  steve
- *  Move signal elaboration to a seperate pass.
- *
- * Revision 1.7  2000/02/23 02:56:54  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.6  1999/11/27 19:07:57  steve
- *  Support the creation of scopes.
- *
- * Revision 1.5  1999/06/17 05:34:42  steve
- *  Clean up interface of the PWire class,
- *  Properly match wire ranges.
- *
- * Revision 1.4  1999/06/02 15:38:46  steve
- *  Line information with nets.
- *
- * Revision 1.3  1999/04/19 01:59:36  steve
- *  Add memories to the parse and elaboration phases.
- *
- * Revision 1.2  1998/11/23 00:20:22  steve
- *  NetAssign handles lvalues as pin links
- *  instead of a signal pointer,
- *  Wire attributes added,
- *  Ability to parse UDP descriptions added,
- *  XNF generates EXT records for signals with
- *  the PAD attribute.
- *
- * Revision 1.1  1998/11/03 23:28:55  steve
- *  Introduce verilog to CVS.
- *
  */
 #endif

Statement.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: Statement.cc,v 1.29 2004/02/18 17:11:54 steve Exp $"
+#ident "$Id: Statement.cc,v 1.30 2007/05/24 04:07:11 steve Exp $"
 #endif
 
 # include "config.h"
@@ -107,16 +107,22 @@ PBlock::~PBlock()
 	    delete list_[idx];
 }
 
-PCallTask::PCallTask(const hname_t&n, const svector<PExpr*>&p)
+PCallTask::PCallTask(const pform_name_t&n, const svector<PExpr*>&p)
 : path_(n), parms_(p)
 {
 }
 
+PCallTask::PCallTask(perm_string n, const svector<PExpr*>&p)
+: parms_(p)
+{
+      path_.push_back(name_component_t(n));
+}
+
 PCallTask::~PCallTask()
 {
 }
 
-const hname_t& PCallTask::path() const
+const pform_name_t& PCallTask::path() const
 {
       return path_;
 }
@@ -178,7 +184,7 @@ PDelayStatement::~PDelayStatement()
 {
 }
 
-PDisable::PDisable(const hname_t&sc)
+PDisable::PDisable(const pform_name_t&sc)
 : scope_(sc)
 {
 }
@@ -273,7 +279,7 @@ PRepeat::~PRepeat()
       delete statement_;
 }
 
-PTrigger::PTrigger(const hname_t&e)
+PTrigger::PTrigger(const pform_name_t&e)
 : event_(e)
 {
 }
@@ -295,6 +301,10 @@ PWhile::~PWhile()
 
 /*
  * $Log: Statement.cc,v $
+ * Revision 1.30  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
  * Revision 1.29  2004/02/18 17:11:54  steve
  *  Use perm_strings for named langiage items.
  *

Statement.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: Statement.h,v 1.41 2004/12/11 02:31:25 steve Exp $"
+#ident "$Id: Statement.h,v 1.44 2007/05/24 04:07:11 steve Exp $"
 #endif
 
 # include  <string>
@@ -55,6 +55,8 @@ class PProcess : public LineInfo {
 
       virtual ~PProcess();
 
+      bool elaborate(Design*des, NetScope*scope) const;
+
       Type type() const { return type_; }
       Statement*statement() { return statement_; }
 
@@ -171,10 +173,11 @@ class PBlock  : public Statement {
 class PCallTask  : public Statement {
 
     public:
-      explicit PCallTask(const hname_t&n, const svector<PExpr*>&parms);
+      explicit PCallTask(const pform_name_t&n, const svector<PExpr*>&parms);
+      explicit PCallTask(perm_string n, const svector<PExpr*>&parms);
       ~PCallTask();
 
-      const hname_t& path() const;
+      const pform_name_t& path() const;
 
       unsigned nparms() const { return parms_.count(); }
 
@@ -195,7 +198,7 @@ class PCallTask  : public Statement {
       NetProc* elaborate_sys(Design*des, NetScope*scope) const;
       NetProc* elaborate_usr(Design*des, NetScope*scope) const;
 
-      hname_t path_;
+      pform_name_t path_;
       svector<PExpr*> parms_;
 };
 
@@ -294,14 +297,14 @@ class PDelayStatement  : public Statement {
 class PDisable  : public Statement {
 
     public:
-      explicit PDisable(const hname_t&sc);
+      explicit PDisable(const pform_name_t&sc);
       ~PDisable();
 
       virtual void dump(ostream&out, unsigned ind) const;
       virtual NetProc* elaborate(Design*des, NetScope*scope) const;
 
     private:
-      hname_t scope_;
+      pform_name_t scope_;
 };
 
 /*
@@ -394,6 +397,7 @@ class PNoop  : public Statement {
 
     public:
       PNoop() { }
+      ~PNoop() { }
 };
 
 class PRepeat : public Statement {
@@ -430,14 +434,14 @@ class PRelease  : public Statement {
 class PTrigger  : public Statement {
 
     public:
-      explicit PTrigger(const hname_t&ev);
+      explicit PTrigger(const pform_name_t&ev);
       ~PTrigger();
 
       virtual NetProc* elaborate(Design*des, NetScope*scope) const;
       virtual void dump(ostream&out, unsigned ind) const;
 
     private:
-      hname_t event_;
+      pform_name_t event_;
 };
 
 class PWhile  : public Statement {
@@ -457,6 +461,16 @@ class PWhile  : public Statement {
 
 /*
  * $Log: Statement.h,v $
+ * Revision 1.44  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.43  2007/03/05 05:59:10  steve
+ *  Handle processes within generate loops.
+ *
+ * Revision 1.42  2005/12/05 21:21:18  steve
+ *  Fixes for stubborn compilers.
+ *
  * Revision 1.41  2004/12/11 02:31:25  steve
  *  Rework of internals to carry vectors through nexus instead
  *  of single bits. Make the ivl, tgt-vvp and vvp initial changes

_pli_types.h.in

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: _pli_types.h.in,v 1.7 2003/11/12 02:38:44 steve Exp $"
+#ident "$Id: _pli_types.h.in,v 1.8 2007/06/05 21:32:30 steve Exp $"
 #endif
 
 # undef HAVE_INTTYPES_H
@@ -42,7 +42,7 @@ typedef int32_t  PLI_INT32;
 
 typedef signed short   PLI_INT16;
 typedef unsigned short PLI_UINT16;
-typedef signed char    PLI_BYTE8;
+typedef char           PLI_BYTE8;
 typedef unsigned char  PLI_UBYTE8;
 
 # define PLI_UINT64_FMT PRIu64
@@ -84,12 +84,15 @@ typedef signed int     PLI_INT32;
 typedef unsigned int   PLI_UINT32;
 typedef signed short   PLI_INT16;
 typedef unsigned short PLI_UINT16;
-typedef signed char    PLI_BYTE8;
+typedef char           PLI_BYTE8;
 typedef unsigned char  PLI_UBYTE8;
 #endif
 
 /*
  * $Log: _pli_types.h.in,v $
+ * Revision 1.8  2007/06/05 21:32:30  steve
+ *  More standard PLI_BYTE8.
+ *
  * Revision 1.7  2003/11/12 02:38:44  steve
  *  Clean up manual definitions of PLI_UINT64_FMT.
  *

aclocal.m4

@@ -14,7 +14,7 @@
 AC_DEFUN([AX_CPP_IDENT],
 [AC_CACHE_CHECK([for ident support in C compiler], ax_cv_cpp_ident,
 [AC_TRY_COMPILE([
-#ident "$Id: aclocal.m4,v 1.6 2004/10/04 01:10:52 steve Exp $"
+#ident "$Id: aclocal.m4,v 1.7 2007/05/16 23:59:12 steve Exp $"
 ],[while (0) {}],
 [AS_VAR_SET(ax_cv_cpp_ident, yes)],
 [AS_VAR_SET(ax_cv_cpp_ident, no)])])
@@ -48,7 +48,7 @@ AC_DEFUN([AX_C_UNDERSCORES_LEADING],
 [AS_VAR_SET(ax_cv_c_underscores_leading, yes)],
 [AS_VAR_SET(ax_cv_c_underscores_leading, no)])])
 if test $ax_cv_c_underscores_leading = yes -a "$CYGWIN" != "yes" -a "$MINGW32" != "yes"; then
- AC_DEFINE(NEED_LU)
+ AC_DEFINE([NEED_LU], [1], [Symbol names in object files produced by C compiler have leading underscores.])
 fi
 ])# AX_C_UNDERSCORES_LEADING
 
@@ -63,7 +63,7 @@ AC_DEFUN([AX_C_UNDERSCORES_TRAILING],
 [AS_VAR_SET(ax_cv_c_underscores_trailing, yes)],
 [AS_VAR_SET(ax_cv_c_underscores_trailing, no)])])
 if test $ax_cv_c_underscores_trailing = yes; then
- AC_DEFINE(NEED_TU)
+ AC_DEFINE([NEED_TU], [1], [Symbol names in object files produced by C compiler have trailing underscores.])
 fi
 ])# AX_C_UNDERSCORES_TRAILING
 

autoconf.sh

@@ -7,12 +7,12 @@
 # to just run this script to autoconf wherever needed.
 #
 echo "Autoconf in root..."
-autoconf
+autoconf -f
 
-for dir in vpip vpi vvp tgt-vvp tgt-fpga libveriuser cadpli
+for dir in vpip vpi vvp tgt-vvp tgt-fpga tgt-stub libveriuser cadpli
 do
     echo "Autoconf in $dir..."
-    ( cd ./$dir ; autoconf --include=.. )
+    ( cd ./$dir ; autoconf -f --include=.. )
 done
 
 echo "Precompiling lexor_keyword.gperf"

cadpli/Makefile.in

@@ -16,7 +16,7 @@
 #    59 Temple Place - Suite 330
 #    Boston, MA 02111-1307, USA
 #
-#ident "$Id: Makefile.in,v 1.11 2004/10/04 01:09:07 steve Exp $"
+#ident "$Id: Makefile.in,v 1.13 2007/02/06 05:07:31 steve Exp $"
 #
 #
 SHELL = /bin/sh
@@ -35,8 +35,6 @@ includedir = $(prefix)/include
 
 vpidir = @libdir@/ivl/@vpidir1@
 
-strip_dynamic=@strip_dynamic@
-
 CC = @CC@
 INSTALL = @INSTALL@
 INSTALL_PROGRAM = @INSTALL_PROGRAM@
@@ -45,7 +43,6 @@ INSTALL_DATA = @INSTALL_DATA@
 CPPFLAGS = @ident_support@ -I$(srcdir) -I$(srcdir)/.. -I.. @CPPFLAGS@ @DEFS@ @PICFLAG@
 CFLAGS = -Wall @CFLAGS@
 LDFLAGS = @LDFLAGS@
-STRIP = @STRIP@
 
 SHARED = @shared@
 
@@ -55,7 +52,7 @@ ifeq (@enable_vvp32@,yes)
 vpidir32 = $(libdir)/ivl/@vpidir2@
 ALL32 = all32
 INSTALL32 = install32
-UNINSTALL32 = uninistall32
+UNINSTALL32 = uninstall32
 include $(srcdir)/enable_vvp32.mk
 endif
 
@@ -74,7 +71,7 @@ dep:
 O = cadpli.o
 
 SYSTEM_VPI_LDFLAGS = -L../vvp -lvpi
-ifeq (@WIN32@,yes)
+ifeq (@MING32@,yes)
     SYSTEM_VPI_LDFLAGS += @EXTRALIBS@
 endif
 
@@ -98,6 +95,8 @@ installdirs: ../mkinstalldirs
 uninstall: $(UNINSTALL32)
 	rm -f $(vpidir)/cadpli.vpl
 
+uninstall32:
+
 ifeq (@enable_vvp32@,yes)
 include $(srcdir)/enable_vvp32.mk
 endif

cadpli/configure.in

@@ -37,7 +37,7 @@ AC_SUBST(DLLIB)
 
 AX_CPP_PRECOMP
 
-# Compiler option for position independent code, needed whan making shared objects.
+# Compiler option for position independent code, needed when making shared objects.
 AX_C_PICFLAG
 
 # Linker option used when compiling the target

compiler.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: compiler.h,v 1.30 2005/07/11 16:56:50 steve Exp $"
+#ident "$Id: compiler.h,v 1.33 2007/04/19 02:52:53 steve Exp $"
 #endif
 
 # include  <list>
@@ -32,11 +32,8 @@
  */
 
 
-/* The INTEGER_WIDTH is the default width of integer variables, and
-   the presumed width of unsigned literal numbers. */
-#ifndef INTEGER_WIDTH
-# define INTEGER_WIDTH 32
-#endif
+/* The integer_width is the width of integer variables. */
+extern unsigned integer_width;
 
 /* The TIME_WIDTH is the width of time variables. */
 #ifndef TIME_WIDTH
@@ -104,24 +101,36 @@ enum generation_t {
 };
 
 extern generation_t generation_flag;
+
 extern bool gn_cadence_types_flag;
 
 /* These functions test that specific features are enabled. */
 inline bool gn_cadence_types_enabled()
 { return gn_cadence_types_flag && generation_flag==GN_VER2001X; }
 
+/* If this flag is true, then elaborate specify blocks. If this flag
+   is false, then skip elaboration of specify behavior. */
+extern bool gn_specify_blocks_flag;
+
   /* This is the string to use to invoke the preprocessor. */
 extern char*ivlpp_string;
 
 extern map<perm_string,unsigned> missing_modules;
 
+  /* Files that are library files are in this map. The lexor compares
+     file names as it processes `line directives, and if the file name
+     matches an entry in this table, it will turn on the
+     library_active_flag so that modules know that they are in a
+     library. */
+extern map<string,bool> library_file_map;
+
 /*
  * the lex_strings are perm_strings made up of tokens from the source
  * file. Identifiers are so likely to be used many times that it makes
  * much sense to use a StringHeapLex to hold them.
  */
 extern StringHeapLex lex_strings;
-
+extern StringHeap misc_strings;
 
 /*
  * system task/function listings.
@@ -143,6 +152,15 @@ extern int load_sys_func_table(const char*path);
 
 /*
  * $Log: compiler.h,v $
+ * Revision 1.33  2007/04/19 02:52:53  steve
+ *  Add support for -v flag in command file.
+ *
+ * Revision 1.32  2007/03/07 04:24:59  steve
+ *  Make integer width controllable.
+ *
+ * Revision 1.31  2006/09/28 04:35:18  steve
+ *  Support selective control of specify and xtypes features.
+ *
  * Revision 1.30  2005/07/11 16:56:50  steve
  *  Remove NetVariable and ivl_variable_t structures.
  *

config.h.in

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: config.h.in,v 1.11 2004/10/04 01:10:52 steve Exp $"
+#ident "$Id: config.h.in,v 1.12 2007/02/02 04:33:00 steve Exp $"
 #endif
 
 #if defined(__cplusplus)
@@ -37,6 +37,7 @@
 # undef HAVE_TIMES
 # undef HAVE_IOSFWD
 # undef HAVE_GETOPT_H
+# undef HAVE_INTTYPES_H
 # undef HAVE_LIBIBERTY_H
 # undef HAVE_MALLOC_H
 # undef HAVE_DLFCN_H
@@ -48,8 +49,15 @@
 # undef HAVE_SYS_WAIT_H
 # undef WORDS_BIGENDIAN
 
+#ifdef HAVE_INTTYPES_H
+# include  <inttypes.h>
+#endif
+
 /*
  * $Log: config.h.in,v $
+ * Revision 1.12  2007/02/02 04:33:00  steve
+ *  Use inttypes.h instead of stdint.h for portability.
+ *
  * Revision 1.11  2004/10/04 01:10:52  steve
  *  Clean up spurious trailing white space.
  *

configure.in

@@ -66,7 +66,7 @@ AC_TRY_LINK(
 #include <sys/times.h>
 ,{clock_t a = times(0)/sysconf(_SC_CLK_TCK);},
 do_times=yes
-AC_DEFINE(HAVE_TIMES,1),
+AC_DEFINE([HAVE_TIMES], [1], [The times system call is available in the host operating system.]),
 do_times=no
 )
 AC_MSG_RESULT($do_times)
@@ -93,7 +93,7 @@ AC_C_BIGENDIAN
 
 AX_LD_EXTRALIBS
 
-# Compiler option for position independent code, needed whan making shared objects.
+# Compiler option for position independent code, needed when making shared objects.
 # CFLAGS inherited by cadpli/Makefile?
 AX_C_PICFLAG
 
@@ -142,6 +142,6 @@ AC_SUBST(vpidir2)
 AC_MSG_RESULT(${vpidir1} ${vpidir2})
 
 # XXX disable tgt-fpga for the moment
-AC_CONFIG_SUBDIRS(vvp vpi tgt-vvp libveriuser cadpli)
+AC_CONFIG_SUBDIRS(vvp vpi tgt-stub tgt-null tgt-vvp libveriuser cadpli)
 
-AC_OUTPUT(Makefile ivlpp/Makefile driver/Makefile driver-vpi/Makefile tgt-null/Makefile tgt-stub/Makefile tgt-verilog/Makefile tgt-pal/Makefile)
+AC_OUTPUT(Makefile ivlpp/Makefile driver/Makefile driver-vpi/Makefile tgt-null/Makefile tgt-verilog/Makefile tgt-pal/Makefile)

cprop.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: cprop.cc,v 1.54 2005/07/15 19:22:52 steve Exp $"
+#ident "$Id: cprop.cc,v 1.56 2007/03/07 00:38:15 steve Exp $"
 #endif
 
 # include "config.h"
@@ -215,7 +215,9 @@ void cprop_functor::lpm_ff(Design*des, NetFF*obj)
 
 void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 {
+#if 0
       NetScope*scope = obj->scope();
+#endif
 
       switch (obj->type()) {
 #if 0
@@ -738,6 +740,48 @@ v		}
       }
 }
 
+static void replace_with_bufif(Design*des, NetMux*obj, NetLogic::TYPE type)
+{
+      NetScope*scope = obj->scope();
+      NetLogic*tmp = new NetLogic(obj->scope(),
+				  scope->local_symbol(),
+				  3, type, obj->width());
+
+      des->add_node(tmp);
+
+      connect(obj->pin_Result(), tmp->pin(0));
+      connect(obj->pin_Data(type==NetLogic::BUFIF0? 0 : 1),  tmp->pin(1));
+
+      if (obj->width() == 1) {
+	      /* Special case that the expression is 1 bit
+		 wide. Connect the select directly to the enable. */
+	    connect(obj->pin_Sel(), tmp->pin(2));
+
+      } else {
+	      /* General case that the expression is arbitrarily
+		 wide. Replicate the enable signal (which we
+		 assume is 1 bit wide) to match the expression,
+		 and connect the enable vector to the enable
+		 input of the gate. */
+	    NetReplicate*rtmp = new NetReplicate(scope,
+						 scope->local_symbol(),
+						 obj->width(),
+						 obj->width());
+	    des->add_node(rtmp);
+
+	    connect(obj->pin_Sel(), rtmp->pin(1));
+	    connect(tmp->pin(2), rtmp->pin(0));
+
+	    NetNet*rsig = new NetNet(scope, scope->local_symbol(),
+				     NetNet::WIRE, obj->width());
+	    rsig->local_flag(true);
+	    rsig->data_type(IVL_VT_LOGIC);
+	    connect(tmp->pin(2), rsig->pin(0));
+      }
+
+      delete obj;
+}
+
 /*
  * This detects the case where the mux selects between a value and
  * Vz. In this case, replace the device with a bufif with the sel
@@ -764,47 +808,8 @@ void cprop_functor::lpm_mux(Design*des, NetMux*obj)
       }
 
       if (flag) {
-	    NetScope*scope = obj->scope();
-	    NetLogic*tmp = new NetLogic(obj->scope(),
-					scope->local_symbol(),
-					3, NetLogic::BUFIF1, obj->width());
-
-	    des->add_node(tmp);
-
-	    connect(obj->pin_Result(), tmp->pin(0));
-	    connect(obj->pin_Data(1),  tmp->pin(1));
-
-	    if (obj->width() == 1) {
-		    /* Special case that the expression is 1 bit
-		       wide. Connect the select directly to the
-		       enable. */
-		  connect(obj->pin_Sel(), tmp->pin(2));
-
-	    } else {
-		    /* General case that the expression is arbitrarily
-		       wide. Replicate the enable signal (which we
-		       assume is 1 bit wide) to match the expression,
-		       and connect the enable vector to the enable
-		       input of the gate. */
-		  NetReplicate*rtmp = new NetReplicate(scope,
-						       scope->local_symbol(),
-						       obj->width(),
-						       obj->width());
-		  des->add_node(rtmp);
-
-
-		  connect(obj->pin_Sel(), rtmp->pin(1));
-		  connect(tmp->pin(2), rtmp->pin(0));
-
-		  NetNet*rsig = new NetNet(scope, scope->local_symbol(),
-					   NetNet::WIRE, obj->width());
-		  rsig->local_flag(true);
-		  rsig->data_type(IVL_VT_LOGIC);
-		  connect(tmp->pin(2), rsig->pin(0));
-	    }
-
+	    replace_with_bufif(des, obj, NetLogic::BUFIF1);
 	    count += 1;
-	    delete obj;
 	    return;
       }
 
@@ -821,19 +826,8 @@ void cprop_functor::lpm_mux(Design*des, NetMux*obj)
       }
 
       if (flag) {
-	    NetScope*scope = obj->scope();
-
-	    NetLogic*tmp = new NetLogic(obj->scope(),
-					scope->local_symbol(),
-					3, NetLogic::BUFIF0, obj->width());
-
-	    connect(obj->pin_Result(), tmp->pin(0));
-	    connect(obj->pin_Data(0),  tmp->pin(1));
-	    connect(obj->pin_Sel(),    tmp->pin(2));
-	    des->add_node(tmp);
-
+	    replace_with_bufif(des, obj, NetLogic::BUFIF0);
 	    count += 1;
-	    delete obj;
 	    return;
       }
 }
@@ -956,6 +950,12 @@ void cprop(Design*des)
 
 /*
  * $Log: cprop.cc,v $
+ * Revision 1.56  2007/03/07 00:38:15  steve
+ *  Lint fixes.
+ *
+ * Revision 1.55  2006/05/24 04:32:57  steve
+ *  Fix handling of ternary-to-bufif0 constant propagation.
+ *
  * Revision 1.54  2005/07/15 19:22:52  steve
  *  bufif enable is LOGIC.
  *

design_dump.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: design_dump.cc,v 1.163 2005/08/27 04:32:08 steve Exp $"
+#ident "$Id: design_dump.cc,v 1.176 2007/06/02 03:42:12 steve Exp $"
 #endif
 
 # include "config.h"
@@ -29,7 +29,8 @@
 # include  <iostream>
 # include  <iomanip>
 # include  "netlist.h"
-
+# include  "compiler.h"
+# include  "ivl_assert.h"
 
 static ostream& operator<< (ostream&o, NetBlock::Type t)
 {
@@ -90,11 +91,52 @@ ostream& operator << (ostream&o, ivl_variable_type_t val)
       return o;
 }
 
+static inline void dump_scope_path(ostream&o, const NetScope*scope)
+{
+      if (const NetScope*parent = scope->parent()) {
+	    dump_scope_path(o, parent);
+	    o << ".";
+      }
+      const hname_t name = scope->fullname();
+      o << name.peek_name();
+      if (name.has_number())
+	    o << "[" << name.peek_number() << "]";
+}
+
+ostream& operator <<(ostream&o, struct __ScopePathManip marg)
+{
+      if (marg.scope != 0)
+	    dump_scope_path(o, marg.scope);
+      return o;
+}
+
+void NetDelaySrc::dump(ostream&o, unsigned ind) const
+{
+      o << setw(ind) << "" << "specify delay";
+      if (posedge_) o << " posedge";
+      if (negedge_) o << " negedge";
+      o << " src "
+	<< "(" << transition_delays_[IVL_PE_01]
+	<< "," << transition_delays_[IVL_PE_10]
+	<< "," << transition_delays_[IVL_PE_0z]
+	<< "/" << transition_delays_[IVL_PE_z1]
+	<< "," << transition_delays_[IVL_PE_1z]
+	<< "," << transition_delays_[IVL_PE_z0]
+	<< "/" << transition_delays_[IVL_PE_0x]
+	<< "," << transition_delays_[IVL_PE_x1]
+	<< "," << transition_delays_[IVL_PE_1x]
+	<< "/" << transition_delays_[IVL_PE_x0]
+	<< "," << transition_delays_[IVL_PE_xz]
+	<< "," << transition_delays_[IVL_PE_zx]
+	<< "): " << endl;
+      dump_node_pins(o, ind+4);
+}
+
 /* Dump a net. This can be a wire or register. */
 void NetNet::dump_net(ostream&o, unsigned ind) const
 {
-      o << setw(ind) << "" << type() << ": " << name() << "[" <<
-	    pin_count() << "]";
+      o << setw(ind) << "" << type() << ": " << name()
+	<< "[" << s0_ << ":" << e0_ << " count=" << pin_count() << "]";
       if (local_flag_)
 	    o << " (local)";
       o << " " << data_type_;
@@ -118,7 +160,7 @@ void NetNet::dump_net(ostream&o, unsigned ind) const
       }
       o << " (eref=" << peek_eref() << ", lref=" << peek_lref() << ")";
       if (scope())
-	    o << " scope=" << scope()->name();
+	    o << " scope=" << scope_path(scope());
       o << " #(" << rise_time() << "," << fall_time() << ","
 	<<  decay_time() << ") vector_width=" << vector_width()
 	<< " pin_count=" << pin_count()
@@ -139,16 +181,15 @@ void NetNet::dump_net(ostream&o, unsigned ind) const
 	    o << setw(ind+4) << "" << "[" << idx << "]: " << nex
 	      << " " << nex->name() << endl;
       }
+
+      for (unsigned idx = 0 ;  idx < delay_paths_.size() ;  idx += 1) {
+	    const NetDelaySrc*cur = delay_paths_[idx];
+	    cur->dump(o, ind+4);
+      }
+
       dump_obj_attr(o, ind+4);
 }
 
-void NetMemory::dump(ostream&o, unsigned ind) const
-{
-      o << setw(ind) << ""  << name_ << "[" << width_ << "] " <<
-	    "[" << idxh_ << ":" << idxl_ << "]" << endl;
-}
-
-
 /* Dump a NetNode and its pins. Dump what I know about the netnode on
    the first line, then list all the pins, with the name of the
    connected signal. */
@@ -214,6 +255,15 @@ void NetAddSub::dump_node(ostream&o, unsigned ind) const
       dump_obj_attr(o, ind+4);
 }
 
+void NetArrayDq::dump_node(ostream&o, unsigned ind) const
+{
+      o << setw(ind) << "" << "NetArrayDq: " << name()
+	<< " array=" << mem_->name()
+	<< endl;
+      dump_node_pins(o, ind+4);
+      dump_obj_attr(o, ind+4);
+}
+
 void NetCLShift::dump_node(ostream&o, unsigned ind) const
 {
       o << setw(ind) << "" << "Combinatorial shift (NetCLShift): " <<
@@ -233,7 +283,7 @@ void NetConcat::dump_node(ostream&o, unsigned ind) const
 {
       o << setw(ind) << "" << "NetConcat: "
 	<< name()
-	<< " scope=" << (scope()? scope()->name() : "")
+	<< " scope=" << scope_path(scope())
 	<< " width=" << width_ << endl;
       dump_node_pins(o, ind+4);
       dump_obj_attr(o, ind+4);
@@ -257,7 +307,7 @@ void NetMux::dump_node(ostream&o, unsigned ind) const
 {
       o << setw(ind) << "" << "Multiplexer (NetMux): " << name()
 	<< " width=" << width_ << " swidth=" << swidth_ << " size=" << size_
-	<< " scope=" << scope()->name() << endl;
+	<< " scope=" << scope_path(scope()) << endl;
       dump_node_pins(o, ind+4);
       dump_obj_attr(o, ind+4);
 }
@@ -265,7 +315,7 @@ void NetMux::dump_node(ostream&o, unsigned ind) const
 void NetBUFZ::dump_node(ostream&o, unsigned ind) const
 {
       o << setw(ind) << "" << "NetBUFZ: " << name()
-	<< " scope=" << (scope()? scope()->name() : "")
+	<< " scope=" << scope_path(scope())
 	<< " delay=(" << rise_time() << "," << fall_time() << "," <<
 	    decay_time() << ") width=" << width() << endl;
       dump_node_pins(o, ind+4);
@@ -293,7 +343,7 @@ void NetConst::dump_node(ostream&o, unsigned ind) const
 void NetFF::dump_node(ostream&o, unsigned ind) const
 {
       o << setw(ind) << "" << "LPM_FF: " << name()
-	<< " scope=" << (scope()? scope()->name() : "")
+	<< " scope=" << scope_path(scope())
 	<< " aset_value=" << aset_value_ << endl;
 
       dump_node_pins(o, ind+4);
@@ -368,7 +418,7 @@ void NetLogic::dump_node(ostream&o, unsigned ind) const
       }
       o << " #(" << rise_time()
 	<< "," << fall_time() << "," << decay_time() << ") " << name()
-	<< " scope=" << (scope()? scope()->name() : "")
+	<< " scope=" << scope_path(scope())
 	<< endl;
 
       dump_node_pins(o, ind+4);
@@ -402,14 +452,6 @@ void NetPartSelect::dump_node(ostream&o, unsigned ind) const
       dump_obj_attr(o, ind+4);
 }
 
-void NetRamDq::dump_node(ostream&o, unsigned ind) const
-{
-      o << setw(ind) << "" << "LPM_RAM_DQ (" << mem_->name() << "): "
-	<< name() << endl;
-      dump_node_pins(o, ind+4);
-      dump_obj_attr(o, ind+4);
-}
-
 void NetReplicate::dump_node(ostream&o, unsigned ind) const
 {
       o << setw(ind) << "" << "NetReplicate: "
@@ -455,16 +497,23 @@ void NetUReduce::dump_node(ostream&o, unsigned ind) const
       }
       o << " #(" << rise_time()
 	<< "," << fall_time() << "," << decay_time() << ") " << name()
-	<< " scope=" << (scope()? scope()->name() : "")
+	<< " scope=" << scope_path(scope())
 	<< endl;
 
       dump_node_pins(o, ind+4);
       dump_obj_attr(o, ind+4);
 }
 
+void NetSysFunc::dump_node(ostream&o, unsigned ind) const
+{
+      o << setw(ind) << "" << def_->name << "(...)" << endl;
+      dump_node_pins(o, ind+4);
+      dump_obj_attr(o, ind+4);
+}
+
 void NetUserFunc::dump_node(ostream&o, unsigned ind) const
 {
-      o << setw(ind) << "" << def_->name() << "(";
+      o << setw(ind) << "" << scope_path(def_) << "(";
       o << ")" << endl;
       dump_node_pins(o, ind+4);
       dump_obj_attr(o, ind+4);
@@ -472,7 +521,7 @@ void NetUserFunc::dump_node(ostream&o, unsigned ind) const
 
 void NetTaskDef::dump(ostream&o, unsigned ind) const
 {
-      o << setw(ind) << "" << "task " << name_ << ";" << endl;
+      o << setw(ind) << "" << "task " << scope_path(scope_) << ";" << endl;
 
       for (unsigned idx = 0 ;  idx < ports_.count() ;  idx += 1) {
 	    o << setw(ind+4) << "";
@@ -514,11 +563,11 @@ void NetProcTop::dump(ostream&o, unsigned ind) const
       switch (type_) {
 	  case NetProcTop::KINITIAL:
 	    o << "initial  /* " << get_line() << " in "
-	      << scope_->name() << " */" << endl;
+	      << scope_path(scope_) << " */" << endl;
 	    break;
 	  case NetProcTop::KALWAYS:
 	    o << "always  /* " << get_line() << " in "
-	      << scope_->name() << " */" << endl;
+	      << scope_path(scope_) << " */" << endl;
 	    break;
       }
 
@@ -534,20 +583,12 @@ void NetAssign_::dump_lval(ostream&o) const
 {
       if (sig_) {
 	    o << sig_->name();
-	    if (bmux_) {
-		  o << "[" << *bmux_ << "]";
-
-	    } else {
-		  o << "[" << (loff_+lwid_-1) << ":" << loff_ << "]";
+	    if (word_) {
+		  o << "[word=" << *word_ << "]";
+	    }
+	    if (base_) {
+		  o << "[" << *base_ << " +: " << lwid_ << "]";
 	    }
-      } else if (mem_) {
-	    // Is there an obvious way to flag memories in the dump
-	    // as different from the _real_ bit mux case?
-	    // o << "**memory**";
-	    o << mem_->name() << "[";
-	    if (bmux_) o << *bmux_;
-	      else     o << "**oops**";
-	    o << "]";
       } else {
 	    o << "";
       }
@@ -608,7 +649,7 @@ void NetBlock::dump(ostream&o, unsigned ind) const
 {
       o << setw(ind) << "" << type_;
       if (subscope_)
-	    o << " : " << subscope_->name();
+	    o << " : " << scope_path(subscope_);
       o << endl;
 
       if (last_) {
@@ -685,7 +726,7 @@ void NetDeassign::dump(ostream&o, unsigned ind) const
 
 void NetDisable::dump(ostream&o, unsigned ind) const
 {
-      o << setw(ind) << "" << "disable " << target_->name() << "; "
+      o << setw(ind) << "" << "disable " << scope_path(target_) << "; "
 	<< "/* " << get_line() << " */" << endl;
 }
 
@@ -704,7 +745,7 @@ void NetEvProbe::dump_node(ostream&o, unsigned ind) const
 	    o << "negedge ";
 	    break;
       }
-      o << setw(ind) << "" << "-> " << event_->full_name() << "; " << endl;
+      o << setw(ind) << "" << "-> " << event_->name() << "; " << endl;
       dump_node_pins(o, ind+4);
       dump_obj_attr(o, ind+4);
 }
@@ -717,11 +758,13 @@ void NetEvTrig::dump(ostream&o, unsigned ind) const
 
 void NetEvWait::dump(ostream&o, unsigned ind) const
 {
-      assert(nevents() > 0);
-      o << setw(ind) <<"" << "@(" << event(0)->full_name();
+      o << setw(ind) <<"" << "@(";
+
+      if (nevents() > 0)
+	    o << event(0)->name();
 
       for (unsigned idx = 1 ;  idx < nevents() ;  idx += 1)
-	    o << " or " << event(idx)->full_name();
+	    o << " or " << event(idx)->name();
 
       o << ")  // " << get_line() << endl;
 
@@ -746,7 +789,7 @@ void NetForever::dump(ostream&o, unsigned ind) const
 
 void NetFuncDef::dump(ostream&o, unsigned ind) const
 {
-      o << setw(ind) << "" << "function " << scope_->name() << endl;
+      o << setw(ind) << "" << "function " << scope_path(scope_) << endl;
       if (result_sig_)
 	    o << setw(ind+2) << "" << "Return signal: "
 	      << result_sig_->name() << endl;
@@ -789,7 +832,7 @@ void NetRepeat::dump(ostream&o, unsigned ind) const
 void NetScope::dump(ostream&o) const
 {
 	/* This is a constructed hierarchical name. */
-      o << name();
+      o << scope_path(this);
 
       switch (type_) {
 	  case BEGIN_END:
@@ -807,6 +850,9 @@ void NetScope::dump(ostream&o) const
 	  case TASK:
 	    o << " task";
 	    break;
+	  case GENBLOCK:
+	    o << " generate block";
+	    break;
       }
       o << endl;
 
@@ -844,7 +890,7 @@ void NetScope::dump(ostream&o) const
 
 	/* Dump the saved defparam assignments here. */
       {
-	    map<hname_t,NetExpr*>::const_iterator pp;
+	    map<pform_name_t,NetExpr*>::const_iterator pp;
 	    for (pp = defparams.begin()
 		       ; pp != defparams.end() ;  pp ++ ) {
 		  o << "    defparam " << (*pp).first << " = " <<
@@ -855,7 +901,8 @@ void NetScope::dump(ostream&o) const
 	/* Dump the events in this scope. */
       for (NetEvent*cur = events_ ;  cur ;  cur = cur->snext_) {
 	    o << "    event " << cur->name() << "; nprobe="
-	      << cur->nprobe() << " // " << cur->get_line() << endl;
+	      << cur->nprobe() << " scope=" << scope_path(cur->scope())
+	      << " // " << cur->get_line() << endl;
       }
 
 	// Dump the signals,
@@ -867,13 +914,25 @@ void NetScope::dump(ostream&o) const
 	    } while (cur != signals_->sig_next_);
       }
 
-	// Dump the memories,
-      if (memories_) {
-	    NetMemory*cur = memories_->snext_;
-	    do {
-		  cur->dump(o, 4);
-		  cur = cur->snext_;
-	    } while (cur != memories_->snext_);
+	// Dump specparams
+      typedef map<perm_string,spec_val_t>::const_iterator specparam_it_t;
+      for (specparam_it_t cur = specparams.begin()
+		 ; cur != specparams.end() ;  cur ++ ) {
+	    o << "    specparam " << (*cur).first
+	      << " = ";
+	    spec_val_t value = (*cur).second;
+	    switch (value.type) {
+		case IVL_VT_REAL:
+		  o << "R:" << value.real_val;
+		  break;
+		case IVL_VT_BOOL:
+		  o << "I:" << value.integer;
+		  break;
+		default:
+		  o << "<bad type>";
+		  break;
+	    }
+	    o << endl;
       }
 
       switch (type_) {
@@ -917,7 +976,7 @@ void NetSTask::dump(ostream&o, unsigned ind) const
 
 void NetUTask::dump(ostream&o, unsigned ind) const
 {
-      o << setw(ind) << "" << task_->name() << ";" << endl;
+      o << setw(ind) << "" << scope_path(task_) << ";" << endl;
 }
 
 void NetWhile::dump(ostream&o, unsigned ind) const
@@ -977,6 +1036,9 @@ void NetEBinary::dump(ostream&o) const
 	  case 'O':
 	    o << "~|";
 	    break;
+	  case 'p':
+	    o << "**";
+	    break;
 	  case 'r':
 	    o << ">>";
 	    break;
@@ -1049,7 +1111,7 @@ void NetEEvent::dump(ostream&o) const
 
 void NetEScope::dump(ostream&o) const
 {
-      o << "<scope=" << scope_->name() << ">";
+      o << "<scope=" << scope_path(scope_) << ">";
 }
 
 void NetESelect::dump(ostream&o) const
@@ -1085,22 +1147,19 @@ void NetESignal::dump(ostream&o) const
 {
       if (has_sign())
 	    o << "+";
-      o << name() << "[" << msi()<<":"<<lsi() << "]";
-}
-
-void NetEMemory::dump(ostream&o) const
-{
-      o << mem_->name() << "[";
-      if (idx_) idx_->dump(o);
-      o << "]";
+      o << name();
+      if (word_) o << "[word=" << *word_ << "]";
+      o << "[" << msi()<<":"<<lsi() << "]";
 }
 
 void NetEParam::dump(ostream&o) const
 {
       if (scope_ != 0)
-	    o << "<" << scope_->name() << "." << name_ << ">";
-      else
+	    o << "<" << scope_path(scope_) << "." << name_ << ">";
+      else if (name_)
 	    o << "<" << name_ << ">";
+      else
+	    o << "<" "???" ">";
 }
 
 void NetETernary::dump(ostream&o) const
@@ -1111,7 +1170,7 @@ void NetETernary::dump(ostream&o) const
 
 void NetEUFunc::dump(ostream&o) const
 {
-      o << name() << "(";
+      o << func_->basename() << "(";
       if (parms_.count() > 0) {
 	    parms_[0]->dump(o);
 	    for (unsigned idx = 1 ;  idx < parms_.count() ;  idx += 1) {
@@ -1166,6 +1225,49 @@ void Design::dump(ostream&o) const
 
 /*
  * $Log: design_dump.cc,v $
+ * Revision 1.176  2007/06/02 03:42:12  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.175  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.174  2007/03/02 06:13:22  steve
+ *  Add support for edge sensitive spec paths.
+ *
+ * Revision 1.173  2007/02/01 03:14:33  steve
+ *  Detect and report arrays without index in net contexts.
+ *
+ * Revision 1.172  2007/01/16 05:44:14  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
+ *
+ * Revision 1.171  2006/10/30 05:44:49  steve
+ *  Expression widths with unsized literals are pseudo-infinite width.
+ *
+ * Revision 1.170  2006/10/03 05:06:00  steve
+ *  Support real valued specify delays, properly scaled.
+ *
+ * Revision 1.169  2006/09/26 19:48:40  steve
+ *  Missing PSpec.cc file.
+ *
+ * Revision 1.168  2006/09/23 04:57:19  steve
+ *  Basic support for specify timing.
+ *
+ * Revision 1.167  2006/07/31 03:50:17  steve
+ *  Add support for power in constant expressions.
+ *
+ * Revision 1.166  2006/06/18 04:15:50  steve
+ *  Add support for system functions in continuous assignments.
+ *
+ * Revision 1.165  2006/04/10 00:37:42  steve
+ *  Add support for generate loops w/ wires and gates.
+ *
+ * Revision 1.164  2006/02/02 02:43:57  steve
+ *  Allow part selects of memory words in l-values.
+ *
  * Revision 1.163  2005/08/27 04:32:08  steve
  *  Handle synthesis of fully packed case statements.
  *

driver-vpi/main.c

@@ -277,6 +277,7 @@ static int parse(int argc, char *argv[])
 
 	char dot_c_ext[]    = ".c";
 	char dot_cc_ext[]   = ".cc";
+	char dot_cpp_ext[]  = ".cpp";
 	char dot_o_ext[]    = ".o";
 	char name_option[]  = "--name=";
 	char lib_option[]   = "-l";
@@ -301,6 +302,13 @@ static int parse(int argc, char *argv[])
 			if (!*gstr.pOUT)
 			   assignn(&gstr.pOUT,argv[idx],strlen(argv[idx])-strlen(dot_cc_ext));
 		}
+		else if (endsIn(dot_cpp_ext,argv[idx])) {		/* check for C++ source files */
+			++srcFileCnt;
+			append(&gstr.pCXSRC,argv[idx]);
+			append(&gstr.pCXSRC," ");
+			if (!*gstr.pOUT)
+			   assignn(&gstr.pOUT,argv[idx],strlen(argv[idx])-strlen(dot_cpp_ext));
+		}
 		else if (endsIn(dot_o_ext,argv[idx])) {			/* check for compiled object files */
 			++srcFileCnt;
 			append(&gstr.pOBJ,argv[idx]);

driver/Makefile.in

@@ -16,7 +16,7 @@
 #    59 Temple Place - Suite 330
 #    Boston, MA 02111-1307, USA
 #
-#ident "$Id: Makefile.in,v 1.24 2004/10/13 22:01:34 steve Exp $"
+#ident "$Id: Makefile.in,v 1.26 2007/02/06 05:07:31 steve Exp $"
 #
 #
 SHELL = /bin/sh
@@ -50,7 +50,7 @@ all: iverilog@EXEEXT@
 clean:
 	rm -f *.o lexor.c parse.c parse.h parse.output
 	rm -f cflexor.c cfparse.c cfparse.h cfparse.output
-	rm -f iverilog@EXEEXT@
+	rm -f iverilog@EXEEXT@ iverilog.pdf iverilog.ps
 
 distclean: clean
 	rm -f Makefile
@@ -80,7 +80,7 @@ iverilog.ps: $(srcdir)/iverilog.man
 iverilog.pdf: iverilog.ps
 	ps2pdf iverilog.ps iverilog.pdf
 
-ifeq (@WIN32@,yes)
+ifeq (@MING32@,yes)
 INSTALL_DOC = $(prefix)/iverilog.pdf $(mandir)/man1/iverilog.1
 INSTALL_DOCDIR = $(mandir)/man1
 all: iverilog.pdf
@@ -105,4 +105,4 @@ installdirs: ../mkinstalldirs
 
 uninstall:
 	rm -f $(bindir)/iverilog@EXEEXT@
-	rm -f $(mandir)/man1/iverilog.1
+	rm -f $(mandir)/man1/iverilog.1 $(prefix)/iverilog.pdf

driver/cflexor.lex

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: cflexor.lex,v 1.8 2004/10/04 01:10:56 steve Exp $"
+#ident "$Id: cflexor.lex,v 1.11 2007/03/22 16:08:18 steve Exp $"
 #endif
 
 # include  "cfparse.h"
@@ -37,12 +37,14 @@
 YYLTYPE yylloc;
 
 static int comment_enter;
+ static char* trim_trailing_white(char*txt, int trim);
 
 %}
 
 %x CCOMMENT
 %x LCOMMENT
 %x PLUS_ARGS
+%x FILE_NAME
 
 %%
 
@@ -76,6 +78,7 @@ static int comment_enter;
 
 "+libext+" { BEGIN(PLUS_ARGS); return TOK_LIBEXT; }
 
+"+integer-width+" { BEGIN(PLUS_ARGS); return TOK_INTEGER_WIDTH; }
 
   /* If it is not any known plus-flag, return the generic form. */
 "+"[^\n \t\b\f\r+]* {
@@ -112,17 +115,50 @@ static int comment_enter;
   /* This rule matches paths and strings that may be file names. This
      is a little bit tricky, as we don't want to mistake a comment for
      a string word. */
-"/"[^\*\/].* { cflval.text = strdup(yytext);
-               return TOK_STRING; }
-
-[^/\n \t\b\r+-].* { cflval.text = strdup(yytext);
-                   return TOK_STRING; }
+"/"[\r\n] { /* Special case of file name "/" */
+      cflval.text = trim_trailing_white(yytext, 0);
+      return TOK_STRING; }
+"/"[^\*\/] { /* A file name that starts with "/". */
+      yymore();
+      BEGIN(FILE_NAME); }
+[^/\n \t\b\r+-][^/\n\r]* { /* A file name that starts with other than "/" */
+      yymore();
+      BEGIN(FILE_NAME); }
 
+<FILE_NAME>"//" {
+	/* Found a trailing comment. Returning the terminated name. */
+      cflval.text = trim_trailing_white(yytext, 2);
+      BEGIN(LCOMMENT);
+      return TOK_STRING; }
+<FILE_NAME>"/"?[^/\n\r]* {
+      yymore();
+      /* not a comment... continuing */; }
+<FILE_NAME>[\n\r] {
+	/* No trailing comment. Return the file name. */
+      cflval.text = trim_trailing_white(yytext, 0);
+      BEGIN(0);
+      return TOK_STRING; }
+       
   /* Fallback match. */
 . { return yytext[0]; }
 
 %%
 
+static char* trim_trailing_white(char*text, int trim)
+{
+      char*cp = text + strlen(text);
+      while (cp > text && trim > 0) {
+	    trim -= 1;
+	    cp -= 1;
+	    *cp = 0;
+      }
+      while (cp > text && strchr("\n\r\t\b", cp[-1]))
+	    cp -= 1;
+
+      cp[0] = 0;
+      return strdup(text);
+}
+
 int yywrap()
 {
       return 1;

driver/cfparse.y

@@ -18,7 +18,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: cfparse.y,v 1.10 2003/09/26 21:25:58 steve Exp $"
+#ident "$Id: cfparse.y,v 1.12 2007/04/19 02:52:53 steve Exp $"
 #endif
 
 
@@ -62,6 +62,7 @@ static void translate_file_name(char*text)
 
 %token TOK_Da TOK_Dv TOK_Dy
 %token TOK_DEFINE TOK_INCDIR TOK_LIBDIR TOK_LIBDIR_NOCASE TOK_LIBEXT
+%token TOK_INTEGER_WIDTH
 %token <text> TOK_PLUSARG TOK_PLUSWORD TOK_STRING
 
 %%
@@ -83,7 +84,7 @@ item
 	: TOK_STRING
 		{ char*tmp = substitutions($1);
 		  translate_file_name(tmp);
-		  process_file_name(tmp);
+		  process_file_name(tmp, 0);
 		  free($1);
 		  free(tmp);
 		}
@@ -98,9 +99,7 @@ item
         | TOK_Dv TOK_STRING
 		{ char*tmp = substitutions($2);
 		  translate_file_name(tmp);
-		  process_file_name(tmp);
-		  fprintf(stderr, "%s:%u: Ignoring -v in front of %s\n",
-			  @1.text, @1.first_line, $2);
+		  process_file_name(tmp, 1);
 		  free($2);
 		  free(tmp);
 		}
@@ -145,6 +144,15 @@ item
 
 	| TOK_LIBEXT libext_args
 
+  /* These are various misc flags that are supported. */
+
+	| TOK_INTEGER_WIDTH TOK_PLUSARG
+                { char*tmp = substitutions($2);
+		  free($2);
+		  integer_width = strtoul(tmp,0,10);
+		  free(tmp);
+		}
+
   /* The +<word> tokens that are not otherwise matched, are
      ignored. The skip_args rule arranges for all the argument words
      to be consumed. */

driver/globals.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: globals.h,v 1.19 2003/11/18 06:31:46 steve Exp $"
+#ident "$Id: globals.h,v 1.21 2007/04/19 02:52:53 steve Exp $"
 #endif
 
 # include  <stddef.h>
@@ -49,11 +49,14 @@ extern int synth_flag;
   /* This is the name of the selected target. */
 extern const char*targ;
 
+  /* This is the integer-width argument that will be passed to ivl. */
+extern unsigned integer_width;
+
   /* Perform variable substitutions on the string. */
 extern char* substitutions(const char*str);
 
   /* Add the name to the list of source files. */
-extern void process_file_name(const char*name);
+extern void process_file_name(const char*name, int lib_flag);
 
   /* Add the name to the list of library directories. */
 extern void process_library_switch(const char*name);
@@ -77,6 +80,12 @@ extern char* library_flags2;
 
 /*
  * $Log: globals.h,v $
+ * Revision 1.21  2007/04/19 02:52:53  steve
+ *  Add support for -v flag in command file.
+ *
+ * Revision 1.20  2007/03/07 04:24:59  steve
+ *  Make integer width controllable.
+ *
  * Revision 1.19  2003/11/18 06:31:46  steve
  *  Remove the iverilog.conf file.
  *

driver/iverilog.man

@@ -1,10 +1,10 @@
-.TH iverilog 1 "$Date: 2005/06/28 04:25:55 $" Version "$Date: 2005/06/28 04:25:55 $"
+.TH iverilog 1 "$Date: 2007/06/05 01:56:12 $" Version "$Date: 2007/06/05 01:56:12 $"
 .SH NAME
 iverilog - Icarus Verilog compiler
 
 .SH SYNOPSIS
 .B iverilog
-[-ESVv] [-Bpath] [-ccmdfile] [-g1|-g2|-g2x] [-Dmacro[=defn]] [-pflag=value]
+[-ESVv] [-Bpath] [-ccmdfile] [-g1|-g2|-g2x|-gspecify-gxtypes] [-Dmacro[=defn]] [-pflag=value]
 [-Iincludedir] [-mmodule] [-Mfile] [-Nfile] [-ooutputfilename]
 [-stopmodule] [-ttype] [-Tmin/typ/max] [-Wclass] [-ypath] sourcefile
 
@@ -57,6 +57,21 @@ language. This flag is most useful to restrict the language to a set
 supported by tools of specific generations, for compatibility with
 other tools.
 .TP 8
+.B -gspecify\fI|\fP-gno-specify
+Enable (default) or disable specify block support. When enabled,
+specify block code is elaborated. When disabled, specify blocks are
+parsed but ignored. Specify blocks are commonly not needed for RTL
+simulation, and in fact can hurt performance of the
+simulation. However, disabling specify blocks reduces accuracy of
+full-timing simulations.
+.TP 8
+.B -gxtypes\fI|\fP-gno-xtypes
+Enable (default) or disable support for extended types. Enabling
+extended types allows for new types that are supported by Icarus
+Verilog as extensions beyond the baseline Verilog. It may be necessary
+to disable extended types if compiling code that clashes with the few
+new keywords used to implement the type system.
+.TP 8
 .B -I\fIincludedir\fP
 Append directory \fIincludedir\fP to list of directories searched
 for Verilog include files. The \fB-I\fP switch may be used many times
@@ -74,6 +89,8 @@ leading or trailing space.
 Add this module to the list of VPI modules to be loaded by the
 simulation. Many modules can be specified, and all will be loaded, in
 the order specified. The system module is implicit and always included.
+If a System Function Table file (<module>.sft) exists for the module it
+will be loaded automatically.
 .TP 8
 .B -N\fIpath\fP
 This is used for debugging the compiler proper. Dump the final netlist
@@ -184,7 +201,7 @@ implies the synthesis \fB-S\fP flag.
 
 .SH "WARNING TYPES"
 These are the types of warnings that can be selected by the \fB-W\fP
-switch. All the warning types (other then \fBall\fP) can also be
+switch. All the warning types (other than \fBall\fP) can also be
 prefixed with \fBno-\fP to turn off that warning. This is most useful
 after a \fB-Wall\fP argument to suppress isolated warning types.
 
@@ -249,7 +266,7 @@ well as # comments, if the # starts the line.
 .I "file name"
 A simple file name or file path is taken to be the name of a Verilog
 source file. The path starts with the first non-white-space
-character. Variables are substitued in file names.
+character. Variables are substituted in file names.
 
 .TP 8
 .B -y\ \fIlibdir\fP
@@ -304,13 +321,19 @@ become munged.
 .B +tolower-filename\fP
 This is similar to the \fB+toupper-filename\fP hack described above.
 
+.TP 8
+.B +integer-width+\fIvalue\fP
+This allows the programmer to select the width for integer variables
+in the Verilog source. The default is 32, the value can be any desired
+integer value.
+
 .SH "VARIABLES IN COMMAND FILES"
 
 In certain cases, iverilog supports variables in command files. These
 are strings of the form "$(\fIvarname\fP)", where \fIvarname\fP is the
 name of the environment variable to read. The entire string is
 replaced with the contents of that variable. Variables are only
-substitued in contexts that explicitly support them, including file
+substituted in contexts that explicitly support them, including file
 and directory strings.
 
 Variable values come from the operating system environment, and not

driver/main.c

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: main.c,v 1.67 2005/07/14 23:38:44 steve Exp $"
+#ident "$Id: main.c,v 1.76 2007/06/05 01:56:12 steve Exp $"
 #endif
 
 # include "config.h"
@@ -108,11 +108,13 @@ const char*targ  = "vvp";
 const char*depfile = 0;
 
 const char*generation = "2x";
+const char*gen_specify = "specify";
+const char*gen_xtypes = "xtypes";
 
 char warning_flags[16] = "";
 
-char*inc_list = 0;
-char*def_list = 0;
+unsigned integer_width = 32;
+
 char*mod_list = 0;
 char*command_filename = 0;
 
@@ -123,6 +125,9 @@ char*source_path = 0;
 FILE*source_file = 0;
 unsigned source_count = 0;
 
+char*defines_path = 0;
+FILE*defines_file = 0;
+
 char*iconfig_path = 0;
 FILE*iconfig_file = 0;
 
@@ -131,7 +136,6 @@ char*iconfig_common_path = iconfig_common_path_buf;
 
 int synth_flag = 0;
 int verbose_flag = 0;
-int command_file = 0;
 
 FILE *fp;
 
@@ -140,6 +144,48 @@ char tmp[MAXSIZE];
 
 static char ivl_root[MAXSIZE];
 
+/* Structure to keep a FIFO list of the command files */
+typedef struct t_command_file {
+      char *filename;
+      struct t_command_file *next;
+} s_command_file, *p_command_file;
+p_command_file cmd_file_head = NULL;  /* The FIFO head */
+p_command_file cmd_file_tail = NULL;  /* The FIFO tail */
+
+/* Function to add a comamnd file name to the FIFO. */
+void add_cmd_file(const char* filename)
+{
+      p_command_file new;
+
+      new = (p_command_file) malloc(sizeof(s_command_file));
+      new->filename = strdup(filename);
+      new->next = NULL;
+      if (cmd_file_head == NULL) {
+            cmd_file_head = new;
+            cmd_file_tail = new;
+      } else {
+            cmd_file_tail->next = new;
+            cmd_file_tail = new;
+      }
+}
+
+/* Function to return the top comamnd file name from the FIFO. */
+char *get_cmd_file()
+{
+      char *filename;
+
+      if (cmd_file_head == NULL) filename = NULL;
+      else {
+            p_command_file head;
+
+            filename = cmd_file_head->filename;
+            head = cmd_file_head;
+            cmd_file_head = cmd_file_head->next;
+            free(head);
+      }
+      return filename;
+}
+
 #ifdef __MINGW32__
 # include  <io.h>
 # include  <fcntl.h>
@@ -268,9 +314,12 @@ static int t_default(char*cmd, unsigned ncmd)
 
 
       rc = system(cmd);
-      remove(source_path);
-      if ( ! getenv("IVERILOG_ICONFIG"))
+      if ( ! getenv("IVERILOG_ICONFIG")) {
+	    remove(source_path);
 	    remove(iconfig_path);
+	    remove(defines_path);
+      }
+
       if (rc != 0) {
 	    if (rc == 127) {
 		  fprintf(stderr, "Failed to execute: %s\n", cmd);
@@ -340,32 +389,12 @@ void process_library2_switch(const char *name)
 
 void process_include_dir(const char *name)
 {
-      if (inc_list == 0) {
-	    inc_list = malloc(strlen(" -I")+strlen(name)+1);
-	    strcpy(inc_list, " -I");
-	    strcat(inc_list, name);
-      } else {
-	    inc_list = realloc(inc_list, strlen(inc_list)
-			       + strlen(" -I")
-			       + strlen(name) + 1);
-	    strcat(inc_list, " -I");
-	    strcat(inc_list, name);
-      }
+      fprintf(defines_file, "I:%s\n", name);
 }
 
 void process_define(const char*name)
 {
-      if (def_list == 0) {
-	    def_list = malloc(strlen(" -D")+strlen(name)+1);
-	    strcpy(def_list, " -D");
-	    strcat(def_list, name);
-      } else {
-	    def_list = realloc(def_list, strlen(def_list)
-			       + strlen(" -D")
-			       + strlen(name) + 1);
-	    strcat(def_list, " -D");
-	    strcat(def_list, name);
-      }
+      fprintf(defines_file,"D:%s\n", name);
 }
 
 /*
@@ -374,7 +403,7 @@ void process_define(const char*name)
  * .sft suffix, and if so pass that as a sys_func file. Otherwise, it
  * is a Verilog source file to be written into the file list.
  */
-void process_file_name(const char*name)
+void process_file_name(const char*name, int lib_flag)
 {
       if (strlen(name) > 4 && strcasecmp(".sft", name+strlen(name)-4) == 0) {
 	    fprintf(iconfig_file,"sys_func:%s\n", name);
@@ -382,6 +411,8 @@ void process_file_name(const char*name)
       } else {
 	    fprintf(source_file, "%s\n", name);
 	    source_count += 1;
+	    if (lib_flag)
+		  fprintf(iconfig_file,"library_file:%s\n", name);
       }
 }
 
@@ -396,19 +427,48 @@ int process_generation(const char*name)
       else if (strcmp(name,"2x") == 0)
 	    generation = "2x";
 
+      else if (strcmp(name,"xtypes") == 0)
+	    gen_xtypes = "xtypes";
+
+       else if (strcmp(name,"no-xtypes") == 0)
+	    gen_xtypes = "no-xtypes";
+
+       else if (strcmp(name,"specify") == 0)
+	    gen_specify = "specify";
+
+       else if (strcmp(name,"no-specify") == 0)
+	    gen_specify = "no-specify";
+
       else {
 	    fprintf(stderr, "Unknown/Unsupported Language generation "
 		    "%s\n", name);
 	    fprintf(stderr, "Supported generations are:\n");
 	    fprintf(stderr, "    1   -- IEEE1364-1995 (Verilog 1)\n"
 		            "    2   -- IEEE1364-2001 (Verilog 2001)\n"
-		            "    2x  -- Verilog with extensions\n");
+		            "    2x  -- Verilog with extensions\n"
+		            "Other generation flags:\n"
+		            "    specify | no-specify\n"
+		            "    xtypes | no-xtypes\n");
 	    return 1;
       }
 
       return 0;
 }
 
+/*
+ * If it exists add the SFT file for the given module.
+ */
+void add_sft_file(const char *module)
+{
+      char *file;
+   
+      file = (char *) malloc(strlen(base)+1+strlen(module)+4+1);
+      sprintf(file, "%s%c%s.sft", base, sep, module);
+      if (access(file, R_OK) == 0)
+            fprintf(iconfig_file, "sys_func:%s\n", file);
+      free(file);
+}
+
 int main(int argc, char **argv)
 {
       char*cmd;
@@ -465,6 +525,19 @@ int main(int argc, char **argv)
 	    return 1;
       }
 
+      defines_path = strdup(my_tempfile("ivrlg2", &defines_file));
+      if (NULL == defines_file) {
+	    fprintf(stderr, "%s: Error opening temporary file %s\n",
+		    argv[0], defines_path);
+	    fprintf(stderr, "%s: Please check TMP or TMPDIR.\n", argv[0]);
+
+	    fclose(source_file);
+	    remove(source_path);
+	    return 1;
+      }
+
+      fprintf(defines_file, "D:__ICARUS__=1\n");
+
 	/* Create another temporary file for passing configuration
 	   information to ivl. */
 
@@ -485,6 +558,9 @@ int main(int argc, char **argv)
 	    fprintf(stderr, "%s: Please check TMP or TMPDIR.\n", argv[0]);
 	    fclose(source_file);
 	    remove(source_path);
+
+	    fclose(defines_file);
+	    remove(defines_path);
 	    return 1;
       }
 
@@ -503,8 +579,7 @@ int main(int argc, char **argv)
 		  }
 		  break;
  		case 'c':
-		  command_filename = malloc(strlen(optarg)+1);
- 		  strcpy(command_filename, optarg);
+		  add_cmd_file(optarg);
  		  break;
 		case 'D':
 		  process_define(optarg);
@@ -537,6 +612,7 @@ int main(int argc, char **argv)
 
 		case 'm':
 		  fprintf(iconfig_file, "module:%s\n", optarg);
+		  add_sft_file(optarg);
 		  break;
 
 		case 'N':
@@ -616,11 +692,13 @@ int main(int argc, char **argv)
 
       if (mtm != 0) fprintf(iconfig_file, "-T:%s\n", mtm);
       fprintf(iconfig_file, "generation:%s\n", generation);
+      fprintf(iconfig_file, "generation:%s\n", gen_specify);
+      fprintf(iconfig_file, "generation:%s\n", gen_xtypes);
       fprintf(iconfig_file, "warnings:%s\n", warning_flags);
       fprintf(iconfig_file, "out:%s\n", opath);
       if (depfile) fprintf(iconfig_file, "depfile:%s\n", depfile);
 
-      if (command_filename) {
+      while ( (command_filename = get_cmd_file()) ) {
 	    int rc;
 
 	    if (( fp = fopen(command_filename, "r")) == NULL ) {
@@ -636,17 +714,25 @@ int main(int argc, char **argv)
 			  command_filename);
 		  return 1;
 	    }
+            free(command_filename);
+      }
+
+      if (depfile) {
+	    fprintf(defines_file, "M:%s\n", depfile);
       }
 
 	/* Finally, process all the remaining words on the command
 	   line as file names. */
       for (idx = optind ;  idx < argc ;  idx += 1)
-	    process_file_name(argv[idx]);
+	    process_file_name(argv[idx], 0);
 
 
       fclose(source_file);
       source_file = 0;
 
+      fclose(defines_file);
+      defines_file = 0;
+
       if (source_count == 0) {
 	    fprintf(stderr, "%s: No input files.\n", argv[0]);
  	    fprintf(stderr, "%s\n", HELP);
@@ -656,33 +742,14 @@ int main(int argc, char **argv)
 
 	/* Start building the preprocess command line. */
 
-      sprintf(tmp, "%s%civlpp %s%s -D__ICARUS__=1 -f%s ", pbase,sep,
+      sprintf(tmp, "%s%civlpp %s%s -F%s -f%s ", pbase,sep,
 	      verbose_flag?" -v":"",
-	      e_flag?"":" -L", source_path);
+	      e_flag?"":" -L", defines_path, source_path);
 
       ncmd = strlen(tmp);
       cmd = malloc(ncmd + 1);
       strcpy(cmd, tmp);
 
-      if (inc_list) {
-	    cmd = realloc(cmd, ncmd + strlen(inc_list) + 1);
-	    strcat(cmd, inc_list);
-	    ncmd += strlen(inc_list);
-      }
-
-      if (def_list) {
-	    cmd = realloc(cmd, ncmd + strlen(def_list) + 1);
-	    strcat(cmd, def_list);
-	    ncmd += strlen(def_list);
-      }
-
-      if (depfile) {
-	    cmd = realloc(cmd, ncmd + strlen(depfile) + 5);
-	    strcat(cmd, " -M ");
-	    strcat(cmd, depfile);
-	    ncmd += strlen(depfile) + 4;
-      }
-
 	/* If the -E flag was given on the command line, then all we
 	   do is run the preprocessor and put the output where the
 	   user wants it. */
@@ -717,13 +784,13 @@ int main(int argc, char **argv)
 	    return 0;
       }
 
+      fprintf(iconfig_file, "iwidth:%u\n", integer_width);
+
 	/* Write the preprocessor command needed to preprocess a
 	   single file. This may be used to preprocess library
 	   files. */
-      fprintf(iconfig_file, "ivlpp:%s%civlpp -D__ICARUS__ -L %s %s\n",
-	      pbase, sep,
-	      inc_list? inc_list : "",
-	      def_list? def_list : "");
+      fprintf(iconfig_file, "ivlpp:%s%civlpp -L -F%s\n",
+	      pbase, sep, defines_path);
 
 	/* Done writing to the iconfig file. Close it now. */
       fclose(iconfig_file);
@@ -735,6 +802,33 @@ int main(int argc, char **argv)
 
 /*
  * $Log: main.c,v $
+ * Revision 1.76  2007/06/05 01:56:12  steve
+ *  Bring in .SFT file automatically if -m used.
+ *
+ * Revision 1.75  2007/04/19 02:52:53  steve
+ *  Add support for -v flag in command file.
+ *
+ * Revision 1.74  2007/04/18 03:23:38  steve
+ *  Add support for multiple command files. (Cary R.)
+ *
+ * Revision 1.73  2007/03/07 04:24:59  steve
+ *  Make integer width controllable.
+ *
+ * Revision 1.72  2006/10/02 18:15:47  steve
+ *  Fix handling of dep path in new argument passing method.
+ *
+ * Revision 1.71  2006/09/28 04:35:18  steve
+ *  Support selective control of specify and xtypes features.
+ *
+ * Revision 1.70  2006/09/20 22:30:52  steve
+ *  Do not pass -D__ICARUS__ to ivlpp.
+ *
+ * Revision 1.69  2006/07/26 00:11:40  steve
+ *  Pass depfiles through temp defines file.
+ *
+ * Revision 1.68  2006/07/26 00:02:48  steve
+ *  Pass defines and includes through temp file.
+ *
  * Revision 1.67  2005/07/14 23:38:44  steve
  *  Display as version 0.9.devel
  *

dup_expr.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: dup_expr.cc,v 1.20 2005/07/11 16:56:50 steve Exp $"
+#ident "$Id: dup_expr.cc,v 1.21 2006/11/04 06:10:13 steve Exp $"
 #endif
 
 # include "config.h"
@@ -67,7 +67,8 @@ NetEScope* NetEScope::dup_expr() const
 
 NetESelect* NetESelect::dup_expr() const
 {
-      return new NetESelect(expr_->dup_expr(), base_->dup_expr(),
+      return new NetESelect(expr_->dup_expr(),
+			    base_? base_->dup_expr() : 0,
 			    expr_width());
 }
 
@@ -133,6 +134,9 @@ NetEUReduce* NetEUReduce::dup_expr() const
 
 /*
  * $Log: dup_expr.cc,v $
+ * Revision 1.21  2006/11/04 06:10:13  steve
+ *  Handle dup of pad as well as normal select.
+ *
  * Revision 1.20  2005/07/11 16:56:50  steve
  *  Remove NetVariable and ivl_variable_t structures.
  *

elab_anet.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: elab_anet.cc,v 1.11 2005/07/11 16:56:50 steve Exp $"
+#ident "$Id: elab_anet.cc,v 1.13 2007/03/22 16:08:14 steve Exp $"
 #endif
 
 # include "config.h"
@@ -84,15 +84,18 @@ NetNet* PEConcat::elaborate_anet(Design*des, NetScope*scope) const
 	   concat operator from least significant to most significant,
 	   which is opposite from how they are given in the list.
 
-	   Allow for a repeat count other then 1 by repeating the
+	   Allow for a repeat count other than 1 by repeating the
 	   connect loop as many times as necessary. */
 
       NetNet*osig = new NetNet(scope, scope->local_symbol(),
 			       NetNet::IMPLICIT_REG, pins);
+	/* Assume that all the data types are the same. */
+      osig->data_type(nets[0]->data_type());
 
       pins = 0;
       for (unsigned idx = nets.count() ;  idx > 0 ;  idx -= 1) {
 	    NetNet*cur = nets[idx-1];
+	    assert(cur->data_type() == osig->data_type());
 	    for (unsigned pin = 0;  pin < cur->pin_count();  pin += 1) {
 		  connect(osig->pin(pins), cur->pin(pin));
 		  pins += 1;
@@ -166,6 +169,12 @@ NetNet* PEIdent::elaborate_anet(Design*des, NetScope*scope) const
 
 /*
  * $Log: elab_anet.cc,v $
+ * Revision 1.13  2007/03/22 16:08:14  steve
+ *  Spelling fixes from Larry
+ *
+ * Revision 1.12  2006/05/01 20:47:58  steve
+ *  More explicit datatype setup.
+ *
  * Revision 1.11  2005/07/11 16:56:50  steve
  *  Remove NetVariable and ivl_variable_t structures.
  *

elab_lval.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2000-2006 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: elab_lval.cc,v 1.32 2005/07/11 16:56:50 steve Exp $"
+#ident "$Id: elab_lval.cc,v 1.44 2007/06/02 03:42:12 steve Exp $"
 #endif
 
 # include "config.h"
@@ -25,8 +25,9 @@
 # include  "PExpr.h"
 # include  "netlist.h"
 # include  "netmisc.h"
-
+# include  "compiler.h"
 # include  <iostream>
+# include  "ivl_assert.h"
 
 /*
  * These methods generate a NetAssign_ object for the l-value of the
@@ -149,42 +150,63 @@ NetAssign_* PEIdent::elaborate_lval(Design*des,
 				    bool is_force) const
 {
       NetNet*       reg = 0;
-      NetMemory*    mem = 0;
       const NetExpr*par = 0;
       NetEvent*     eve = 0;
 
-      symbol_search(des, scope, path_, reg, mem, par, eve);
-
-      if (mem) {
-	    if (is_force) {
-		  cerr << get_line() << ": error: Memories "
-		       << "(" << path_ << " in this case)"
-		       << " are not allowed"
-		       << " as l-values to force statements." << endl;
-		  des->errors += 1;
-		  return 0;
-	    }
-
-	    return elaborate_mem_lval_(des, scope, mem);
-      }
-
+      symbol_search(des, scope, path_, reg, par, eve);
       if (reg == 0) {
 	    cerr << get_line() << ": error: Could not find variable ``"
-		 << path_ << "'' in ``" << scope->name() <<
+		 << path_ << "'' in ``" << scope_path(scope) <<
 		  "''" << endl;
 
 	    des->errors += 1;
 	    return 0;
       }
 
-      assert(reg);
+      ivl_assert(*this, reg);
+
+      const name_component_t&name_tail = path_.back();
+
+      index_component_t::ctype_t use_sel = index_component_t::SEL_NONE;
+      if (!name_tail.index.empty())
+	    use_sel = name_tail.index.back().sel;
+
+	// This is the special case that the l-value is an entire
+	// memory. This is, in fact, an error.
+      if (reg->array_dimensions() > 0 && name_tail.index.empty()) {
+	    cerr << get_line() << ": error: Cannot assign to array "
+		 << path_ << ". Did you forget a word index?" << endl;
+	    des->errors += 1;
+	    return 0;
+      }
+
+      if (reg->array_dimensions() > 0)
+	    return elaborate_lval_net_word_(des, scope, reg);
+
+      if (use_sel == index_component_t::SEL_PART) {
+	    NetAssign_*lv = new NetAssign_(reg);
+	    elaborate_lval_net_part_(des, scope, lv);
+	    return lv;
+      }
+
+      if (use_sel == index_component_t::SEL_IDX_UP) {
+	    NetAssign_*lv = new NetAssign_(reg);
+	    elaborate_lval_net_idx_up_(des, scope, lv);
+	    return lv;
+      }
+
+      if (use_sel == index_component_t::SEL_IDX_DO) {
+	    NetAssign_*lv = new NetAssign_(reg);
+	    elaborate_lval_net_idx_do_(des, scope, lv);
+	    return lv;
+      }
 
 	/* Get the signal referenced by the identifier, and make sure
 	   it is a register. Wires are not allows in this context,
 	   unless this is the l-value of a force. */
       if ((reg->type() != NetNet::REG) && !is_force) {
 	    cerr << get_line() << ": error: " << path_ <<
-		  " is not a reg/integer/time in " << scope->name() <<
+		  " is not a valid l-value in " << scope_path(scope) <<
 		  "." << endl;
 	    cerr << reg->get_line() << ":      : " << path_ <<
 		  " is declared here as " << reg->type() << "." << endl;
@@ -195,57 +217,29 @@ NetAssign_* PEIdent::elaborate_lval(Design*des,
       long msb, lsb;
       NetExpr*mux;
 
-      if (msb_ && lsb_) {
-	      /* This handles part selects. In this case, there are
-		 two bit select expressions, and both must be
-		 constant. Evaluate them and pass the results back to
-		 the caller. */
-	    verinum*vl = lsb_->eval_const(des, scope);
-	    if (vl == 0) {
-		  cerr << lsb_->get_line() << ": error: "
-			"Part select expressions must be constant."
-		       << endl;
-		  cerr << lsb_->get_line() << ":      : This lsb expression "
-			"violates the rule: " << *lsb_ << endl;
-		  des->errors += 1;
-		  return 0;
-	    }
-	    verinum*vm = msb_->eval_const(des, scope);
-	    if (vm == 0) {
-		  cerr << msb_->get_line() << ": error: "
-			"Part select expressions must be constant."
-		       << endl;
-		  cerr << msb_->get_line() << ":      : This msb expression "
-			"violates the rule: " << *msb_ << endl;
-		  des->errors += 1;
-		  return 0;
-	    }
+      if (use_sel == index_component_t::SEL_BIT) {
 
-	    msb = vm->as_long();
-	    lsb = vl->as_long();
-	    mux = 0;
-
-      } else if (msb_) {
+	    const index_component_t&index_tail = name_tail.index.back();
+	    ivl_assert(*this, index_tail.msb != 0);
+	    ivl_assert(*this, index_tail.lsb == 0);
 
 	      /* If there is only a single select expression, it is a
 		 bit select. Evaluate the constant value and treat it
 		 as a part select with a bit width of 1. If the
 		 expression it not constant, then return the
 		 expression as a mux. */
-	    assert(lsb_ == 0);
-	    verinum*v = msb_->eval_const(des, scope);
-	    if (v == 0) {
-		  NetExpr*m = msb_->elaborate_expr(des, scope);
-		  assert(m);
-		  msb = 0;
-		  lsb = 0;
-		  mux = m;
+
+	    NetExpr*index_expr = elab_and_eval(des, scope, index_tail.msb, -1);
+
+	    if (NetEConst*index_con = dynamic_cast<NetEConst*> (index_expr)) {
+		  msb = index_con->value().as_long();
+		  lsb = index_con->value().as_long();
+		  mux = 0;
 
 	    } else {
-
-		  msb = v->as_long();
-		  lsb = v->as_long();
-		  mux = 0;
+		  msb = 0;
+		  lsb = 0;
+		  mux = index_expr;
 	    }
 
       } else {
@@ -253,8 +247,6 @@ NetAssign_* PEIdent::elaborate_lval(Design*des,
 	      /* No select expressions, so presume a part select the
 		 width of the register. */
 
-	    assert(msb_ == 0);
-	    assert(lsb_ == 0);
 	    msb = reg->msb();
 	    lsb = reg->lsb();
 	    mux = 0;
@@ -269,7 +261,19 @@ NetAssign_* PEIdent::elaborate_lval(Design*des,
 		 bmux to select the target bit. */
 	    lv = new NetAssign_(reg);
 
-	    lv->set_bmux(mux);
+	      /* Correct the mux for the range of the vector. */
+	    if (reg->msb() < reg->lsb())
+		  mux = make_sub_expr(reg->lsb(), mux);
+	    else if (reg->lsb() != 0)
+		  mux = make_add_expr(mux, - reg->lsb());
+
+	    lv->set_part(mux, 1);
+
+      } else if (msb == reg->msb() && lsb == reg->lsb()) {
+
+	      /* No bit select, and part select covers the entire
+		 vector. Simplest case. */
+	    lv = new NetAssign_(reg);
 
       } else {
 
@@ -302,54 +306,190 @@ NetAssign_* PEIdent::elaborate_lval(Design*des,
 	    }
 
 	    lv = new NetAssign_(reg);
-	    lv->set_part(loff, wid);
+	    lv->set_part(new NetEConst(verinum(loff)), wid);
       }
 
 
       return lv;
 }
 
-NetAssign_* PEIdent::elaborate_mem_lval_(Design*des, NetScope*scope,
-					NetMemory*mem) const
+NetAssign_* PEIdent::elaborate_lval_net_word_(Design*des,
+					      NetScope*scope,
+					      NetNet*reg) const
 {
-      if (msb_ == 0) {
-	    cerr << get_line() << ": error: Assign to memory \""
-		 << mem->name() << "\" requires a word select index."
-		 << endl;
-	    des->errors += 1;
-	    return 0;
-      }
+      const name_component_t&name_tail = path_.back();
+      ivl_assert(*this, !name_tail.index.empty());
 
-      if (msb_ && lsb_) {
-	    cerr << get_line() << ": error: Cannot use part select on "
-		 << "memory \"" << mem->name() << ".\"" << endl;
-	    des->errors += 1;
-	    return 0;
-      }
+      const index_component_t&index_head = name_tail.index.front();
+      ivl_assert(*this, index_head.sel == index_component_t::SEL_BIT);
+      ivl_assert(*this, index_head.msb != 0);
+      ivl_assert(*this, index_head.lsb == 0);
 
-      assert(msb_ && !lsb_);
+      NetExpr*word = elab_and_eval(des, scope, index_head.msb, -1);
 
-      NetExpr*ix = msb_->elaborate_expr(des, scope);
-      if (ix == 0)
-	    return 0;
+	// If there is a non-zero base to the memory, then build an
+	// expression to calculate the canonical address.
+      if (long base = reg->array_first()) {
 
-	/* Evaluate the memory index expression down as must as
-	   possible. Ideally, we can get it down to a constant. */
-      if (! dynamic_cast<NetEConst*>(ix)) {
-	    NetExpr*tmp = ix->eval_tree();
-	    if (tmp) {
-		  tmp->set_line(*ix);
-		  delete ix;
-		  ix = tmp;
+	    word = make_add_expr(word, 0-base);
+	    if (NetExpr*tmp = word->eval_tree()) {
+		  word = tmp;
 	    }
       }
 
-      NetAssign_*lv = new NetAssign_(mem);
-      lv->set_bmux(ix);
-      lv->set_part(0, mem->width());
+      NetAssign_*lv = new NetAssign_(reg);
+      lv->set_word(word);
+
+      if (debug_elaborate)
+	    cerr << get_line() << ": debug: Set array word=" << *word << endl;
+
+	// Test for the case that the index is a constant, and is out
+	// of bounds. The "word" expression is the word index already
+	// converted to canonical address, so this just needs to check
+	// that the address is not too big.
+      if (NetEConst*word_const = dynamic_cast<NetEConst*>(word)) {
+	    verinum word_val = word_const->value();
+	    long index = word_val.as_long();
+	    if (index < 0 || index >= reg->array_count()) {
+		  cerr << get_line() << ": warning: Constant array index "
+		       << (index + reg->array_first())
+		       << " is out of range for array "
+		       << reg->name() << "." << endl;
+	    }
+      }
+
+	/* An array word may also have part selects applied to them. */
+
+      index_component_t::ctype_t use_sel = index_component_t::SEL_NONE;
+      if (name_tail.index.size() > 1)
+	    use_sel = name_tail.index.back().sel;
+
+      if (use_sel == index_component_t::SEL_PART)
+	    elaborate_lval_net_part_(des, scope, lv);
+
+      if (use_sel == index_component_t::SEL_IDX_UP)
+	    elaborate_lval_net_idx_up_(des, scope, lv);
+
+      if (use_sel == index_component_t::SEL_IDX_DO)
+	    elaborate_lval_net_idx_do_(des, scope, lv);
+
       return lv;
 }
 
+bool PEIdent::elaborate_lval_net_part_(Design*des,
+				       NetScope*scope,
+				       NetAssign_*lv) const
+{
+      long msb, lsb;
+      bool flag = calculate_parts_(des, scope, msb, lsb);
+      if (!flag)
+	    return false;
+
+      NetNet*reg = lv->sig();
+      assert(reg);
+
+      if (msb == reg->msb() && lsb == reg->lsb()) {
+
+	      /* No bit select, and part select covers the entire
+		 vector. Simplest case. */
+
+      } else {
+
+	      /* If the bit/part select is constant, then make the
+		 NetAssign_ only as wide as it needs to be and connect
+		 only to the selected bits of the reg. */
+	    unsigned loff = reg->sb_to_idx(lsb);
+	    unsigned moff = reg->sb_to_idx(msb);
+	    unsigned wid = moff - loff + 1;
+
+	    if (moff < loff) {
+		  cerr << get_line() << ": error: part select "
+		       << reg->name() << "[" << msb<<":"<<lsb<<"]"
+		       << " is reversed." << endl;
+		  des->errors += 1;
+		  return false;
+	    }
+
+	      /* If the part select extends beyond the extreme of the
+		 variable, then report an error. Note that loff is
+		 converted to normalized form so is relative the
+		 variable pins. */
+
+	    if ((wid + loff) > reg->vector_width()) {
+		  cerr << get_line() << ": error: bit/part select "
+		       << reg->name() << "[" << msb<<":"<<lsb<<"]"
+		       << " is out of range." << endl;
+		  des->errors += 1;
+		  return false;
+	    }
+
+	    lv->set_part(new NetEConst(verinum(loff)), wid);
+      }
+
+      return true;
+}
+
+bool PEIdent::elaborate_lval_net_idx_up_(Design*des,
+					 NetScope*scope,
+					 NetAssign_*lv) const
+{
+      const name_component_t&name_tail = path_.back();;
+      ivl_assert(*this, !name_tail.index.empty());
+
+      const index_component_t&index_tail = name_tail.index.back();
+      ivl_assert(*this, index_tail.msb != 0);
+      ivl_assert(*this, index_tail.lsb != 0);
+
+      NetNet*reg = lv->sig();
+      assert(reg);
+
+      if (reg->type() != NetNet::REG) {
+	    cerr << get_line() << ": error: " << path_ <<
+		  " is not a reg/integer/time in " << scope_path(scope) <<
+		  "." << endl;
+	    cerr << reg->get_line() << ":      : " << path_ <<
+		  " is declared here as " << reg->type() << "." << endl;
+	    des->errors += 1;
+	    return false;
+      }
+
+      unsigned long wid;
+      calculate_up_do_width_(des, scope, wid);
+
+      NetExpr*base = elab_and_eval(des, scope, index_tail.msb, -1);
+
+	/* Correct the mux for the range of the vector. */
+      if (reg->msb() < reg->lsb())
+	    base = make_sub_expr(reg->lsb(), base);
+      else if (reg->lsb() != 0)
+	    base = make_add_expr(base, - reg->lsb());
+
+      if (debug_elaborate)
+	    cerr << get_line() << ": debug: Set part select width="
+		 << wid << ", base=" << *base << endl;
+
+      lv->set_part(base, wid);
+
+      return true;
+}
+
+bool PEIdent::elaborate_lval_net_idx_do_(Design*des,
+					 NetScope*scope,
+					 NetAssign_*lv) const
+{
+      const name_component_t&name_tail = path_.back();;
+      ivl_assert(*this, !name_tail.index.empty());
+
+      const index_component_t&index_tail = name_tail.index.back();
+      ivl_assert(*this, index_tail.msb != 0);
+      ivl_assert(*this, index_tail.lsb != 0);
+
+      cerr << get_line() << ": internal error: don't know how to "
+	    "deal with SEL_IDX_DO in lval?" << endl;
+      des->errors += 1;
+      return false;
+}
+
 NetAssign_* PENumber::elaborate_lval(Design*des, NetScope*, bool) const
 {
       cerr << get_line() << ": error: Constant values not allowed "
@@ -360,6 +500,50 @@ NetAssign_* PENumber::elaborate_lval(Design*des, NetScope*, bool) const
 
 /*
  * $Log: elab_lval.cc,v $
+ * Revision 1.44  2007/06/02 03:42:12  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.43  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.42  2007/03/14 05:06:49  steve
+ *  Replace some asserts with ivl_asserts.
+ *
+ * Revision 1.41  2007/03/05 05:59:10  steve
+ *  Handle processes within generate loops.
+ *
+ * Revision 1.40  2007/02/27 05:14:38  steve
+ *  Detect and warn about lval array index out fo bounds.
+ *
+ * Revision 1.39  2007/02/01 05:25:26  steve
+ *  Error message better reflects more general reality.
+ *
+ * Revision 1.38  2007/01/16 05:44:15  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
+ *
+ * Revision 1.37  2006/11/04 06:19:25  steve
+ *  Remove last bits of relax_width methods, and use test_width
+ *  to calculate the width of an r-value expression that may
+ *  contain unsized numbers.
+ *
+ * Revision 1.36  2006/06/02 04:48:50  steve
+ *  Make elaborate_expr methods aware of the width that the context
+ *  requires of it. In the process, fix sizing of the width of unary
+ *  minus is context determined sizes.
+ *
+ * Revision 1.35  2006/04/16 00:54:04  steve
+ *  Cleanup lval part select handling.
+ *
+ * Revision 1.34  2006/04/16 00:15:43  steve
+ *  Fix part selects in l-values.
+ *
+ * Revision 1.33  2006/02/02 02:43:57  steve
+ *  Allow part selects of memory words in l-values.
+ *
  * Revision 1.32  2005/07/11 16:56:50  steve
  *  Remove NetVariable and ivl_variable_t structures.
  *

elab_pexpr.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: elab_pexpr.cc,v 1.21 2004/02/20 06:22:56 steve Exp $"
+#ident "$Id: elab_pexpr.cc,v 1.28 2007/06/02 03:42:12 steve Exp $"
 #endif
 
 # include "config.h"
@@ -25,6 +25,7 @@
 # include  "PExpr.h"
 # include  "compiler.h"
 # include  "util.h"
+# include  "netmisc.h"
 
 # include  <iostream>
 
@@ -53,7 +54,7 @@ NetExpr*PEBinary::elaborate_pexpr (Design*des, NetScope*scope) const
 	    return 0;
       }
 
-      NetEBinary*tmp = elaborate_expr_base_(des, lp, rp);
+      NetEBinary*tmp = elaborate_expr_base_(des, lp, rp, -1);
       return tmp;
 }
 
@@ -119,7 +120,7 @@ NetEConcat* PEConcat::elaborate_pexpr(Design*des, NetScope*scope) const
 
 NetExpr*PEFNumber::elaborate_pexpr(Design*des, NetScope*scope) const
 {
-      return elaborate_expr(des, scope);
+      return elaborate_expr(des, scope, -1, false);
 }
 
 /*
@@ -130,42 +131,53 @@ NetExpr*PEFNumber::elaborate_pexpr(Design*des, NetScope*scope) const
  */
 NetExpr*PEIdent::elaborate_pexpr(Design*des, NetScope*scope) const
 {
-      hname_t path = path_;
-      char*name = path.remove_tail_name();
+      pform_name_t path = path_;
+      name_component_t name_tail = path_.back();
+      path.pop_back();
 
       NetScope*pscope = scope;
-      if (path.peek_name(0))
-	    pscope = des->find_scope(scope, path);
+      if (path_.size() > 0) {
+	    list<hname_t> tmp = eval_scope_path(des, scope, path);
+	    pscope = des->find_scope(scope, tmp);
+      }
 
-      perm_string perm_name = lex_strings.make(name);
-      delete name;
-
-      const NetExpr*ex = pscope->get_parameter(perm_name);
+      const NetExpr*ex_msb;
+      const NetExpr*ex_lsb;
+      const NetExpr*ex = pscope->get_parameter(name_tail.name, ex_msb, ex_lsb);
       if (ex == 0) {
-	    cerr << get_line() << ": error: identifier ``" << path_ <<
-		  "'' is not a parameter in " << scope->name() << "." << endl;
+	    cerr << get_line() << ": error: identifier ``" << name_tail.name <<
+		  "'' is not a parameter in "<< scope_path(scope)<< "." << endl;
 	    des->errors += 1;
 	    return 0;
       }
 
-      NetExpr*res = new NetEParam(des, pscope, perm_name);
+      NetExpr*res = new NetEParam(des, pscope, name_tail.name);
       res->set_line(*this);
       assert(res);
 
-      assert(idx_ == 0);
-      if (msb_ && lsb_) {
+      index_component_t::ctype_t use_sel = index_component_t::SEL_NONE;
+      if (!name_tail.index.empty())
+	    use_sel = name_tail.index.back().sel;
+
+      switch (use_sel) {
+	  case index_component_t::SEL_NONE:
+	    break;
+	  default:
+	  case index_component_t::SEL_PART:
 	    cerr << get_line() << ": sorry: Cannot part select "
 		  "bits of parameters." << endl;
 	    des->errors += 1;
+	    break;
 
-      } else if (msb_) {
+	  case index_component_t::SEL_BIT:
 
 	      /* We have here a bit select. Insert a NetESelect node
 		 to handle it. */
-	    NetExpr*tmp = msb_->elaborate_pexpr(des, scope);
+	    NetExpr*tmp = name_tail.index.back().msb->elaborate_pexpr(des, scope);
 	    if (tmp != 0) {
 		  res = new NetESelect(res, tmp, 1);
 	    }
+	    break;
       }
 
       return res;
@@ -176,13 +188,13 @@ NetExpr*PEIdent::elaborate_pexpr(Design*des, NetScope*scope) const
  */
 NetExpr*PENumber::elaborate_pexpr(Design*des, NetScope*sc) const
 {
-      return elaborate_expr(des, sc);
+      return elaborate_expr(des, sc, -1, false);
 }
 
 
 NetEConst* PEString::elaborate_pexpr(Design*des, NetScope*scope) const
 {
-      return elaborate_expr(des, scope);
+      return elaborate_expr(des, scope, -1, false);
 }
 
 NetETernary* PETernary::elaborate_pexpr(Design*des, NetScope*scope) const
@@ -231,6 +243,32 @@ NetExpr*PEUnary::elaborate_pexpr (Design*des, NetScope*scope) const
 
 /*
  * $Log: elab_pexpr.cc,v $
+ * Revision 1.28  2007/06/02 03:42:12  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.27  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.26  2007/04/26 03:06:22  steve
+ *  Rework hname_t to use perm_strings.
+ *
+ * Revision 1.25  2006/11/04 06:19:25  steve
+ *  Remove last bits of relax_width methods, and use test_width
+ *  to calculate the width of an r-value expression that may
+ *  contain unsized numbers.
+ *
+ * Revision 1.24  2006/06/02 04:48:50  steve
+ *  Make elaborate_expr methods aware of the width that the context
+ *  requires of it. In the process, fix sizing of the width of unary
+ *  minus is context determined sizes.
+ *
+ * Revision 1.23  2006/02/02 02:43:58  steve
+ *  Allow part selects of memory words in l-values.
+ *
+ * Revision 1.22  2005/11/27 05:56:20  steve
+ *  Handle bit select of parameter with ranges.
+ *
  * Revision 1.21  2004/02/20 06:22:56  steve
  *  parameter keys are per_strings.
  *

elab_scope.cc

@@ -17,11 +17,12 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: elab_scope.cc,v 1.36 2005/07/11 16:56:50 steve Exp $"
+#ident "$Id: elab_scope.cc,v 1.46 2007/06/02 03:42:12 steve Exp $"
 #endif
 
 # include  "config.h"
 # include  "compiler.h"
+# include  "netmisc.h"
 # include  <iostream>
 # include  <stdio.h>
 
@@ -36,6 +37,7 @@
 # include  "PEvent.h"
 # include  "PExpr.h"
 # include  "PGate.h"
+# include  "PGenerate.h"
 # include  "PTask.h"
 # include  "PWire.h"
 # include  "Statement.h"
@@ -44,11 +46,12 @@
 # include  <typeinfo>
 # include  <assert.h>
 
-bool Module::elaborate_scope(Design*des, NetScope*scope) const
+bool Module::elaborate_scope(Design*des, NetScope*scope,
+			     const replace_t&replacements) const
 {
       if (debug_scopes) {
 	    cerr << get_line() << ": debug: Elaborate scope "
-		 << scope->name() << "." << endl;
+		 << scope_path(scope) << "." << endl;
       }
 
 	// Generate all the parameters that this instance of this
@@ -63,7 +66,7 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 	// place of the elaborated expression.
 
       typedef map<perm_string,param_expr_t>::const_iterator mparm_it_t;
-      typedef map<hname_t,PExpr*>::const_iterator hparm_it_t;
+      typedef map<pform_name_t,PExpr*>::const_iterator pform_parm_it_t;
 
 
 	// This loop scans the parameters in the module, and creates
@@ -74,8 +77,7 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 
 	    NetEParam*tmp = new NetEParam;
 	    tmp->set_line(*((*cur).second.expr));
-	    if ((*cur).second.msb)
-		  tmp->cast_signed( (*cur).second.signed_flag );
+	    tmp->cast_signed( (*cur).second.signed_flag );
 
 	    scope->set_parameter((*cur).first, tmp, 0, 0, false);
       }
@@ -106,7 +108,7 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 	    NetExpr*val = ex->elaborate_pexpr(des, scope);
 	    NetExpr*msb = 0;
 	    NetExpr*lsb = 0;
-	    bool signed_flag = false;
+	    bool signed_flag = (*cur).second.signed_flag;
 
 	      /* If the parameter declaration includes msb and lsb,
 		 then use them to calculate a width for the
@@ -117,16 +119,47 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 		  msb = (*cur).second.msb ->elaborate_pexpr(des, scope);
 		  assert(msb);
 		  lsb = (*cur).second.lsb ->elaborate_pexpr(des, scope);
-		  signed_flag = (*cur).second.signed_flag;
 	    }
 
-	    val->cast_signed(signed_flag);
+	    if (signed_flag) {
+		    /* If explicitly signed, then say so. */
+		  val->cast_signed(true);
+	    } else if ((*cur).second.msb) {
+		    /* If there is a range, then the signedness comes
+		       from the type and not the expression. */
+		  val->cast_signed(signed_flag);
+	    } else {
+		    /* otherwise, let the expression describe
+		       itself. */
+		  signed_flag = val->has_sign();
+	    }
+
 	    val = scope->set_parameter((*cur).first, val,
 				       msb, lsb, signed_flag);
 	    assert(val);
 	    delete val;
       }
 
+	/* run parameter replacements that were collected from the
+	   containing scope and meant for me. */
+      for (replace_t::const_iterator cur = replacements.begin()
+		 ; cur != replacements.end() ;  cur ++) {
+
+	    NetExpr*val = (*cur).second;
+	    if (debug_scopes) {
+		  cerr << get_line() << ": debug: "
+		       << "Replace " << (*cur).first
+		       << " with expression " << *val
+		       << " from " << val->get_line() << "." << endl;
+	    }
+	    bool flag = scope->replace_parameter((*cur).first, val);
+	    if (! flag) {
+		  cerr << val->get_line() << ": warning: parameter "
+		       << (*cur).first << " not found in "
+		       << scope_path(scope) << "." << endl;
+	    }
+      }
+
       for (mparm_it_t cur = localparams.begin()
 		 ; cur != localparams.end() ;  cur ++) {
 
@@ -167,7 +200,7 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 	// here because the parameter receiving the assignment may be
 	// in a scope not discovered by this pass.
 
-      for (hparm_it_t cur = defparms.begin()
+      for (pform_parm_it_t cur = defparms.begin()
 		 ; cur != defparms.end() ;  cur ++ ) {
 
 	    PExpr*ex = (*cur).second;
@@ -188,6 +221,17 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 
       delete[]attr;
 
+	// Generate schemes can create new scopes in the form of
+	// generated code. Scan the generate schemes, and *generate*
+	// new scopes, which is slightly different from simple
+	// elaboration.
+
+      typedef list<PGenerate*>::const_iterator generate_it_t;
+      for (generate_it_t cur = generate_schemes.begin()
+		 ; cur != generate_schemes.end() ; cur ++ ) {
+	    (*cur) -> generate_scope(des, scope);
+      }
+
 
 	// Tasks introduce new scopes, so scan the tasks in this
 	// module. Create a scope for the task and pass that to the
@@ -199,7 +243,8 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
       for (tasks_it_t cur = tasks_.begin()
 		 ; cur != tasks_.end() ;  cur ++ ) {
 
-	    NetScope*task_scope = new NetScope(scope, (*cur).first,
+	    hname_t use_name( (*cur).first );
+	    NetScope*task_scope = new NetScope(scope, use_name,
 					       NetScope::TASK);
 	    (*cur).second->elaborate_scope(des, task_scope);
       }
@@ -214,7 +259,8 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
       for (funcs_it_t cur = funcs_.begin()
 		 ; cur != funcs_.end() ;  cur ++ ) {
 
-	    NetScope*func_scope = new NetScope(scope, (*cur).first,
+	    hname_t use_name( (*cur).first );
+	    NetScope*func_scope = new NetScope(scope, use_name,
 					       NetScope::FUNC);
 	    (*cur).second->elaborate_scope(des, func_scope);
       }
@@ -244,7 +290,7 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
       }
 
 	// Scan through all the named events in this scope. We do not
-	// need anything more then the current scope to do this
+	// need anything more than the current scope to do this
 	// elaboration, so do it now. This allows for normal
 	// elaboration to reference these events.
 
@@ -257,6 +303,116 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
       return des->errors == 0;
 }
 
+bool PGenerate::generate_scope(Design*des, NetScope*container)
+{
+      switch (scheme_type) {
+	  case GS_LOOP:
+	    return generate_scope_loop_(des, container);
+
+	  default:
+	    cerr << get_line() << ": sorry: Generate of this sort"
+		 << " is not supported yet!" << endl;
+	    return false;
+      }
+}
+
+/*
+ * This is the elaborate scope method for a generate loop.
+ */
+bool PGenerate::generate_scope_loop_(Design*des, NetScope*container)
+{
+	// We're going to need a genvar...
+      int genvar;
+
+	// The initial value for the genvar does not need (nor can it
+	// use) the genvar itself, so we can evaluate this expression
+	// the same way any other paramter value is evaluated.
+      NetExpr*init_ex = elab_and_eval(des, container, loop_init, -1);
+      NetEConst*init = dynamic_cast<NetEConst*> (init_ex);
+      if (init == 0) {
+	    cerr << get_line() << ": error: Cannot evaluate genvar"
+		 << " init expression: " << *loop_init << endl;
+	    des->errors += 1;
+	    return false;
+      }
+
+      genvar = init->value().as_long();
+      delete init_ex;
+
+      if (debug_elaborate)
+	    cerr << get_line() << ": debug: genvar init = " << genvar << endl;
+
+      container->genvar_tmp = loop_index;
+      container->genvar_tmp_val = 0;
+      NetExpr*test_ex = elab_and_eval(des, container, loop_test, -1);
+      NetEConst*test = dynamic_cast<NetEConst*>(test_ex);
+      assert(test);
+      while (test->value().as_long()) {
+
+	      // The actual name of the scope includes the genvar so
+	      // that each instance has a unique name in the
+	      // container. The format of using [] is part of the
+	      // Verilog standard.
+	    hname_t use_name (scope_name, genvar);
+	    if (debug_elaborate)
+		  cerr << get_line() << ": debug: "
+		       << "Create generated scope " << use_name << endl;
+
+	    NetScope*scope = new NetScope(container, use_name,
+					  NetScope::GENBLOCK);
+
+	      // Set in the scope a localparam for the value of the
+	      // genvar within this instance of the generate
+	      // block. Code within this scope thus has access to the
+	      // genvar as a constant.
+	    {
+		  verinum genvar_verinum(genvar);
+		  genvar_verinum.has_sign(true);
+		  NetEConstParam*gp = new NetEConstParam(scope,
+							 loop_index,
+							 genvar_verinum);
+		  scope->set_localparam(loop_index, gp);
+
+		  if (debug_elaborate)
+			cerr << get_line() << ": debug: "
+			     << "Create implicit localparam "
+			     << loop_index << " = " << genvar_verinum << endl;
+	    }
+
+	      // Scan the generated scope for gates that may create
+	      // their own scopes.
+	    typedef list<PGate*>::const_iterator pgate_list_it_t;
+	    for (pgate_list_it_t cur = gates.begin()
+		       ; cur != gates.end() ;  cur ++) {
+		  (*cur) ->elaborate_scope(des, scope);
+	    }
+
+	    scope_list_.push_back(scope);
+
+	      // Calculate the step for the loop variable.
+	    NetExpr*step_ex = elab_and_eval(des, container, loop_step, -1);
+	    NetEConst*step = dynamic_cast<NetEConst*>(step_ex);
+	    assert(step);
+	    if (debug_elaborate)
+		  cerr << get_line() << ": debug: genvar step from "
+		       << genvar << " to " << step->value().as_long() << endl;
+
+	    genvar = step->value().as_long();
+	    container->genvar_tmp_val = genvar;
+	    delete step;
+	    delete test_ex;
+	    test_ex = elab_and_eval(des, container, loop_test, -1);
+	    test = dynamic_cast<NetEConst*>(test_ex);
+	    assert(test);
+      }
+
+	// Clear the genvar_tmp field in the scope to reflect that the
+	// genvar is no longer value for evaluating expressions.
+      container->genvar_tmp = perm_string();
+
+      return true;
+}
+
 void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
 {
       if (get_name() == "") {
@@ -273,7 +429,7 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
 	// about to create, and if I find it then somebody beat me to
 	// it.
 
-      if (sc->child(get_name())) {
+      if (sc->child(hname_t(get_name()))) {
 	    cerr << get_line() << ": error: Instance/Scope name " <<
 		  get_name() << " already used in this context." <<
 		  endl;
@@ -296,15 +452,17 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
 		 << "module " << mod->mod_name() << " within itself." << endl;
 
 	    cerr << get_line() << ":      : The offending instance is "
-		 << sc->name() << "." << get_name() << " within "
-		 << scn->name() << "." << endl;
+		 << scope_path(sc) << "." << get_name() << " within "
+		 << scope_path(scn) << "." << endl;
 
 	    des->errors += 1;
 	    return;
       }
 
-      verinum*msb = msb_ ? msb_->eval_const(des, sc) : 0;
-      verinum*lsb = lsb_ ? lsb_->eval_const(des, sc) : 0;
+      NetExpr*mse = msb_ ? elab_and_eval(des, sc, msb_, -1) : 0;
+      NetExpr*lse = lsb_ ? elab_and_eval(des, sc, lsb_, -1) : 0;
+      NetEConst*msb = dynamic_cast<NetEConst*> (mse);
+      NetEConst*lsb = dynamic_cast<NetEConst*> (lse);
 
       assert( (msb == 0) || (lsb != 0) );
 
@@ -315,12 +473,15 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
 
       if (msb) {
 	    instance_array = true;
-	    instance_high = msb->as_long();
-	    instance_low  = lsb->as_long();
+	    instance_high = msb->value().as_long();
+	    instance_low  = lsb->value().as_long();
 	    if (instance_high > instance_low)
 		  instance_count = instance_high - instance_low + 1;
 	    else
 		  instance_count = instance_low - instance_high + 1;
+
+	    delete mse;
+	    delete lse;
       }
 
       NetScope::scope_vec_t instances (instance_count);
@@ -335,24 +496,21 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
 	// instantiation line.
       for (int idx = 0 ;  idx < instance_count ;  idx += 1) {
 
-	    perm_string use_name = get_name();
+	    hname_t use_name (get_name());
 
 	    if (instance_array) {
-		  char name_buf[128];
 		  int instance_idx = idx;
 		  if (instance_low < instance_high)
 			instance_idx = instance_low + idx;
 		  else
 			instance_idx = instance_low - idx;
 
-		  snprintf(name_buf, sizeof name_buf,
-			   "%s[%d]", get_name().str(), instance_idx);
-		  use_name = lex_strings.make(name_buf);
+		  use_name = hname_t(get_name(), instance_idx);
 	    }
 
 	    if (debug_scopes) {
 		  cerr << get_line() << ": debug: Module instance " << use_name
-		       << " becomes child of " << sc->name()
+		       << " becomes child of " << scope_path(sc)
 		       << "." << endl;
 	    }
 
@@ -368,13 +526,6 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
 	    my_scope->time_precision(mod->time_precision);
 	    des->set_precision(mod->time_precision);
 
-	      // This call actually arranges for the description of the
-	      // module type to process this instance and handle parameters
-	      // and sub-scopes that might occur. Parameters are also
-	      // created in that scope, as they exist. (I'll override them
-	      // later.)
-	    mod->elaborate_scope(des, my_scope);
-
 	      // Look for module parameter replacements. The "replace" map
 	      // maps parameter name to replacement expression that is
 	      // passed. It is built up by the ordered overrides or named
@@ -417,6 +568,8 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
 	    }
 
 
+	    Module::replace_t replace_net;
+
 	      // And here we scan the replacements we collected. Elaborate
 	      // the expression in my context, then replace the sub-scope
 	      // parameter value with the new expression.
@@ -426,13 +579,16 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
 
 		  PExpr*tmp = (*cur).second;
 		  NetExpr*val = tmp->elaborate_pexpr(des, sc);
-		  bool flag = my_scope->replace_parameter((*cur).first, val);
-		  if (! flag) {
-			cerr << val->get_line() << ": warning: parameter "
-			     << (*cur).first << " not found in "
-			     << sc->name() << "." << endl;
-		  }
+		  replace_net[(*cur).first] = val;
 	    }
+
+	      // This call actually arranges for the description of the
+	      // module type to process this instance and handle parameters
+	      // and sub-scopes that might occur. Parameters are also
+	      // created in that scope, as they exist. (I'll override them
+	      // later.)
+	    mod->elaborate_scope(des, my_scope, replace_net);
+
       }
 
 	/* Stash the instance array of scopes into the parent
@@ -491,7 +647,7 @@ void PBlock::elaborate_scope(Design*des, NetScope*scope) const
       NetScope*my_scope = scope;
 
       if (name_ != 0) {
-	    my_scope = new NetScope(scope, name_, bl_type_==BL_PAR
+	    my_scope = new NetScope(scope, hname_t(name_), bl_type_==BL_PAR
 				    ? NetScope::FORK_JOIN
 				    : NetScope::BEGIN_END);
       }
@@ -600,6 +756,39 @@ void PWhile::elaborate_scope(Design*des, NetScope*scope) const
 
 /*
  * $Log: elab_scope.cc,v $
+ * Revision 1.46  2007/06/02 03:42:12  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.45  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.44  2007/03/22 16:08:15  steve
+ *  Spelling fixes from Larry
+ *
+ * Revision 1.43  2007/03/08 06:11:35  steve
+ *  Elaborate scopes of modules instantated in generate loops.
+ *
+ * Revision 1.42  2007/03/05 05:59:10  steve
+ *  Handle processes within generate loops.
+ *
+ * Revision 1.41  2006/06/02 04:48:50  steve
+ *  Make elaborate_expr methods aware of the width that the context
+ *  requires of it. In the process, fix sizing of the width of unary
+ *  minus is context determined sizes.
+ *
+ * Revision 1.40  2006/04/12 05:05:03  steve
+ *  Use elab_and_eval to evaluate genvar expressions.
+ *
+ * Revision 1.39  2006/04/10 00:37:42  steve
+ *  Add support for generate loops w/ wires and gates.
+ *
+ * Revision 1.38  2006/03/30 01:49:07  steve
+ *  Fix instance arrays indexed by overridden parameters.
+ *
+ * Revision 1.37  2006/03/18 22:53:38  steve
+ *  Support more parameter syntax.
+ *
  * Revision 1.36  2005/07/11 16:56:50  steve
  *  Remove NetVariable and ivl_variable_t structures.
  *

elab_sig.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: elab_sig.cc,v 1.40 2005/07/11 16:56:50 steve Exp $"
+#ident "$Id: elab_sig.cc,v 1.52 2007/06/02 03:42:12 steve Exp $"
 #endif
 
 # include "config.h"
@@ -27,12 +27,14 @@
 # include  "Module.h"
 # include  "PExpr.h"
 # include  "PGate.h"
+# include  "PGenerate.h"
 # include  "PTask.h"
 # include  "PWire.h"
 # include  "compiler.h"
 # include  "netlist.h"
 # include  "netmisc.h"
 # include  "util.h"
+# include  "ivl_assert.h"
 
 /*
  * This local function checks if a named signal is connected to a
@@ -40,8 +42,10 @@
  * within the port_t that have a matching name.
  */
 static bool signal_is_in_port(const svector<Module::port_t*>&ports,
-			      const hname_t&name)
+			      NetNet*sig)
 {
+      perm_string name = sig->name();
+
       for (unsigned idx = 0 ;  idx < ports.count() ;  idx += 1) {
 
 	    Module::port_t*pp = ports[idx];
@@ -52,9 +56,15 @@ static bool signal_is_in_port(const svector<Module::port_t*>&ports,
 	      // This port has an internal connection. In this case,
 	      // the port has 0 or more NetEIdent objects concatenated
 	      // together that form the port.
+
+	      // Note that module ports should not have any heirarchy
+	      // in their names: they are in the root of the module
+	      // scope by definition.
+
 	    for (unsigned cc = 0 ;  cc < pp->expr.count() ;  cc += 1) {
+		  perm_string pname = peek_tail_name(pp->expr[cc]->path());
 		  assert(pp->expr[cc]);
-		  if (pp->expr[cc]->path() == name)
+		  if (pname == name)
 			return true;
 	    }
       }
@@ -62,14 +72,28 @@ static bool signal_is_in_port(const svector<Module::port_t*>&ports,
       return false;
 }
 
+#if 0
+static NetNet*find_signal_in_scope(NetScope*scope, const hname_t&path)
+{
+      NetScope*cur = scope;
+      unsigned idx = 0;
+
+      while (path.peek_name(idx+1)) {
+	    cur = cur->child(path.peek_name(idx));
+	    if (cur == 0)
+		  return 0;
+
+	    idx += 1;
+      }
+
+      return cur->find_signal(path.peek_name(idx));
+}
+#endif
+
 bool Module::elaborate_sig(Design*des, NetScope*scope) const
 {
       bool flag = true;
 
-	// Get all the explicitly declared wires of the module and
-	// start the signals list with them.
-      const map<hname_t,PWire*>&wl = get_wires();
-
 	// Scan all the ports of the module, and make sure that each
 	// is connected to wires that have port declarations.
       for (unsigned idx = 0 ;  idx < ports.count() ;  idx += 1) {
@@ -77,12 +101,12 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
 	    if (pp == 0)
 		  continue;
 
-	    map<hname_t,PWire*>::const_iterator wt;
+	    map<pform_name_t,PWire*>::const_iterator wt;
 	    for (unsigned cc = 0 ;  cc < pp->expr.count() ;  cc += 1) {
-		  hname_t port_path (pp->expr[cc]->path());
-		  wt = wl.find(port_path);
+		  pform_name_t port_path (pp->expr[cc]->path());
+		  wt = wires_.find(port_path);
 
-		  if (wt == wl.end()) {
+		  if (wt == wires_.end()) {
 			cerr << get_line() << ": error: "
 			     << "Port " << pp->expr[cc]->path() << " ("
 			     << (idx+1) << ") of module " << name_
@@ -102,14 +126,11 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
 	    }
       }
 
-      for (map<hname_t,PWire*>::const_iterator wt = wl.begin()
-		 ; wt != wl.end()
-		 ; wt ++ ) {
+      for (map<pform_name_t,PWire*>::const_iterator wt = wires_.begin()
+		 ; wt != wires_.end() ; wt ++ ) {
 
 	    PWire*cur = (*wt).second;
-	    cur->elaborate_sig(des, scope);
-
-	    NetNet*sig = scope->find_signal_in_child(cur->path());
+	    NetNet*sig = cur->elaborate_sig(des, scope);
 
 	      // If this wire is a signal of the module (as opposed to
 	      // a port of a function) and is a port, then check that
@@ -121,12 +142,10 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
 	    if (sig && (sig->scope() == scope)
 		&& (cur->get_port_type() != NetNet::NOT_A_PORT)) {
 
-		  hname_t name = (*wt).first;
-
-		  if (! signal_is_in_port(ports, name)) {
+		  if (! signal_is_in_port(ports, sig)) {
 
 			cerr << cur->get_line() << ": error: Signal "
-			     << name << " has a declared direction "
+			     << sig->name() << " has a declared direction "
 			     << "but is not a port." << endl;
 			des->errors += 1;
 		  }
@@ -158,6 +177,16 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
 		  des->errors += 1;
 	    }
 
+      }
+
+	// Run through all the generate schemes to enaborate the
+	// signals that they hold. Note that the generate schemes hold
+	// the scopes that they instantiated, so we don't pass any
+	// scope in.
+      typedef list<PGenerate*>::const_iterator generate_it_t;
+      for (generate_it_t cur = generate_schemes.begin()
+		 ; cur != generate_schemes.end() ; cur ++ ) {
+	    (*cur) -> elaborate_sig(des);
       }
 
 	// Get all the gates of the module and elaborate them by
@@ -179,11 +208,13 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
 
       for (mfunc_it_t cur = funcs_.begin()
 		 ; cur != funcs_.end() ;  cur ++) {
-	    NetScope*fscope = scope->child((*cur).first);
+
+	    hname_t use_name ( (*cur).first );
+	    NetScope*fscope = scope->child(use_name);
 	    if (scope == 0) {
 		  cerr << (*cur).second->get_line() << ": internal error: "
 		       << "Child scope for function " << (*cur).first
-		       << " missing in " << scope->name() << "." << endl;
+		       << " missing in " << scope_path(scope) << "." << endl;
 		  des->errors += 1;
 		  continue;
 	    }
@@ -200,7 +231,7 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
 
       for (mtask_it_t cur = tasks_.begin()
 		 ; cur != tasks_.end() ;  cur ++) {
-	    NetScope*tscope = scope->child((*cur).first);
+	    NetScope*tscope = scope->child( hname_t((*cur).first) );
 	    assert(tscope);
 	    (*cur).second->elaborate_sig(des, tscope);
       }
@@ -223,9 +254,9 @@ bool PGModule::elaborate_sig_mod_(Design*des, NetScope*scope,
 
 	    if (my_scope->parent() != scope) {
 		  cerr << get_line() << ": internal error: "
-		       << "Instance " << my_scope->name()
-		       << " is in parent " << my_scope->parent()->name()
-		       << " instead of " << scope->name()
+		       << "Instance " << scope_path(my_scope)
+		       << " is in parent " << scope_path(my_scope->parent())
+		       << " instead of " << scope_path(scope)
 		       << endl;
 	    }
 	    assert(my_scope->parent() == scope);
@@ -238,6 +269,50 @@ bool PGModule::elaborate_sig_mod_(Design*des, NetScope*scope,
       return flag;
 }
 
+bool PGenerate::elaborate_sig(Design*des) const
+{
+      bool flag = true;
+
+      typedef list<NetScope*>::const_iterator scope_list_it_t;
+      for (scope_list_it_t cur = scope_list_.begin()
+		 ; cur != scope_list_.end() ; cur ++ ) {
+
+	    if (debug_elaborate)
+		  cerr << get_line() << ": debug: Elaborate nets in "
+		       << "scope " << scope_path(*cur) << endl;
+	    flag = elaborate_sig_(des, *cur) & flag;
+      }
+
+      return flag;
+}
+
+bool PGenerate::elaborate_sig_(Design*des, NetScope*scope) const
+{
+	// Scan the declared PWires to elaborate the obvious signals
+	// in the current scope.
+      typedef map<pform_name_t,PWire*>::const_iterator wires_it_t;
+      for (wires_it_t wt = wires.begin()
+		 ; wt != wires.end() ;  wt ++ ) {
+
+	    PWire*cur = (*wt).second;
+
+	    if (debug_elaborate)
+		  cerr << get_line() << ": debug: Elaborate PWire "
+		       << cur->path() << " in scope " << scope_path(scope) << endl;
+
+	    cur->elaborate_sig(des, scope);
+      }
+
+      typedef list<PGate*>::const_iterator pgate_list_it_t;
+      for (pgate_list_it_t cur = gates.begin()
+		 ; cur != gates.end() ;  cur ++) {
+	    (*cur) ->elaborate_sig(des, scope);
+      }
+
+      return true;
+}
+
+
 /*
  * A function definition exists within an elaborated module. This
  * matters when elaborating signals, as the ports of the function are
@@ -267,12 +342,13 @@ void PFunction::elaborate_sig(Design*des, NetScope*scope) const
       switch (return_type_.type) {
 
 	  case PTF_REG:
+	  case PTF_REG_S:
 	    if (return_type_.range) {
 		  NetExpr*me = elab_and_eval(des, scope,
-					     (*return_type_.range)[0]);
+					     (*return_type_.range)[0], -1);
 		  assert(me);
 		  NetExpr*le = elab_and_eval(des, scope,
-					     (*return_type_.range)[1]);
+					     (*return_type_.range)[1], -1);
 		  assert(le);
 
 		  long mnum = 0, lnum = 0;
@@ -300,12 +376,13 @@ void PFunction::elaborate_sig(Design*des, NetScope*scope) const
 		  ret_sig = new NetNet(scope, fname, NetNet::REG);
 	    }
 	    ret_sig->set_line(*this);
+	    ret_sig->set_signed(return_type_.type == PTF_REG_S);
 	    ret_sig->port_type(NetNet::POUTPUT);
 	    ret_sig->data_type(IVL_VT_LOGIC);
 	    break;
 
 	  case PTF_INTEGER:
-	    ret_sig = new NetNet(scope, fname, NetNet::REG, INTEGER_WIDTH);
+	    ret_sig = new NetNet(scope, fname, NetNet::REG, integer_width);
 	    ret_sig->set_line(*this);
 	    ret_sig->set_signed(true);
 	    ret_sig->set_isint(true);
@@ -347,22 +424,24 @@ void PFunction::elaborate_sig(Design*des, NetScope*scope) const
 		       name. We know by design that the port name is given
 		       as two components: <func>.<port>. */
 
-		  hname_t path = (*ports_)[idx]->path();
-		  perm_string pname = lex_strings.make(path.peek_name(1));
-		  perm_string ppath = lex_strings.make(path.peek_name(0));
+		  pform_name_t path = (*ports_)[idx]->path();
+		  ivl_assert(*this, path.size() == 2);
+
+		  perm_string pname = peek_tail_name(path);
+		  perm_string ppath = peek_head_name(path);
 
 		  if (ppath != scope->basename()) {
 			cerr << get_line() << ": internal error: function "
 			     << "port " << (*ports_)[idx]->path()
 			     << " has wrong name for function "
-			     << scope->name() << "." << endl;
+			     << scope_path(scope) << "." << endl;
 			des->errors += 1;
 		  }
 
 		  NetNet*tmp = scope->find_signal(pname);
 		  if (tmp == 0) {
 			cerr << get_line() << ": internal error: function "
-			     << scope->name() << " is missing port "
+			     << scope_path(scope) << " is missing port "
 			     << pname << "." << endl;
 			scope->dump(cerr);
 			cerr << get_line() << ": Continuing..." << endl;
@@ -400,36 +479,34 @@ void PTask::elaborate_sig(Design*des, NetScope*scope) const
 		 name. We know by design that the port name is given
 		 as two components: <task>.<port>. */
 
-	    hname_t path = (*ports_)[idx]->path();
-	    assert(path.peek_name(0) && path.peek_name(1));
+	    pform_name_t path = (*ports_)[idx]->path();
+	    ivl_assert(*this, path.size() == 2);
+
+	    perm_string scope_name = peek_head_name(path);
+	    perm_string port_name = peek_tail_name(path);
 
 	      /* check that the current scope really does have the
 		 name of the first component of the task port name. Do
 		 this by looking up the task scope in the parent of
 		 the current scope. */
-	    if (scope->parent()->child(path.peek_name(0)) != scope) {
-		  cerr << "internal error: task scope " << path
-		       << " not the same as scope " << scope->name()
-		       << "?!" << endl;
-		  return;
-	    }
+	    ivl_assert(*this, scope->basename() == scope_name);
 
 	      /* Find the signal for the port. We know by definition
 		 that it is in the scope of the task, so look only in
 		 the scope. */
-	    NetNet*tmp = scope->find_signal(path.peek_name(1));
+	    NetNet*tmp = scope->find_signal(port_name);
 
 	    if (tmp == 0) {
 		  cerr << get_line() << ": internal error: "
-		       << "Could not find port " << path.peek_name(1)
-		       << " in scope " << scope->name() << endl;
+		       << "Could not find port " << port_name
+		       << " in scope " << scope_path(scope) << endl;
 		  scope->dump(cerr);
 	    }
 
 	    ports[idx] = tmp;
       }
 
-      NetTaskDef*def = new NetTaskDef(scope->name(), ports);
+      NetTaskDef*def = new NetTaskDef(scope, ports);
       scope->set_task_def(def);
 }
 
@@ -445,16 +522,19 @@ bool PGate::elaborate_sig(Design*des, NetScope*scope) const
  * elaboration this creates an object in the design that represent the
  * defined item.
  */
-void PWire::elaborate_sig(Design*des, NetScope*scope) const
+NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const
 {
 
 	/* The parser may produce hierarchical names for wires. I here
 	   follow the scopes down to the base where I actually want to
 	   elaborate the NetNet object. */
-      { hname_t tmp_path = hname_;
-        free(tmp_path.remove_tail_name());
-	for (unsigned idx = 0 ;  tmp_path.peek_name(idx) ;  idx += 1) {
-	      scope = scope->child(tmp_path.peek_name(idx));
+      { pform_name_t tmp_path = hname_;
+        tmp_path.pop_back();
+	while (! tmp_path.empty()) {
+	      name_component_t cur = tmp_path.front();
+	      tmp_path.pop_front();
+
+	      scope = scope->child( hname_t(cur.name) );
 
 	      if (scope == 0) {
 		    cerr << get_line() << ": internal error: "
@@ -499,7 +579,7 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
 		  }
 
 		  NetEConst*tmp;
-		  NetExpr*texpr = elab_and_eval(des, scope, msb_[idx]);
+		  NetExpr*texpr = elab_and_eval(des, scope, msb_[idx], -1);
 
 		  tmp = dynamic_cast<NetEConst*>(texpr);
 		  if (tmp == 0) {
@@ -507,20 +587,20 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
 			      "Unable to evaluate constant expression ``" <<
 			      *msb_[idx] << "''." << endl;
 			des->errors += 1;
-			return;
+			return 0;
 		  }
 
 		  mnum[idx] = tmp->value().as_long();
 		  delete texpr;
 
-		  texpr = elab_and_eval(des, scope, lsb_[idx]);
+		  texpr = elab_and_eval(des, scope, lsb_[idx], -1);
 		  tmp = dynamic_cast<NetEConst*>(texpr);
 		  if (tmp == 0) {
 			cerr << msb_[idx]->get_line() << ": error: "
 			      "Unable to evaluate constant expression ``" <<
 			      *lsb_[idx] << "''." << endl;
 			des->errors += 1;
-			return;
+			return 0;
 		  }
 
 		  lnum[idx] = tmp->value().as_long();
@@ -536,7 +616,7 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
 		       << "'' declared both as a vector and a scalar."
 		       << endl;
 		  des->errors += 1;
-		  return;
+		  return 0;
 	    }
 
 
@@ -549,7 +629,7 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
 			      " vs. [" << mnum[0] << ":" << lnum[0] << "]"
 			      " for signal ``" << hname_ << "''" << endl;
 			des->errors += 1;
-			return;
+			return 0;
 		  }
 	    }
 
@@ -567,6 +647,10 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
       attrib_list_t*attrib_list = evaluate_attributes(attributes, nattrib,
 						      des, scope);
 
+      long array_s0 = 0;
+      long array_e0 = 0;
+      unsigned array_dimensions = 0;
+
 	/* If the ident has idx expressions, then this is a
 	   memory. It can only have the idx registers after the msb
 	   and lsb expressions are filled. And, if it has one index,
@@ -574,15 +658,15 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
       if (lidx_ || ridx_) {
 	    assert(lidx_ && ridx_);
 
-	    NetExpr*lexp = elab_and_eval(des, scope, lidx_);
-	    NetExpr*rexp = elab_and_eval(des, scope, ridx_);
+	    NetExpr*lexp = elab_and_eval(des, scope, lidx_, -1);
+	    NetExpr*rexp = elab_and_eval(des, scope, ridx_, -1);
 
 	    if ((lexp == 0) || (rexp == 0)) {
 		  cerr << get_line() << ": internal error: There is "
 		       << "a problem evaluating indices for ``"
-		       << hname_.peek_tail_name() << "''." << endl;
+		       << hname_ << "''." << endl;
 		  des->errors += 1;
-		  return;
+		  return 0;
 	    }
 
 	    NetEConst*lcon = dynamic_cast<NetEConst*> (lexp);
@@ -590,10 +674,10 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
 
 	    if ((lcon == 0) || (rcon == 0)) {
 		  cerr << get_line() << ": internal error: The indices "
-		       << "are not constant for memory ``"
-		       << hname_.peek_tail_name() << "''." << endl;
+		       << "are not constant for array ``"
+		       << hname_ << "''." << endl;
 		  des->errors += 1;
-		  return;
+		  return 0;
 	    }
 
 	    verinum lval = lcon->value();
@@ -602,75 +686,127 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
 	    delete lexp;
 	    delete rexp;
 
-	    perm_string name = lex_strings.make(hname_.peek_tail_name());
-
-	    long lnum = lval.as_long();
-	    long rnum = rval.as_long();
-
-	    new NetMemory(scope, name, wid, lnum, rnum);
-	      // The constructor automatically adds the memory object
-	      // to the scope. Do I need to set line number information?
-
-      } else {
-
-	      /* If the net type is supply0 or supply1, replace it
-		 with a simple wire with a pulldown/pullup with supply
-		 strength. In other words, transform:
-
-		 supply0 foo;
-
-		 to:
-
-		 wire foo;
-		 pulldown #(supply0) (foo);
-
-		 This reduces the backend burden, and behaves exactly
-		 the same. */
-
-	    NetLogic*pull = 0;
-	    if (wtype == NetNet::SUPPLY0 || wtype == NetNet::SUPPLY1) {
-		  NetLogic::TYPE pull_type = (wtype==NetNet::SUPPLY1)
-			? NetLogic::PULLUP
-			: NetLogic::PULLDOWN;
-		  pull = new NetLogic(scope, scope->local_symbol(),
-				      1, pull_type, wid);
-		  pull->set_line(*this);
-		  pull->pin(0).drive0(Link::SUPPLY);
-		  pull->pin(0).drive1(Link::SUPPLY);
-		  des->add_node(pull);
-		  wtype = NetNet::WIRE;
-
-		  if (debug_elaborate) {
-			cerr << get_line() << ": debug: "
-			     << "Generate a SUPPLY pulldown for the "
-			     << "supply0 net." << endl;
-		  }
-	    }
-
-	    perm_string name = lex_strings.make(hname_.peek_tail_name());
-	    if (debug_elaborate) {
-		  cerr << get_line() << ": debug: Create signal "
-		       << name << "["<<msb<<":"<<lsb<<"]"
-		       << " in scope " << scope->name() << endl;
-	    }
-
-	    NetNet*sig = new NetNet(scope, name, wtype, msb, lsb);
-	    sig->data_type(data_type_);
-	    sig->set_line(*this);
-	    sig->port_type(port_type_);
-	    sig->set_signed(get_signed());
-	    sig->set_isint(get_isint());
-
-	    if (pull)
-		  connect(sig->pin(0), pull->pin(0));
-
-	    for (unsigned idx = 0 ;  idx < nattrib ;  idx += 1)
-		  sig->attribute(attrib_list[idx].key, attrib_list[idx].val);
+	    array_dimensions = 1;
+	    array_s0 = lval.as_long();
+	    array_e0 = rval.as_long();
       }
+
+	/* If the net type is supply0 or supply1, replace it
+	   with a simple wire with a pulldown/pullup with supply
+	   strength. In other words, transform:
+
+	   supply0 foo;
+
+	   to:
+
+	   wire foo;
+	   pulldown #(supply0) (foo);
+
+	   This reduces the backend burden, and behaves exactly
+	   the same. */
+
+      NetLogic*pull = 0;
+      if (wtype == NetNet::SUPPLY0 || wtype == NetNet::SUPPLY1) {
+	    NetLogic::TYPE pull_type = (wtype==NetNet::SUPPLY1)
+		  ? NetLogic::PULLUP
+		  : NetLogic::PULLDOWN;
+	    pull = new NetLogic(scope, scope->local_symbol(),
+				1, pull_type, wid);
+	    pull->set_line(*this);
+	    pull->pin(0).drive0(Link::SUPPLY);
+	    pull->pin(0).drive1(Link::SUPPLY);
+	    des->add_node(pull);
+	    wtype = NetNet::WIRE;
+
+	    if (debug_elaborate) {
+		  cerr << get_line() << ": debug: "
+		       << "Generate a SUPPLY pulldown for the "
+		       << "supply0 net." << endl;
+	    }
+      }
+
+      perm_string name = peek_tail_name(hname_);
+      if (debug_elaborate) {
+	    cerr << get_line() << ": debug: Create signal "
+		 << wtype << " ["<<msb<<":"<<lsb<<"] " << name
+		 << " in scope " << scope_path(scope) << endl;
+      }
+
+
+      NetNet*sig = array_dimensions > 0
+	    ? new NetNet(scope, name, wtype, msb, lsb, array_s0, array_e0)
+	    : new NetNet(scope, name, wtype, msb, lsb);
+
+      ivl_variable_type_t use_data_type = data_type_;
+      if (use_data_type == IVL_VT_NO_TYPE) {
+	    use_data_type = IVL_VT_LOGIC;
+	    if (debug_elaborate) {
+		  cerr << get_line() << ": debug: "
+		       << "Signal " << name
+		       << " in scope " << scope_path(scope)
+		       << " defaults to data type " << use_data_type << endl;
+	    }
+      }
+
+      sig->data_type(use_data_type);
+      sig->set_line(*this);
+      sig->port_type(port_type_);
+      sig->set_signed(get_signed());
+      sig->set_isint(get_isint());
+
+      if (pull)
+	    connect(sig->pin(0), pull->pin(0));
+
+      for (unsigned idx = 0 ;  idx < nattrib ;  idx += 1)
+	    sig->attribute(attrib_list[idx].key, attrib_list[idx].val);
+
+      return sig;
 }
 
 /*
  * $Log: elab_sig.cc,v $
+ * Revision 1.52  2007/06/02 03:42:12  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.51  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.50  2007/04/26 03:06:22  steve
+ *  Rework hname_t to use perm_strings.
+ *
+ * Revision 1.49  2007/04/02 01:12:34  steve
+ *  Seperate arrayness from word count
+ *
+ * Revision 1.48  2007/03/08 06:11:35  steve
+ *  Elaborate scopes of modules instantated in generate loops.
+ *
+ * Revision 1.47  2007/03/07 04:24:59  steve
+ *  Make integer width controllable.
+ *
+ * Revision 1.46  2007/03/06 05:22:49  steve
+ *  Support signed function return values.
+ *
+ * Revision 1.45  2007/02/01 05:24:08  steve
+ *  Include type in signal create message.
+ *
+ * Revision 1.44  2007/01/29 02:07:34  steve
+ *  Types of task/function arguments set in multiple steps.
+ *
+ * Revision 1.43  2007/01/16 05:44:15  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
+ *
+ * Revision 1.42  2006/06/02 04:48:50  steve
+ *  Make elaborate_expr methods aware of the width that the context
+ *  requires of it. In the process, fix sizing of the width of unary
+ *  minus is context determined sizes.
+ *
+ * Revision 1.41  2006/04/10 00:37:42  steve
+ *  Add support for generate loops w/ wires and gates.
+ *
  * Revision 1.40  2005/07/11 16:56:50  steve
  *  Remove NetVariable and ivl_variable_t structures.
  *

emit.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: emit.cc,v 1.86 2005/07/11 16:56:50 steve Exp $"
+#ident "$Id: emit.cc,v 1.89 2007/01/16 05:44:15 steve Exp $"
 #endif
 
 # include "config.h"
@@ -57,6 +57,11 @@ bool NetAddSub::emit_node(struct target_t*tgt) const
       return true;
 }
 
+bool NetArrayDq::emit_node(struct target_t*tgt) const
+{
+      return tgt->lpm_array_dq(this);
+}
+
 bool NetCaseCmp::emit_node(struct target_t*tgt) const
 {
       tgt->net_case_cmp(this);
@@ -125,12 +130,6 @@ bool NetPartSelect::emit_node(struct target_t*tgt) const
       return tgt->part_select(this);
 }
 
-bool NetRamDq::emit_node(struct target_t*tgt) const
-{
-      tgt->lpm_ram_dq(this);
-      return true;
-}
-
 bool NetReplicate::emit_node(struct target_t*tgt) const
 {
       return tgt->replicate(this);
@@ -146,6 +145,10 @@ bool NetUReduce::emit_node(struct target_t*tgt) const
       return tgt->ureduce(this);
 }
 
+bool NetSysFunc::emit_node(struct target_t*tgt) const
+{
+      return tgt->net_sysfunction(this);
+}
 
 bool NetUserFunc::emit_node(struct target_t*tgt) const
 {
@@ -340,15 +343,19 @@ void NetScope::emit_scope(struct target_t*tgt) const
 		  tgt->signal(cur);
 		  cur = cur->sig_next_;
 	    } while (cur != signals_->sig_next_);
+
+	      /* Run the signals again, but this time to connect the
+	         delay paths. This is done as a second pass because
+	         the paths reference other signals that may be later
+	         in the list. We can do it here becase delay paths are
+	         always connected within the scope. */
+	    cur = signals_->sig_next_;
+	    do {
+		  tgt->signal_paths(cur);
+		  cur = cur->sig_next_;
+	    } while (cur != signals_->sig_next_);
       }
 
-      if (memories_) {
-	    NetMemory*cur = memories_->snext_;
-	    do {
-		  tgt->memory(cur);
-		  cur = cur->snext_;
-	    } while (cur != memories_->snext_);
-      }
 }
 
 bool NetScope::emit_defs(struct target_t*tgt) const
@@ -457,11 +464,6 @@ void NetECRealParam::expr_scan(struct expr_scan_t*tgt) const
       tgt->expr_rparam(this);
 }
 
-void NetEMemory::expr_scan(struct expr_scan_t*tgt) const
-{
-      tgt->expr_memory(this);
-}
-
 void NetEParam::expr_scan(struct expr_scan_t*tgt) const
 {
       cerr << get_line() << ":internal error: unexpected NetEParam."
@@ -525,6 +527,18 @@ int emit(const Design*des, const char*type)
 
 /*
  * $Log: emit.cc,v $
+ * Revision 1.89  2007/01/16 05:44:15  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
+ *
+ * Revision 1.88  2006/11/10 05:44:44  steve
+ *  Process delay paths in second path over signals.
+ *
+ * Revision 1.87  2006/06/18 04:15:50  steve
+ *  Add support for system functions in continuous assignments.
+ *
  * Revision 1.86  2005/07/11 16:56:50  steve
  *  Remove NetVariable and ivl_variable_t structures.
  *

eval.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: eval.cc,v 1.36 2003/06/21 01:21:43 steve Exp $"
+#ident "$Id: eval.cc,v 1.47 2007/06/04 19:14:06 steve Exp $"
 #endif
 
 # include "config.h"
@@ -26,14 +26,15 @@
 
 # include  "PExpr.h"
 # include  "netlist.h"
+# include  "netmisc.h"
 # include  "compiler.h"
 
-verinum* PExpr::eval_const(const Design*, const NetScope*) const
+verinum* PExpr::eval_const(Design*, NetScope*) const
 {
       return 0;
 }
 
-verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
+verinum* PEBinary::eval_const(Design*des, NetScope*scope) const
 {
       verinum*l = left_->eval_const(des, scope);
       if (l == 0) return 0;
@@ -142,16 +143,51 @@ verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
       delete r;
       return res;
 }
+verinum* PEConcat::eval_const(Design*des, NetScope*scope) const
+{
+      verinum*accum = parms_[0]->eval_const(des, scope);
+      if (accum == 0)
+	    return 0;
+
+      for (unsigned idx = 1 ;  idx < parms_.count() ;  idx += 1) {
+
+	    verinum*tmp = parms_[idx]->eval_const(des, scope);
+	    if (tmp == 0) {
+		  delete accum;
+		  return 0;
+	    }
+	    assert(tmp);
+
+	    *accum = concat(*accum, *tmp);
+	    delete tmp;
+      }
+
+      return accum;
+}
 
 
 /*
  * Evaluate an identifier as a constant expression. This is only
  * possible if the identifier is that of a parameter.
  */
-verinum* PEIdent::eval_const(const Design*des, const NetScope*scope) const
+verinum* PEIdent::eval_const(Design*des, NetScope*scope) const
 {
       assert(scope);
-      const NetExpr*expr = des->find_parameter(scope, path_);
+      NetNet*net;
+      NetEvent*eve;
+      const NetExpr*expr;
+
+      const name_component_t&name_tail = path_.back();
+
+	// Handle the special case that this ident is a genvar
+	// variable name. In that case, the genvar meaning preempts
+	// everything and we just return that value immediately.
+      if (scope->genvar_tmp
+	  && strcmp(name_tail.name,scope->genvar_tmp) == 0) {
+	    return new verinum(scope->genvar_tmp_val);
+      }
+
+      symbol_search(des, scope, path_, net, expr, eve);
 
       if (expr == 0)
 	    return 0;
@@ -166,30 +202,30 @@ verinum* PEIdent::eval_const(const Design*des, const NetScope*scope) const
 
       assert(eval);
 
-      if (msb_ || lsb_)
+      if (!name_tail.index.empty())
 	    return 0;
 
 
       return new verinum(eval->value());
 }
 
-verinum* PEFNumber::eval_const(const Design*, const NetScope*) const
+verinum* PEFNumber::eval_const(Design*, NetScope*) const
 {
       long val = value_->as_long();
       return new verinum(val);
 }
 
-verinum* PENumber::eval_const(const Design*, const NetScope*) const
+verinum* PENumber::eval_const(Design*, NetScope*) const
 {
       return new verinum(value());
 }
 
-verinum* PEString::eval_const(const Design*, const NetScope*) const
+verinum* PEString::eval_const(Design*, NetScope*) const
 {
       return new verinum(string(text_));
 }
 
-verinum* PETernary::eval_const(const Design*des, const NetScope*scope) const
+verinum* PETernary::eval_const(Design*des, NetScope*scope) const
 {
       verinum*test = expr_->eval_const(des, scope);
       if (test == 0)
@@ -209,7 +245,7 @@ verinum* PETernary::eval_const(const Design*des, const NetScope*scope) const
       }
 }
 
-verinum* PEUnary::eval_const(const Design*des, const NetScope*scope) const
+verinum* PEUnary::eval_const(Design*des, NetScope*scope) const
 {
       verinum*val = expr_->eval_const(des, scope);
       if (val == 0)
@@ -223,7 +259,7 @@ verinum* PEUnary::eval_const(const Design*des, const NetScope*scope) const
 		  /* We need to expand the value a bit if we are
 		     taking the 2's complement so that we are
 		     guaranteed to not overflow. */
-		verinum tmp (0UL, val->len()+1);
+		verinum tmp ((uint64_t)0, val->len()+1);
 		for (unsigned idx = 0 ;  idx < val->len() ;  idx += 1)
 		      tmp.set(idx, val->get(idx));
 
@@ -240,6 +276,43 @@ verinum* PEUnary::eval_const(const Design*des, const NetScope*scope) const
 
 /*
  * $Log: eval.cc,v $
+ * Revision 1.47  2007/06/04 19:14:06  steve
+ *  Build errors in picky GCC compilers.
+ *
+ * Revision 1.46  2007/05/24 04:07:12  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.45  2007/03/07 00:38:15  steve
+ *  Lint fixes.
+ *
+ * Revision 1.44  2007/01/16 05:44:15  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
+ *
+ * Revision 1.43  2006/08/08 05:11:37  steve
+ *  Handle 64bit delay constants.
+ *
+ * Revision 1.42  2006/05/19 04:07:24  steve
+ *  eval_const is not strict.
+ *
+ * Revision 1.41  2006/05/17 16:49:30  steve
+ *  Error message if concat expression cannot evaluate.
+ *
+ * Revision 1.40  2006/04/10 00:37:42  steve
+ *  Add support for generate loops w/ wires and gates.
+ *
+ * Revision 1.39  2005/12/07 04:04:23  steve
+ *  Allow constant concat expressions.
+ *
+ * Revision 1.38  2005/11/27 17:01:57  steve
+ *  Fix for stubborn compiler.
+ *
+ * Revision 1.37  2005/11/27 05:56:20  steve
+ *  Handle bit select of parameter with ranges.
+ *
  * Revision 1.36  2003/06/21 01:21:43  steve
  *  Harmless fixup of warnings.
  *

eval_attrib.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: eval_attrib.cc,v 1.7 2004/02/20 18:53:35 steve Exp $"
+#ident "$Id: eval_attrib.cc,v 1.9 2007/06/04 19:14:06 steve Exp $"
 #endif
 
 # include  "config.h"
@@ -35,8 +35,7 @@
 
 attrib_list_t* evaluate_attributes(const map<perm_string,PExpr*>&att,
 				   unsigned&natt,
-				   const Design*des,
-				   const NetScope*scope)
+				   Design*des, NetScope*scope)
 {
       natt = att.size();
       if (natt == 0)
@@ -74,6 +73,12 @@ attrib_list_t* evaluate_attributes(const map<perm_string,PExpr*>&att,
 
 /*
  * $Log: eval_attrib.cc,v $
+ * Revision 1.9  2007/06/04 19:14:06  steve
+ *  Build errors in picky GCC compilers.
+ *
+ * Revision 1.8  2005/11/27 17:01:57  steve
+ *  Fix for stubborn compiler.
+ *
  * Revision 1.7  2004/02/20 18:53:35  steve
  *  Addtrbute keys are perm_strings.
  *

eval_tree.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: eval_tree.cc,v 1.65 2005/09/14 02:53:14 steve Exp $"
+#ident "$Id: eval_tree.cc,v 1.77 2007/06/02 03:42:12 steve Exp $"
 #endif
 
 # include "config.h"
@@ -26,8 +26,9 @@
 # include  <iostream>
 
 # include  "netlist.h"
+# include  "ivl_assert.h"
 
-NetExpr* NetExpr::eval_tree()
+NetExpr* NetExpr::eval_tree(int prune_to_width)
 {
       return 0;
 }
@@ -51,33 +52,148 @@ void NetEBinary::eval_sub_tree_()
       }
 }
 
-NetEConst* NetEBAdd::eval_tree()
+bool NetEBinary::get_real_arguments_(verireal&lval, verireal&rval)
+{
+      switch (left_->expr_type()) {
+	  case IVL_VT_REAL: {
+		NetECReal*lc = dynamic_cast<NetECReal*> (left_);
+		if (lc == 0) return false;
+		lval = lc->value();
+		break;
+	  }
+
+	  case IVL_VT_BOOL:
+	  case IVL_VT_LOGIC: {
+		NetEConst*lc = dynamic_cast<NetEConst*>(left_);
+		if (lc == 0) return false;
+		verinum tmp = lc->value();
+		lval = verireal(tmp.as_long());
+		break;
+	  }
+
+	  default:
+	    assert(0);
+      }
+
+      switch (right_->expr_type()) {
+	  case IVL_VT_REAL: {
+		NetECReal*rc = dynamic_cast<NetECReal*> (right_);
+		if (rc == 0) return 0;
+		rval = rc->value();
+		break;
+	  }
+
+	  case IVL_VT_BOOL:
+	  case IVL_VT_LOGIC: {
+		NetEConst*rc = dynamic_cast<NetEConst*>(right_);
+		if (rc == 0) return 0;
+		verinum tmp = rc->value();
+		rval = verireal(tmp.as_long());
+		break;
+	  }
+
+	  default:
+	    assert(0);
+      }
+
+
+      return true;
+}
+
+NetExpr* NetEBAdd::eval_tree(int prune_to_width)
 {
       eval_sub_tree_();
+
+      if (left_->expr_type() == IVL_VT_REAL || right_->expr_type()==IVL_VT_REAL)
+	    return eval_tree_real_();
+
       NetEConst*lc = dynamic_cast<NetEConst*>(left_);
-      if (lc == 0) return 0;
       NetEConst*rc = dynamic_cast<NetEConst*>(right_);
-      if (rc == 0) return 0;
 
-      verinum lval = lc->value();
-      verinum rval = rc->value();
+	/* If both operands are constant, then replace the entire
+	   expression with a constant value. */
+      if (lc != 0 && rc != 0) {
+	    verinum lval = lc->value();
+	    verinum rval = rc->value();
 
-      verinum val;
-      switch (op_) {
-	  case '+':
-	    val = lval + rval;
-	    break;
-	  case '-':
-	    val = lval - rval;
-	    break;
-	  default:
+	    verinum val;
+	    switch (op_) {
+		case '+':
+		  val = lval + rval;
+		  break;
+		case '-':
+		  val = lval - rval;
+		  break;
+		default:
+		  return 0;
+	    }
+
+	    return new NetEConst(val);
+      }
+
+	/* Try to combine a right constant value with the right
+	   constant value of a sub-expression add. For example, the
+	   expression (a + 2) - 1 can be rewritten as a + 1. */
+
+      NetEBAdd*se = dynamic_cast<NetEBAdd*>(left_);
+      lc = se? dynamic_cast<NetEConst*>(se->right_) : 0;
+
+      if (lc != 0 && rc != 0) {
+	    assert(se != 0);
+	    verinum lval = lc->value();
+	    verinum rval = rc->value();
+
+	    verinum val;
+	    if (op_ == se->op_) {
+		    /* (a + lval) + rval  --> a + (rval+lval) */
+		    /* (a - lval) - rval  --> a - (rval+lval) */
+		  val = rval + lval;
+	    } else {
+		    /* (a - lval) + rval  -->  a + (rval-lval) */
+		    /* (a + lval) - rval  -->  a - (rval-lval) */
+		  val = rval - lval;
+	    }
+
+	    NetEConst*tmp = new NetEConst(val);
+	    left_ = se->left_->dup_expr();
+	    delete se;
+	    delete right_;
+	    right_ = tmp;
+	      /* We've changed the subexpression, but the result is
+		 still not constant, so return nil here anyhow. */
 	    return 0;
       }
 
-      return new NetEConst(val);
+	/* Nothing more to be done, the value is not constant. */
+      return 0;
 }
 
-NetEConst* NetEBBits::eval_tree()
+NetECReal* NetEBAdd::eval_tree_real_()
+{
+      verireal lval;
+      verireal rval;
+      bool flag = get_real_arguments_(lval, rval);
+      if (!flag) return 0;
+
+      verireal res_val;
+
+      switch (op()) {
+	  case '+':
+	    res_val = lval + rval;
+	    break;
+	  case '-':
+	    res_val = lval - rval;
+	    break;
+	  default:
+	    ivl_assert(*this, 0);
+      }
+
+      NetECReal*res = new NetECReal( res_val );
+      res->set_line(*this);
+      return res;
+}
+
+NetEConst* NetEBBits::eval_tree(int prune_to_width)
 {
       eval_sub_tree_();
 
@@ -175,43 +291,6 @@ NetEConst* NetEBBits::eval_tree()
       return new NetEConst(res);
 }
 
-NetEConst* NetEBComp::eval_eqeq_()
-{
-      NetEConst*l = dynamic_cast<NetEConst*>(left_);
-      if (l == 0) return 0;
-      NetEConst*r = dynamic_cast<NetEConst*>(right_);
-      if (r == 0) return 0;
-
-      const verinum&lv = l->value();
-      const verinum&rv = r->value();
-
-      unsigned s_len = lv.len();
-      if (rv.len() < s_len) s_len = rv.len();
-
-      verinum result(verinum::V1, 1);
-      for (unsigned idx = 0 ; idx < s_len; idx += 1) {
-	    if (lv[idx] != rv[idx])
-		  result = verinum::V0;
-      }
-
-      // If one operand was wider than the other, check that the
-      // remaining bits are all zero
-      if (lv.len() > s_len) {
-	    for (unsigned idx = s_len; idx < lv.len(); idx += 1) {
-		  if (lv[idx] != 0)
-			result = verinum::V0;
-	    }
-      }
-      if (rv.len() > s_len) {
-	    for (unsigned idx = s_len; idx < rv.len(); idx += 1) {
-		  if (rv[idx] != 0)
-			result = verinum::V0;
-	    }
-      }
-
-      return new NetEConst(result);
-}
-
 
 NetEConst* NetEBComp::eval_less_()
 {
@@ -517,21 +596,25 @@ NetEConst* NetEBComp::eval_gteq_()
 	    return new NetEConst(result);
       }
 
-      if (lv.has_sign() && rv.has_sign() && (lv.as_long() >= rv.as_long())) {
-	    verinum result(verinum::V1, 1);
-	    return new NetEConst(result);
-      }
+      if (lv.has_sign() && rv.has_sign()) {
 
-      if (lv.as_ulong() >= rv.as_ulong()) {
-	    verinum result(verinum::V1, 1);
-	    return new NetEConst(result);
+	    if (lv.as_long() >= rv.as_long()) {
+		  verinum result(verinum::V1, 1);
+		  return new NetEConst(result);
+	    }
+      } else {
+
+	    if (lv.as_ulong() >= rv.as_ulong()) {
+		  verinum result(verinum::V1, 1);
+		  return new NetEConst(result);
+	    }
       }
 
       verinum result(verinum::V0, 1);
       return new NetEConst(result);
 }
 
-NetEConst* NetEBComp::eval_neeq_()
+NetEConst* NetEBComp::eval_eqeq_(bool ne_flag)
 {
       NetEConst*l = dynamic_cast<NetEConst*>(left_);
       if (l == 0) return 0;
@@ -541,7 +624,10 @@ NetEConst* NetEBComp::eval_neeq_()
       const verinum&lv = l->value();
       const verinum&rv = r->value();
 
-      verinum::V res = verinum::V0;
+      const verinum::V eq_res = ne_flag? verinum::V0 : verinum::V1;
+      const verinum::V ne_res = ne_flag? verinum::V1 : verinum::V0;
+
+      verinum::V res = eq_res;
       unsigned top = lv.len();
       if (rv.len() < top)
 	    top = rv.len();
@@ -574,10 +660,18 @@ NetEConst* NetEBComp::eval_neeq_()
 		  break;
 
 	    if (rv.get(idx) != lv.get(idx))
-		  res = verinum::V1;
+		  res = ne_res;
       }
 
       if (res != verinum::Vx) {
+	    verinum::V lpad = verinum::V0;
+	    verinum::V rpad = verinum::V0;
+
+	    if (lv.has_sign() && lv.get(lv.len()-1) == verinum::V1)
+		  lpad = verinum::V1;
+	    if (rv.has_sign() && rv.get(rv.len()-1) == verinum::V1)
+		  rpad = verinum::V1;
+
 	    for (unsigned idx = top ;  idx < lv.len() ;  idx += 1)
 		  switch (lv.get(idx)) {
 
@@ -586,9 +680,14 @@ NetEConst* NetEBComp::eval_neeq_()
 			res = verinum::Vx;
 			break;
 
+		      case verinum::V0:
+			if (res != verinum::Vx && rpad != verinum::V0)
+			      res = ne_res;
+			break;
+
 		      case verinum::V1:
-			if (res != verinum::Vx)
-			      res = verinum::V1;
+			if (res != verinum::Vx && rpad != verinum::V1)
+			      res = ne_res;
 			break;
 
 		      default:
@@ -603,9 +702,14 @@ NetEConst* NetEBComp::eval_neeq_()
 			res = verinum::Vx;
 			break;
 
+		      case verinum::V0:
+			if (res != verinum::Vx && lpad != verinum::V0)
+			      res = ne_res;
+			break;
+
 		      case verinum::V1:
-			if (res != verinum::Vx)
-			      res = verinum::V1;
+			if (res != verinum::Vx && lpad != verinum::V1)
+			      res = ne_res;
 			break;
 
 		      default:
@@ -664,7 +768,7 @@ NetEConst* NetEBComp::eval_neeqeq_()
       return res;
 }
 
-NetEConst* NetEBComp::eval_tree()
+NetEConst* NetEBComp::eval_tree(int prune_to_width)
 {
       eval_sub_tree_();
 
@@ -673,7 +777,7 @@ NetEConst* NetEBComp::eval_tree()
 	    return eval_eqeqeq_();
 
 	  case 'e': // Equality (==)
-	    return eval_eqeq_();
+	    return eval_eqeq_(false);
 
 	  case 'G': // >=
 	    return eval_gteq_();
@@ -685,7 +789,7 @@ NetEConst* NetEBComp::eval_tree()
 	    return eval_neeqeq_();
 
 	  case 'n': // not-equal (!=)
-	    return eval_neeq_();
+	    return eval_eqeq_(true);
 
 	  case '<': // Less than
 	    return eval_less_();
@@ -702,7 +806,7 @@ NetEConst* NetEBComp::eval_tree()
  * The NetEBDiv operator includes the / and % operators. First evaluate
  * the sub-expressions, then perform the required operation.
  */
-NetExpr* NetEBDiv::eval_tree()
+NetExpr* NetEBDiv::eval_tree(int prune_to_width)
 {
       eval_sub_tree_();
 
@@ -772,7 +876,7 @@ NetExpr* NetEBDiv::eval_tree()
       return 0;
 }
 
-NetEConst* NetEBLogic::eval_tree()
+NetEConst* NetEBLogic::eval_tree(int prune_to_width)
 {
       eval_sub_tree_();
       NetEConst*lc = dynamic_cast<NetEConst*>(left_);
@@ -838,52 +942,14 @@ NetEConst* NetEBLogic::eval_tree()
       return new NetEConst(verinum(res, 1));
 }
 
+
 NetExpr* NetEBMult::eval_tree_real_()
 {
       verireal lval;
       verireal rval;
 
-      switch (left_->expr_type()) {
-	  case IVL_VT_REAL: {
-		NetECReal*lc = dynamic_cast<NetECReal*> (left_);
-		if (lc == 0) return 0;
-		lval = lc->value();
-		break;
-	  }
-
-	  case IVL_VT_BOOL:
-	  case IVL_VT_LOGIC: {
-		NetEConst*lc = dynamic_cast<NetEConst*>(left_);
-		if (lc == 0) return 0;
-		verinum tmp = lc->value();
-		lval = verireal(tmp.as_long());
-		break;
-	  }
-
-	  default:
-	    assert(0);
-      }
-
-      switch (right_->expr_type()) {
-	  case IVL_VT_REAL: {
-		NetECReal*rc = dynamic_cast<NetECReal*> (right_);
-		if (rc == 0) return 0;
-		rval = rc->value();
-		break;
-	  }
-
-	  case IVL_VT_BOOL:
-	  case IVL_VT_LOGIC: {
-		NetEConst*rc = dynamic_cast<NetEConst*>(right_);
-		if (rc == 0) return 0;
-		verinum tmp = rc->value();
-		rval = verireal(tmp.as_long());
-		break;
-	  }
-
-	  default:
-	    assert(0);
-      }
+      bool flag = get_real_arguments_(lval, rval);
+      if (! flag) return 0;
 
 
       NetECReal*res = new NetECReal(lval * rval);
@@ -891,7 +957,7 @@ NetExpr* NetEBMult::eval_tree_real_()
       return res;
 }
 
-NetExpr* NetEBMult::eval_tree()
+NetExpr* NetEBMult::eval_tree(int prune_to_width)
 {
       eval_sub_tree_();
 
@@ -911,11 +977,45 @@ NetExpr* NetEBMult::eval_tree()
       return new NetEConst(lval * rval);
 }
 
+NetExpr* NetEBPow::eval_tree_real_()
+{
+      verireal lval;
+      verireal rval;
+
+      bool flag = get_real_arguments_(lval, rval);
+      if (! flag) return 0;
+
+      NetECReal*res = new NetECReal( pow(lval,rval) );
+      res->set_line(*this);
+      return res;
+}
+
+NetExpr* NetEBPow::eval_tree(int prune_to_width)
+{
+      eval_sub_tree_();
+
+      if (expr_type() == IVL_VT_REAL)
+	    return eval_tree_real_();
+
+      assert(expr_type() == IVL_VT_LOGIC);
+
+      NetEConst*lc = dynamic_cast<NetEConst*>(left_);
+      if (lc == 0) return 0;
+      NetEConst*rc = dynamic_cast<NetEConst*>(right_);
+      if (rc == 0) return 0;
+
+      verinum lval = lc->value();
+      verinum rval = rc->value();
+
+      return new NetEConst( pow(lval,rval) );
+
+}
+
 /*
  * Evaluate the shift operator if possible. For this to work, both
  * operands must be constant.
  */
-NetEConst* NetEBShift::eval_tree()
+NetEConst* NetEBShift::eval_tree(int prune_to_width)
 {
       eval_sub_tree_();
       NetEConst*re = dynamic_cast<NetEConst*>(right_);
@@ -938,6 +1038,13 @@ NetEConst* NetEBShift::eval_tree()
 
 	    unsigned shift = rv.as_ulong();
 
+	    if (debug_eval_tree) {
+		  cerr << get_line() << ": debug: "
+		       << "Evaluate " << lv << "<<" << op() << ">> "
+		       << rv << ", wid=" << wid << ", shift=" << shift
+		       << ", lv.has_len()=" << lv.has_len() << endl;
+	    }
+
 	    if ((wid == 0) || ! lv.has_len()) {
 		    /* If the caller doesn't care what the width is,
 		       then calcuate a width from the trimmed left
@@ -949,6 +1056,9 @@ NetEConst* NetEBShift::eval_tree()
 			wid = lv.len() + shift;
 	    }
 
+	    if (prune_to_width > 0 && wid > (unsigned)prune_to_width)
+		  wid = prune_to_width;
+
 	    assert(wid);
 	    verinum nv (verinum::V0, wid, lv.has_len());
 
@@ -989,7 +1099,7 @@ NetEConst* NetEBShift::eval_tree()
       return res;
 }
 
-NetEConst* NetEConcat::eval_tree()
+NetEConst* NetEConcat::eval_tree(int prune_to_width)
 {
       unsigned repeat_val = repeat();
       unsigned local_errors = 0;
@@ -1083,61 +1193,26 @@ NetEConst* NetEConcat::eval_tree()
       return res;
 }
 
-/*
- * There are limits to our ability to evaluate a memory reference
- * expression, because the content of a memory is never
- * constant. However, the index expression may be precalculated, and
- * there are certain index values that do give us constant results.
- */
-NetExpr* NetEMemory::eval_tree()
+NetExpr* NetEParam::eval_tree(int prune_to_width)
 {
-	/* Attempt to evaluate the index expression to a constant, if
-	   it is not already. */
-      if (idx_ && !dynamic_cast<NetEConst*>(idx_)) {
-	    NetExpr* tmp = idx_->eval_tree();
-	    if (tmp) {
-		  delete idx_;
-		  idx_ = tmp;
-	    }
-      }
-
-      NetEConst*itmp = dynamic_cast<NetEConst*>(idx_);
-      if (itmp == 0)
+      if (des_ == 0) {
+	    assert(scope_ == 0);
 	    return 0;
-
-      verinum ival = itmp->value();
-
-	/* If the index expression has any x or z bits, then we know
-	   already that the expression result is a constant x. */
-      if (! ival.is_defined()) {
-	    verinum xres (verinum::Vx, mem_->width(), false);
-	    NetEConst*res = new NetEConst(xres);
-	    return res;
       }
 
-	/* If the index expression is outside the range of the memory,
-	   then the result is a constant x. */
-      unsigned norm_idx = mem_->index_to_address(ival.as_long());
-      if (norm_idx >= mem_->count()) {
-	    verinum xres (verinum::Vx, mem_->width(), false);
-	    NetEConst*res = new NetEConst(xres);
-	    return res;
+      if (debug_elaborate) {
+	    cerr << get_line() << ": debug: evaluating expression: "
+		 << *this << endl;
       }
 
-      return 0;
-}
-
-NetExpr* NetEParam::eval_tree()
-{
-      if (des_ == 0)
-	    return 0;
-
       assert(scope_);
-      const NetExpr*expr = scope_->get_parameter(name_);
+      const NetExpr*expr_msb;
+      const NetExpr*expr_lsb;
+      const NetExpr*expr = scope_->get_parameter(name_, expr_msb, expr_lsb);
       if (expr == 0) {
 	    cerr << get_line() << ": internal error: Unable to match "
 		 << "parameter " << name_ << " in scope "
-		 << scope_->name() << endl;
+		 << scope_path(scope_) << endl;
 	    return 0;
       }
 
@@ -1225,7 +1300,7 @@ NetExpr* NetEParam::eval_tree()
       }
 }
 
-NetEConst* NetESelect::eval_tree()
+NetEConst* NetESelect::eval_tree(int prune_to_width)
 {
       NetEConst*expr = dynamic_cast<NetEConst*>(expr_);
       if (expr == 0) {
@@ -1238,31 +1313,50 @@ NetEConst* NetESelect::eval_tree()
 	    expr = dynamic_cast<NetEConst*>(expr_);
       }
 
-      NetEConst*base = dynamic_cast<NetEConst*>(base_);
-      if (base == 0) {
-	    NetExpr*tmp = base_->eval_tree();
-	    if (tmp != 0) {
-		  delete base_;
-		  base_ = tmp;
+      long bval = 0;
+      if (base_) {
+	    NetEConst*base = dynamic_cast<NetEConst*>(base_);
+	    if (base == 0) {
+		  NetExpr*tmp = base_->eval_tree();
+		  if (tmp != 0) {
+			delete base_;
+			base_ = tmp;
+		  }
+
+		  base = dynamic_cast<NetEConst*>(base_);
 	    }
 
-	    base = dynamic_cast<NetEConst*>(base_);
+	    if (base == 0)
+		  return 0;
+
+	    bval = base->value().as_long();
       }
 
       if (expr == 0)
 	    return 0;
-      if (base == 0)
-	    return 0;
 
       verinum eval = expr->value();
       verinum oval (verinum::V0, expr_width(), true);
-      long bval = base->value().as_long();
+
+      verinum::V pad_bit = verinum::Vx;
+      if (base_ == 0) {
+
+	      /* If the base is NULL (different from 0) the this
+		 select is here for sign extension. So calculate a
+		 proper pad bit. Extend x or z or 0, and sign extend 1
+		 if this is signed. */
+	    unsigned top = expr->expr_width()-1;
+
+	    pad_bit = eval.get(top);
+	    if (pad_bit==verinum::V1 && !has_sign())
+		  pad_bit = verinum::V0;
+      }
 
       for (unsigned long idx = 0 ;  idx < expr_width() ;  idx += 1) {
 	    if ((bval >= 0) && ((unsigned long) bval < eval.len()))
 		  oval.set(idx, eval.get(bval));
 	    else
-		  oval.set(idx, verinum::Vx);
+		  oval.set(idx, pad_bit);
 
 	    bval += 1;
       }
@@ -1279,7 +1373,7 @@ NetEConst* NetESelect::eval_tree()
  * evaluates to x or z, then merge the constant bits of the true and
  * false expressions.
  */
-NetExpr* NetETernary::eval_tree()
+NetExpr* NetETernary::eval_tree(int prune_to_width)
 {
       NetExpr*tmp;
 
@@ -1416,7 +1510,7 @@ void NetEUnary::eval_expr_()
       expr_ = oper;
 }
 
-NetEConst* NetEUnary::eval_tree()
+NetEConst* NetEUnary::eval_tree(int prune_to_width)
 {
       eval_expr_();
       NetEConst*rval = dynamic_cast<NetEConst*>(expr_);
@@ -1473,12 +1567,12 @@ NetEConst* NetEUnary::eval_tree()
 }
 
 
-NetEConst* NetEUBits::eval_tree()
+NetEConst* NetEUBits::eval_tree(int prune_to_width)
 {
-      return NetEUnary::eval_tree();
+      return NetEUnary::eval_tree(prune_to_width);
 }
 
-NetEConst* NetEUReduce::eval_tree()
+NetEConst* NetEUReduce::eval_tree(int prune_to_width)
 {
       eval_expr_();
       NetEConst*rval = dynamic_cast<NetEConst*>(expr_);
@@ -1561,6 +1655,49 @@ NetEConst* NetEUReduce::eval_tree()
 
 /*
  * $Log: eval_tree.cc,v $
+ * Revision 1.77  2007/06/02 03:42:12  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.76  2007/05/31 18:36:06  steve
+ *  Fix warning (ldolittle)
+ *
+ * Revision 1.75  2007/04/07 04:46:18  steve
+ *  Handle evaluate of addition of real valued constants.
+ *
+ * Revision 1.74  2007/03/08 05:30:02  steve
+ *  Limit the calculated widths of constants.
+ *
+ * Revision 1.73  2007/01/16 05:44:15  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
+ *
+ * Revision 1.72  2006/11/04 06:16:27  steve
+ *  Fix padding of constant eval of NetESelect.
+ *
+ * Revision 1.71  2006/10/30 05:44:49  steve
+ *  Expression widths with unsized literals are pseudo-infinite width.
+ *
+ * Revision 1.70  2006/09/19 23:00:15  steve
+ *  Use elab_and_eval for bit select expressions.
+ *
+ * Revision 1.69  2006/07/31 03:50:17  steve
+ *  Add support for power in constant expressions.
+ *
+ * Revision 1.68  2006/03/18 22:52:27  steve
+ *  Properly handle signedness in compare.
+ *
+ * Revision 1.67  2005/11/27 05:56:20  steve
+ *  Handle bit select of parameter with ranges.
+ *
+ * Revision 1.66  2005/11/10 13:28:12  steve
+ *  Reorganize signal part select handling, and add support for
+ *  indexed part selects.
+ *
+ *  Expand expression constant propagation to eliminate extra
+ *  sums in certain cases.
+ *
  * Revision 1.65  2005/09/14 02:53:14  steve
  *  Support bool expressions and compares handle them optimally.
  *

examples/hello_vpi.c

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: hello_vpi.c,v 1.3 2002/08/12 01:35:01 steve Exp $"
+#ident "$Id: hello_vpi.c,v 1.5 2007/01/17 05:35:48 steve Exp $"
 #endif
 
 /*
@@ -33,7 +33,7 @@
 
 # include  <vpi_user.h>
 
-static int my_hello_calltf(char *xx)
+static PLI_INT32 my_hello_calltf(char *xx)
 {
       vpi_printf("Hello World, from VPI.\n");
       return 0;
@@ -62,6 +62,12 @@ void (*vlog_startup_routines[])() = {
 };
 /*
  * $Log: hello_vpi.c,v $
+ * Revision 1.5  2007/01/17 05:35:48  steve
+ *  Fix typo is hello_vpi.c example.
+ *
+ * Revision 1.4  2006/10/30 22:46:25  steve
+ *  Updates for Cygwin portability (pr1585922)
+ *
  * Revision 1.3  2002/08/12 01:35:01  steve
  *  conditional ident string using autoconfig.
  *

examples/sqrt-virtex.v

@@ -16,13 +16,13 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  *
- *   $Id: sqrt-virtex.v,v 1.4 2003/11/25 18:35:31 steve Exp $"
+ *   $Id: sqrt-virtex.v,v 1.5 2007/03/22 16:08:18 steve Exp $"
  */
 
 /*
  * This module is a synthesizeable square-root function. It is also a
  * detailed example of how to target Xilinx Virtex parts using
- * Icarus Verilog. In fact, for no particular reason other then to
+ * Icarus Verilog. In fact, for no particular reason other than to
  * be excessively specific, I will step through the process of
  * generating a design for a Spartan-II XC2S15-VQ100, and also how to
  * generate a generic library part for larger Virtex designs.
@@ -129,7 +129,7 @@
  * This command creates from the chip.ngd the file "chip_root.v" that
  * contains Verilog code that simulates the mapped design. This output
  * Verilog has the single root module "chip_root", which came from the
- * name of the root module when we were making hte EDIF file in the
+ * name of the root module when we were making the EDIF file in the
  * first place. The module has ports named just line the ports of the
  * chip_root module below.
  *
@@ -183,7 +183,7 @@
   * where sqrt(y) is the exact square root of y and floor(N) is the
   * largest integer <= N.
   *
-  * For 32bit numbers, this will never run more then 16 iterations,
+  * For 32 bit numbers, this will never run more than 16 iterations,
   * which amounts to 16 clocks.
   */
 

examples/sqrt.vl

@@ -16,7 +16,7 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  *
- *   $Id: sqrt.vl,v 1.4 2004/10/04 01:10:56 steve Exp $"
+ *   $Id: sqrt.vl,v 1.5 2007/03/22 16:08:18 steve Exp $"
  */
 
  /*
@@ -50,7 +50,7 @@
   * where sqrt(y) is the exact square root of y and floor(N) is the
   * largest integer <= N.
   *
-  * For 32bit numbers, this will never run more then 16 iterations,
+  * For 32 bit numbers, this will never run more than 16 iterations,
   * which amounts to 16 clocks.
   */
 

expr_synth.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: expr_synth.cc,v 1.73 2005/09/15 23:04:09 steve Exp $"
+#ident "$Id: expr_synth.cc,v 1.87 2007/06/02 03:42:12 steve Exp $"
 #endif
 
 # include "config.h"
@@ -26,6 +26,7 @@
 
 # include  "netlist.h"
 # include  "netmisc.h"
+# include  "ivl_assert.h"
 
 NetNet* NetExpr::synthesize(Design*des)
 {
@@ -57,6 +58,7 @@ NetNet* NetEBAdd::synthesize(Design*des)
       perm_string path = lsig->scope()->local_symbol();
       NetNet*osig = new NetNet(lsig->scope(), path, NetNet::IMPLICIT, width);
       osig->local_flag(true);
+      osig->data_type(expr_type());
 
       perm_string oname = osig->scope()->local_symbol();
       NetAddSub *adder = new NetAddSub(lsig->scope(), oname, width);
@@ -90,7 +92,6 @@ NetNet* NetEBBits::synthesize(Design*des)
 
       NetScope*scope = lsig->scope();
       assert(scope);
-      string path = des->local_symbol(scope->name());
 
       if (lsig->vector_width() != rsig->vector_width()) {
 	    cerr << get_line() << ": internal error: bitwise (" << op_
@@ -107,6 +108,7 @@ NetNet* NetEBBits::synthesize(Design*des)
       NetNet*osig = new NetNet(scope, scope->local_symbol(),
 			       NetNet::IMPLICIT, lsig->vector_width());
       osig->local_flag(true);
+      osig->data_type(expr_type());
 
       perm_string oname = scope->local_symbol();
       unsigned wid = lsig->vector_width();
@@ -232,6 +234,14 @@ NetNet* NetEBComp::synthesize(Design*des)
       return osig;
 }
 
+NetNet* NetEBPow::synthesize(Design*des)
+{
+      cerr << get_line() << ": internal error: Do not yet know how to handle"
+	   << " power operator in this context." << endl;
+      des->errors += 1;
+      return 0;
+}
+
 NetNet* NetEBMult::synthesize(Design*des)
 {
       NetNet*lsig = left_->synthesize(des);
@@ -260,7 +270,9 @@ NetNet* NetEBMult::synthesize(Design*des)
 
       NetNet*osig = new NetNet(scope, scope->local_symbol(),
 			       NetNet::IMPLICIT, expr_width());
+      osig->data_type(lsig->data_type());
       osig->set_line(*this);
+      osig->data_type(expr_type());
       osig->local_flag(true);
 
       connect(mult->pin_Result(), osig->pin(0));
@@ -278,6 +290,7 @@ NetNet* NetEBDiv::synthesize(Design*des)
       NetNet*osig = new NetNet(scope, scope->local_symbol(),
 			       NetNet::IMPLICIT, expr_width());
       osig->set_line(*this);
+      osig->data_type(lsig->data_type());
       osig->local_flag(true);
 
       switch (op()) {
@@ -340,6 +353,7 @@ NetNet* NetEBLogic::synthesize(Design*des)
 
       NetNet*osig = new NetNet(scope, scope->local_symbol(),
 			       NetNet::IMPLICIT, 1);
+      osig->data_type(expr_type());
       osig->local_flag(true);
 
 
@@ -432,12 +446,17 @@ NetNet* NetEBShift::synthesize(Design*des)
 
 	    NetNet*osig = new NetNet(scope, scope->local_symbol(),
 				     NetNet::IMPLICIT, expr_width());
+	    osig->data_type(expr_type());
 	    osig->local_flag(true);
 
+	      // ushift is the amount of pad created by the shift.
 	    unsigned long ushift = shift>=0? shift : -shift;
 	    if (ushift > osig->vector_width())
 		  ushift = osig->vector_width();
 
+	      // part_width is the bits of the vector that survive the shift.
+	    unsigned long part_width = osig->vector_width() - ushift;
+
 	    verinum znum (verinum::V0, ushift, true);
 	    NetConst*zcon = new NetConst(scope, scope->local_symbol(),
 					 znum);
@@ -453,8 +472,25 @@ NetNet* NetEBShift::synthesize(Design*des)
 
 	    NetNet*zsig = new NetNet(scope, scope->local_symbol(),
 				     NetNet::WIRE, znum.len());
+	    zsig->data_type(osig->data_type());
+	    zsig->local_flag(true);
+	    zsig->set_line(*this);
 	    connect(zcon->pin(0), zsig->pin(0));
 
+	      /* Create a part select to reduce the width of the lsig
+	         to the amount left by the shift. */
+	    NetPartSelect*psel = new NetPartSelect(lsig, shift<0? ushift : 0,
+						   part_width,
+						   NetPartSelect::VP);
+	    des->add_node(psel);
+
+	    NetNet*psig = new NetNet(scope, scope->local_symbol(),
+				     NetNet::IMPLICIT, part_width);
+	    psig->data_type(expr_type());
+	    psig->local_flag(true);
+	    psig->set_line(*this);
+	    connect(psig->pin(0), psel->pin(0));
+
 	    NetConcat*ccat = new NetConcat(scope, scope->local_symbol(),
 					   osig->vector_width(), 2);
 	    ccat->set_line(*this);
@@ -462,10 +498,12 @@ NetNet* NetEBShift::synthesize(Design*des)
 
 	    connect(ccat->pin(0), osig->pin(0));
 	    if (shift > 0) {
+		    // Left shift.
 		  connect(ccat->pin(1), zsig->pin(0));
-		  connect(ccat->pin(2), lsig->pin(0));
+		  connect(ccat->pin(2), psig->pin(0));
 	    } else {
-		  connect(ccat->pin(1), lsig->pin(0));
+		    // Right shift
+		  connect(ccat->pin(1), psig->pin(0));
 		  connect(ccat->pin(2), zsig->pin(0));
 	    }
 
@@ -478,9 +516,9 @@ NetNet* NetEBShift::synthesize(Design*des)
 
       NetNet*osig = new NetNet(scope, scope->local_symbol(),
 			       NetNet::IMPLICIT, expr_width());
+      osig->data_type(expr_type());
       osig->local_flag(true);
 
-      assert(op() == 'l');
       NetCLShift*dev = new NetCLShift(scope, scope->local_symbol(),
 				      osig->vector_width(),
 				      rsig->vector_width(),
@@ -555,12 +593,28 @@ NetNet* NetEConst::synthesize(Design*des)
       return osig;
 }
 
+/*
+* Create a NetLiteral object to represent real valued constants.
+*/
 NetNet* NetECReal::synthesize(Design*des)
 {
-      cerr << get_line() << ": error: Real constants are "
-	   << "not synthesizable." << endl;
-      des->errors += 1;
-      return 0;
+      NetScope*scope = des->find_root_scope();
+      assert(scope);
+
+      perm_string path = scope->local_symbol();
+
+      NetNet*osig = new NetNet(scope, path, NetNet::WIRE, 1);
+      osig->local_flag(true);
+      osig->data_type(IVL_VT_REAL);
+      osig->set_signed(has_sign());
+      osig->set_line(*this);
+
+      NetLiteral*con = new NetLiteral(scope, scope->local_symbol(), value_);
+      des->add_node(con);
+      con->set_line(*this);
+
+      connect(osig->pin(0), con->pin(0));
+      return osig;
 }
 
 /*
@@ -577,6 +631,7 @@ NetNet* NetEUBits::synthesize(Design*des)
       unsigned width = isig->vector_width();
       NetNet*osig = new NetNet(scope, scope->local_symbol(),
 			       NetNet::IMPLICIT, width);
+      osig->data_type(expr_type());
       osig->local_flag(true);
 
       perm_string oname = scope->local_symbol();
@@ -607,49 +662,40 @@ NetNet* NetEUReduce::synthesize(Design*des)
 
       NetNet*osig = new NetNet(scope, scope->local_symbol(),
 			       NetNet::IMPLICIT, 1);
+      osig->data_type(expr_type());
       osig->local_flag(true);
 
-      perm_string oname = scope->local_symbol();
-      NetLogic*gate;
+      NetUReduce::TYPE rtype = NetUReduce::NONE;
 
       switch (op()) {
 	  case 'N':
 	  case '!':
-	    gate = new NetLogic(scope, oname, isig->pin_count()+1,
-				NetLogic::NOR, 1);
+	    rtype = NetUReduce::NOR;
 	    break;
-
 	  case '&':
-	    gate = new NetLogic(scope, oname, isig->pin_count()+1,
-				NetLogic::AND, 1);
+	    rtype = NetUReduce::AND;
 	    break;
-
 	  case '|':
-	    gate = new NetLogic(scope, oname, isig->pin_count()+1,
-				NetLogic::OR, 1);
+	    rtype = NetUReduce::OR;
 	    break;
-
 	  case '^':
-	    gate = new NetLogic(scope, oname, isig->pin_count()+1,
-				NetLogic::XOR, 1);
+	    rtype = NetUReduce::XOR;
 	    break;
-
 	  case 'A':
-	    gate = new NetLogic(scope, oname, isig->pin_count()+1,
-				NetLogic::NAND, 1);
+	    rtype = NetUReduce::XNOR;
 	    break;
-
 	  case 'X':
-	    gate = new NetLogic(scope, oname, isig->pin_count()+1,
-				NetLogic::XNOR, 1);
+	    rtype = NetUReduce::XNOR;
 	    break;
-
 	  default:
 	    cerr << get_line() << ": internal error: "
 		 << "Unable to synthesize " << *this << "." << endl;
 	    return 0;
       }
 
+      NetUReduce*gate = new NetUReduce(scope, scope->local_symbol(),
+				       rtype, isig->vector_width());
+
       des->add_node(gate);
       connect(gate->pin(0), osig->pin(0));
       for (unsigned idx = 0 ;  idx < isig->pin_count() ;  idx += 1)
@@ -658,33 +704,6 @@ NetNet* NetEUReduce::synthesize(Design*des)
       return osig;
 }
 
-NetNet* NetEMemory::synthesize(Design *des)
-{
-      NetNet*adr = idx_->synthesize(des);
-
-      NetScope*scope = adr->scope();
-
-      NetRamDq*ram = new NetRamDq(scope, scope->local_symbol(),
-				  mem_, adr->vector_width());
-      des->add_node(ram);
-      ram->set_line(*this);
-
-      connect(ram->pin_Address(), adr->pin(0));
-
-	/* Create an output signal to receive the data. Assume that
-	   memories return LOGIC. */
-      NetNet*osig = new NetNet(scope, scope->local_symbol(),
-			       NetNet::IMPLICIT, ram->width());
-      osig->data_type(IVL_VT_LOGIC);
-      osig->local_flag(true);
-      osig->set_line(*this);
-
-      connect(ram->pin_Q(), osig->pin(0));
-
-      return osig;
-
-}
-
 NetNet* NetESelect::synthesize(Design *des)
 {
 
@@ -694,44 +713,46 @@ NetNet* NetESelect::synthesize(Design *des)
 
       NetScope*scope = sub->scope();
 
-      unsigned off = 0;
+      NetNet*off = 0;
 
+	// This handles the case that the NetESelect exists to do an
+	// actual part/bit select. Generate a NetPartSelect object to
+	// do the work, and replace "sub" with the selected output.
       if (base_ != 0) {
-	      // For now, only handle constant part selects in this
-	      // context.
-	    NetEConst*bcon = dynamic_cast<NetEConst*>(base_);
-	    assert(bcon);
+	    off = base_->synthesize(des);
 
-	    long bval = bcon->value().as_long();
-	    off = sub->sb_to_idx(bval);
-      }
-
-	/* If there is a part select, then generate a PartSelect node
-	   to actually do the part select. This does not expansion,
-	   that is handled later. */
-      if ((off != 0) || (off+expr_width() < sub->vector_width())) {
-	    unsigned wid = expr_width();
-	    if ((wid + off) > sub->vector_width())
-		  wid = sub->vector_width() - off;
-
-	    NetPartSelect*sel = new NetPartSelect(sub, off, wid,
-						  NetPartSelect::VP);
+	    NetPartSelect*sel = new NetPartSelect(sub, off, expr_width());
 	    sel->set_line(*this);
 	    des->add_node(sel);
 
-	    sub = new NetNet(scope, scope->local_symbol(),
-			     NetNet::IMPLICIT, expr_width());
-	    sub->local_flag(true);
-	    sub->set_line(*this);
+	    NetNet*tmp = new NetNet(scope, scope->local_symbol(),
+				    NetNet::IMPLICIT, expr_width());
+	    tmp->data_type(sub->data_type());
+	    tmp->local_flag(true);
+	    tmp->set_line(*this);
+	    sub = tmp;
 	    connect(sub->pin(0), sel->pin(0));
       }
 
-	/* Done? Vector is already the right width? then stop now. */
+
+	// Now look for the case that the NetESelect actually exists
+	// to change the width of the expression. (i.e. to do
+	// padding.) If this was for an actual part select that at
+	// this point the output vector_width is exactly right, and we
+	// are done.
       if (sub->vector_width() == expr_width())
 	    return sub;
 
+	// The vector_width is not exactly right, so the source is
+	// probably asking for padding. Create nodes to do sign
+	// extension or 0 extension, depending on the has_sign() mode
+	// of the expression.
+
       NetNet*net = new NetNet(scope, scope->local_symbol(),
 			      NetNet::IMPLICIT, expr_width());
+      net->data_type(expr_type());
+      net->local_flag(true);
+      net->set_line(*this);
       if (has_sign()) {
 	    NetSignExtend*pad = new NetSignExtend(scope,
 						  scope->local_symbol(),
@@ -751,7 +772,7 @@ NetNet* NetESelect::synthesize(Design *des)
 
 	    assert(expr_width() > sub->vector_width());
 	    unsigned pad_width = expr_width() - sub->vector_width();
-	    verinum pad(0UL, pad_width);
+	    verinum pad((uint64_t)0, pad_width);
 	    NetConst*con = new NetConst(scope, scope->local_symbol(),
 					pad);
 	    con->set_line(*this);
@@ -759,6 +780,7 @@ NetNet* NetESelect::synthesize(Design *des)
 
 	    NetNet*tmp = new NetNet(scope, scope->local_symbol(),
 				    NetNet::IMPLICIT, pad_width);
+	    tmp->data_type(expr_type());
 	    tmp->local_flag(true);
 	    tmp->set_line(*this);
 	    connect(tmp->pin(0), con->pin(0));
@@ -789,6 +811,7 @@ NetNet* NetETernary::synthesize(Design *des)
 
       unsigned width=expr_width();
       NetNet*osig = new NetNet(csig->scope(), path, NetNet::IMPLICIT, width);
+      osig->data_type(expr_type());
       osig->local_flag(true);
 
 	/* Make sure both value operands are the right width. */
@@ -847,6 +870,51 @@ NetNet* NetESignal::synthesize(Design*des)
 
 /*
  * $Log: expr_synth.cc,v $
+ * Revision 1.87  2007/06/02 03:42:12  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.86  2007/04/15 01:37:29  steve
+ *  Allow bit/part select of vectors in continuous assignments.
+ *
+ * Revision 1.85  2007/04/12 05:21:54  steve
+ *  fix handling of unary reduction logic in certain nets.
+ *
+ * Revision 1.84  2007/04/04 02:31:57  steve
+ *  Remove useless assert
+ *
+ * Revision 1.83  2007/02/05 01:42:31  steve
+ *  Set some missing local flags.
+ *
+ * Revision 1.82  2007/01/20 02:10:45  steve
+ *  Get argument widths right for shift results.
+ *
+ * Revision 1.81  2007/01/16 05:44:15  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
+ *
+ * Revision 1.80  2006/08/08 05:11:37  steve
+ *  Handle 64bit delay constants.
+ *
+ * Revision 1.79  2006/07/31 03:50:17  steve
+ *  Add support for power in constant expressions.
+ *
+ * Revision 1.78  2006/07/08 21:48:46  steve
+ *  Handle real valued literals in net contexts.
+ *
+ * Revision 1.77  2006/05/01 20:47:59  steve
+ *  More explicit datatype setup.
+ *
+ * Revision 1.76  2006/05/01 05:40:21  steve
+ *  fix net type of multiply output.
+ *
+ * Revision 1.75  2006/04/30 05:17:48  steve
+ *  Get the data type of part select results right.
+ *
+ * Revision 1.74  2006/01/03 05:15:33  steve
+ *  Fix the return type of a synthesized divide.
+ *
  * Revision 1.73  2005/09/15 23:04:09  steve
  *  Make sure div, mod and mult nodes have line number info.
  *

ieee1364-notes.txt

@@ -1,4 +1,7 @@
 
+NOTE: THE CONTENTS OF THIS FILE ARE BEING MOVED TO THE DOCUMENTATION
+WIKI AT http://iverilog.wikia.com. PLEASE ADD NEW ENTRIES THERE.
+
                 Icarus Verilog vs. IEEE1364
                 Copyright 2000 Stephen Williams
 
@@ -249,7 +252,7 @@ exactly the same so far as the compiler is concerned.
 
 Unfortunately, Cadence seems to feel otherwise. In particular, it has
 been reported that although {1'b0, 16} causes an error, {1'b0, 15+1}
-is accepted. Further testing shows that any expression other then a
+is accepted. Further testing shows that any expression other than a
 simple unsized constant is accepted there, even if all the operands of
 all the operators that make up the expression are unsized integers.
 
@@ -498,8 +501,14 @@ of 4-value behavior in the dead zone, and appears more user friendly
 when viewed by reasonable viewers.
 
 
-$Id: ieee1364-notes.txt,v 1.17 2003/07/15 03:49:22 steve Exp $
+$Id: ieee1364-notes.txt,v 1.19 2007/04/18 02:36:13 steve Exp $
 $Log: ieee1364-notes.txt,v $
+Revision 1.19  2007/04/18 02:36:13  steve
+ Put to iverilog wiki for further notes.
+
+Revision 1.18  2007/03/22 16:08:16  steve
+ Spelling fixes from Larry
+
 Revision 1.17  2003/07/15 03:49:22  steve
  Spelling fixes.
 

iverilog-vpi.sh

@@ -17,12 +17,12 @@
 #    59 Temple Place - Suite 330
 #    Boston, MA 02111-1307, USA
 #
-#ident "$Id: iverilog-vpi.sh,v 1.14 2004/05/20 00:40:34 steve Exp $"
+#ident "$Id: iverilog-vpi.sh,v 1.17 2007/02/06 05:07:31 steve Exp $"
 
 # These are the variables used for compiling files
-CC=gcc
-CXX=gcc
-CFLAGS="@PIC@ -O -I@INCLUDEDIR@"
+CC=@IVCC@
+CXX=@IVCXX@
+CFLAGS="@PIC@ @IVCFLAGS@ -I@INCLUDEDIR@"
 
 # These are used for linking...
 LD=gcc
@@ -63,11 +63,19 @@ do
 	 ;;
 
     *.cc) CXSRC="$CXSRC $parm"
+	 LD=$CXX
          if [ x$OUT = x ]; then
 	    OUT=`basename $parm .cc`
 	 fi
 	 ;;
 
+    *.cpp) CXSRC="$CXSRC $parm"
+	 LD=$CXX
+         if [ x$OUT = x ]; then
+	    OUT=`basename $parm .cpp`
+	 fi
+	 ;;
+
     *.o) OBJ="$OBJ $parm"
          if [ x$OUT = x ]; then
 	    OUT=`basename $parm .o`

ivl.def

@@ -9,9 +9,10 @@ ivl_design_roots
 ivl_design_time_precision
 
 ivl_const_bits
-ivl_const_pin
-ivl_const_pins
+ivl_const_real
 ivl_const_signed
+ivl_const_type
+ivl_const_width
 
 ivl_event_any
 ivl_event_basename
@@ -21,14 +22,13 @@ ivl_event_neg
 ivl_event_nneg
 ivl_event_npos
 ivl_event_pos
+ivl_event_scope
 
 ivl_expr_type
 ivl_expr_bits
 ivl_expr_def
 ivl_expr_dvalue
 ivl_expr_event
-ivl_expr_lsi
-ivl_expr_memory
 ivl_expr_name
 ivl_expr_opcode
 ivl_expr_oper1
@@ -44,21 +44,24 @@ ivl_expr_signed
 ivl_expr_string
 ivl_expr_uvalue
 ivl_expr_value
-ivl_expr_variable
 ivl_expr_width
 
 ivl_logic_attr
 ivl_logic_attr_cnt
 ivl_logic_attr_val
-ivl_logic_delay
-ivl_logic_name
 ivl_logic_basename
-ivl_logic_scope
-ivl_logic_type
+ivl_logic_delay
+ivl_logic_drive0
+ivl_logic_drive1
+ivl_logic_name
 ivl_logic_pin
 ivl_logic_pins
+ivl_logic_scope
+ivl_logic_type
 ivl_logic_udp
+ivl_logic_width
 
+ivl_lpm_array
 ivl_lpm_aset_value
 ivl_lpm_async_clr
 ivl_lpm_async_set
@@ -67,11 +70,8 @@ ivl_lpm_basename
 ivl_lpm_clk
 ivl_lpm_data
 ivl_lpm_datab
-ivl_lpm_data2
-ivl_lpm_data2_width
 ivl_lpm_define
 ivl_lpm_enable
-ivl_lpm_memory
 ivl_lpm_name
 ivl_lpm_q
 ivl_lpm_scope
@@ -80,25 +80,17 @@ ivl_lpm_selects
 ivl_lpm_signed
 ivl_lpm_size
 ivl_lpm_sset_value
+ivl_lpm_string
 ivl_lpm_sync_clr
 ivl_lpm_sync_set
 ivl_lpm_type
 ivl_lpm_width
 
 ivl_lval_idx
-ivl_lval_mem
 ivl_lval_mux
 ivl_lval_part_off
-ivl_lval_pin
-ivl_lval_pins
 ivl_lval_sig
-ivl_lval_var
-
-ivl_memory_basename
-ivl_memory_root
-ivl_memory_scope
-ivl_memory_size
-ivl_memory_width
+ivl_lval_width
 
 ivl_nexus_get_private
 ivl_nexus_name
@@ -117,6 +109,12 @@ ivl_nexus_ptr_sig
 ivl_parameter_basename
 ivl_parameter_expr
 
+ivl_path_condit
+ivl_path_delay
+ivl_path_source
+ivl_path_source_negedge
+ivl_path_source_posedge
+
 ivl_scope_attr_cnt
 ivl_scope_attr_val
 ivl_scope_basename
@@ -128,8 +126,6 @@ ivl_scope_logs
 ivl_scope_log
 ivl_scope_lpms
 ivl_scope_lpm
-ivl_scope_mem
-ivl_scope_mems
 ivl_scope_name
 ivl_scope_param
 ivl_scope_params
@@ -141,23 +137,30 @@ ivl_scope_sig
 ivl_scope_time_units
 ivl_scope_type
 ivl_scope_tname
-ivl_scope_var
-ivl_scope_vars
 
+ivl_signal_array_base
+ivl_signal_array_count
 ivl_signal_attr
 ivl_signal_attr_cnt
 ivl_signal_attr_val
+ivl_signal_basename
+ivl_signal_data_type
+ivl_signal_dimensions
 ivl_signal_integer
 ivl_signal_local
 ivl_signal_lsb
 ivl_signal_msb
-ivl_signal_pin
-ivl_signal_pins
+ivl_signal_name
+ivl_signal_nex
+ivl_signal_npath
+ivl_signal_path
 ivl_signal_port
 ivl_signal_signed
 ivl_signal_type
-ivl_signal_name
-ivl_signal_basename
+ivl_signal_width
+
+ivl_path_delay
+ivl_path_source
 
 ivl_process_attr_cnt
 ivl_process_attr_val
@@ -185,8 +188,6 @@ ivl_stmt_lvals
 ivl_stmt_lwidth
 ivl_stmt_name
 ivl_stmt_nevent
-ivl_stmt_nexus
-ivl_stmt_nexus_count
 ivl_stmt_parm
 ivl_stmt_parm_count
 ivl_stmt_rval
@@ -198,6 +199,3 @@ ivl_udp_nin
 ivl_udp_row
 ivl_udp_rows
 ivl_udp_sequ
-
-ivl_variable_name
-ivl_variable_type

ivl_assert.h

@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2007 Stephen Williams (steve@icarus.com)
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: ivl_assert.h,v 1.1 2007/01/31 04:21:10 steve Exp $"
+#endif
+
+#ifndef __ivl_assert_h
+#define __ivl_assert_h
+
+# include  <assert.h>
+
+#define ivl_assert(tok, expression)  \
+      do {			    \
+	    if (! (expression))     \
+		  __ivl_assert(#expression, tok, __FILE__, __LINE__);	\
+      } while(0)
+
+#define __ivl_assert(expression, tok, file, line)  \
+      do { \
+	    cerr << (tok).get_line() << ": assert: " \
+		 << file << ":" << line \
+		 << ": failed assertion " << (expression) << endl; \
+	    abort(); \
+      } while(0)
+
+
+#endif

ivl_target.h

@@ -19,9 +19,11 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: ivl_target.h,v 1.161 2005/09/19 21:45:35 steve Exp $"
+#ident "$Id: ivl_target.h,v 1.182 2007/04/02 01:12:34 steve Exp $"
 #endif
 
+# include  <inttypes.h>
+
 #ifdef __cplusplus
 #define _BEGIN_DECL extern "C" {
 #define _END_DECL }
@@ -57,6 +59,10 @@ _BEGIN_DECL
  * The following typedefs list the various cookies that may be passed
  * around.
  *
+ * ivl_array_t
+ *    This object represent an array that can be a memory or a net
+ *    array. (They are the same from the perspective of ivl_target.h.)
+ *
  * ivl_design_t
  *    This object represents the entire elaborated design. Various
  *    global properties and methods are available from this.
@@ -135,6 +141,8 @@ _BEGIN_DECL
  * scope. These names are unique within a scope, but not necessarily
  * throughout the design.
  */
+typedef struct ivl_array_s    *ivl_array_t;
+typedef struct ivl_delaypath_s*ivl_delaypath_t;
 typedef struct ivl_design_s   *ivl_design_t;
 typedef struct ivl_event_s    *ivl_event_t;
 typedef struct ivl_expr_s     *ivl_expr_t;
@@ -150,7 +158,7 @@ typedef struct ivl_parameter_s*ivl_parameter_t;
 typedef struct ivl_process_s  *ivl_process_t;
 typedef struct ivl_scope_s    *ivl_scope_t;
 typedef struct ivl_signal_s   *ivl_signal_t;
-typedef struct ivl_memory_s   *ivl_memory_t;
+typedef struct ivl_memory_s   *ivl_memory_t; /* DEPRECATED */
 typedef struct ivl_statement_s*ivl_statement_t;
 
 /*
@@ -175,7 +183,7 @@ typedef enum ivl_drive_e {
    and incompatibilities to be introduced. */
 typedef enum ivl_expr_type_e {
       IVL_EX_NONE = 0,
-	/* IVL_EX_BITSEL = 1, */
+      IVL_EX_ARRAY = 18,
       IVL_EX_BINARY = 2,
       IVL_EX_CONCAT = 3,
       IVL_EX_EVENT  = 17,
@@ -222,6 +230,7 @@ typedef enum ivl_logic_e {
 /* This is the type of an LPM object. */
 typedef enum ivl_lpm_type_e {
       IVL_LPM_ADD    =  0,
+      IVL_LPM_ARRAY  = 30,
       IVL_LPM_CONCAT = 16,
       IVL_LPM_CMP_EEQ= 18, /* Case EQ (===) */
       IVL_LPM_CMP_EQ = 10,
@@ -244,14 +253,25 @@ typedef enum ivl_lpm_type_e {
       IVL_LPM_RE_XNOR= 24,
       IVL_LPM_RE_XOR = 25,
       IVL_LPM_REPEAT = 26,
+      IVL_LPM_SFUNC  = 29,
       IVL_LPM_SHIFTL =  6,
       IVL_LPM_SHIFTR =  7,
       IVL_LPM_SIGN_EXT=27,
       IVL_LPM_SUB    =  8,
-      IVL_LPM_RAM    =  9,
+      /* IVL_LPM_RAM =  9, / obsolete */
       IVL_LPM_UFUNC  = 14
 } ivl_lpm_type_t;
 
+/* The path edge type is the edge type used to select a specific
+   delay. */
+typedef enum ivl_path_edge_e {
+      IVL_PE_01 = 0, IVL_PE_10, IVL_PE_0z,
+      IVL_PE_z1,     IVL_PE_1z, IVL_PE_z0,
+      IVL_PE_0x,     IVL_PE_x1, IVL_PE_1x,
+      IVL_PE_x0,     IVL_PE_xz, IVL_PE_zx,
+      IVL_PE_COUNT
+} ivl_path_edge_t;
+
 /* Processes are initial or always blocks with a statement. This is
    the type of the ivl_process_t object. */
 typedef enum ivl_process_type_e {
@@ -266,7 +286,8 @@ typedef enum ivl_scope_type_e {
       IVL_SCT_FUNCTION= 1,
       IVL_SCT_TASK    = 2,
       IVL_SCT_BEGIN   = 3,
-      IVL_SCT_FORK    = 4
+      IVL_SCT_FORK    = 4,
+      IVL_SCT_GENERATE= 5
 } ivl_scope_type_t;
 
 /* Signals (ivl_signal_t) that are ports into the scope that contains
@@ -323,11 +344,11 @@ typedef enum ivl_statement_type_e {
 /* This is the type of a variable, and also used as the type for an
    expression. */
 typedef enum ivl_variable_type_e {
-      IVL_VT_VOID = 0,  /* Not used */
-      IVL_VT_NO_TYPE,  /* Place holder for missing/unknown type. */
-      IVL_VT_REAL,
-      IVL_VT_BOOL,
-      IVL_VT_LOGIC,
+      IVL_VT_VOID    = 0,  /* Not used */
+      IVL_VT_NO_TYPE = 1,  /* Place holder for missing/unknown type. */
+      IVL_VT_REAL    = 2,
+      IVL_VT_BOOL    = 3,
+      IVL_VT_LOGIC   = 4,
       IVL_VT_VECTOR = IVL_VT_LOGIC /* For compatibility */
 } ivl_variable_type_t;
 
@@ -357,6 +378,30 @@ struct ivl_attribute_s {
 };
 typedef const struct ivl_attribute_s*ivl_attribute_t;
 
+/* DELAYPATH
+ * Delaypath objects represent delay paths called out by a specify
+ * block in the verilog source file. The destination signal references
+ * the path object, which in turn points to the source for the path.
+ *
+ * ivl_path_source
+ *    This returns the nexus that is the source end of the delay
+ *    path. Transitions on the source are the start of the delay time
+ *    for this path.
+ *
+ * ivl_path_condit
+ *    This returns the nexus that tracks the condition for the
+ *    delay. If the delay path is unconditional, this returns nil.
+ *
+ * ivl_path_srouce_posedge
+ * ivl_path_source_negedge
+ *    These functions return true if the source is edge sensitive.
+ */
+extern ivl_nexus_t ivl_path_source(ivl_delaypath_t obj);
+extern uint64_t ivl_path_delay(ivl_delaypath_t obj, ivl_path_edge_t pt);
+extern ivl_nexus_t ivl_path_condit(ivl_delaypath_t obj);
+
+extern int ivl_path_source_posedge(ivl_delaypath_t obj);
+extern int ivl_path_source_negedge(ivl_delaypath_t obj);
 
 /* DESIGN
  * When handed a design (ivl_design_t) there are a few things that you
@@ -542,9 +587,20 @@ extern ivl_nexus_t ivl_event_pos(ivl_event_t net, unsigned idx);
  *              &   -- AND
  *              A   -- NAND (~&)
  *              X   -- XNOR (~^)
+ *              *   -- Multiply
  *
  * SEMANTIC NOTES
  *
+ * - IVL_EX_ARRAY
+ * This expression type is a special case of the IVL_EX_SIGNAL where
+ * the target is an array (ivl_signal_t with an array_count) but there
+ * is no index expression. This is used only in the special situation
+ * where the array is passed to a system task/function. The function
+ * ivl_expr_signal returns the ivl_signal_t of the array object, and
+ * from that all the properties of the array can be determined.
+ *
+ * - IVL_EX_BINARY
+ *
  * - IVL_EX_SELECT
  * This expression takes two operands, oper1 is the expression to
  * select from, and oper2 is the selection base. The ivl_expr_width
@@ -552,6 +608,33 @@ extern ivl_nexus_t ivl_event_pos(ivl_event_t net, unsigned idx);
  * is the base of a vector. The compiler has already figured out any
  * conversion from signal units to vector units, so the result of
  * ivl_expr_oper1 should range from 0 to ivl_expr_width().
+ *
+ * - IVL_EX_SIGNAL
+ * This expression references a signal vector. The ivl_expr_signal
+ * function gets a handle for the signal that is referenced. The
+ * signal may be an array (see the ivl_signal_array_count function)
+ * that is addressed by the expression returned by the ivl_expr_oper1
+ * function. This expression returns a *canonical* address. The core
+ * compiler already corrected the expression to account for index
+ * bases.
+ *
+ * The ivl_expr_width function returns the vector width of the signal
+ * word. The ivl_expr_value returns the data type of the word.
+ *
+ * Bit and part selects are not done here. The IVL_EX_SELECT
+ * expression does bit/part selects on the word read from the signal.
+ *
+ * - IVL_EX_STRING
+ * This expression refers to a string constant. The ivl_expr_string
+ * function returns a pointer to the first byte of the string. The
+ * compiler has translated it to a "vvp escaped string" which has
+ * quoting and escapes eliminated. The string may contain octal
+ * escapes (\<oct>) so that the string text returned by
+ * ivl_expr_string will only contain graphical characters. It is up to
+ * the target to change the escaped \NNN to the proper byte value when
+ * using this string. No other escape sequences will appear in the
+ * string. Quote (") and slash (\) characters will be delivered in
+ * \NNN form.
  */
 
 extern ivl_expr_type_t ivl_expr_type(ivl_expr_t net);
@@ -596,42 +679,7 @@ extern unsigned long ivl_expr_uvalue(ivl_expr_t net);
   /* any expression */
 extern unsigned    ivl_expr_width(ivl_expr_t net);
 
-/*
- * Memory.
- * Memories are declared in Verilog source as 2 dimensional arrays of
- * reg bits. This means that they are simple arrays of vectors. The
- * vectors in the array are called "words".
- *
- * ivl_memory_name (DEPRECATED)
- *
- * ivl_memory_basename
- *    This returns the base name of the memory object. The base name
- *    does not include the name of the scopes that contains the object.
- *
- * ivl_memory_root
- *    The root of the memory is the value to add to a calculated
- *    address to get to a canonical (0-based) address. This value is
- *    used when external code wishes to access a word. All the
- *    compiled references to the word within the compiled design are
- *    converted to canonical form by the compiler.
- *
- * ivl_memory_size
- * ivl_memory_width
- *    These functions return the dimensions of the memory. The size is
- *    the number of words in the memory, and the width is the number
- *    of bits in each word.
- *
- * ivl_memory_scope
- *    This returns the scope that contains the memory.
- */
 
-extern const char*ivl_memory_basename(ivl_memory_t net);
-extern int ivl_memory_root(ivl_memory_t net);
-extern ivl_scope_t ivl_memory_scope(ivl_memory_t net);
-extern unsigned ivl_memory_size(ivl_memory_t net);
-extern unsigned ivl_memory_width(ivl_memory_t net);
-
-extern ivl_memory_t ivl_expr_memory(ivl_expr_t net);
 
 /* LOGIC
  * These types and functions support manipulation of logic gates. The
@@ -699,11 +747,27 @@ extern ivl_memory_t ivl_expr_memory(ivl_expr_t net);
  * drive strengths for the output pin-0, and match the drive values
  * stored in the ivl_nexus_ptr_t object for the pin.
  *
+ * Logic devices have a logic propagation delay. The delay can be any
+ * expression, although the most common expression is an IVL_EX_NUMBER
+ * for a number value. The expression already includes scaling for the
+ * containing module, so the delay value is always taken to be in
+ * simulation clock ticks.
+ *
+ * If the delay is present, then ivl_logic_delay returns a non-nil
+ * object. If any of the three delays is present, then all three are
+ * present, even if they are all the same. The compiler will translate
+ * shorthands into a complete set of delay expressions.
+ *
+ * The ivl_logic_delay expression will always be an IVL_EX_NUMBER, an
+ * IVL_EX_ULONG, or an IVL_EX_SIGNAL. These expressions can easily be
+ * used in structural contexts. The compiler will take care of
+ * elaborating more complex expressions to nets.
+ *
  * - IVL_LO_PULLUP/IVL_LO_PULLDOWN
  * These devices are grouped as logic devices with zero inputs because
  * the outputs have the same characteristics as other logic
  * devices. They are special only in that they have zero inputs, and
- * their drivers typically have strength other then strong.
+ * their drivers typically have strength other than strong.
  *
  * - IVL_LO_UDP
  * User defined primitives (UDPs) are like any other logic devices, in
@@ -722,7 +786,7 @@ extern ivl_logic_t ivl_logic_type(ivl_net_logic_t net);
 extern ivl_nexus_t ivl_logic_pin(ivl_net_logic_t net, unsigned pin);
 extern unsigned    ivl_logic_pins(ivl_net_logic_t net);
 extern ivl_udp_t   ivl_logic_udp(ivl_net_logic_t net);
-extern unsigned    ivl_logic_delay(ivl_net_logic_t net, unsigned transition);
+extern ivl_expr_t  ivl_logic_delay(ivl_net_logic_t net, unsigned transition);
 extern ivl_drive_t ivl_logic_drive0(ivl_net_logic_t net);
 extern ivl_drive_t ivl_logic_drive1(ivl_net_logic_t net);
 extern unsigned    ivl_logic_width(ivl_net_logic_t net);
@@ -862,7 +926,7 @@ extern const char* ivl_udp_name(ivl_udp_t net);
  * inputs. In fact, the compiler doesn't assure that the widths of the
  * inputs add up to the width of the output, but the possibility
  * exists. It is *not* an error for the sum of the input widths to be
- * more then the width of the output, although the possibility of
+ * more than the width of the output, although the possibility of
  * overflow exists at run time.
  *
  * Multiply may be signed. If so, the output should be sign extended
@@ -928,7 +992,7 @@ extern const char* ivl_udp_name(ivl_udp_t net);
  * single ivl_lpm_data input are the same with, ivl_lpm_width. This
  * device carries a vector like other LPM devices.
  *
- * - Memory port (IVL_LPM_RAM)
+ * - Memory port (IVL_LPM_RAM) (deprecated in favor of IVL_LPM_ARRAY)
  * These are structural ports into a memory device. They represent
  * address/data ports of a memory device that the context can hook to
  * for read or write. Read devices have an ivl_lpm_q output port that
@@ -965,12 +1029,29 @@ extern const char* ivl_udp_name(ivl_udp_t net);
  * input must be signed, and the output will be a vector sign extended
  * to the desired width. The ivl_lpm_width() value is the output
  * width, the input will be whatever it wants to be.
+ *
  * - Shifts (IVL_LPM_SHIFTL/SHIFTR)
  * This node takes two inputs, a vector and a shift distance. The
  * ivl_lpm_data(0) nexus is the vector input, and the ivl_lpm_data(1)
  * the shift distance. The vector input is the same width as the
  * output, but the distance has its own width.
  *
+ * The ivl_lpm_signed() flag means for IVL_LPM_SHIFTR that the right
+ * shift is *signed*. For SHIFTL, then signed-ness is emaningless.
+ *
+ * - System function call (IVL_LPM_SFUNC)
+ * This device represents a netlist call to a system function. The
+ * inputs to the device are passed to a system function, and the
+ * result is sent via the output. The ivl_lpm_q function returns the
+ * output nexus.
+ *
+ * The ivl_lpm_size function returns the number of arguments, and the
+ * ivl_lpm_data(net,N) returns the nexa for the argument.
+ *
+ * The ivl_lpm_string(net) function returns the name of the system
+ * function (i.e. "$display") that was found in the source code. The
+ * compiler does little checking of that name.
+ *
  * - User Function Call (IVL_LPM_UFUNC)
  * This device is special as it represents a call to a user defined
  * function (behavioral code) within a netlist. The inputs to the
@@ -1005,40 +1086,33 @@ extern ivl_expr_t  ivl_lpm_aset_value(ivl_lpm_t net);
 extern ivl_nexus_t ivl_lpm_sync_clr(ivl_lpm_t net);
 extern ivl_nexus_t ivl_lpm_sync_set(ivl_lpm_t net);
 extern ivl_expr_t  ivl_lpm_sset_value(ivl_lpm_t net);
+  /* IVL_LPM_ARRAY */
+extern ivl_signal_t ivl_lpm_array(ivl_lpm_t net);
   /* IVL_LPM_PART */
 extern unsigned ivl_lpm_base(ivl_lpm_t net);
-  /* IVL_LPM_FF IVL_LPM_RAM */
+  /* IVL_LPM_FF */
 extern ivl_nexus_t ivl_lpm_clk(ivl_lpm_t net);
   /* IVL_LPM_UFUNC */
 extern ivl_scope_t  ivl_lpm_define(ivl_lpm_t net);
-  /* IVL_LPM_FF IVL_LPM_RAM */
+  /* IVL_LPM_FF */
 extern ivl_nexus_t ivl_lpm_enable(ivl_lpm_t net);
   /* IVL_LPM_ADD IVL_LPM_CONCAT IVL_LPM_FF IVL_LPM_PART IVL_LPM_MULT
-     IVL_LPM_MUX IVL_LPM_RAM IVL_LPM_SHIFTL IVL_LPM_SHIFTR IVL_LPM_SUB
+     IVL_LPM_MUX IVL_LPM_SHIFTL IVL_LPM_SHIFTR IVL_LPM_SUB
      IVL_LPM_UFUNC */
 extern ivl_nexus_t ivl_lpm_data(ivl_lpm_t net, unsigned idx);
   /* IVL_LPM_ADD IVL_LPM_MULT IVL_LPM_SUB */
 extern ivl_nexus_t ivl_lpm_datab(ivl_lpm_t net, unsigned idx);
-#if 0
-  /* IVL_LPM_UFUNC */
-extern ivl_nexus_t ivl_lpm_data2(ivl_lpm_t net, unsigned sdx, unsigned idx);
-#endif
-#if 0
-  /* IVL_LPM_UFUNC */
-extern unsigned ivl_lpm_data2_width(ivl_lpm_t net, unsigned sdx);
-#endif
-  /* IVL_LPM_ADD IVL_LPM_FF IVL_LPM_MULT IVL_LPM_PART IVL_LPM_RAM
+  /* IVL_LPM_ADD IVL_LPM_FF IVL_LPM_MULT IVL_LPM_PART
      IVL_LPM_SUB IVL_LPM_UFUNC */
 extern ivl_nexus_t ivl_lpm_q(ivl_lpm_t net, unsigned idx);
-  /* IVL_LPM_MUX IVL_LPM_RAM */
+  /* IVL_LPM_MUX */
 extern unsigned ivl_lpm_selects(ivl_lpm_t net);
-  /* IVL_LPM_MUX IVL_LPM_RAM */
+  /* IVL_LPM_MUX */
 extern ivl_nexus_t ivl_lpm_select(ivl_lpm_t net);
   /* IVL_LPM_CONCAT IVL_LPM_MUX IVL_LPM_REPEAT IVL_LPM_UFUNC */
 extern unsigned ivl_lpm_size(ivl_lpm_t net);
-  /* IVL_LPM_RAM */
-extern ivl_memory_t ivl_lpm_memory(ivl_lpm_t net);
-
+  /* IVL_LPM_SFUNC */
+extern const char*ivl_lpm_string(ivl_lpm_t net);
 
 /* LVAL
  * The l-values of assignments are concatenation of ivl_lval_t
@@ -1059,7 +1133,9 @@ extern ivl_memory_t ivl_lpm_memory(ivl_lpm_t net);
  *    returns an ivl_expr_t that represents that
  *    expression.  Otherwise, it returns 0.
  *
- * ivl_lval_mem
+ *    (Should this be combined with ivl_lval_idx? -Ed)
+ *
+ * ivl_lval_mem (deprecated)
  *    If the l-value is a memory, this method returns an
  *    ivl_memory_t that represents that memory. Otherwise, it
  *    returns 0.
@@ -1070,7 +1146,9 @@ extern ivl_memory_t ivl_lpm_memory(ivl_lpm_t net);
  *
  * ivl_lval_part_off
  *    The part select of the signal is based here. This is the
- *    canonical index of bit-0 of the part select.
+ *    canonical index of bit-0 of the part select. The return value is
+ *    an ivl_expr_t. If the return value is nil, then take the offset
+ *    as zero. Otherwise, evaluate the expression to get the offset.
  *
  * ivl_lval_idx
  *    If the l-value is a memory, this method returns an
@@ -1084,24 +1162,30 @@ extern ivl_memory_t ivl_lpm_memory(ivl_lpm_t net);
  * signal (or even 1) if only a part of the l-value signal is to be
  * assigned.
  *
- * The ivl_lval_part_off is the canonical base of a constant part or
- * bit select. If the bit select base is non-constant, then the
- * ivl_lval_mux will contain an expression. If there is a mux
- * expression, then the ivl_lval_part_off result can be ignored.
+ * The ivl_lval_part_off is the canonical base of a part or
+ * bit select.
  *
- * - Memory words
+ * - Memory words (Replace this with Array words below)
  * If the l-value is a memory word, the ivl_lval_mem function returns
  * a non-nil value. The ivl_lval_idx function will return an
  * expression that calculates an address for the memory. The compiler
  * will assure that the ivl_lval_width will exactly match the
  * ivl_memory_width of the memory word.
+ *
+ * - Array words
+ * If the l-value is an array, then ivl_lval_idx function will return
+ * an expression that calculates the address of the array word. If
+ * the referenced signal has more than one word, this expression must
+ * be present. If the signal has exactly one word (it is not an array)
+ * then the ivl_lval_idx exression must *not* be present.
+ *
+ * For array words, the ivl_lval_width is the width of the word.
  */
 
 extern unsigned    ivl_lval_width(ivl_lval_t net);
-extern ivl_expr_t  ivl_lval_mux(ivl_lval_t net);
+extern ivl_expr_t  ivl_lval_mux(ivl_lval_t net); // XXXX Obsolete?
 extern ivl_expr_t  ivl_lval_idx(ivl_lval_t net);
-extern ivl_memory_t ivl_lval_mem(ivl_lval_t net);
-extern unsigned    ivl_lval_part_off(ivl_lval_t net);
+extern ivl_expr_t  ivl_lval_part_off(ivl_lval_t net);
 extern ivl_signal_t ivl_lval_sig(ivl_lval_t net);
 
 
@@ -1260,7 +1344,7 @@ extern ivl_expr_t  ivl_parameter_expr(ivl_parameter_t net);
  * ivl_scope_children
  *    A scope may in turn contain other scopes. This method iterates
  *    through all the child scopes of a given scope. If the function
- *    returns any value other then 0, the iteration stops and the
+ *    returns any value other than 0, the iteration stops and the
  *    method returns that value. Otherwise, iteration continues until
  *    the children run out.
  *
@@ -1269,7 +1353,9 @@ extern ivl_expr_t  ivl_parameter_expr(ivl_parameter_t net);
  *
  * ivl_scope_def
  *    Task definition scopes carry a task definition, in the form of
- *    a statement. This method accesses that definition.
+ *    a statement. This method accesses that definition. The
+ *    ivl_scope_def function must return a statement for scopes that
+ *    are type FUNCTION or TASK, and must return nil otherwise.
  *
  * ivl_scope_event
  * ivl_scope_events
@@ -1347,8 +1433,6 @@ extern unsigned     ivl_scope_logs(ivl_scope_t net);
 extern ivl_net_logic_t ivl_scope_log(ivl_scope_t net, unsigned idx);
 extern unsigned     ivl_scope_lpms(ivl_scope_t net);
 extern ivl_lpm_t    ivl_scope_lpm(ivl_scope_t, unsigned idx);
-extern unsigned     ivl_scope_mems(ivl_scope_t net);
-extern ivl_memory_t ivl_scope_mem(ivl_scope_t net, unsigned idx);
 extern const char*  ivl_scope_name(ivl_scope_t net);
 extern const char*  ivl_scope_basename(ivl_scope_t net);
 extern unsigned     ivl_scope_params(ivl_scope_t net);
@@ -1372,17 +1456,26 @@ extern int          ivl_scope_time_units(ivl_scope_t net);
  * Signals have a name (obviously) and types. A signal may also be
  * signed or unsigned.
  *
- * ivl_signal_pins (replace these with ivl_signal_nex)
- * ivl_signal_pin
- *    The ivl_signal_pin function returns the nexus connected to the
- *    signal. If the signal is a vector, the idx can be a non-zero
- *    value, and the result is the nexus for the specified bit.
- *
  * ivl_signal_nex
  *    This is the nexus of the signal. This is used for managing
  *    connections to the rest of the net. There is exactly one pin for
- *    a signal. If the signal represents a vector, then the entire
- *    vector is carried through the single output.
+ *    each word of a signal. Each word may in turn be a vector. The
+ *    word address is the zero-based index for the word. It is up to
+ *    the context to translate different bases to the canonical address.
+ *
+ * ivl_signal_array_base
+ * ivl_signal_array_count
+ *    The signal may be arrayed. If so, the array_count is >1. Each
+ *    word of the array has its own nexus. The array_base is the
+ *    address is the Verilg source for the canonical zero word. This
+ *    may be negative, positive or zero.
+ *
+ *    Note that arraying of the signal into words is distinct from the
+ *    vectors. The width of a signal is the width of a WORD.
+ *
+ * ivl_signal_dimensions
+ *    The signal may be an array (of vectors) in which case this
+ *    function returns >0, the number of dimensions of the array.
  *
  * ivl_signal_msb
  * ivl_signal_lsb
@@ -1414,6 +1507,12 @@ extern int          ivl_scope_time_units(ivl_scope_t net);
  *    etc. All the signals connected to a nexus should have the same
  *    data type
  *
+ * ivl_signal_npath
+ * ivl_signal_path
+ *    This function returns the delay path object for the signal. The
+ *    delay path has this signal as the output, the source is attached
+ *    to the delay path itself.
+ *
  * ivl_signal_name (DEPRECATED)
  *    This function returns the fully scoped hierarchical name for the
  *    signal. The name refers to the entire vector that is the signal.
@@ -1437,7 +1536,10 @@ extern int          ivl_scope_time_units(ivl_scope_t net);
  *    key does not exist, the function returns 0.
  */
 
-extern ivl_nexus_t ivl_signal_nex(ivl_signal_t net);
+extern ivl_nexus_t ivl_signal_nex(ivl_signal_t net, unsigned word);
+extern int         ivl_signal_array_base(ivl_signal_t net);
+extern unsigned    ivl_signal_array_count(ivl_signal_t net);
+extern unsigned    ivl_signal_dimensions(ivl_signal_t net);
 extern int         ivl_signal_msb(ivl_signal_t net);
 extern int         ivl_signal_lsb(ivl_signal_t net);
 extern unsigned    ivl_signal_width(ivl_signal_t net);
@@ -1445,6 +1547,8 @@ extern ivl_signal_port_t ivl_signal_port(ivl_signal_t net);
 extern int         ivl_signal_signed(ivl_signal_t net);
 extern int         ivl_signal_integer(ivl_signal_t net);
 extern int         ivl_signal_local(ivl_signal_t net);
+extern unsigned    ivl_signal_npath(ivl_signal_t net);
+extern ivl_delaypath_t ivl_signal_path(ivl_signal_t net, unsigned idx);
 extern ivl_signal_type_t ivl_signal_type(ivl_signal_t net);
 extern ivl_variable_type_t ivl_signal_data_type(ivl_signal_t net);
 extern const char* ivl_signal_name(ivl_signal_t net);
@@ -1500,7 +1604,7 @@ extern ivl_statement_type_t ivl_statement_type(ivl_statement_t net);
 /*
  * The following functions retrieve specific single values from the
  * statement. These values are the bits of data and parameters that
- * make up the statement. Many of these functions apply to more then
+ * make up the statement. Many of these functions apply to more than
  * one type of statement, so the comment in front of them tells which
  * statement types can be passed to the function.
  *
@@ -1519,7 +1623,7 @@ extern ivl_statement_type_t ivl_statement_type(ivl_statement_t net);
  * ivl_stmt_lval
  * ivl_stmt_lvals
  *    Return the number of l-values for an assignment statement, or
- *    the specific l-value. If there is more then 1 l-value, then the
+ *    the specific l-value. If there is more than 1 l-value, then the
  *    l-values are presumed to be vector values concatenated together
  *    from msb (idx==0) to lsb.
  *
@@ -1563,6 +1667,19 @@ extern ivl_statement_type_t ivl_statement_type(ivl_statement_t net);
  * that constant value. If the expression is non-constant, the code
  * generator is supposed to know what to do about that, too.
  *
+ * - IVL_ST_DELAY, IVL_ST_DELAYX
+ * These statement types are delay statements. They are a way to
+ * attach a delay to a statement. The ivl_stmt_sub_stmt() function
+ * gets the statement to be executed after the delay. If this is
+ * IVL_ST_DELAY, then the ivl_stmt_delay_val function gets the
+ * constant delay. If this is IVL_ST_DELAYX, then the
+ * ivl_stmt_delay_expr gets the expression of the delay. In this case,
+ * the expression is not necessarily constant.
+ *
+ * Whether constant or calculated, the resulting delay is in units of
+ * simulation ticks. The compiler has already taken care of converting
+ * the delay to the time scale/precision of the scope.
+ *
  * - IVL_ST_FORCE
  * This is very much like IVL_ST_CASSIGN, but adds that l-values can
  * include nets (tri, wire, etc). Memory words are restricted from
@@ -1611,7 +1728,7 @@ extern ivl_statement_t ivl_stmt_cond_true(ivl_statement_t net);
   /* IVL_ST_ASSIGN IVL_ST_ASSIGN_NB IVL_ST_DELAYX */
 extern ivl_expr_t ivl_stmt_delay_expr(ivl_statement_t net);
   /* IVL_ST_DELAY */
-extern unsigned long ivl_stmt_delay_val(ivl_statement_t net);
+extern uint64_t ivl_stmt_delay_val(ivl_statement_t net);
   /* IVL_ST_WAIT IVL_ST_TRIGGER */
 extern unsigned    ivl_stmt_nevent(ivl_statement_t net);
 extern ivl_event_t ivl_stmt_events(ivl_statement_t net, unsigned idx);
@@ -1625,10 +1742,6 @@ extern unsigned ivl_stmt_lvals(ivl_statement_t net);
 extern unsigned ivl_stmt_lwidth(ivl_statement_t net);
   /* IVL_ST_STASK */
 extern const char* ivl_stmt_name(ivl_statement_t net);
-#if 0
-extern ivl_nexus_t ivl_stmt_nexus(ivl_statement_t net, unsigned idx);
-extern unsigned    ivl_stmt_nexus_count(ivl_statement_t net);
-#endif
   /* IVL_ST_STASK */
 extern ivl_expr_t ivl_stmt_parm(ivl_statement_t net, unsigned idx);
   /* IVL_ST_STASK */
@@ -1671,180 +1784,70 @@ _END_DECL
 
 /*
  * $Log: ivl_target.h,v $
- * Revision 1.161  2005/09/19 21:45:35  steve
- *  Spelling patches from Larry.
+ * Revision 1.182  2007/04/02 01:12:34  steve
+ *  Seperate arrayness from word count
  *
- * Revision 1.160  2005/09/01 04:11:37  steve
- *  Generate code to handle real valued muxes.
+ * Revision 1.181  2007/03/22 16:08:16  steve
+ *  Spelling fixes from Larry
  *
- * Revision 1.159  2005/08/06 17:58:16  steve
- *  Implement bi-directional part selects.
+ * Revision 1.180  2007/03/02 06:13:22  steve
+ *  Add support for edge sensitive spec paths.
  *
- * Revision 1.158  2005/07/11 16:56:50  steve
- *  Remove NetVariable and ivl_variable_t structures.
+ * Revision 1.179  2007/03/01 06:19:38  steve
+ *  Add support for conditional specify delay paths.
  *
- * Revision 1.157  2005/07/07 16:22:49  steve
- *  Generalize signals to carry types.
+ * Revision 1.178  2007/02/26 19:49:49  steve
+ *  Spelling fixes (larry doolittle)
  *
- * Revision 1.156  2005/06/13 22:25:37  steve
- *  Document ivl_logic_delay function.
+ * Revision 1.177  2007/02/25 23:08:24  steve
+ *  Process Verilog escape sequences much earlier.
  *
- * Revision 1.155  2005/05/24 01:44:28  steve
- *  Do sign extension of structuran nets.
+ * Revision 1.176  2007/02/02 04:33:00  steve
+ *  Use inttypes.h instead of stdint.h for portability.
  *
- * Revision 1.154  2005/05/08 23:44:08  steve
- *  Add support for variable part select.
+ * Revision 1.175  2007/01/29 01:52:51  steve
+ *  Clarify the use of ivl_scope_def for not-functions.
  *
- * Revision 1.153  2005/05/07 03:14:00  steve
- *  Clarify internal delays for assignments.
+ * Revision 1.174  2007/01/17 05:00:12  steve
+ *  Dead code for memories in scopes.
  *
- * Revision 1.152  2005/04/24 23:44:02  steve
- *  Update DFF support to new data flow.
+ * Revision 1.173  2007/01/17 04:39:18  steve
+ *  Remove dead code related to memories.
  *
- * Revision 1.151  2005/04/13 06:35:11  steve
- *  Make logic aware of strength.
+ * Revision 1.172  2007/01/16 05:44:15  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
  *
- * Revision 1.150  2005/04/08 04:52:31  steve
- *  Make clear that memory addresses are cannonical.
+ * Revision 1.171  2006/09/23 04:57:19  steve
+ *  Basic support for specify timing.
  *
- * Revision 1.149  2005/04/06 05:29:08  steve
- *  Rework NetRamDq and IVL_LPM_RAM nodes.
+ * Revision 1.170  2006/08/08 05:11:37  steve
+ *  Handle 64bit delay constants.
  *
- * Revision 1.148  2005/04/01 06:04:30  steve
- *  Clean up handle of UDPs.
+ * Revision 1.169  2006/07/30 02:51:35  steve
+ *  Fix/implement signed right shift.
  *
- * Revision 1.147  2005/03/18 02:56:03  steve
- *  Add support for LPM_UFUNC user defined functions.
+ * Revision 1.168  2006/06/18 04:15:50  steve
+ *  Add support for system functions in continuous assignments.
  *
- * Revision 1.146  2005/03/09 04:53:40  steve
- *  Generate code for new form of memory ports.
+ * Revision 1.167  2006/04/16 00:15:43  steve
+ *  Fix part selects in l-values.
  *
- * Revision 1.145  2005/03/05 05:47:42  steve
- *  Handle memory words in l-value concatenations.
+ * Revision 1.166  2006/04/10 00:37:42  steve
+ *  Add support for generate loops w/ wires and gates.
  *
- * Revision 1.144  2005/03/03 04:34:42  steve
- *  Rearrange how memories are supported as vvp_vector4 arrays.
+ * Revision 1.165  2006/02/02 02:43:58  steve
+ *  Allow part selects of memory words in l-values.
  *
- * Revision 1.143  2005/02/19 02:43:38  steve
- *  Support shifts and divide.
+ * Revision 1.164  2006/01/02 05:33:19  steve
+ *  Node delays can be more general expressions in structural contexts.
  *
- * Revision 1.142  2005/02/14 01:51:39  steve
- *  Handle bit selects in l-values to assignments.
+ * Revision 1.163  2005/12/22 15:44:29  steve
+ *  Document binary expression use.
  *
- * Revision 1.141  2005/02/13 01:15:07  steve
- *  Replace supply nets with wires connected to pullup/down supply devices.
- *
- * Revision 1.140  2005/02/12 06:25:40  steve
- *  Restructure NetMux devices to pass vectors.
- *  Generate NetMux devices from ternary expressions,
- *  Reduce NetMux devices to bufif when appropriate.
- *
- * Revision 1.139  2005/02/08 00:12:36  steve
- *  Add the NetRepeat node, and code generator support.
- *
- * Revision 1.138  2005/02/03 04:56:20  steve
- *  laborate reduction gates into LPM_RED_ nodes.
- *
- * Revision 1.137  2005/01/29 18:46:18  steve
- *  Netlist boolean expressions generate gate vectors.
- *
- * Revision 1.136  2005/01/29 16:47:20  steve
- *  Clarify width of nexus.
- *
- * Revision 1.135  2005/01/28 05:39:33  steve
- *  Simplified NetMult and IVL_LPM_MULT.
- *
- * Revision 1.134  2005/01/24 05:28:30  steve
- *  Remove the NetEBitSel and combine all bit/part select
- *  behavior into the NetESelect node and IVL_EX_SELECT
- *  ivl_target expression type.
- *
- * Revision 1.133  2005/01/22 17:36:59  steve
- *  stub dump signed flags of magnitude compare.
- *
- * Revision 1.132  2005/01/22 01:06:55  steve
- *  Change case compare from logic to an LPM node.
- *
- * Revision 1.131  2005/01/09 20:16:01  steve
- *  Use PartSelect/PV and VP to handle part selects through ports.
- *
- * Revision 1.130  2004/12/29 23:55:43  steve
- *  Unify elaboration of l-values for all proceedural assignments,
- *  including assing, cassign and force.
- *
- *  Generate NetConcat devices for gate outputs that feed into a
- *  vector results. Use this to hande gate arrays. Also let gate
- *  arrays handle vectors of gates when the outputs allow for it.
- *
- * Revision 1.129  2004/12/18 18:56:18  steve
- *  Add ivl_event_scope, and better document ivl_event_X methods.
- *
- * Revision 1.128  2004/12/15 17:10:40  steve
- *  Fixup force statement elaboration.
- *
- * Revision 1.127  2004/12/11 02:31:26  steve
- *  Rework of internals to carry vectors through nexus instead
- *  of single bits. Make the ivl, tgt-vvp and vvp initial changes
- *  down this path.
- *
- * Revision 1.126  2004/10/04 01:10:53  steve
- *  Clean up spurious trailing white space.
- *
- * Revision 1.125  2004/09/25 01:58:12  steve
- *  Some commentary on ivl_logic_pin.
- *
- * Revision 1.124  2003/12/03 02:46:24  steve
- *  Add support for wait on list of named events.
- *
- * Revision 1.123  2003/11/08 20:06:21  steve
- *  Spelling fixes in comments.
- *
- * Revision 1.122  2003/08/22 23:14:26  steve
- *  Preserve variable ranges all the way to the vpi.
- *
- * Revision 1.121  2003/08/15 02:23:52  steve
- *  Add synthesis support for synchronous reset.
- *
- * Revision 1.120  2003/07/30 01:13:28  steve
- *  Add support for triand and trior.
- *
- * Revision 1.119  2003/06/23 01:25:44  steve
- *  Module attributes make it al the way to ivl_target.
- *
- * Revision 1.118  2003/05/14 05:26:41  steve
- *  Support real expressions in case statements.
- *
- * Revision 1.117  2003/04/22 04:48:29  steve
- *  Support event names as expressions elements.
- *
- * Revision 1.116  2003/04/11 05:18:08  steve
- *  Handle signed magnitude compare all the
- *  way through to the vvp code generator.
- *
- * Revision 1.115  2003/03/10 23:40:53  steve
- *  Keep parameter constants for the ivl_target API.
- *
- * Revision 1.114  2003/03/06 01:24:37  steve
- *  Obsolete the ivl_event_name function.
- *
- * Revision 1.113  2003/03/06 00:28:41  steve
- *  All NetObj objects have lex_string base names.
- *
- * Revision 1.112  2003/02/26 01:29:24  steve
- *  LPM objects store only their base names.
- *
- * Revision 1.111  2003/01/30 16:23:07  steve
- *  Spelling fixes.
- *
- * Revision 1.110  2003/01/26 21:15:58  steve
- *  Rework expression parsing and elaboration to
- *  accommodate real/realtime values and expressions.
- *
- * Revision 1.109  2002/12/21 00:55:58  steve
- *  The $time system task returns the integer time
- *  scaled to the local units. Change the internal
- *  implementation of vpiSystemTime the $time functions
- *  to properly account for this. Also add $simtime
- *  to get the simulation time.
+ * Revision 1.162  2005/11/20 15:58:25  steve
+ *  Document the IVL_ST_DELAY statements.
  */
 #endif

ivlpp/Makefile.in

@@ -18,7 +18,7 @@
 #    59 Temple Place - Suite 330
 #    Boston, MA 02111-1307, USA
 #
-#ident "$Id: Makefile.in,v 1.17 2004/10/04 01:10:56 steve Exp $"
+#ident "$Id: Makefile.in,v 1.18 2006/10/30 22:45:37 steve Exp $"
 #
 #
 SHELL = /bin/sh
@@ -44,18 +44,18 @@ CPPFLAGS = @ident_support@ -I. -I.. -I$(srcdir)/.. -I$(srcdir) @CPPFLAGS@ @DEFS@
 CFLAGS = -Wall @CFLAGS@
 LDFLAGS = @LDFLAGS@
 
-all: ivlpp
+all: ivlpp@EXEEXT@
 
 clean:
-	rm -f *.o lexor.c parse.c parse.h parse.output ivlpp
+	rm -f *.o lexor.c parse.c parse.h parse.output ivlpp@EXEEXT@
 
 distclean: clean
 	rm -f Makefile
 
 O = main.o lexor.o parse.o
 
-ivlpp: $O
-	$(CC) $(LDFLAGS) $O -o ivlpp @EXTRALIBS@
+ivlpp@EXEEXT@: $O
+	$(CC) $(LDFLAGS) $O -o ivlpp@EXEEXT@ @EXTRALIBS@
 
 lexor.c: lexor.lex
 	flex -s -olexor.c $(srcdir)/lexor.lex
@@ -63,16 +63,16 @@ lexor.c: lexor.lex
 parse.h parse.c: parse.y
 	bison --verbose -t -d -o parse.c $(srcdir)/parse.y
 
-install: all installdirs $(libdir)/ivl/ivlpp
+install: all installdirs $(libdir)/ivl/ivlpp@EXEEXT@
 
-$(libdir)/ivl/ivlpp: ivlpp
-	$(INSTALL_PROGRAM) ./ivlpp $(libdir)/ivl/ivlpp
+$(libdir)/ivl/ivlpp@EXEEXT@: ivlpp@EXEEXT@
+	$(INSTALL_PROGRAM) ./ivlpp@EXEEXT@ $(libdir)/ivl/ivlpp@EXEEXT@
 
 installdirs: ../mkinstalldirs
 	$(srcdir)/../mkinstalldirs $(libdir)/ivl
 
 uninstall:
-	rm -f $(libdir)/ivl/ivlpp
+	rm -f $(libdir)/ivl/ivlpp@EXEEXT@
 
 lexor.o: lexor.c parse.h globals.h
 main.o: main.c globals.h

ivlpp/lexor.lex

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: lexor.lex,v 1.46 2004/09/10 00:15:45 steve Exp $"
+#ident "$Id: lexor.lex,v 1.48 2007/05/30 23:21:20 steve Exp $"
 #endif
 
 # include "config.h"
@@ -70,7 +70,14 @@ struct include_stack_t {
 
 static void emit_pathline(struct include_stack_t *isp);
 
+/*
+ * The file_queue is a singly-linked list of the files that were
+ * listed on the command line/file list.
+ */
 static struct include_stack_t*file_queue = 0;
+/*
+ * The istack is the inclusion stack.
+ */
 static struct include_stack_t*istack  = 0;
 static struct include_stack_t*standby = 0;
 
@@ -111,11 +118,11 @@ static void ifdef_leave(void)
       if (strcmp(istack->path,cur->path) != 0) {
 	    fprintf(stderr, "%s:%u: warning: "
 		    "This `endif matches an ifdef in another file.\n",
-		    istack->path, istack->lineno);
+		    istack->path, istack->lineno+1);
 
 	    fprintf(stderr, "%s:%u:        : "
 		    "This is the odd matched `ifdef.\n",
-		    cur->path, cur->lineno);
+		    cur->path, cur->lineno+1);
       }
 
       free(cur->path);
@@ -309,7 +316,24 @@ W [ \t\b\f]+
       yy_push_state(IFDEF_SUPR);
   }
 
-<IFDEF_TRUE>`else  { BEGIN(IFDEF_FALSE); }
+<IFDEF_TRUE>`elsif{W}[a-zA-Z_][a-zA-Z0-9_$]* {
+      BEGIN(IFDEF_SUPR);
+  }
+<IFDEF_FALSE>`elsif{W}[a-zA-Z_][a-zA-Z0-9_$]* {
+      char*name = strchr(yytext, '`');
+      assert(name);
+      name += 6;
+      name += strspn(name, " \t\b\f");
+
+      if (is_defined(name)) {
+	    BEGIN(IFDEF_TRUE);
+      } else {
+	    BEGIN(IFDEF_FALSE);
+      }
+  }
+<IFDEF_SUPR>`elsif{W}[a-zA-Z_][a-zA-Z0-9_$]* {  }
+
+<IFDEF_TRUE>`else  { BEGIN(IFDEF_SUPR); }
 <IFDEF_FALSE>`else { BEGIN(IFDEF_TRUE); }
 <IFDEF_SUPR>`else  {  }
 
@@ -322,6 +346,42 @@ W [ \t\b\f]+
 
 <IFDEF_FALSE,IFDEF_TRUE,IFDEF_SUPR>`endif { ifdef_leave(); yy_pop_state(); }
 
+`ifdef {
+      fprintf(stderr, "%s:%u: `ifdef without a macro name - ignored.\n",
+              istack->path, istack->lineno+1);
+      error_count += 1;
+  }
+
+`ifndef {
+      fprintf(stderr, "%s:%u: `ifndef without a macro name - ignored.\n",
+              istack->path, istack->lineno+1);
+      error_count += 1;
+  }
+
+`elsif {
+      fprintf(stderr, "%s:%u: `elsif without a macro name - ignored.\n",
+              istack->path, istack->lineno+1);
+      error_count += 1;
+  }
+
+`elsif{W}[a-zA-Z_][a-zA-Z0-9_$]* {
+      fprintf(stderr, "%s:%u: `elsif without a matching `ifdef - ignored.\n",
+              istack->path, istack->lineno+1);
+      error_count += 1;
+  }
+
+`else {
+      fprintf(stderr, "%s:%u: `else without a matching `ifdef - ignored.\n",
+              istack->path, istack->lineno+1);
+      error_count += 1;
+  }
+
+`endif {
+      fprintf(stderr, "%s:%u: `endif without a matching `ifdef - ignored.\n",
+              istack->path, istack->lineno+1);
+      error_count += 1;
+  }
+
   /* This pattern notices macros and arranges for them to be replaced. */
 `[a-zA-Z][a-zA-Z0-9_$]* { def_match(); }
 
@@ -759,7 +819,7 @@ static void lexor_done()
 	    ifdef_stack = cur->next;
 
 	    fprintf(stderr, "%s:%u: error: This `ifdef lacks an `endif.\n",
-		    cur->path, cur->lineno);
+		    cur->path, cur->lineno+1);
 
 	    free(cur->path);
 	    free(cur);
@@ -777,11 +837,14 @@ static int yywrap()
       int line_mask_flag = 0;
       struct include_stack_t*isp = istack;
       istack = isp->next;
+      FILE *delayed_close = (FILE *) 0;
 
 	/* Delete the current input buffers, and free the cell. */
       yy_delete_buffer(YY_CURRENT_BUFFER);
       if (isp->file) {
-	    fclose(isp->file);
+	      /* Delay the close of this file, because the yyrestart
+		 below seems to have some memory of this file. */
+	    delayed_close = isp->file;
 	    free(isp->path);
       } else {
 	      /* If I am printing line directives and I just finished
@@ -825,6 +888,7 @@ static int yywrap()
 	    }
 
 	    yyrestart(istack->file);
+	    if (delayed_close) fclose(delayed_close);
 	    return 0;
       }
 
@@ -833,6 +897,7 @@ static int yywrap()
 	   top. If I need to print a line directive, do so. */
 
       yy_switch_to_buffer(istack->yybs);
+      if (delayed_close) fclose(delayed_close);
 
       if (line_direct_flag && istack->path && !line_mask_flag)
 	    fprintf(yyout, "\n`line %u \"%s\" 2\n",
@@ -854,6 +919,7 @@ void reset_lexor(FILE*out, char*paths[])
       isp->path = strdup(paths[0]);
       isp->file = fopen(paths[0], "r");
       isp->str  = 0;
+      isp->lineno = 0;
       if (isp->file == 0) {
 	    perror(paths[0]);
 	    exit(1);
@@ -876,8 +942,10 @@ void reset_lexor(FILE*out, char*paths[])
       for (idx = 1 ;  paths[idx] ;  idx += 1) {
 	    isp = malloc(sizeof(struct include_stack_t));
 	    isp->path = strdup(paths[idx]);
+	    isp->file = 0;
 	    isp->str = 0;
 	    isp->next = 0;
+	    isp->lineno = 0;
 	    if (tail)
 		  tail->next = isp;
 	    else

ivlpp/main.c

@@ -17,7 +17,7 @@ const char COPYRIGHT[] =
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: main.c,v 1.20 2004/09/10 00:15:45 steve Exp $"
+#ident "$Id: main.c,v 1.23 2006/10/02 18:16:18 steve Exp $"
 #endif
 
 # include "config.h"
@@ -58,6 +58,8 @@ extern int getopt(int argc, char*argv[], const char*fmt);
 extern int optind;
 extern const char*optarg;
 #endif
+/* Path to the dependency file, if there is one. */
+char *dep_path = NULL;
 
 /*
  * Keep in source_list an array of pointers to file names. The array
@@ -89,6 +91,76 @@ int line_direct_flag = 0;
 unsigned error_count = 0;
 FILE *depend_file = NULL;
 
+static int flist_read_flags(const char*path)
+{
+      char line_buf[2048];
+      FILE*fd = fopen(path, "r");
+      if (fd == 0) {
+	    fprintf(stderr, "%s: unable to open for reading.\n", path);
+	    return -1;
+      }
+
+      while (fgets(line_buf, sizeof line_buf, fd) != 0) {
+	      /* Skip leading white space. */
+	    char*cp = line_buf + strspn(line_buf, " \t\r\b\f");
+	      /* Remove trailing white space. */
+	    char*tail = cp + strlen(cp);
+	    while (tail > cp) {
+		  if (! isspace(tail[-1]))
+			break;
+		  tail -= 1;
+		  tail[0] = 0;
+	    }
+
+	      /* Skip empty lines */
+	    if (*cp == 0)
+		  continue;
+	      /* Skip comment lines */
+	    if (cp[0] == '#')
+		  continue;
+
+	      /* The arg points to the argument to the keyword. */
+	    char*arg = strchr(cp, ':');
+	    if (arg) *arg++ = 0;
+
+	    if (strcmp(cp,"D") == 0) {
+		  char*val = strchr(arg, '=');
+		  if (val)
+			*val++ = 0;
+		  else
+			val = "1";
+
+		  define_macro(arg, val, 0);
+
+	    } else if (strcmp(cp,"I") == 0) {
+		  include_dir = realloc(include_dir,
+					(include_cnt+1)*sizeof(char*));
+		  include_dir[include_cnt] = strdup(arg);
+		  include_cnt += 1;
+
+	    } else if (strcmp(cp,"keyword") == 0) {
+		  char*buf = malloc(strlen(arg) + 2);
+		  buf[0] = '`';
+		  strcpy(buf+1, optarg);
+		  define_macro(optarg, buf, 1);
+		  free(buf);
+
+	    } else if (strcmp(cp,"M") == 0) {
+		  if (dep_path) {
+			fprintf(stderr, "duplicate -M flag.\n");
+		  } else {
+			dep_path = strdup(arg);
+		  }
+
+	    } else {
+		  fprintf(stderr, "%s: Invalid keyword %s\n", path, cp);
+	    }
+      }
+
+      fclose(fd);
+      return 0;
+}
+
 /*
  * This function reads from a file a list of file names. Each name
  * starts with the first non-space character, and ends with the last
@@ -127,7 +199,6 @@ int main(int argc, char*argv[])
       const char*flist_path = 0;
       unsigned flag_errors = 0;
       char*out_path = 0;
-      char *dep_path = NULL;
       FILE*out;
 
 	/* Define preprocessor keywords that I plan to just pass. */
@@ -153,20 +224,11 @@ int main(int argc, char*argv[])
       include_dir[0] = strdup(".");
       include_cnt = 1;
 
-      while ((opt = getopt(argc, argv, "D:f:I:K:LM:o:v")) != EOF) switch (opt) {
+      while ((opt=getopt(argc, argv, "F:f:K:Lo:v")) != EOF) switch (opt) {
 
-	  case 'D': {
-		char*tmp = strdup(optarg);
-		char*val = strchr(tmp, '=');
-		if (val)
-		      *val++ = 0;
-		else
-		      val = "1";
-
-		define_macro(tmp, val, 0);
-		free(tmp);
-		break;
-	  }
+	  case 'F':
+	    flist_read_flags(optarg);
+	    break;
 
 	  case 'f':
 	    if (flist_path) {
@@ -176,13 +238,6 @@ int main(int argc, char*argv[])
 	    flist_path = optarg;
 	    break;
 
-	  case 'I':
-	    include_dir = realloc(include_dir,
-					  (include_cnt+1)*sizeof(char*));
-	    include_dir[include_cnt] = strdup(optarg);
-	    include_cnt += 1;
-	    break;
-
 	  case 'K': {
 		char*buf = malloc(strlen(optarg) + 2);
 		buf[0] = '`';
@@ -196,14 +251,6 @@ int main(int argc, char*argv[])
 	    line_direct_flag = 1;
 	    break;
 
-	  case 'M':
-	    if (dep_path) {
-		  fprintf(stderr, "duplicate -M flag.\n");
-	    } else {
-		  dep_path = optarg;
-	    }
-	    break;
-
 	  case 'o':
 	    if (out_path) {
 		  fprintf(stderr, "duplicate -o flag.\n");
@@ -225,13 +272,11 @@ int main(int argc, char*argv[])
       }
 
       if (flag_errors) {
-	    fprintf(stderr, "\nUsage: %s [-v][-L][-I<dir>][-D<def>] <file>...\n"
-		    "    -D<def> - Predefine a value.\n"
+	    fprintf(stderr, "\nUsage: %s [-v][-L][-F<fil>][-f<fil>] <file>...\n"
+		    "    -F<fil> - Get defines and includes from file\n"
 		    "    -f<fil> - Read the sources listed in the file\n"
-		    "    -I<dir> - Add an include file search directory\n"
 		    "    -K<def> - Define a keyword macro that I just pass\n"
 		    "    -L      - Emit line number directives\n"
-		    "    -M<fil> - Write dependencies to <fil>\n"
 		    "    -o<fil> - Send the output to <fil>\n"
 		    "    -v      - Print version information\n",
 		    argv[0]);
@@ -290,6 +335,15 @@ int main(int argc, char*argv[])
 
 /*
  * $Log: main.c,v $
+ * Revision 1.23  2006/10/02 18:16:18  steve
+ *  Save dep_path because arg space is overrun.
+ *
+ * Revision 1.22  2006/07/26 00:11:40  steve
+ *  Pass depfiles through temp defines file.
+ *
+ * Revision 1.21  2006/07/26 00:02:48  steve
+ *  Pass defines and includes through temp file.
+ *
  * Revision 1.20  2004/09/10 00:15:45  steve
  *  Remove bad casts.
  *

lexor.lex

@@ -1,4 +1,6 @@
 
+%option never-interactive
+
 %{
 /*
  * Copyright (c) 1998-2000 Stephen Williams ([email protected])
@@ -19,7 +21,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: lexor.lex,v 1.88 2005/09/14 15:01:07 steve Exp $"
+#ident "$Id: lexor.lex,v 1.96 2007/06/14 03:50:00 steve Exp $"
 #endif
 
 # include "config.h"
@@ -51,6 +53,7 @@ extern YYLTYPE yylloc;
 struct file_name_cell {
       const char*text;
       struct file_name_cell*next;
+      bool library_flag;
 };
 
 static struct file_name_cell*file_names = 0;
@@ -70,6 +73,13 @@ static const char* set_file_name(char*text)
       cur = new struct file_name_cell;
       cur->text = text;
       cur->next = file_names;
+
+	/* Check this file name with the list of library file
+	   names. If there is a match, then turn on the
+	   pform_library_flag. This is how the parser knows that
+	   modules declared in this file are library modules. */
+      cur->library_flag = library_file_map[cur->text];
+      pform_library_flag = cur->library_flag;
       return text;
 }
 
@@ -99,6 +109,7 @@ static int comment_enter;
 %s UDPTABLE
 %x PPTIMESCALE
 %x PPDEFAULT_NETTYPE
+%s EDGES
 
 W [ \t\b\f\r]+
 
@@ -132,6 +143,7 @@ W [ \t\b\f\r]+
 "<<<" { return K_LS; /* Note: Functionally, <<< is the same as <<. */}
 ">>"  { return K_RS; }
 ">>>" { return K_RSS; }
+"**" { return K_POW; }
 "<=" { return K_LE; }
 ">=" { return K_GE; }
 "=>" { return K_EG; }
@@ -154,13 +166,14 @@ W [ \t\b\f\r]+
   /* Watch out for the tricky case of (*). Cannot parse this as "(*"
      and ")", but since I know that this is really ( * ), replace it
      with "*" and return that. */
-"(*"{W}*")" { return '*'; }
-
+"("{W}*"*"{W}*")" { return '*'; }
 
+<EDGES>"]" { BEGIN(0); return yytext[0]; }
 [}{;:\[\],()#=.@&!?<>%|^~+*/-] { return yytext[0]; }
 
 \"            { BEGIN(CSTRING); }
-<CSTRING>\\\" { yymore(); }
+<CSTRING>\\\\ { yymore(); /* Catch \\, which is a \ escaping itself */ }
+<CSTRING>\\\" { yymore(); /* Catch \", which is an escaped quote */ }
 <CSTRING>\n   { BEGIN(0);
                 yylval.text = strdup(yytext);
 		VLerror(yylloc, "Missing close quote of string.");
@@ -198,6 +211,17 @@ W [ \t\b\f\r]+
 <UDPTABLE>[pP]     { return 'p'; }
 <UDPTABLE>[01\?\*\-] { return yytext[0]; }
 
+<EDGES>"01" { return K_edge_descriptor; }
+<EDGES>"0x" { return K_edge_descriptor; }
+<EDGES>"0z" { return K_edge_descriptor; }
+<EDGES>"10" { return K_edge_descriptor; }
+<EDGES>"1x" { return K_edge_descriptor; }
+<EDGES>"1z" { return K_edge_descriptor; }
+<EDGES>"x0" { return K_edge_descriptor; }
+<EDGES>"x1" { return K_edge_descriptor; }
+<EDGES>"z0" { return K_edge_descriptor; }
+<EDGES>"z1" { return K_edge_descriptor; }
+
 [a-zA-Z_][a-zA-Z0-9$_]* {
       int rc = lexor_keyword_code(yytext, yyleng);
       switch (rc) {
@@ -218,6 +242,10 @@ W [ \t\b\f\r]+
 	    }
 	    break;
 
+	  case K_edge:
+	    BEGIN(EDGES);
+	    break;
+
 	  default:
 	    yylval.text = 0;
 	    break;
@@ -293,10 +321,10 @@ W [ \t\b\f\r]+
 ^{W}?`disable_portfaults{W}?.*   {  }
 ^{W}?`enable_portfaults{W}?.*    {  }
 ^{W}?`endcelldefine{W}?.*        {  }
-^{W}?`endprotect{W}?.*           {  }
+`endprotect                      {  }
 ^{W}?`nosuppress_faults{W}?.*    {  }
 ^{W}?`nounconnected_drive{W}?.*  {  }
-^{W}?`protect{W}?.*              {  }
+`protect                         {  }
 ^{W}?`resetall{W}?.*             {  }
 ^{W}?`suppress_faults{W}?.*      {  }
 ^{W}?`unconnected_drive{W}?.*    {  }
@@ -457,7 +485,7 @@ static verinum*make_unsized_binary(const char*txt)
 	    ptr += 1;
       }
 
-      verinum*out = new verinum(bits, size);
+      verinum*out = new verinum(bits, size, false);
       out->has_sign(sign_flag);
       delete[]bits;
       return out;
@@ -517,7 +545,7 @@ static verinum*make_unsized_octal(const char*txt)
 	    ptr += 1;
       }
 
-      verinum*out = new verinum(bits, size);
+      verinum*out = new verinum(bits, size, false);
       out->has_sign(sign_flag);
       delete[]bits;
       return out;
@@ -587,7 +615,7 @@ static verinum*make_unsized_hex(const char*txt)
 	    ptr += 1;
       }
 
-      verinum*out = new verinum(bits, size);
+      verinum*out = new verinum(bits, size, false);
       out->has_sign(sign_flag);
       delete[]bits;
       return out;

lexor_keyword.gperf

@@ -31,6 +31,7 @@ else,		K_else
 end,		K_end
 endcase,	K_endcase
 endfunction,	K_endfunction
+endgenerate,	K_endgenerate
 endmodule,	K_endmodule
 endprimitive,	K_endprimitive
 endspecify,	K_endspecify
@@ -42,9 +43,12 @@ force,		K_force
 forever,	K_forever
 fork,		K_fork
 function,	K_function
+generate,	K_generate
+genvar,		K_genvar
 highz0,		K_highz0
 highz1,		K_highz1
 if,		K_if
+ifnone,		K_ifnone
 initial,	K_initial
 inout,		K_inout
 input,		K_input

libveriuser/Makefile.in

@@ -16,7 +16,7 @@
 #    59 Temple Place - Suite 330
 #    Boston, MA 02111-1307, USA
 #
-#ident "$Id: Makefile.in,v 1.34 2004/10/04 01:10:07 steve Exp $"
+#ident "$Id: Makefile.in,v 1.36 2007/02/06 05:07:32 steve Exp $"
 #
 #
 SHELL = /bin/sh
@@ -41,7 +41,6 @@ INSTALL_DATA = @INSTALL_DATA@
 CPPFLAGS = @ident_support@ -I. -I.. -I$(srcdir) -I$(srcdir)/.. @CPPFLAGS@ @DEFS@ @PICFLAG@
 CFLAGS = -Wall @CFLAGS@
 LDFLAGS = @LDFLAGS@
-STRIP = @STRIP@
 RANLIB = @RANLIB@
 
 A = a_close.o a_compare_handles.o a_configure.o a_fetch_argc.o \
@@ -92,7 +91,7 @@ clean:
 	rm -rf *.o dep libveriuser.a libveriuser.o bin32
 
 distclean: clean
-	rm -f Makefile config.status config.log config.cache
+	rm -f Makefile config.status config.log config.cache config.h
 
 install:: all installdirs $(libdir64)/libveriuser.a $(INSTALL32)
 

libveriuser/a_next.c

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: a_next.c,v 1.3 2003/06/17 16:55:07 steve Exp $"
+#ident "$Id: a_next.c,v 1.4 2006/10/30 22:45:37 steve Exp $"
 #endif
 
 #include  <stdio.h>
@@ -34,7 +34,7 @@ handle acc_next(PLI_INT32 *type, handle scope, handle prev)
 
       /* trace */
       if (pli_trace) {
-	    int *ip;
+	    PLI_INT32 *ip;
 	    fprintf(pli_trace, "acc_next(%p <", type);
 	    for (ip = type; *ip; ip++) {
 		  fprintf(pli_trace, "%s%d", ip != type ? "," : "", *ip);
@@ -94,6 +94,9 @@ handle acc_next_scope(handle scope, handle prev)
 
 /*
  * $Log: a_next.c,v $
+ * Revision 1.4  2006/10/30 22:45:37  steve
+ *  Updates for Cygwin portability (pr1585922)
+ *
  * Revision 1.3  2003/06/17 16:55:07  steve
  *  1) setlinebuf() for vpi_trace
  *  2) Addes error checks for trace file opens

libveriuser/configure.in

@@ -1,6 +1,8 @@
 AC_INIT(Makefile.in)
 AC_CONFIG_HEADER(config.h)
 
+AC_CANONICAL_HOST
+
 AC_PROG_CC
 AC_PROG_INSTALL
 AC_PROG_RANLIB
@@ -21,7 +23,7 @@ AC_CHECK_SIZEOF(unsigned)
 # may modify CPPFLAGS and CFLAGS
 AX_CPP_PRECOMP
 
-# Compiler option for position independent code, needed whan making shared objects.
+# Compiler option for position independent code, needed when making shared objects.
 AX_C_PICFLAG
 
 AC_SUBST(EXEEXT)

libveriuser/veriusertfs.c

@@ -18,7 +18,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: veriusertfs.c,v 1.15 2004/09/10 23:13:05 steve Exp $"
+#ident "$Id: veriusertfs.c,v 1.17 2007/05/08 22:01:26 steve Exp $"
 #endif
 
 /*
@@ -44,9 +44,9 @@ typedef struct t_pli_data {
       int	paramvc;	/* parameter number for misctf */
 } s_pli_data, *p_pli_data;
 
-static int compiletf(char *);
-static int calltf(char *);
-static int callback(p_cb_data);
+static PLI_INT32 compiletf(char *);
+static PLI_INT32 calltf(char *);
+static PLI_INT32 callback(p_cb_data);
 
 /*
  * Register veriusertfs routines/wrappers. Iterate over the tfcell
@@ -58,7 +58,7 @@ void veriusertfs_register_table(p_tfcell vtable)
       p_tfcell tf;
       s_vpi_systf_data tf_data;
       p_pli_data data;
-      char trace_buf[1024];
+      static char trace_buf[1024];
 
       if (!pli_trace && (path = getenv("PLI_TRACE"))) {
 	    if (strcmp(path,"-") == 0)
@@ -69,8 +69,8 @@ void veriusertfs_register_table(p_tfcell vtable)
 			perror(path);
 			exit(1);
 		  }
-		  setvbuf(pli_trace, trace_buf, _IOLBF, sizeof(trace_buf));
 	    }
+	    setvbuf(pli_trace, trace_buf, _IOLBF, sizeof(trace_buf));
       }
 
       for (tf = vtable; tf; tf++) {
@@ -139,7 +139,7 @@ void veriusertfs_register_table(p_tfcell vtable)
  * This function calls the veriusertfs checktf and sets up all the
  * callbacks misctf requires.
  */
-static int compiletf(char *data)
+static PLI_INT32 compiletf(char *data)
 {
       p_pli_data pli;
       p_tfcell tf;
@@ -221,7 +221,7 @@ static int compiletf(char *data)
 /*
  * This function is the wrapper for the veriusertfs calltf routine.
  */
-static int calltf(char *data)
+static PLI_INT32 calltf(char *data)
 {
       int rc = 0;
       p_pli_data pli;
@@ -249,13 +249,13 @@ static int calltf(char *data)
  */
 extern int async_misctf_enable;
 
-static int callback(p_cb_data data)
+static PLI_INT32 callback(p_cb_data data)
 {
       p_pli_data pli;
       p_tfcell tf;
       int reason;
       int paramvc = 0;
-      int rc;
+      PLI_INT32 rc;
 
 	/* not enabled */
       if (data->reason == cbValueChange && !async_misctf_enable)
@@ -389,6 +389,12 @@ PLI_INT32 tf_setrealdelay(double dly)
 }
 /*
  * $Log: veriusertfs.c,v $
+ * Revision 1.17  2007/05/08 22:01:26  steve
+ *  Trace file line buffer must be static.
+ *
+ * Revision 1.16  2006/10/30 22:45:37  steve
+ *  Updates for Cygwin portability (pr1585922)
+ *
  * Revision 1.15  2004/09/10 23:13:05  steve
  *  Compile cleanup of C code.
  *

link_const.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: link_const.cc,v 1.17 2004/10/04 01:10:53 steve Exp $"
+#ident "$Id: link_const.cc,v 1.18 2007/04/14 03:10:51 steve Exp $"
 #endif
 
 # include "config.h"
@@ -132,6 +132,8 @@ verinum::V Nexus::driven_value() const
 
 	    } else if ((sig = dynamic_cast<const NetNet*>(cur->get_obj()))) {
 
+		    // If we find an attached SUPPLY0/1, the we know
+		    // from that what the driven value is. Stop now.
 		  if (sig->type() == NetNet::SUPPLY0) {
 			driven_ = V0;
 			return verinum::V0;
@@ -140,6 +142,16 @@ verinum::V Nexus::driven_value() const
 			driven_ = V1;
 			return verinum::V1;
 		  }
+
+		    // If we find an attached TRI0/1, then this is a
+		    // good guess for the driven value, but keep
+		    // looking for something better.
+		  if (sig->type() == NetNet::TRI0) {
+			val = verinum::V0;
+		  }
+		  if (sig->type() == NetNet::TRI1) {
+			val = verinum::V1;
+		  }
 	    }
       }
 
@@ -164,6 +176,9 @@ verinum::V Nexus::driven_value() const
 
 /*
  * $Log: link_const.cc,v $
+ * Revision 1.18  2007/04/14 03:10:51  steve
+ *  Properly account for tri0 connected to otherwise open mux input.
+ *
  * Revision 1.17  2004/10/04 01:10:53  steve
  *  Clean up spurious trailing white space.
  *

main.cc

@@ -19,7 +19,7 @@ const char COPYRIGHT[] =
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: main.cc,v 1.92 2005/07/14 23:38:43 steve Exp $"
+#ident "$Id: main.cc,v 1.95 2007/04/19 02:52:53 steve Exp $"
 #endif
 
 # include "config.h"
@@ -88,11 +88,13 @@ const char*target = "null";
  */
 generation_t generation_flag = GN_DEFAULT;
 bool gn_cadence_types_flag = true;
+bool gn_specify_blocks_flag = true;
 
 map<string,const char*> flags;
 char*vpi_module_list = 0;
 
 map<perm_string,unsigned> missing_modules;
+map<string,bool> library_file_map;
 
 list<const char*> library_suff;
 
@@ -124,6 +126,8 @@ bool debug_synth2 = false;
  */
 bool verbose_flag = false;
 
+unsigned integer_width = 32;
+
 /*
  * Keep a heap of identifier strings that I encounter. This is a more
  * efficient way to allocate those strings.
@@ -186,17 +190,29 @@ const char *net_func_to_name(const net_func func)
 
 static void process_generation_flag(const char*gen)
 {
-      if (strcmp(gen,"1") == 0)
+      if (strcmp(gen,"1") == 0) {
 	    generation_flag = GN_VER1995;
 
-      else if (strcmp(gen,"2") == 0)
+      } else if (strcmp(gen,"2") == 0) {
 	    generation_flag = GN_VER2001;
 
-      else if (strcmp(gen,"2x") == 0)
+      } else if (strcmp(gen,"2x") == 0) {
 	    generation_flag = GN_VER2001X;
 
-      else
-	    generation_flag = GN_DEFAULT;
+      } else if (strcmp(gen,"xtypes") == 0) {
+	    gn_cadence_types_flag = true;
+
+      } else if (strcmp(gen,"no-xtypes") == 0) {
+	    gn_cadence_types_flag = false;
+
+      } else if (strcmp(gen,"specify") == 0) {
+	    gn_specify_blocks_flag = true;
+ 
+      } else if (strcmp(gen,"no-specify") == 0) {
+	    gn_specify_blocks_flag = false;
+ 
+      } else {
+      }
 }
 
 static void parm_to_flagmap(const string&flag)
@@ -257,13 +273,22 @@ static void parm_to_flagmap(const string&flag)
  *    functor:<name>
  *        Append a named functor to the processing path.
  *
- *    generation:<1|2|3.0>
+ *    generation:<1|2|2x|xtypes|no-xtypes|specify|no-specify>
  *        This is the generation flag
  *
  *    ivlpp:<preprocessor command>
  *        This specifies the ivlpp command line used to process
  *        library modules as I read them in.
  *
+ *    iwidth:<bits>
+ *        This specifies the width of integer variables. (that is,
+ *        variables declared using the "integer" keyword.)
+ *
+ *    library_file:<path>
+ *        This marks that a source file with the given path is a
+ *        library. Any modules in that file are marked as library
+ *        modules.
+ *
  *    module:<name>
  *        Load a VPI module.
  *
@@ -354,6 +379,13 @@ static void read_iconfig_file(const char*ipath)
 	    } else if (strcmp(buf, "ivlpp") == 0) {
 		  ivlpp_string = strdup(cp);
 
+	    } else if (strcmp(buf, "iwidth") == 0) {
+		  integer_width = strtoul(cp,0,10);
+
+	    } else if (strcmp(buf, "library_file") == 0) {
+		  const char* path = strdup(cp);
+		  library_file_map[path] = true;
+
 	    } else if (strcmp(buf,"module") == 0) {
 		  if (vpi_module_list == 0) {
 			vpi_module_list = strdup(cp);
@@ -559,6 +591,16 @@ int main(int argc, char*argv[])
 		  break;
 	    }
 
+	    if (gn_specify_blocks_flag)
+		  cout << ",specify";
+	    else
+		  cout << ",no-specify";
+
+	    if (gn_cadence_types_flag)
+		  cout << ",xtypes";
+	    else
+		  cout << ",no-xtypes";
+
 	    cout << endl << "PARSING INPUT" << endl;
       }
 
@@ -611,11 +653,20 @@ int main(int argc, char*argv[])
 	    for (mod = pform_modules.begin()
 		       ; mod != pform_modules.end()
 		       ; mod++) {
-		  if (mentioned_p[(*mod).second->mod_name()] == false) {
-			if (verbose_flag)
-			      cout << " " << (*mod).second->mod_name();
-			roots.push_back((*mod).second->mod_name());
-		  }
+
+		    /* Don't choose library modules. */
+		  if ((*mod).second->library_flag)
+			continue;
+
+		    /* Don't choose modules instantiated in other
+		       modules. */
+		  if (mentioned_p[(*mod).second->mod_name()])
+			continue;
+
+		    /* What's left might as well be chosen as a root. */
+		  if (verbose_flag)
+			cout << " " << (*mod).second->mod_name();
+		  roots.push_back((*mod).second->mod_name());
 	    }
 	    if (verbose_flag)
 		  cout << endl;
@@ -764,6 +815,15 @@ int main(int argc, char*argv[])
 
 /*
  * $Log: main.cc,v $
+ * Revision 1.95  2007/04/19 02:52:53  steve
+ *  Add support for -v flag in command file.
+ *
+ * Revision 1.94  2007/03/07 04:24:59  steve
+ *  Make integer width controllable.
+ *
+ * Revision 1.93  2006/09/28 04:35:18  steve
+ *  Support selective control of specify and xtypes features.
+ *
  * Revision 1.92  2005/07/14 23:38:43  steve
  *  Display as version 0.9.devel
  *

mingw.txt

@@ -2,7 +2,7 @@
 
 MINGW PORT OF ICARUS VERILOG
 
-    Copyright 2003 Stephen Williams  <[email protected]>
+    Copyright 2006 Stephen Williams  <[email protected]>
 
 
 Icarus Verilog source can be compiled with the mingw C/C++ compilers
@@ -12,13 +12,13 @@ or without Cygwin, so this is the preferred Windows distribution form.
 The configure scripts automatically detect that the compilers in use
 are the mingw compilers and will configure the Makefiles appropriately.
 
-However, the mingw tools do not include all the other tools around the
-compiler, including the shell interpreter for the configure script,
-bison, flex, gperf, etc. Therefore, you still need Cygwin to compile
-Icarus Verilog, even if you don't need the Cygwin compilers. There are
-also a few precompiled library prerequisites that you need.
+The mingw patch doesn't contain tools beyond the compiler, but there
+is the "msys" package that the makers of Mingw publish that has enough
+extra tools to get most everything else working. There are a few extra
+packages needed beyond mingw and msys, and the following instructions
+explain how to get them and install them.
 
-* Some Preliminary Comments
+* Some Preliminary Comments  -- PLEASE READ ME --
 
 The Windows port of Icarus Verilog is the most difficult of all the
 ports. The Windows system off the shelf is completely stripped, devoid
@@ -26,7 +26,15 @@ of any support for software development. Everything needed to compile
 Icarus Verilog must be collected from various sources and stitched
 together by hand. Normal human beings with a basic understanding of
 software development can do this, but some patience (and access to the
-Internet) is required. You may choose to print these instructions.
+Internet) is required. You may choose to print these instructions. FOR
+BEST RESULTS, FOLLOW THESE INSTRUCTIONS CAREFULLY.
+
+NOTE that if you have Cygwin installed, it is best to not use a cygwin
+window to do the build, as the Cygwin tools will intermix with the
+mingw tools such that it is hard to be sure you are using the right
+compiler. Thus, it is recommended that these steps be *not* done in a
+Cygwin window. Use an MSYS window instead, and be careful that your
+msys/mingw tools are not masked by paths that point to Cygwin binaries.
 
 I have no plans to intentionally support MSVC++ compilation. Don't ask.
 
@@ -36,13 +44,15 @@ This is a brief list of prerequisite packages, along with the URL
 where each can be found. In most cases, the specific version is not
 critical, but these are the versions I use.
 
-     Cygwin                     <http://cygwin.com>
-     Mingw32-2.0.0              <http://www.mingw.org>
+     msys-1.0			<http://www.mingw/org>
+     msysDTK-1.0		<http://www.mingw.org>
+     Mingw32-5.x		<http://www.mingw.org>
      readline-4.2-20010727.zip  <http://mingwrep.sourceforge.net>
-     bzip2-1.0.2-bin.zip        <http://gnuwin32.sourceforge.net>
-     zlib-1.1.4-bin.zip         <http://gnuwin32.sourceforge.net>
-     bzip2-1.0.2-lib.zip        <http://gnuwin32.sourceforge.net>
-     zlib-1.1.4-lib.zip         <http://gnuwin32.sourceforge.net>
+     bzip2-1.0.3		<http://gnuwin32.sourceforge.net>
+     zlib-1.2.3			<http://gnuwin32.sourceforge.net>
+     gperf-3.0.1		<http://gnuwin32.sourceforge.net>
+     bison-2.1			<http://gnuwin32.sourceforge.net>
+     flex-2.5.4a		<http://gnuwin32.sourceforge.net>
 
 The above table lists the packages required. It is convenient to
 install them in the above order. Many of these packages are also
@@ -55,59 +65,38 @@ installation of Icarus Verilog is complete. These are only needed to
 build the compiler. The Mingw32 package can be used to compile VPI
 modules if you choose.
 
-* Install Cygwin
+* Install MSYS and msysDTK
 
-So, step 1 is "Download and Install Cygwin." See the web page
-http://www.cygwin.com for instructions and the files to do
-this. Cygwin *is* a kool package, and is worth having anyhow. There is
-a convenient setup program that you download first. You execute the
-setup program, and that prompts you to select the package you want.
+The msys package is available from the mingw download site. This is
+not the compiler but a collection of *nix tools ported to Windows and
+wrapped in a convenient installer. The msys package is all the various
+basic tools (shells, file utils, etc) and the msysDTK is extra
+developer tools other than the compiler.
 
-You need in particular the Cygwin base, bison (see notes) flex, make
-and gperf. If you are compiling from CVS, you also need cvs, rcs and
-automake packages. You will also need tar and gunzip, but these are
-hard to not install. I recommend installing the "which" package as
-well. Beyond the basics, be sure to install these Cygwin packages:
+Download the msys-1.x.x.exe and msysdtc-1.x.x.exe binaries. These are
+self-installing packages. Install msys first, and then msysDTC. Most
+likely, you want to install them in c:/msys. (The msysDTK is installed
+in the same location, as it is an add-on.)
 
-      bison        (*not* 1.875. See Notes.)
-      flex
-      ghostscript  (makes the documentation)
-      gperf
-      gzip
-      make
-      strip
-      tar          (tar and gunzip for unpacking the source)
-      unzip        (For unpacking zip compressed packages.)
-      which
+This install should be easy and reliable.
 
-    NOTES:
-      bison-1.875 is broken, it generates invalid C/C++ code. You
-      don't want that version for anything you do. If you have that
-      version (use "bison -V" to check the version) then use the
-      Cygwin setup program to get a different version. I've downgraded
-      to 1.75 and couldn't be happier. In fact, a whole host of insane
-      bison bugs can be avoided that way.
-
-      There is a mingw32 runtime package included in the Cygwin
-      distribution. You do *not* need that, as you will be getting
-      everything from the mingw32 distribution itself.
-
-Other then the install of mingw32, most of the remaining steps are
-best done in a Cygwin window. When you installed Cygwin, a start menu
-entry was created to allow you to start up the Cygwin window. I'll use
-the string "$ " to represent a command prompt in this window, because
-that is the usual bash prompt.
+The installation will leave an "msys" icon on your desktop and in the
+mingw sub-menu of your Start menu. This icon brings up a shell window
+(a command line) that has paths all set up for executing msys and
+mingw commands. This is what you will want to use while executing
+commands below.
 
 * Install Mingw32
 
 The obvious step 2, then, is install the mingw compilers. These can be
-found at the web page <http://www.mingw.org>. The Mingw-2.x.x version
-comes prepackaged in a convenient, Windows style, installer. I
-recommend you download this package instead of picking and choosing
-bits.
+found at the web page <http://www.mingw.org>. The Mingw-5.x.x package
+is a convenient remote installer. Download this program and run
+it. The installer will ask wich components you want to install. You
+need only the base C compiler and the C++ compiler. (You may install
+other languages if you wish.)
 
 When I install Mingw32 (using the installer) I typically set a
-destination directory of d:\mingw-2.0.0 or the like. You will be using
+destination directory of d:\mingw or the like. You will be using
 that path later.
 
     NOTES:
@@ -115,6 +104,10 @@ that path later.
       need Mingw32, even if you are using a precompiled binary. VPI
       modules only require Mingw32, and none of the other libraries.
 
+Finally, as part of installing the mingw32 compilers, remember to add
+the mingw/bin directory to your path. You will need that to be able to
+find the compilers later.
+
 * Install Mingw32 Packages
 
 There is a collection of precompiled libraries and add-on packages
@@ -123,86 +116,94 @@ with simplified Windows installers, but they are pretty easy to
 install by hand. Icarus Verilog uses the readline-4.2 package from
 that collection.
 
-Since I installed Mingw32 in d:\mingw-2.0.0, I also created a
-Mingw-packages directory called d:\mingw-packages. The install, then,
+Since I installed Mingw32 in c:\mingw, I also created a
+Mingw-packages directory called c:\mingw-packages. The install, then,
 is as easy as this:
 
-  <cygwin shell>
-    $ cd d:/mingw-packages
+  <msys shell>
+    $ cd c:/mingw-packages
     $ unzip readline-4.2-20010727.zip
         [lots of inflating...]
 
+There is no need to adjust your execution path for this package as we
+are only using a library out of here. However, do remember the
+directory name, as you will need it later.
+
 Done. On to the next packages.
 
 * Install GnuWin32 Packages
 
 The GnuWin32 project is a collections of open source programs and
 libraries ported to Windows. These also work well with the Mingw
-compiler, and in fact Icarus Verilog uses a few libraries from this
+compiler, and in fact Icarus Verilog uses a few pieces from this
 collection.
 
 You will need these gnuwin32 packages to compile Icarus Verilog:
 
   <http://gnuwin32.sourceforge.net>
-    bzip2-1.0.2-lib.zip
-    bzip2-1.0.2-bin.zip
-    zlib-1.1.4-lib.zip
-    zlib-1.1.4-bin.zip
+    bzip2-1.0.3.exe
+    zlib-1.2.3.exe
+    gperf-3.0.1.exe
+    bison-2.1.exe
+    flex-2.5.4a.exe
 
 I suggest creating a common directory for holding all your gnuwin32
-packages. I use D:\gnuwin32.
+packages. I use C:\gnuwin32. The download page at the gnuwin32 site
+has a "setup" link for each of these packages. Click the setup to
+download the installer for each of the desired programes, then execute
+the downloaded .exe files to invoke the installer. Install into the
+c:\gunwin32 directory.
 
-After downloading these packages, put the .zip files in your gnuwin32
-directory and install them like so:
+   NOTES:
+      You need the binaries and the developer files, but you do not
+      need the source to these packages. The installer gives you the
+      choice.
 
-  <cygwin shell>
-    $ cd d:/gnuwin32
-    $ unzip bzip2-1.0.2-bin.zip
-       [lots of inflating...]
-    $ unzip bzip2-1.0.2-lib.zip
-       [lots of inflating...]
-    $ unzip zlib-1.1.4-bin.zip
-       [lots of inflating...]
-    $ unzip zlib-1.1.4-lib.zip
-       [lots of inflating...]
-
-Done.
+After you are done installing the gnuwin32 tools, you should add the
+c:\gnuwin32\bin directory (assuming you installed in c:\gnuwin32) to
+your Windows path. The msys shell will pick up your Windows path.
 
 * Unpack Icarus Verilog source
 
 Unpack the compressed tar file (.tar.gz) of the source with a command
 like this:
 
-	$ gunzip -d verilog-20030303.tar.gz | tar xvf -
+	$ gunzip -d verilog-xxxxxxxx.tar.gz | tar xvf -
 
-This will create a directory "verilog-20030303" that contains all the
+This will create a directory "verilog-xxxxxxxx" that contains all the
 source for Icarus Verilog. Descend into that directory, as that is
 where we will work from now on.
 
-	$ cd verilog-20030303
+	$ cd verilog-xxxxxxxx
 
-    NOTE:
+    NOTES:
       The exact name of the file will vary according to the
       snapshot. The 20030303 name is only an example.
 
-* Select the mingw compilers
+      Unpack the source into a directory that has no spaces. The
+      makefiles included in the source get confused by white space in
+      directory names.
 
-In your cygwin window, if you type "which c++" you might get the
-response path "/usr/bin/c++" which is the cygwin compiler. This is not
-the one we want to use, however. Tell the shell where the mingw
-compilers are by setting the search path like so:
+* Preconfigure Icarus Verilog (Not normally needed)
 
-	$ PATH=/cygdrive/d/mingw-2.0.0/bin:$PATH
+Under certain cases, you may need to "preconfigure" the Icarus Verilog
+source tree. You should only need to do this if you are getting the
+Icarus Verilog source tree from CVS, or you are using an existing
+source tree that you've patched to cause configure.in files to change.
 
-This assumes that you installed mingw in D:\mingw-2.0.0. The actual
-programs are in the bin directory under the root. After this command,
-check that you are now getting the right compilers with this "which"
-command:
+    NOTE: If you are building from a fresh, bundled source tree that
+      you downloaded from an FTP site, then SKIP THIS STEP. Go on to
+      the "Configure Icarus Verilog" step below.
 
-	$ which c++
-	/cygdrive/d/mingw-2.0.0/bin/c++
+First, remove any autom4te.cache directories that may exist in your
+source tree. These can make a mess of autoconf runs. Then, generate
+configure scripts with this command:
 
-Good!
+        $ sh autoconf.sh
+
+This script will run the "autoconf" command (part of the msysDTK) to
+generate all the necessary "configure" scripts. This will take a few
+minutes. This should go smoothly.
 
 * Configure Icarus Verilog
 
@@ -215,10 +216,10 @@ without white space.
 Now, configure the source to make the makefiles and configuration
 details. Run these commands:
 
-	$ CPPFLAGS="-Id:/gnuwin32/include -Id:/mingw-packages/include"
-	$ LDFLAGS="-Ld:/gnuwin32/lib -Ld:/mingw-packages/include"
+	$ CPPFLAGS="-Ic:/gnuwin32/include -Ic:/mingw-packages/include"
+	$ LDFLAGS="-Lc:/gnuwin32/lib -Lc:/mingw-packages/lib"
 	$ export CPPFLAGS LDFLAGS
-	$ ./configure --prefix=d:/iverilog
+	$ ./configure --prefix=c:/iverilog
 
     NOTES:
       The CPPFLAGS and LDFLAGS variables tell configure where
@@ -267,10 +268,10 @@ directory you chose) and away you go.
 You may find that you need to put some of the prerequisite DLLs into
 the d:\iverilog\bin directory. These include:
 
-      d:\mingw-2.0.0\bin\mingw10.dll
-      d:\mingw-packages\bin\libreadline.dll
-      d:\gnuwin32\bin\bzip2.dll
-      d:\gnuwin32\bin\zlib.dll
+      c:\mingw\bin\mingw10.dll
+      c:\mingw-packages\bin\libreadline.dll
+      c:\gnuwin32\bin\bzip2.dll
+      c:\gnuwin32\bin\zlib.dll
 
 If you already have these in your Windows path (i.e. your system32
 directory) then you do not need to copy them into the iverilog
@@ -279,14 +280,14 @@ files.
 
 * Running Icarus Verilog
 
-Finally, put the D:\iverilog\bin directory in your Windows path, and
+Finally, put the C:\iverilog\bin directory in your Windows path, and
 you should be able to run the iverilog and vvp commands to your
 heart's content.
 
 Currently, the iverilog.exe uses the path to itself to locate the
 libraries and modules associated with itself. In other words, if you
-execute the D:\iverilog\bin\iverilog.exe program, it will locate its
-subparts in the D:\iverilog directory and subdirectories below
+execute the C:\iverilog\bin\iverilog.exe program, it will locate its
+subparts in the C:\iverilog directory and subdirectories below
 that. This means you can move the Icarus Verilog installation by
 simply moving the root directory and all its contents.
 

net_assign.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: net_assign.cc,v 1.20 2005/07/11 16:56:50 steve Exp $"
+#ident "$Id: net_assign.cc,v 1.22 2007/01/16 05:44:15 steve Exp $"
 #endif
 
 # include "config.h"
@@ -39,22 +39,13 @@ unsigned count_lval_width(const NetAssign_*idx)
 }
 
 NetAssign_::NetAssign_(NetNet*s)
-: sig_(s), mem_(0), bmux_(0)
+: sig_(s), word_(0), base_(0)
 {
-      loff_ = 0;
       lwid_ = sig_->vector_width();
       sig_->incr_lref();
       more = 0;
 }
 
-NetAssign_::NetAssign_(NetMemory*s)
-: sig_(0), mem_(s), bmux_(0)
-{
-      loff_ = 0;
-      lwid_ = mem_->width();
-      more = 0;
-}
-
 NetAssign_::~NetAssign_()
 {
       if (sig_) {
@@ -64,38 +55,39 @@ NetAssign_::~NetAssign_()
       }
 
       assert( more == 0 );
-      if (bmux_) delete bmux_;
+      if (word_) delete word_;
 }
 
-void NetAssign_::set_bmux(NetExpr*r)
+void NetAssign_::set_word(NetExpr*r)
 {
-      assert(bmux_ == 0);
-      bmux_ = r;
+      assert(word_ == 0);
+      word_ = r;
 }
 
-NetExpr* NetAssign_::bmux()
+NetExpr* NetAssign_::word()
 {
-      return bmux_;
+      return word_;
 }
 
-const NetExpr* NetAssign_::bmux() const
+const NetExpr* NetAssign_::word() const
 {
-      return bmux_;
+      return word_;
+}
+
+const NetExpr* NetAssign_::get_base() const
+{
+      return base_;
 }
 
 unsigned NetAssign_::lwidth() const
 {
-      if (mem_)  return lwid_;
-      else if (bmux_) return 1;
-      else return lwid_;
+      return lwid_;
 }
 
 perm_string NetAssign_::name() const
 {
       if (sig_) {
 	    return sig_->name();
-      } else if (mem_) {
-	    return mem_->name();
       } else {
 	    return perm_string::literal("");
       }
@@ -106,26 +98,10 @@ NetNet* NetAssign_::sig() const
       return sig_;
 }
 
-NetMemory* NetAssign_::mem() const
+void NetAssign_::set_part(NetExpr*base, unsigned wid)
 {
-      return mem_;
-}
-
-void NetAssign_::set_part(unsigned lo, unsigned lw)
-{
-      loff_ = lo;
-      lwid_ = lw;
-      if (sig_) {
-	    assert(sig_->vector_width() >= (lo + lw));
-      } else {
-	    assert(mem_);
-	    assert(lwid_ == mem_->width());
-      }
-}
-
-unsigned NetAssign_::get_loff() const
-{
-      return loff_;
+      base_ = base;
+      lwid_ = wid;
 }
 
 /*
@@ -283,6 +259,15 @@ NetRelease::~NetRelease()
 
 /*
  * $Log: net_assign.cc,v $
+ * Revision 1.22  2007/01/16 05:44:15  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
+ *
+ * Revision 1.21  2006/02/02 02:43:58  steve
+ *  Allow part selects of memory words in l-values.
+ *
  * Revision 1.20  2005/07/11 16:56:50  steve
  *  Remove NetVariable and ivl_variable_t structures.
  *

net_design.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: net_design.cc,v 1.47 2005/09/14 02:53:14 steve Exp $"
+#ident "$Id: net_design.cc,v 1.54 2007/06/05 04:18:09 steve Exp $"
 #endif
 
 # include "config.h"
@@ -32,6 +32,7 @@
 # include  "netlist.h"
 # include  "util.h"
 # include  "compiler.h"
+# include  "netmisc.h"
 # include  <sstream>
 
 Design:: Design()
@@ -67,8 +68,8 @@ int Design::get_precision() const
       return des_precision_;
 }
 
-unsigned long Design::scale_to_precision(unsigned long val,
-					 const NetScope*scope) const
+uint64_t Design::scale_to_precision(uint64_t val,
+				    const NetScope*scope) const
 {
       int units = scope->time_unit();
       assert( units >= des_precision_ );
@@ -84,7 +85,7 @@ unsigned long Design::scale_to_precision(unsigned long val,
 NetScope* Design::make_root_scope(perm_string root)
 {
       NetScope *root_scope_;
-      root_scope_ = new NetScope(0, root, NetScope::MODULE);
+      root_scope_ = new NetScope(0, hname_t(root), NetScope::MODULE);
 	/* This relies on the fact that the basename return value is
 	   permallocated. */
       root_scope_->set_module_name(root_scope_->basename());
@@ -114,26 +115,27 @@ const list<NetScope*> Design::find_root_scopes() const
  * more step down the tree until the name runs out or the search
  * fails.
  */
-NetScope* Design::find_scope(const hname_t&path) const
+NetScope* Design::find_scope(const std::list<hname_t>&path) const
 {
-      if (path.peek_name(0) == 0)
+      if (path.empty())
 	    return 0;
 
       for (list<NetScope*>::const_iterator scope = root_scopes_.begin()
 		 ; scope != root_scopes_.end(); scope++) {
 
 	    NetScope*cur = *scope;
-	    if (strcmp(path.peek_name(0), cur->basename()) != 0)
+	    if (path.front() != cur->fullname())
 		  continue;
 
-	    unsigned hidx = 1;
-	    while (cur) {
-		  const char*name = path.peek_name(hidx);
-		  if (name == 0)
-			return cur;
+	    std::list<hname_t> tmp = path;
+	    tmp.pop_front();
 
-		  cur = cur->child(name);
-		  hidx += 1;
+	    while (cur) {
+		  if (tmp.empty()) return cur;
+
+		  cur = cur->child( tmp.front() );
+
+		  tmp.pop_front();
 	    }
 
       }
@@ -143,28 +145,34 @@ NetScope* Design::find_scope(const hname_t&path) const
 
 /*
  * This is a relative lookup of a scope by name. The starting point is
- * the scope parameter is the place within which I start looking for
- * the scope. If I do not find the scope within the passed scope,
- * start looking in parent scopes until I find it, or I run out of
- * parent scopes.
+ * the scope parameter within which I start looking for the scope. If
+ * I do not find the scope within the passed scope, start looking in
+ * parent scopes until I find it, or I run out of parent scopes.
  */
-NetScope* Design::find_scope(NetScope*scope, const hname_t&path) const
+NetScope* Design::find_scope(NetScope*scope, const std::list<hname_t>&path) const
 {
       assert(scope);
-      if (path.peek_name(0) == 0)
+      if (path.empty())
 	    return scope;
 
       for ( ; scope ;  scope = scope->parent()) {
-	    unsigned hidx = 0;
-	    const char*key = path.peek_name(hidx);
+
+	    std::list<hname_t> tmp = path;
 
 	    NetScope*cur = scope;
 	    do {
-		  cur = cur->child(key);
-		  if (cur == 0) break;
-		  hidx += 1;
-		  key = path.peek_name(hidx);
-	    } while (key);
+		  hname_t key = tmp.front();
+		  if (cur->type() == NetScope::MODULE
+		      && cur->module_name()==key.peek_name()) {
+
+			  /* Up references may match module name */
+
+		  } else {
+			cur = cur->child( key );
+			if (cur == 0) break;
+		  }
+		  tmp.pop_front();
+	    } while (!tmp.empty());
 
 	    if (cur) return cur;
       }
@@ -173,71 +181,6 @@ NetScope* Design::find_scope(NetScope*scope, const hname_t&path) const
       return find_scope(path);
 }
 
-/*
- * Find a parameter from within a specified context. If the name is
- * not here, keep looking up until I run out of up to look at. The
- * method works by scanning scopes, starting with the passed scope and
- * working up towards the root, looking for the named parameter. The
- * name in this case can be hierarchical, so there is an inner loop to
- * follow the scopes of the name down to to key.
- *
- * The expression value of the parameter is returned as the result,
- * and the scope that contains the parameter is returned in the out
- * argument found_in.
- */
-const NetExpr* Design::find_parameter(NetScope*scope,
-				      const hname_t&path,
-				      NetScope*&found_in) const
-{
-      for ( ; scope ;  scope = scope->parent()) {
-	    unsigned hidx = 0;
-
-	    NetScope*cur = scope;
-	    while (path.peek_name(hidx+1)) {
-		  cur = cur->child(path.peek_name(hidx));
-		  if (cur == 0)
-			break;
-		  hidx += 1;
-	    }
-
-	    if (cur == 0)
-		  continue;
-
-	    if (const NetExpr*res = cur->get_parameter(path.peek_name(hidx))) {
-		  found_in = cur;
-		  return res;
-	    }
-      }
-
-      return 0;
-}
-
-const NetExpr* Design::find_parameter(const NetScope*scope,
-				      const hname_t&path) const
-{
-      for ( ; scope ;  scope = scope->parent()) {
-	    unsigned hidx = 0;
-
-	    const NetScope*cur = scope;
-	    while (path.peek_name(hidx+1)) {
-		  cur = cur->child(path.peek_name(hidx));
-		  if (cur == 0)
-			break;
-		  hidx += 1;
-	    }
-
-	    if (cur == 0)
-		  continue;
-
-	    if (const NetExpr*res = cur->get_parameter(path.peek_name(hidx)))
-		  return res;
-
-      }
-
-      return 0;
-}
-
-
 /*
  * This method runs through the scope, noticing the defparam
  * statements that were collected during the elaborate_scope pass and
@@ -261,18 +204,19 @@ void NetScope::run_defparams(Design*des)
 	}
       }
 
-      map<hname_t,NetExpr*>::const_iterator pp;
+      map<pform_name_t,NetExpr*>::const_iterator pp;
       for (pp = defparams.begin() ;  pp != defparams.end() ;  pp ++ ) {
 	    NetExpr*val = (*pp).second;
-	    hname_t path = (*pp).first;
+	    pform_name_t path = (*pp).first;
 
-	    char*tmp = path.remove_tail_name();
-	    perm_string perm_name = lex_strings.make(tmp);
-	    delete[]tmp;
+	    perm_string perm_name = peek_tail_name(path);
+	    path.pop_back();
+
+	    list<hname_t> eval_path = eval_scope_path(des, this, path);
 
 	      /* If there is no path on the name, then the targ_scope
 		 is the current scope. */
-	    NetScope*targ_scope = des->find_scope(this, path);
+	    NetScope*targ_scope = des->find_scope(this, eval_path);
 	    if (targ_scope == 0) {
 		  cerr << val->get_line() << ": warning: scope of " <<
 			path << "." << perm_name << " not found." << endl;
@@ -283,7 +227,7 @@ void NetScope::run_defparams(Design*des)
 	    if (! flag) {
 		  cerr << val->get_line() << ": warning: parameter "
 		       << perm_name << " not found in "
-		       << targ_scope->name() << "." << endl;
+		       << scope_path(targ_scope) << "." << endl;
 	    }
 
       }
@@ -392,12 +336,20 @@ void NetScope::evaluate_parameters(Design*des)
 	    switch (expr->expr_type()) {
 		case IVL_VT_REAL:
 		  if (! dynamic_cast<const NetECReal*>(expr)) {
-			cerr << (*cur).second.expr->get_line()
-			     << ": internal error: "
-			      "unable to evaluate real parameter values: " <<
-			      *expr << endl;
-			des->errors += 1;
-			continue;
+
+			NetExpr*nexpr = expr->eval_tree();
+			if (nexpr == 0) {
+			      cerr << (*cur).second.expr->get_line()
+				   << ": internal error: "
+				   << "unable to evaluate real parameter value: "
+				   << *expr << endl;
+			      des->errors += 1;
+			      continue;
+			}
+
+			assert(nexpr);
+			delete expr;
+			(*cur).second.expr = nexpr;
 		  }
 		  break;
 
@@ -482,68 +434,52 @@ const char* Design::get_flag(const string&key) const
  * It is the job of this function to properly implement Verilog scope
  * rules as signals are concerned.
  */
-NetNet* Design::find_signal(NetScope*scope, hname_t path)
+NetNet* Design::find_signal(NetScope*scope, pform_name_t path)
 {
       assert(scope);
 
-      char*key = path.remove_tail_name();
-      if (path.peek_name(0))
-	    scope = find_scope(scope, path);
+      perm_string key = peek_tail_name(path);
+      path.pop_back();
+      if (! path.empty()) {
+	    list<hname_t> eval_path = eval_scope_path(this, scope, path);
+	    scope = find_scope(scope, eval_path);
+      }
 
       while (scope) {
-	    if (NetNet*net = scope->find_signal(key)) {
-		  delete key;
+	    if (NetNet*net = scope->find_signal(key))
 		  return net;
-	    }
 
 	    if (scope->type() == NetScope::MODULE)
 		  break;
+
 	    scope = scope->parent();
       }
 
-      delete key;
       return 0;
 }
 
-NetFuncDef* Design::find_function(NetScope*scope, const hname_t&name)
+NetFuncDef* Design::find_function(NetScope*scope, const pform_name_t&name)
 {
       assert(scope);
-      NetScope*func = find_scope(scope, name);
+
+      std::list<hname_t> eval_path = eval_scope_path(this, scope, name);
+      NetScope*func = find_scope(scope, eval_path);
       if (func && (func->type() == NetScope::FUNC))
 	    return func->func_def();
 
       return 0;
 }
 
-NetFuncDef* Design::find_function(const hname_t&key)
+NetScope* Design::find_task(NetScope*scope, const pform_name_t&name)
 {
-      NetScope*func = find_scope(key);
-      if (func && (func->type() == NetScope::FUNC))
-	    return func->func_def();
-
-      return 0;
-}
-
-NetScope* Design::find_task(NetScope*scope, const hname_t&name)
-{
-      NetScope*task = find_scope(scope, name);
+      std::list<hname_t> eval_path = eval_scope_path(this, scope, name);
+      NetScope*task = find_scope(scope, eval_path);
       if (task && (task->type() == NetScope::TASK))
 	    return task;
 
       return 0;
 }
 
-NetScope* Design::find_task(const hname_t&key)
-{
-      NetScope*task = find_scope(key);
-      if (task && (task->type() == NetScope::TASK))
-	    return task;
-
-      return 0;
-}
-
-
-
 void Design::add_node(NetNode*net)
 {
       assert(net->design_ == 0);
@@ -619,6 +555,28 @@ void Design::delete_process(NetProcTop*top)
 
 /*
  * $Log: net_design.cc,v $
+ * Revision 1.54  2007/06/05 04:18:09  steve
+ *  Upward names may reference modules by module_name.
+ *
+ * Revision 1.53  2007/06/02 03:42:13  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.52  2007/05/24 04:07:12  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.51  2007/04/26 03:06:22  steve
+ *  Rework hname_t to use perm_strings.
+ *
+ * Revision 1.50  2006/08/08 05:11:37  steve
+ *  Handle 64bit delay constants.
+ *
+ * Revision 1.49  2006/07/31 03:50:17  steve
+ *  Add support for power in constant expressions.
+ *
+ * Revision 1.48  2005/11/27 05:56:20  steve
+ *  Handle bit select of parameter with ranges.
+ *
  * Revision 1.47  2005/09/14 02:53:14  steve
  *  Support bool expressions and compares handle them optimally.
  *

net_event.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: net_event.cc,v 1.26 2004/10/04 01:10:54 steve Exp $"
+#ident "$Id: net_event.cc,v 1.27 2007/06/02 03:42:13 steve Exp $"
 #endif
 
 # include  "config.h"
@@ -56,10 +56,10 @@ perm_string NetEvent::name() const
       return name_;
 }
 
-string NetEvent::full_name() const
+NetScope* NetEvent::scope()
 {
       assert(scope_);
-      return scope_->name() + "." + string(name_);
+      return scope_;
 }
 
 const NetScope* NetEvent::scope() const
@@ -449,6 +449,9 @@ NetProc* NetEvWait::statement()
 
 /*
  * $Log: net_event.cc,v $
+ * Revision 1.27  2007/06/02 03:42:13  steve
+ *  Properly evaluate scope path expressions.
+ *
  * Revision 1.26  2004/10/04 01:10:54  steve
  *  Clean up spurious trailing white space.
  *

net_expr.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: net_expr.cc,v 1.25 2005/09/14 02:53:14 steve Exp $"
+#ident "$Id: net_expr.cc,v 1.27 2006/07/31 03:50:17 steve Exp $"
 #endif
 
 # include  "config.h"
@@ -248,6 +248,40 @@ ivl_variable_type_t NetEBMult::expr_type() const
       return IVL_VT_LOGIC;
 }
 
+NetEBPow::NetEBPow(char op, NetExpr*l, NetExpr*r)
+: NetEBinary(op, l, r)
+{
+      assert(op == 'p');
+      expr_width(l->expr_width());
+      cast_signed(l->has_sign() || r->has_sign());
+}
+
+NetEBPow::~NetEBPow()
+{
+}
+
+NetEBPow* NetEBPow::dup_expr() const
+{
+      NetEBPow*result = new NetEBPow(op_, left_->dup_expr(),
+				     right_->dup_expr());
+      result->set_line(*this);
+      return result;
+}
+
+ivl_variable_type_t NetEBPow::expr_type() const
+{
+      if (right_->expr_type() == IVL_VT_REAL)
+	    return IVL_VT_REAL;
+      if (left_->expr_type() == IVL_VT_REAL)
+	    return IVL_VT_REAL;
+      if (left_->has_sign())
+	    return IVL_VT_REAL;
+      if (right_->has_sign())
+	    return IVL_VT_REAL;
+
+      return IVL_VT_LOGIC;
+}
+
 NetEBShift::NetEBShift(char op, NetExpr*l, NetExpr*r)
 : NetEBinary(op, l, r)
 {
@@ -468,14 +502,6 @@ bool NetESelect::has_width() const
       return true;
 }
 
-bool NetESelect::set_width(unsigned w)
-{
-      if (expr_width() == 1)
-	    return true;
-      else
-	    return false;
-}
-
 NetESFunc::NetESFunc(const char*n, ivl_variable_type_t t,
 		     unsigned width, unsigned np)
 : name_(0), type_(t)
@@ -534,6 +560,12 @@ ivl_variable_type_t NetESFunc::expr_type() const
 
 /*
  * $Log: net_expr.cc,v $
+ * Revision 1.27  2006/07/31 03:50:17  steve
+ *  Add support for power in constant expressions.
+ *
+ * Revision 1.26  2005/11/26 00:35:43  steve
+ *  More precise about r-value width of constants.
+ *
  * Revision 1.25  2005/09/14 02:53:14  steve
  *  Support bool expressions and compares handle them optimally.
  *

net_func.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: net_func.cc,v 1.7 2005/03/18 02:56:03 steve Exp $"
+#ident "$Id: net_func.cc,v 1.10 2007/06/02 03:42:13 steve Exp $"
 #endif
 
 # include  "config.h"
@@ -95,14 +95,14 @@ bool PECallFunction::check_call_matches_definition_(Design*des, NetScope*dscope)
 
       if (dscope->type() != NetScope::FUNC) {
 	    cerr << get_line() << ": error: Attempt to call scope "
-		 << dscope->name() << " as a function." << endl;
+		 << scope_path(dscope) << " as a function." << endl;
 	    des->errors += 1;
 	    return false;
       }
 
       if (parms_count != dscope->func_def()->port_count()) {
-	    cerr << get_line() << ": error: Function " << dscope->name()
-		 << " expects " << (dscope->func_def()->port_count()-1)
+	    cerr << get_line() << ": error: Function " << scope_path(dscope)
+		 << " expects " << (dscope->func_def()->port_count())
 		 << " arguments, you passed " << parms_count << "."
 		 << endl;
 	    des->errors += 1;
@@ -112,8 +112,52 @@ bool PECallFunction::check_call_matches_definition_(Design*des, NetScope*dscope)
       return true;
 }
 
+
+NetSysFunc::NetSysFunc(NetScope*s, perm_string n,
+		       const struct sfunc_return_type*def,
+		       unsigned ports)
+: NetNode(s, n, ports)
+{
+      def_ = def;
+
+      pin(0).set_dir(Link::OUTPUT);
+      pin(0).set_name(perm_string::literal("Q"), 0);
+
+      for (unsigned idx = 1 ;  idx < pin_count() ;  idx += 1) {
+
+	    pin(idx).set_dir(Link::INPUT);
+	    pin(idx).set_name(perm_string::literal("D"), idx-1);
+	    pin(idx).drive0(Link::HIGHZ);
+	    pin(idx).drive1(Link::HIGHZ);
+      }
+}
+
+NetSysFunc::~NetSysFunc()
+{
+}
+
+const char*NetSysFunc::func_name() const
+{
+      return def_->name;
+}
+
+unsigned NetSysFunc::vector_width() const
+{
+      return def_->wid;
+}
+
+
 /*
  * $Log: net_func.cc,v $
+ * Revision 1.10  2007/06/02 03:42:13  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.9  2007/04/17 04:17:47  steve
+ *  Fix argument count in function error message.
+ *
+ * Revision 1.8  2006/06/18 04:15:50  steve
+ *  Add support for system functions in continuous assignments.
+ *
  * Revision 1.7  2005/03/18 02:56:03  steve
  *  Add support for LPM_UFUNC user defined functions.
  *

net_link.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: net_link.cc,v 1.18 2005/09/25 23:40:11 steve Exp $"
+#ident "$Id: net_link.cc,v 1.21 2007/06/02 03:42:13 steve Exp $"
 #endif
 
 # include "config.h"
@@ -58,7 +58,10 @@ void connect(Nexus*l, Link&r)
 void connect(Link&l, Link&r)
 {
       assert(&l != &r);
-      connect(l.nexus_, r);
+      if (r.is_linked() && !l.is_linked())
+	    connect(r.nexus_, l);
+      else
+	    connect(l.nexus_, r);
 }
 
 Link::Link()
@@ -301,14 +304,14 @@ const Link* Nexus::first_nlink() const
       return list_;
 }
 
-void* Nexus::t_cookie() const
+ivl_nexus_t Nexus::t_cookie() const
 {
       return t_cookie_;
 }
 
-void* Nexus::t_cookie(void*val)const
+ivl_nexus_t Nexus::t_cookie(ivl_nexus_t val)const
 {
-      void*tmp = t_cookie_;
+      ivl_nexus_t tmp = t_cookie_;
       t_cookie_ = val;
       return tmp;
 }
@@ -388,7 +391,7 @@ const char* Nexus::name() const
       }
       assert(sig);
       ostringstream tmp;
-      tmp << sig->scope()->name() << "." << sig->name();
+      tmp << scope_path(sig->scope()) << "." << sig->name();
       if (sig->pin_count() > 1)
 	    tmp << "<" << pin << ">";
 
@@ -522,6 +525,15 @@ bool NexusSet::intersect(const NexusSet&that) const
 
 /*
  * $Log: net_link.cc,v $
+ * Revision 1.21  2007/06/02 03:42:13  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.20  2007/03/26 18:17:50  steve
+ *  Remove pretense of general use for t_cookie.
+ *
+ * Revision 1.19  2006/02/02 02:43:58  steve
+ *  Allow part selects of memory words in l-values.
+ *
  * Revision 1.18  2005/09/25 23:40:11  steve
  *  Simplify NexusSet set handling.
  *

net_nex_input.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: net_nex_input.cc,v 1.14 2005/07/11 16:56:50 steve Exp $"
+#ident "$Id: net_nex_input.cc,v 1.16 2007/01/16 05:44:15 steve Exp $"
 #endif
 
 # include "config.h"
@@ -78,12 +78,6 @@ NexusSet* NetECReal::nex_input()
       return new NexusSet;
 }
 
-NexusSet* NetEMemory::nex_input()
-{
-      NexusSet*result = idx_->nex_input();
-      return result;
-}
-
 /*
  * A parameter by definition has no inputs. It represents a constant
  * value, even if that value is a constant expression.
@@ -170,10 +164,19 @@ NexusSet* NetEUnary::nex_input()
 
 NexusSet* NetAssign_::nex_input()
 {
-      if (bmux_ == 0)
-	    return new NexusSet;
-      else
-	    return bmux_->nex_input();
+      NexusSet*result = new NexusSet;
+      if (word_) {
+	    NexusSet*tmp = word_->nex_input();
+	    result->add(*tmp);
+	    delete tmp;
+      }
+      if (base_) {
+	    NexusSet*tmp = base_->nex_input();
+	    result->add(*tmp);
+	    delete tmp;
+      }
+
+      return result;
 }
 
 NexusSet* NetAssignBase::nex_input()
@@ -384,6 +387,15 @@ NexusSet* NetWhile::nex_input()
 
 /*
  * $Log: net_nex_input.cc,v $
+ * Revision 1.16  2007/01/16 05:44:15  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
+ *
+ * Revision 1.15  2006/04/16 00:15:43  steve
+ *  Fix part selects in l-values.
+ *
  * Revision 1.14  2005/07/11 16:56:50  steve
  *  Remove NetVariable and ivl_variable_t structures.
  *

net_nex_output.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: net_nex_output.cc,v 1.12 2005/02/14 04:58:50 steve Exp $"
+#ident "$Id: net_nex_output.cc,v 1.14 2007/04/17 04:34:23 steve Exp $"
 #endif
 
 # include "config.h"
@@ -77,6 +77,10 @@ void NetCase::nex_output(NexusSet&out)
 {
       for (unsigned idx = 0 ;  idx < nitems_ ;  idx += 1) {
 
+	      // Empty statements clearly have no output.
+	    if (items_[idx].statement == 0)
+		  continue;
+
 	    assert(items_[idx].statement);
 	    items_[idx].statement->nex_output(out);
       }
@@ -111,6 +115,15 @@ void NetSTask::nex_output(NexusSet&out)
 {
 }
 
+/*
+* Consider a task call to not have any outputs. This is not quite
+* right, we should be listing as outputs all the output ports, but for
+* the purposes that this method is used, this will do for now.
+*/
+void NetUTask::nex_output(NexusSet&out)
+{
+}
+
 void NetWhile::nex_output(NexusSet&out)
 {
       if (proc_ != 0)
@@ -119,6 +132,12 @@ void NetWhile::nex_output(NexusSet&out)
 
 /*
  * $Log: net_nex_output.cc,v $
+ * Revision 1.14  2007/04/17 04:34:23  steve
+ *  Fix handling calls to tasks in combinational always block
+ *
+ * Revision 1.13  2007/04/05 01:53:52  steve
+ *  Probe of case statement inputs can skip nul statements.
+ *
  * Revision 1.12  2005/02/14 04:58:50  steve
  *  l-value input may be a vector.
  *

net_proc.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: net_proc.cc,v 1.6 2002/08/12 01:34:59 steve Exp $"
+#ident "$Id: net_proc.cc,v 1.7 2006/08/08 05:11:37 steve Exp $"
 #endif
 
 # include "config.h"
@@ -131,7 +131,7 @@ NetForever::~NetForever()
       delete statement_;
 }
 
-NetPDelay::NetPDelay(unsigned long d, NetProc*st)
+NetPDelay::NetPDelay(uint64_t d, NetProc*st)
 : delay_(d), expr_(0), statement_(st)
 {
 }
@@ -146,7 +146,7 @@ NetPDelay::~NetPDelay()
       if (expr_) delete expr_;
 }
 
-unsigned long NetPDelay::delay() const
+uint64_t NetPDelay::delay() const
 {
       assert(expr_ == 0);
       return delay_;
@@ -177,6 +177,9 @@ const NetExpr* NetRepeat::expr() const
 
 /*
  * $Log: net_proc.cc,v $
+ * Revision 1.7  2006/08/08 05:11:37  steve
+ *  Handle 64bit delay constants.
+ *
  * Revision 1.6  2002/08/12 01:34:59  steve
  *  conditional ident string using autoconfig.
  *

net_scope.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: net_scope.cc,v 1.34 2005/07/11 16:56:50 steve Exp $"
+#ident "$Id: net_scope.cc,v 1.38 2007/06/02 03:42:13 steve Exp $"
 #endif
 
 # include "config.h"
@@ -35,10 +35,9 @@
  * in question.
  */
 
-NetScope::NetScope(NetScope*up, perm_string n, NetScope::TYPE t)
+NetScope::NetScope(NetScope*up, const hname_t&n, NetScope::TYPE t)
 : type_(t), up_(up), sib_(0), sub_(0)
 {
-      memories_ = 0;
       signals_ = 0;
       events_ = 0;
       lcounter_ = 0;
@@ -132,17 +131,25 @@ NetExpr* NetScope::set_localparam(perm_string key, NetExpr*expr)
  * perm_string::literal method to fake the compiler into doing the
  * compare without actually creating a perm_string.
  */
-const NetExpr* NetScope::get_parameter(const char* key) const
+const NetExpr* NetScope::get_parameter(const char* key,
+				       const NetExpr*&msb,
+				       const NetExpr*&lsb) const
 {
       map<perm_string,param_expr_t>::const_iterator idx;
 
       idx = parameters.find(perm_string::literal(key));
-      if (idx != parameters.end())
+      if (idx != parameters.end()) {
+	    msb = (*idx).second.msb;
+	    lsb = (*idx).second.lsb;
 	    return (*idx).second.expr;
+      }
 
       idx = localparams.find(perm_string::literal(key));
-      if (idx != localparams.end())
+      if (idx != localparams.end()) {
+	    msb = (*idx).second.msb;
+	    lsb = (*idx).second.lsb;
 	    return (*idx).second.expr;
+      }
 
       return 0;
 }
@@ -234,15 +241,7 @@ NetNet::Type NetScope::default_nettype() const
 
 perm_string NetScope::basename() const
 {
-      return name_;
-}
-
-string NetScope::name() const
-{
-      if (up_)
-	    return up_->name() + "." + string(name_);
-      else
-	    return string(name_);
+      return name_.peek_name();
 }
 
 void NetScope::add_event(NetEvent*ev)
@@ -329,81 +328,16 @@ NetNet* NetScope::find_signal(const char*key)
       return 0;
 }
 
-/*
- * This method searches for the signal within this scope. If the path
- * has hierarchy, I follow the child scopes until I get the base name,
- * and look for the key in the deepest scope.
- */
-NetNet* NetScope::find_signal_in_child(const hname_t&path)
-{
-      NetScope*cur = this;
-      unsigned idx = 0;
-
-      while (path.peek_name(idx+1)) {
-	    cur = cur->child(path.peek_name(idx));
-	    if (cur == 0)
-		  return 0;
-
-	    idx += 1;
-      }
-
-      return cur->find_signal(path.peek_name(idx));
-}
-
-void NetScope::add_memory(NetMemory*mem)
-{
-      if (memories_ == 0) {
-	    mem->snext_ = mem;
-	    mem->sprev_ = mem;
-      } else {
-	    mem->snext_ = memories_->snext_;
-	    mem->sprev_ = memories_;
-	    mem->snext_->sprev_ = mem;
-	    mem->sprev_->snext_ = mem;
-      }
-      memories_ = mem;
-      mem->scope_ = this;
-}
-
-void NetScope::rem_memory(NetMemory*mem)
-{
-      assert(mem->scope_ == this);
-      if (memories_ == mem)
-	    memories_ = mem->sprev_;
-
-      if (memories_ == mem) {
-	    memories_ = 0;
-      } else {
-	    mem->sprev_->snext_ = mem->snext_;
-	    mem->snext_->sprev_ = mem->sprev_;
-      }
-      mem->scope_ = 0;
-}
-
-NetMemory* NetScope::find_memory(const string&key)
-{
-      if (memories_ == 0)
-	    return 0;
-
-      NetMemory*cur = memories_;
-      do {
-	    if (cur->name() == key.c_str())
-		  return cur;
-	    cur = cur->sprev_;
-      } while (cur != memories_);
-      return 0;
-}
-
 /*
  * This method locates a child scope by name. The name is the simple
  * name of the child, no hierarchy is searched.
  */
-NetScope* NetScope::child(const char*name)
+NetScope* NetScope::child(const hname_t&name)
 {
       if (sub_ == 0) return 0;
 
       NetScope*cur = sub_;
-      while (strcmp(cur->name_, name) != 0) {
+      while (cur->name_ != name) {
 	    if (cur->sib_ == 0) return 0;
 	    cur = cur->sib_;
       }
@@ -411,12 +345,12 @@ NetScope* NetScope::child(const char*name)
       return cur;
 }
 
-const NetScope* NetScope::child(const char*name) const
+const NetScope* NetScope::child(const hname_t&name) const
 {
       if (sub_ == 0) return 0;
 
       NetScope*cur = sub_;
-      while (strcmp(cur->name_, name) != 0) {
+      while (cur->name_ != name) {
 	    if (cur->sib_ == 0) return 0;
 	    cur = cur->sib_;
       }
@@ -440,15 +374,30 @@ perm_string NetScope::local_symbol()
       res << "_s" << (lcounter_++);
       return lex_strings.make(res.str());
 }
-
+#if 0
 string NetScope::local_hsymbol()
 {
       return string(name()) + "." + string(local_symbol());
 }
-
+#endif
 
 /*
  * $Log: net_scope.cc,v $
+ * Revision 1.38  2007/06/02 03:42:13  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.37  2007/04/26 03:06:22  steve
+ *  Rework hname_t to use perm_strings.
+ *
+ * Revision 1.36  2007/01/16 05:44:15  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
+ *
+ * Revision 1.35  2005/11/27 05:56:20  steve
+ *  Handle bit select of parameter with ranges.
+ *
  * Revision 1.34  2005/07/11 16:56:50  steve
  *  Remove NetVariable and ivl_variable_t structures.
  *

netlist.cc

@@ -17,18 +17,18 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: netlist.cc,v 1.248 2005/09/14 02:53:14 steve Exp $"
+#ident "$Id: netlist.cc,v 1.258 2007/06/02 03:42:13 steve Exp $"
 #endif
 
 # include "config.h"
 
 # include <iostream>
 
-# include  <cassert>
 # include  <typeinfo>
 # include  "compiler.h"
 # include  "netlist.h"
 # include  "netmisc.h"
+# include  "ivl_assert.h"
 
 
 ostream& operator<< (ostream&o, NetNet::Type t)
@@ -237,10 +237,170 @@ NetBus::~NetBus()
 {
 }
 
+NetDelaySrc::NetDelaySrc(NetScope*s, perm_string n,
+			 unsigned npins, bool condit_src)
+: NetObj(s, n, npins + (condit_src?1:0))
+{
+      condit_flag_ = false;
+      posedge_ = false;
+      negedge_ = false;
+      for (unsigned idx = 0 ;  idx < npins ;  idx += 1) {
+	    pin(idx).set_name(perm_string::literal("I"), idx);
+	    pin(idx).set_dir(Link::INPUT);
+      }
+
+      if (condit_src) {
+	    condit_flag_ = true;
+	    pin(npins).set_name(perm_string::literal("COND"), 0);
+	    pin(npins).set_dir(Link::INPUT);
+      }
+}
+
+NetDelaySrc::~NetDelaySrc()
+{
+}
+
+void NetDelaySrc::set_delays(uint64_t del)
+{
+      for (unsigned idx = 0 ;  idx < 12 ;  idx += 1)
+	    transition_delays_[idx] = del;
+}
+
+void NetDelaySrc::set_delays(uint64_t trise, uint64_t tfall)
+{
+      transition_delays_[IVL_PE_01] = trise;
+      transition_delays_[IVL_PE_10] = tfall;
+      transition_delays_[IVL_PE_0z] = trise;
+      transition_delays_[IVL_PE_z1] = trise;
+      transition_delays_[IVL_PE_1z] = tfall;
+      transition_delays_[IVL_PE_z0] = tfall;
+      transition_delays_[IVL_PE_0x] = trise;
+      transition_delays_[IVL_PE_x1] = trise;
+      transition_delays_[IVL_PE_1x] = tfall;
+      transition_delays_[IVL_PE_x0] = tfall;
+      transition_delays_[IVL_PE_xz] = max(trise,tfall);
+      transition_delays_[IVL_PE_zx] = min(trise,tfall);
+}
+
+void NetDelaySrc::set_delays(uint64_t trise, uint64_t tfall, uint64_t tz)
+{
+      transition_delays_[IVL_PE_01] = trise;
+      transition_delays_[IVL_PE_10] = tfall;
+      transition_delays_[IVL_PE_0z] = tz;
+      transition_delays_[IVL_PE_z1] = trise;
+      transition_delays_[IVL_PE_1z] = tz;
+      transition_delays_[IVL_PE_z0] = tfall;
+      transition_delays_[IVL_PE_0x] = min(trise,tz);
+      transition_delays_[IVL_PE_x1] = trise;
+      transition_delays_[IVL_PE_1x] = min(tfall,tz);
+      transition_delays_[IVL_PE_x0] = tfall;
+      transition_delays_[IVL_PE_xz] = tz;
+      transition_delays_[IVL_PE_zx] = min(trise,tfall);
+}
+
+void NetDelaySrc::set_delays(uint64_t t01, uint64_t t10, uint64_t t0z,
+			     uint64_t tz1, uint64_t t1z, uint64_t tz0)
+{
+      transition_delays_[IVL_PE_01] = t01;
+      transition_delays_[IVL_PE_10] = t10;
+      transition_delays_[IVL_PE_0z] = t0z;
+      transition_delays_[IVL_PE_z1] = tz1;
+      transition_delays_[IVL_PE_1z] = t1z;
+      transition_delays_[IVL_PE_z0] = tz0;
+      transition_delays_[IVL_PE_0x] = min(t01,t0z);
+      transition_delays_[IVL_PE_x1] = max(t01,tz1);
+      transition_delays_[IVL_PE_1x] = min(t10,t1z);
+      transition_delays_[IVL_PE_x0] = max(t10,tz0);
+      transition_delays_[IVL_PE_xz] = max(t1z,t0z);
+      transition_delays_[IVL_PE_zx] = min(tz1,tz0);
+}
+
+void NetDelaySrc::set_delays(uint64_t t01, uint64_t t10, uint64_t t0z,
+			     uint64_t tz1, uint64_t t1z, uint64_t tz0,
+			     uint64_t t0x, uint64_t tx1, uint64_t t1x,
+			     uint64_t tx0, uint64_t txz, uint64_t tzx)
+{
+      transition_delays_[IVL_PE_01] = t01;
+      transition_delays_[IVL_PE_10] = t10;
+      transition_delays_[IVL_PE_0z] = t0z;
+      transition_delays_[IVL_PE_z1] = tz1;
+      transition_delays_[IVL_PE_1z] = t1z;
+      transition_delays_[IVL_PE_z0] = tz0;
+      transition_delays_[IVL_PE_0x] = t0x;
+      transition_delays_[IVL_PE_x1] = tx1;
+      transition_delays_[IVL_PE_1x] = t1x;
+      transition_delays_[IVL_PE_x0] = tx0;
+      transition_delays_[IVL_PE_xz] = txz;
+      transition_delays_[IVL_PE_zx] = tzx;
+}
+
+uint64_t NetDelaySrc::get_delay(unsigned idx) const
+{
+      assert(idx < 12);
+      return transition_delays_[idx];
+}
+
+void NetDelaySrc::set_posedge()
+{
+      posedge_ = true;
+}
+
+void NetDelaySrc::set_negedge()
+{
+      negedge_ = true;
+}
+
+bool NetDelaySrc::is_posedge() const
+{
+      return posedge_;
+}
+
+bool NetDelaySrc::is_negedge() const
+{
+      return negedge_;
+}
+
+unsigned NetDelaySrc::src_count() const
+{
+      if (condit_flag_)
+	    return pin_count() - 1;
+      else
+	    return pin_count();
+}
+
+Link& NetDelaySrc::src_pin(unsigned idx)
+{
+      ivl_assert(*this, idx < src_count());
+      return pin(idx);
+}
+
+const Link& NetDelaySrc::src_pin(unsigned idx) const
+{
+      ivl_assert(*this, idx < src_count());
+      return pin(idx);
+}
+
+bool NetDelaySrc::is_condit() const
+{
+      return condit_flag_;
+}
+
+Link& NetDelaySrc::condit_pin()
+{
+      ivl_assert(*this, condit_flag_);
+      return pin(pin_count()-1);
+}
+
+const Link& NetDelaySrc::condit_pin() const
+{
+      ivl_assert(*this, condit_flag_);
+      return pin(pin_count()-1);
+}
+
 NetNet::NetNet(NetScope*s, perm_string n, Type t, unsigned npins)
 : NetObj(s, n, 1), sig_next_(0), sig_prev_(0),
     type_(t), port_type_(NOT_A_PORT), data_type_(IVL_VT_NO_TYPE),
-    signed_(false), msb_(npins-1), lsb_(0),
+    signed_(false), msb_(npins-1), lsb_(0), dimensions_(0), s0_(0), e0_(0),
     local_flag_(false), eref_count_(0), lref_count_(0)
 {
       assert(s);
@@ -274,11 +434,12 @@ NetNet::NetNet(NetScope*s, perm_string n, Type t, unsigned npins)
       s->add_signal(this);
 }
 
-NetNet::NetNet(NetScope*s, perm_string n, Type t, long ms, long ls)
+NetNet::NetNet(NetScope*s, perm_string n, Type t,
+	       long ms, long ls)
 : NetObj(s, n, 1),
     sig_next_(0), sig_prev_(0), type_(t),
     port_type_(NOT_A_PORT), data_type_(IVL_VT_NO_TYPE), signed_(false),
-    msb_(ms), lsb_(ls),
+    msb_(ms), lsb_(ls), dimensions_(0), s0_(0), e0_(0),
     local_flag_(false), eref_count_(0), lref_count_(0)
 {
       assert(s);
@@ -304,9 +465,59 @@ NetNet::NetNet(NetScope*s, perm_string n, Type t, long ms, long ls)
 	    break;
       }
 
-      pin(0).set_name(perm_string::literal("P"), 0);
-      pin(0).set_dir(dir);
-      pin(0).set_init(init_value);
+      for (unsigned idx = 0 ;  idx < pin_count() ;  idx += 1) {
+	    pin(idx).set_name(perm_string::literal("P"), idx);
+	    pin(idx).set_dir(dir);
+	    pin(idx).set_init(init_value);
+      }
+
+      s->add_signal(this);
+}
+
+static unsigned calculate_count(long s, long e)
+{
+      if (s >= e)
+	    return s - e + 1;
+      else
+	    return e - s + 1;
+}
+
+NetNet::NetNet(NetScope*s, perm_string n, Type t,
+	       long ms, long ls, long array_s, long array_e)
+: NetObj(s, n, calculate_count(array_s, array_e)),
+    sig_next_(0), sig_prev_(0), type_(t),
+    port_type_(NOT_A_PORT), data_type_(IVL_VT_NO_TYPE), signed_(false),
+    msb_(ms), lsb_(ls), dimensions_(1), s0_(array_s), e0_(array_e),
+    local_flag_(false), eref_count_(0), lref_count_(0)
+{
+      assert(s);
+
+      verinum::V init_value = verinum::Vz;
+      Link::DIR dir = Link::PASSIVE;
+
+      switch (t) {
+	  case REG:
+	  case IMPLICIT_REG:
+	    init_value = verinum::Vx;
+	    dir = Link::OUTPUT;
+	    break;
+	  case SUPPLY0:
+	    init_value = verinum::V0;
+	    dir = Link::OUTPUT;
+	    break;
+	  case SUPPLY1:
+	    init_value = verinum::V1;
+	    dir = Link::OUTPUT;
+	    break;
+	  default:
+	    break;
+      }
+
+      for (unsigned idx = 0 ;  idx < pin_count() ;  idx += 1) {
+	    pin(idx).set_name(perm_string::literal("P"), idx);
+	    pin(idx).set_dir(dir);
+	    pin(idx).set_init(init_value);
+      }
 
       s->add_signal(this);
 }
@@ -440,6 +651,41 @@ unsigned NetNet::sb_to_idx(long sb) const
 	    return lsb_ - sb;
 }
 
+unsigned NetNet::array_dimensions() const
+{
+      return dimensions_;
+}
+
+long NetNet::array_first() const
+{
+      if (s0_ < e0_)
+	    return s0_;
+      else
+	    return e0_;
+}
+
+unsigned NetNet::array_count() const
+{
+      return calculate_count(s0_, e0_);
+}
+
+bool NetNet::array_index_is_valid(long sb) const
+{
+      if (sb < s0_ && sb < e0_)
+	    return false;
+      if (sb > e0_ && sb > s0_)
+	    return false;
+      return true;
+}
+
+unsigned NetNet::array_index_to_address(long sb) const
+{
+      if (s0_ <= e0_)
+	    return sb - s0_;
+      else
+	    return sb - e0_;
+}
+
 void NetNet::incr_eref()
 {
       eref_count_ += 1;
@@ -477,6 +723,21 @@ unsigned NetNet::get_refs() const
       return lref_count_ + eref_count_;
 }
 
+void NetNet::add_delay_path(NetDelaySrc*path)
+{
+      delay_paths_.push_back(path);
+}
+
+unsigned NetNet::delay_paths(void)const
+{
+      return delay_paths_.size();
+}
+
+const NetDelaySrc* NetNet::delay_path(unsigned idx) const
+{
+      assert(idx < delay_paths_.size());
+      return delay_paths_[idx];
+}
 
 NetPartSelect::NetPartSelect(NetNet*sig, unsigned off, unsigned wid,
 			     NetPartSelect::dir_t dir)
@@ -865,6 +1126,55 @@ const Link& NetAddSub::pin_Result() const
       return pin(8);
 }
 
+NetArrayDq::NetArrayDq(NetScope*s, perm_string n, NetNet*mem, unsigned awid)
+: NetNode(s, n, 2),
+  mem_(mem), awidth_(awid)
+{
+      pin(0).set_dir(Link::OUTPUT);
+      pin(0).set_name(perm_string::literal("Result"), 0);
+      pin(1).set_dir(Link::INPUT);
+      pin(1).set_name(perm_string::literal("Address"), 0);
+}
+
+NetArrayDq::~NetArrayDq()
+{
+}
+
+unsigned NetArrayDq::width() const
+{
+      return mem_->vector_width();
+}
+
+unsigned NetArrayDq::awidth() const
+{
+      return awidth_;
+}
+
+const NetNet* NetArrayDq::mem() const
+{
+      return mem_;
+}
+
+Link& NetArrayDq::pin_Result()
+{
+      return pin(0);
+}
+
+Link& NetArrayDq::pin_Address()
+{
+      return pin(1);
+}
+
+const Link& NetArrayDq::pin_Result() const
+{
+      return pin(0);
+}
+
+const Link& NetArrayDq::pin_Address() const
+{
+      return pin(1);
+}
+
 /*
  * The pinout for the NetCLShift is:
  *    0  -- Result
@@ -1320,190 +1630,6 @@ const Link& NetMux::pin_Data(unsigned s) const
       return pin(2+s);
 }
 
-
-NetRamDq::NetRamDq(NetScope*s, perm_string n, NetMemory*mem, unsigned awid)
-: NetNode(s, n, 6),
-  mem_(mem), awidth_(awid)
-{
-      pin(0).set_dir(Link::INPUT);
-      pin(0).set_name(perm_string::literal("InClock"), 0);
-      pin(1).set_dir(Link::INPUT);
-      pin(1).set_name(perm_string::literal("OutClock"), 0);
-      pin(2).set_dir(Link::INPUT);
-      pin(2).set_name(perm_string::literal("WE"), 0);
-      pin(3).set_dir(Link::INPUT);
-      pin(3).set_name(perm_string::literal("Address"), 0);
-      pin(4).set_dir(Link::INPUT);
-      pin(4).set_name(perm_string::literal("Data"), 0);
-      pin(5).set_dir(Link::OUTPUT);
-      pin(5).set_name(perm_string::literal("Q"), 0);
-
-      next_ = mem_->ram_list_;
-      mem_->ram_list_ = this;
-}
-
-NetRamDq::~NetRamDq()
-{
-      if (mem_->ram_list_ == this) {
-	    mem_->ram_list_ = next_;
-
-      } else {
-	    NetRamDq*cur = mem_->ram_list_;
-	    while (cur->next_ != this) {
-		  assert(cur->next_);
-		  cur = cur->next_;
-	    }
-	    assert(cur->next_ == this);
-	    cur->next_ = next_;
-      }
-}
-
-unsigned NetRamDq::width() const
-{
-      return mem_->width();
-}
-
-unsigned NetRamDq::awidth() const
-{
-      return awidth_;
-}
-
-unsigned NetRamDq::size() const
-{
-      return mem_->count();
-}
-
-const NetMemory* NetRamDq::mem() const
-{
-      return mem_;
-}
-
-unsigned NetRamDq::count_partners() const
-{
-      unsigned count = 0;
-      for (NetRamDq*cur = mem_->ram_list_ ;  cur ;  cur = cur->next_)
-	    count += 1;
-
-      return count;
-}
-
-void NetRamDq::absorb_partners()
-{
-      NetRamDq*cur, *tmp;
-      for (cur = mem_->ram_list_, tmp = 0
-		 ;  cur||tmp ;  cur = cur? cur->next_ : tmp) {
-	    tmp = 0;
-	    if (cur == this) continue;
-
-	    bool ok_flag = true;
-	    ok_flag &= pin_Address().is_linked(cur->pin_Address());
-
-	    if (!ok_flag) continue;
-
-	    if (pin_InClock().is_linked()
-		&& cur->pin_InClock().is_linked()
-		&& ! pin_InClock().is_linked(cur->pin_InClock()))
-		  continue;
-
-	    if (pin_OutClock().is_linked()
-		&& cur->pin_OutClock().is_linked()
-		&& ! pin_OutClock().is_linked(cur->pin_OutClock()))
-		  continue;
-
-	    if (pin_WE().is_linked()
-		&& cur->pin_WE().is_linked()
-		&& ! pin_WE().is_linked(cur->pin_WE()))
-		  continue;
-
-	    if (pin_Data().is_linked() && cur->pin_Data().is_linked()) {
-		  ok_flag &= pin_Data().is_linked(cur->pin_Data());
-	    }
-
-	    if (! ok_flag) continue;
-
-	    if (pin_Q().is_linked() && cur->pin_Q().is_linked()) {
-
-		  ok_flag &= pin_Q().is_linked(cur->pin_Q());
-	    }
-
-	    if (! ok_flag) continue;
-
-	      // I see no other reason to reject cur, so link up all
-	      // my pins and delete it.
-	    connect(pin_InClock(), cur->pin_InClock());
-	    connect(pin_OutClock(), cur->pin_OutClock());
-	    connect(pin_WE(), cur->pin_WE());
-
-	    connect(pin_Address(), cur->pin_Address());
-	    connect(pin_Data(), cur->pin_Data());
-	    connect(pin_Q(), cur->pin_Q());
-
-	    tmp = cur->next_;
-	    delete cur;
-	    cur = 0;
-      }
-}
-
-Link& NetRamDq::pin_InClock()
-{
-      return pin(0);
-}
-
-const Link& NetRamDq::pin_InClock() const
-{
-      return pin(0);
-}
-
-Link& NetRamDq::pin_OutClock()
-{
-      return pin(1);
-}
-
-const Link& NetRamDq::pin_OutClock() const
-{
-      return pin(1);
-}
-
-Link& NetRamDq::pin_WE()
-{
-      return pin(2);
-}
-
-const Link& NetRamDq::pin_WE() const
-{
-      return pin(2);
-}
-
-Link& NetRamDq::pin_Address()
-{
-      return pin(3);
-}
-
-const Link& NetRamDq::pin_Address() const
-{
-      return pin(3);
-}
-
-Link& NetRamDq::pin_Data()
-{
-      return pin(4);
-}
-
-const Link& NetRamDq::pin_Data() const
-{
-      return pin(4);
-}
-
-Link& NetRamDq::pin_Q()
-{
-      return pin(5);
-}
-
-const Link& NetRamDq::pin_Q() const
-{
-      return pin(5);
-}
-
 NetSignExtend::NetSignExtend(NetScope*s, perm_string n, unsigned w)
 : NetNode(s, n, 2), width_(w)
 {
@@ -1644,11 +1770,16 @@ NetFuncDef::NetFuncDef(NetScope*s, NetNet*result, const svector<NetNet*>&po)
 NetFuncDef::~NetFuncDef()
 {
 }
-
+#if 0
 const string NetFuncDef::name() const
 {
       return scope_->name();
 }
+#endif
+const NetScope* NetFuncDef::scope() const
+{
+      return scope_;
+}
 
 void NetFuncDef::set_proc(NetProc*st)
 {
@@ -1724,12 +1855,12 @@ NetEUFunc::~NetEUFunc()
       for (unsigned idx = 0 ;  idx < parms_.count() ;  idx += 1)
 	    delete parms_[idx];
 }
-
+#if 0
 const string NetEUFunc::name() const
 {
       return func_->name();
 }
-
+#endif
 const NetESignal*NetEUFunc::result_sig() const
 {
       return result_sig_;
@@ -1767,12 +1898,12 @@ NetUTask::NetUTask(NetScope*def)
 NetUTask::~NetUTask()
 {
 }
-
+#if 0
 const string NetUTask::name() const
 {
       return task_->name();
 }
-
+#endif
 const NetScope* NetUTask::task() const
 {
       return task_;
@@ -1919,68 +2050,6 @@ const NetScope* NetEConstParam::scope() const
       return scope_;
 }
 
-
-NetEMemory::NetEMemory(NetMemory*m, NetExpr*i)
-: NetExpr(m->width()), mem_(m), idx_(i)
-{
-}
-
-NetEMemory::~NetEMemory()
-{
-}
-
-perm_string NetEMemory::name() const
-{
-      return mem_->name();
-}
-
-const NetExpr* NetEMemory::index() const
-{
-      return idx_;
-}
-
-NetMemory::NetMemory(NetScope*sc, perm_string n, long w, long s, long e)
-: width_(w), idxh_(s), idxl_(e), ram_list_(0), scope_(sc)
-{
-      name_ = n;
-      scope_->add_memory(this);
-}
-
-NetMemory::~NetMemory()
-{
-      assert(scope_);
-      scope_->rem_memory(this);
-}
-
-unsigned NetMemory::count() const
-{
-      if (idxh_ < idxl_)
-	    return idxl_ - idxh_ + 1;
-      else
-	    return idxh_ - idxl_ + 1;
-}
-
-perm_string NetMemory::name() const
-{
-      return name_;
-}
-
-long NetMemory::index_to_address(long idx) const
-{
-      if (idxh_ < idxl_)
-	    return idx - idxh_;
-      else
-	    return idx - idxl_;
-}
-
-
-
-NetEMemory* NetEMemory::dup_expr() const
-{
-      assert(0);
-      return 0;
-}
-
 NetEEvent::NetEEvent(NetEvent*e)
 : event_(e)
 {
@@ -2011,25 +2080,20 @@ const NetScope* NetEScope::scope() const
 }
 
 NetESignal::NetESignal(NetNet*n)
-: NetExpr(n->vector_width()), net_(n)
+: NetExpr(n->vector_width()), net_(n), word_(0)
 {
       net_->incr_eref();
       set_line(*n);
       cast_signed(net_->get_signed());
 }
 
-#if 0
-NetESignal::NetESignal(NetNet*n, unsigned m, unsigned l)
-: NetExpr(m - l + 1), net_(n)
+NetESignal::NetESignal(NetNet*n, NetExpr*w)
+: NetExpr(n->vector_width()), net_(n), word_(w)
 {
-      assert(m >= l);
-      msi_ = m;
-      lsi_ = l;
       net_->incr_eref();
       set_line(*n);
       cast_signed(net_->get_signed());
 }
-#endif
 
 NetESignal::~NetESignal()
 {
@@ -2041,18 +2105,22 @@ perm_string NetESignal::name() const
       return net_->name();
 }
 
-unsigned NetESignal::bit_count() const
+const NetExpr* NetESignal::word_index() const
+{
+      return word_;
+}
+
+unsigned NetESignal::vector_width() const
 {
       return net_->vector_width();
 }
 
-Link& NetESignal::bit(unsigned idx)
+const NetNet* NetESignal::sig() const
 {
-      assert(idx <= 0);
-      return net_->pin(idx);
+      return net_;
 }
 
-const NetNet* NetESignal::sig() const
+NetNet* NetESignal::sig()
 {
       return net_;
 }
@@ -2072,6 +2140,12 @@ ivl_variable_type_t NetESignal::expr_type() const
       return net_->data_type();
 }
 
+/*
+* Make a ternary operator from all the sub-expressions. The condition
+* expression is self-determined, but the true and false expressions
+* should have the same width. NOTE: This matching of the widths really
+* has to be done in elaboration.
+*/
 NetETernary::NetETernary(NetExpr*c, NetExpr*t, NetExpr*f)
 : cond_(c), true_val_(t), false_val_(f)
 {
@@ -2105,6 +2179,19 @@ const NetExpr* NetETernary::false_expr() const
       return false_val_;
 }
 
+ivl_variable_type_t NetETernary::expr_type() const
+{
+      ivl_variable_type_t tru = true_val_->expr_type();
+      ivl_variable_type_t fal = false_val_->expr_type();
+      if (tru == IVL_VT_LOGIC && fal == IVL_VT_BOOL)
+	    return IVL_VT_LOGIC;
+      if (tru == IVL_VT_BOOL && fal == IVL_VT_LOGIC)
+	    return IVL_VT_LOGIC;
+
+      ivl_assert(*this, tru == fal);
+      return tru;
+}
+
 NetEUnary::NetEUnary(char op, NetExpr*ex)
 : NetExpr(ex->expr_width()), op_(op), expr_(ex)
 {
@@ -2128,6 +2215,11 @@ NetEUnary::~NetEUnary()
       delete expr_;
 }
 
+ivl_variable_type_t NetEUnary::expr_type() const
+{
+      return expr_->expr_type();
+}
+
 NetEUBits::NetEUBits(char op, NetExpr*ex)
 : NetEUnary(op, ex)
 {
@@ -2137,6 +2229,11 @@ NetEUBits::~NetEUBits()
 {
 }
 
+ivl_variable_type_t NetEUBits::expr_type() const
+{
+      return expr_->expr_type();
+}
+
 NetEUReduce::NetEUReduce(char op, NetExpr*ex)
 : NetEUnary(op, ex)
 {
@@ -2147,6 +2244,11 @@ NetEUReduce::~NetEUReduce()
 {
 }
 
+ivl_variable_type_t NetEUReduce::expr_type() const
+{
+      return expr_->expr_type();
+}
+
 NetLogic::NetLogic(NetScope*s, perm_string n, unsigned pins,
 		   TYPE t, unsigned wid)
 : NetNode(s, n, pins), type_(t), width_(wid)
@@ -2189,8 +2291,8 @@ unsigned NetUReduce::width() const
       return width_;
 }
 
-NetTaskDef::NetTaskDef(const string&n, const svector<NetNet*>&po)
-: name_(n), proc_(0), ports_(po)
+NetTaskDef::NetTaskDef(NetScope*n, const svector<NetNet*>&po)
+: scope_(n), proc_(0), ports_(po)
 {
 }
 
@@ -2215,11 +2317,16 @@ NetNet* NetTaskDef::port(unsigned idx)
       assert(idx < ports_.count());
       return ports_[idx];
 }
-
+#if 0
 const string& NetTaskDef::name() const
 {
       return name_;
 }
+#endif
+const NetScope* NetTaskDef::scope() const
+{
+      return scope_;
+}
 
 const NetProc*NetTaskDef::proc() const
 {
@@ -2228,6 +2335,39 @@ const NetProc*NetTaskDef::proc() const
 
 /*
  * $Log: netlist.cc,v $
+ * Revision 1.258  2007/06/02 03:42:13  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.257  2007/04/02 01:12:34  steve
+ *  Seperate arrayness from word count
+ *
+ * Revision 1.256  2007/03/02 06:13:22  steve
+ *  Add support for edge sensitive spec paths.
+ *
+ * Revision 1.255  2007/03/01 06:19:38  steve
+ *  Add support for conditional specify delay paths.
+ *
+ * Revision 1.254  2007/02/20 05:58:36  steve
+ *  Handle unary minus of real valued expressions.
+ *
+ * Revision 1.253  2007/02/14 05:59:46  steve
+ *  Handle type of ternary expressions properly.
+ *
+ * Revision 1.252  2007/01/19 04:25:37  steve
+ *  Fix missing passive setting for array word pins.
+ *
+ * Revision 1.251  2007/01/16 05:44:15  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
+ *
+ * Revision 1.250  2006/11/10 04:54:26  steve
+ *  Add test_width methods for PETernary and PEString.
+ *
+ * Revision 1.249  2006/09/23 04:57:19  steve
+ *  Basic support for specify timing.
+ *
  * Revision 1.248  2005/09/14 02:53:14  steve
  *  Support bool expressions and compares handle them optimally.
  *

netmisc.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: netmisc.cc,v 1.11 2005/04/08 04:50:31 steve Exp $"
+#ident "$Id: netmisc.cc,v 1.14 2007/06/02 03:42:13 steve Exp $"
 #endif
 
 # include "config.h"
@@ -25,6 +25,8 @@
 # include  "netlist.h"
 # include  "netmisc.h"
 # include  "PExpr.h"
+# include  "pform_types.h"
+# include  "ivl_assert.h"
 
 NetNet* add_to_net(Design*des, NetNet*sig, long val)
 {
@@ -123,13 +125,14 @@ NetExpr* make_sub_expr(long val, NetExpr*expr)
       return res;
 }
 
-NetExpr* elab_and_eval(Design*des, NetScope*scope, const PExpr*pe)
+NetExpr* elab_and_eval(Design*des, NetScope*scope,
+		       const PExpr*pe, int expr_wid, int prune_width)
 {
-      NetExpr*tmp = pe->elaborate_expr(des, scope);
+      NetExpr*tmp = pe->elaborate_expr(des, scope, expr_wid, false);
       if (tmp == 0)
 	    return 0;
 
-      if (NetExpr*tmp2 = tmp->eval_tree()) {
+      if (NetExpr*tmp2 = tmp->eval_tree(prune_width)) {
 	    delete tmp;
 	    tmp = tmp2;
       }
@@ -137,9 +140,52 @@ NetExpr* elab_and_eval(Design*des, NetScope*scope, const PExpr*pe)
       return tmp;
 }
 
+std::list<hname_t> eval_scope_path(Design*des, NetScope*scope,
+				   const pform_name_t&path)
+{
+      list<hname_t> res;
+
+      typedef pform_name_t::const_iterator pform_path_it;
+
+      for (pform_path_it cur = path.begin() ; cur != path.end(); cur++) {
+	    const name_component_t&comp = *cur;
+	    if (comp.index.empty()) {
+		  res.push_back(hname_t(comp.name));
+		  continue;
+	    }
+
+	    assert(comp.index.size() == 1);
+	    const index_component_t&index = comp.index.front();
+	    assert(index.sel == index_component_t::SEL_BIT);
+
+	    NetExpr*tmp = elab_and_eval(des, scope, index.msb, -1);
+	    ivl_assert(*index.msb, tmp);
+
+	    if (NetEConst*ctmp = dynamic_cast<NetEConst*>(tmp)) {
+		  res.push_back(hname_t(comp.name, ctmp->value().as_long()));
+		  delete ctmp;
+		  continue;
+	    }
+
+	    return res;
+      }
+
+      return res;
+}
 
 /*
  * $Log: netmisc.cc,v $
+ * Revision 1.14  2007/06/02 03:42:13  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.13  2007/03/08 05:30:03  steve
+ *  Limit the calculated widths of constants.
+ *
+ * Revision 1.12  2006/06/02 04:48:50  steve
+ *  Make elaborate_expr methods aware of the width that the context
+ *  requires of it. In the process, fix sizing of the width of unary
+ *  minus is context determined sizes.
+ *
  * Revision 1.11  2005/04/08 04:50:31  steve
  *  Don not give to make_add express an unwanted width.
  *
@@ -147,36 +193,5 @@ NetExpr* elab_and_eval(Design*des, NetScope*scope, const PExpr*pe)
  *  Remove the NetEBitSel and combine all bit/part select
  *  behavior into the NetESelect node and IVL_EX_SELECT
  *  ivl_target expression type.
- *
- * Revision 1.9  2004/12/11 02:31:27  steve
- *  Rework of internals to carry vectors through nexus instead
- *  of single bits. Make the ivl, tgt-vvp and vvp initial changes
- *  down this path.
- *
- * Revision 1.8  2004/02/20 18:53:35  steve
- *  Addtrbute keys are perm_strings.
- *
- * Revision 1.7  2004/02/18 17:11:57  steve
- *  Use perm_strings for named langiage items.
- *
- * Revision 1.6  2003/03/06 00:28:42  steve
- *  All NetObj objects have lex_string base names.
- *
- * Revision 1.5  2003/02/26 01:29:24  steve
- *  LPM objects store only their base names.
- *
- * Revision 1.4  2002/08/31 03:48:50  steve
- *  Fix reverse bit ordered bit select in continuous assignment.
- *
- * Revision 1.3  2002/08/12 01:35:00  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.2  2001/07/25 03:10:49  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.1  2001/02/11 02:15:52  steve
- *  Add the netmisc.cc source file.
- *
  */
 

netmisc.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: netmisc.h,v 1.23 2005/07/11 16:56:51 steve Exp $"
+#ident "$Id: netmisc.h,v 1.31 2007/06/02 03:42:13 steve Exp $"
 #endif
 
 # include  "netlist.h"
@@ -33,12 +33,28 @@
  * If the symbol was not found, return 0. The output arguments
  * get 0 except for the pointer to the object that represents
  * the located symbol.
+ *
+ * The ex1 and ex2 output arguments are extended results. If the
+ * symbol is a parameter (par!=0) then ex1 is the msb expression and
+ * ex2 is the lsb expression for the range. If there is no range, then
+ * these values are set to 0.
  */
-extern NetScope* symbol_search(Design*des, NetScope*start, hname_t path,
+extern NetScope* symbol_search(Design*des,
+			       NetScope*start, pform_name_t path,
 			       NetNet*&net,       /* net/reg */
-			       NetMemory*&mem,    /* memory */
 			       const NetExpr*&par,/* parameter */
-			       NetEvent*&eve       /* named event */);
+			       NetEvent*&eve,     /* named event */
+			       const NetExpr*&ex1, const NetExpr*&ex2);
+
+inline NetScope* symbol_search(Design*des,
+			       NetScope*start, const pform_name_t&path,
+			       NetNet*&net,       /* net/reg */
+			       const NetExpr*&par,/* parameter */
+			       NetEvent*&eve      /* named event */)
+{
+      const NetExpr*ex1, *ex2;
+      return symbol_search(des, start, path, net, par, eve, ex1, ex2);
+}
 
 /*
  * This function transforms an expression by padding the high bits
@@ -71,7 +87,7 @@ extern NetNet*add_to_net(Design*des, NetNet*sig, long val);
  * where order matters.
  *
  * make_add_expr
- *   Make a NetEBAdd expresion with <expr> the first argument and
+ *   Make a NetEBAdd expression with <expr> the first argument and
  *   <val> the second. This may get turned into a subtract if <val> is
  *   less then zero. If val is exactly zero, then return <expr> as is.
  *
@@ -94,12 +110,54 @@ extern unsigned count_lval_width(const class NetAssign_*first);
  * right away. If the expression can be evaluated, this returns a
  * constant expression. If it cannot be evaluated, it returns whatever
  * it can. If the expression cannot be elaborated, return 0.
+ *
+ * The expr_width is the width of the context where the expression is
+ * being elaborated, or -1 if the expression is self-determined width.
+ *
+ * Also, the prune_width is the maximum width of the result, and it
+ * passed to the eval_tree method of the expression to limit constant
+ * results if possible.
  */
 class PExpr;
-extern NetExpr* elab_and_eval(Design*des, NetScope*scope, const PExpr*pe);
+extern NetExpr* elab_and_eval(Design*des, NetScope*scope,
+			      const PExpr*pe, int expr_wid,
+			      int prune_width =-1);
+
+extern std::list<hname_t> eval_scope_path(Design*des, NetScope*scope,
+					  const pform_name_t&path);
 
 /*
  * $Log: netmisc.h,v $
+ * Revision 1.31  2007/06/02 03:42:13  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.30  2007/05/24 04:07:12  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.29  2007/03/08 05:30:03  steve
+ *  Limit the calculated widths of constants.
+ *
+ * Revision 1.28  2007/02/26 19:49:49  steve
+ *  Spelling fixes (larry doolittle)
+ *
+ * Revision 1.27  2007/01/16 05:44:15  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
+ *
+ * Revision 1.26  2006/09/28 00:29:49  steve
+ *  Allow specparams as constants in expressions.
+ *
+ * Revision 1.25  2006/06/02 04:48:50  steve
+ *  Make elaborate_expr methods aware of the width that the context
+ *  requires of it. In the process, fix sizing of the width of unary
+ *  minus is context determined sizes.
+ *
+ * Revision 1.24  2005/11/27 05:56:20  steve
+ *  Handle bit select of parameter with ranges.
+ *
  * Revision 1.23  2005/07/11 16:56:51  steve
  *  Remove NetVariable and ivl_variable_t structures.
  *

pad_to_width.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: pad_to_width.cc,v 1.19 2005/07/07 16:22:49 steve Exp $"
+#ident "$Id: pad_to_width.cc,v 1.20 2005/12/22 15:43:47 steve Exp $"
 #endif
 
 # include "config.h"
@@ -56,18 +56,10 @@ NetExpr*pad_to_width(NetExpr*expr, unsigned wid)
 	    return tmp;
       }
 
-	/* Do it the hard way, with a concatenation. */
-      verinum pad(verinum::V0, wid - expr->expr_width());
-      NetEConst*co = new NetEConst(pad);
-      co->set_line(*expr);
-      NetEConcat*cc = new NetEConcat(2);
-      cc->set_line(*expr);
-      cc->set(0, co);
-      cc->set(1, expr);
-      cc->set_width(wid);
-      expr = cc;
-
-      return expr;
+      NetESelect*tmp = new NetESelect(expr, 0, wid);
+      tmp->set_line(*expr);
+      tmp->cast_signed(expr->has_sign());
+      return tmp;
 }
 
 /*
@@ -159,6 +151,9 @@ NetNet*crop_to_width(Design*des, NetNet*net, unsigned wid)
 
 /*
  * $Log: pad_to_width.cc,v $
+ * Revision 1.20  2005/12/22 15:43:47  steve
+ *  pad_to_width handles signed expressions.
+ *
  * Revision 1.19  2005/07/07 16:22:49  steve
  *  Generalize signals to carry types.
  *

pform.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1998-2004 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 1998-2007 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: pform.cc,v 1.133 2005/07/11 16:56:51 steve Exp $"
+#ident "$Id: pform.cc,v 1.148 2007/06/12 04:05:45 steve Exp $"
 #endif
 
 # include "config.h"
@@ -28,9 +28,12 @@
 # include  "parse_api.h"
 # include  "PEvent.h"
 # include  "PUdp.h"
+# include  "PGenerate.h"
+# include  "PSpec.h"
 # include  <list>
 # include  <map>
 # include  <assert.h>
+# include  <stack>
 # include  <typeinfo>
 # include  <sstream>
 
@@ -44,8 +47,21 @@ string vl_file = "";
 
 extern int VLparse();
 
+  /* This tracks the current module being processed. There can only be
+     exactly one module currently being parsed, since verilog does not
+     allow nested module definitions. */
 static Module*pform_cur_module = 0;
 
+bool pform_library_flag = false;
+
+  /* increment this for generate schemes within a module, and set it
+     to zero when a new module starts. */
+static unsigned scope_generate_counter = 1;
+
+  /* This tracks the current generate scheme being processed. This is
+     always within a module. */
+static PGenerate*pform_cur_generate = 0;
+
 static NetNet::Type pform_default_nettype = NetNet::WIRE;
 
 /*
@@ -63,33 +79,47 @@ static unsigned pform_timescale_line = 0;
  * of scope. As I enter a scope, the push function is called, and as I
  * leave a scope the pop function is called. Entering tasks, functions
  * and named blocks causes scope to be pushed and popped. The module
- * name is not included it this scope stack.
+ * name is not included in this scope stack.
  *
- * The hier_name function, therefore, returns the name path of a
- * function relative the current function.
+ * The hier_name function, therefore, converts the name to the scoped
+ * name within the module currently in progress. It never includes an
+ * instance name.
+ *
+ * The scope stack does not include any scope created by a generate
+ * scheme.
  */
 
-static hname_t scope_stack;
+static pform_name_t scope_stack;
 
 void pform_push_scope(char*name)
 {
-      scope_stack.append(name);
+      scope_stack.push_back(name_component_t(lex_strings.make(name)));
 }
 
 void pform_pop_scope()
 {
-      char*tmp = scope_stack.remove_tail_name();
-      assert(tmp);
-      free(tmp);
+      scope_stack.pop_back();
 }
 
-static hname_t hier_name(const char*tail)
+static pform_name_t hier_name(const char*tail)
 {
-      hname_t name = scope_stack;
-      name.append(tail);
+      pform_name_t name = scope_stack;
+      name.push_back(name_component_t(lex_strings.make(tail)));
       return name;
 }
 
+static PWire*get_wire_in_module(const pform_name_t&name)
+{
+	/* Note that if we are processing a generate, then the
+	   scope depth will be empty because generate schemes
+	   cannot be within sub-scopes. Only directly in
+	   modules. */
+      if (pform_cur_generate)
+	    return pform_cur_generate->get_wire(name);
+
+      return pform_cur_module->get_wire(name);
+}
+
 void pform_set_default_nettype(NetNet::Type type,
 			       const char*file, unsigned lineno)
 {
@@ -172,7 +202,7 @@ verinum* pform_verinum_with_size(verinum*siz, verinum*val,
 	    break;
       }
 
-      verinum*res = new verinum(pad, size);
+      verinum*res = new verinum(pad, size, true);
 
       unsigned copy = val->len();
       if (res->len() < copy)
@@ -215,6 +245,11 @@ void pform_startmodule(const char*name, const char*file, unsigned lineno,
 
       pform_cur_module->set_file(file);
       pform_cur_module->set_lineno(lineno);
+      pform_cur_module->library_flag = pform_library_flag;
+
+	/* The generate scheme numbering starts with *1*, not
+	   zero. That's just the way it is, thanks to the standard. */
+      scope_generate_counter = 1;
 
       if (warn_timescale && pform_timescale_file
 	  && (strcmp(pform_timescale_file,file) != 0)) {
@@ -243,7 +278,7 @@ Module::port_t* pform_module_port_reference(char*name,
 					    unsigned lineno)
 {
       Module::port_t*ptmp = new Module::port_t;
-      PEIdent*tmp = new PEIdent(hname_t(name));
+      PEIdent*tmp = new PEIdent(lex_strings.make(name));
       tmp->set_file(file);
       tmp->set_lineno(lineno);
       ptmp->name = lex_strings.make(name);
@@ -292,6 +327,63 @@ void pform_endmodule(const char*name)
       pform_cur_module = 0;
 }
 
+void pform_genvars(list<perm_string>*names)
+{
+      list<perm_string>::const_iterator cur;
+      for (cur = names->begin(); cur != names->end() ; *cur++) {
+	    pform_cur_module->genvars.push_back( *cur );
+      }
+
+      delete names;
+}
+
+void pform_start_generate_for(const struct vlltype&li,
+			      char*ident1, PExpr*init,
+			      PExpr*test,
+			      char*ident2, PExpr*next)
+{
+      PGenerate*gen = new PGenerate(scope_generate_counter++);
+
+      gen->set_file(li.text);
+      gen->set_lineno(li.first_line);
+
+	// For now, assume that generates do not nest.
+      gen->parent = pform_cur_generate;
+      pform_cur_generate = gen;
+
+      pform_cur_generate->scheme_type = PGenerate::GS_LOOP;
+
+      pform_cur_generate->loop_index = lex_strings.make(ident1);
+      pform_cur_generate->loop_init = init;
+      pform_cur_generate->loop_test = test;
+      pform_cur_generate->loop_step = next;
+
+      delete[]ident1;
+      delete[]ident2;
+}
+
+void pform_generate_block_name(char*name)
+{
+      assert(pform_cur_generate != 0);
+      assert(pform_cur_generate->scope_name == 0);
+      pform_cur_generate->scope_name = lex_strings.make(name);
+      delete[]name;
+}
+
+void pform_endgenerate()
+{
+      assert(pform_cur_generate != 0);
+      assert(pform_cur_module);
+
+      PGenerate*cur = pform_cur_generate;
+      pform_cur_generate = cur->parent;
+
+      if (pform_cur_generate != 0)
+	    pform_cur_generate->generates.push_back(cur);
+      else
+	    pform_cur_module->generate_schemes.push_back(cur);
+}
+
 bool pform_expression_is_constant(const PExpr*ex)
 {
       return ex->is_constant(pform_cur_module);
@@ -425,9 +517,10 @@ void pform_make_udp(perm_string name, list<string>*parms,
       map<string,PWire*> defs;
       for (unsigned idx = 0 ;  idx < decl->count() ;  idx += 1) {
 
-	    hname_t pname = (*decl)[idx]->path();
+	    pform_name_t pname = (*decl)[idx]->path();
+	    string port_name = peek_tail_name(pname).str();
 
-	    if (PWire*cur = defs[pname.peek_name(0)]) {
+	    if (PWire*cur = defs[port_name]) {
 		  bool rc = true;
 		  assert((*decl)[idx]);
 		  if ((*decl)[idx]->get_port_type() != NetNet::PIMPLICIT) {
@@ -440,7 +533,7 @@ void pform_make_udp(perm_string name, list<string>*parms,
 		  }
 
 	    } else {
-		  defs[pname.peek_name(0)] = (*decl)[idx];
+		  defs[port_name] = (*decl)[idx];
 	    }
       }
 
@@ -586,7 +679,7 @@ void pform_make_udp(perm_string name, list<string>*parms,
 
 	      // Make the port list for the UDP
 	    for (unsigned idx = 0 ;  idx < pins.count() ;  idx += 1)
-		  udp->ports[idx] = pins[idx]->path().peek_name(0);
+		  udp->ports[idx] = peek_tail_name(pins[idx]->path());
 
 	    process_udp_table(udp, table, file, lineno);
 	    udp->initial  = init;
@@ -670,7 +763,7 @@ void pform_make_udp(perm_string name, bool synchronous_flag,
 
 	      // Make the port list for the UDP
 	    for (unsigned idx = 0 ;  idx < pins.count() ;  idx += 1)
-		  udp->ports[idx] = pins[idx]->path().peek_name(0);
+		  udp->ports[idx] = peek_tail_name(pins[idx]->path());
 
 	    assert(udp);
 	    assert(table);
@@ -695,8 +788,7 @@ static void pform_set_net_range(const char* name,
 				bool signed_flag,
 				ivl_variable_type_t dt)
 {
-
-      PWire*cur = pform_cur_module->get_wire(hier_name(name));
+      PWire*cur = get_wire_in_module(hier_name(name));
       if (cur == 0) {
 	    VLerror("error: name is not a valid net.");
 	    return;
@@ -796,7 +888,10 @@ void pform_makegate(PGBuiltin::Type type,
       cur->set_file(info.file);
       cur->set_lineno(info.lineno);
 
-      pform_cur_module->add_gate(cur);
+      if (pform_cur_generate)
+	    pform_cur_generate->add_gate(cur);
+      else
+	    pform_cur_module->add_gate(cur);
 }
 
 void pform_makegates(PGBuiltin::Type type,
@@ -825,6 +920,14 @@ void pform_makegates(PGBuiltin::Type type,
  * constraints, and sometimes different syntax. The X_modgate
  * functions handle the instantiations of modules (and UDP objects) by
  * making PGModule objects.
+ *
+ * The first pform_make_modgate handles the case of a module
+ * instantiated with ports passed by position. The "wires" is an
+ * ordered array of port expressions.
+ *
+ * The second pform_make_modgate handles the case of a module
+ * instantiated with ports passed by name. The "bind" argument is the
+ * ports matched with names.
  */
 static void pform_make_modgate(perm_string type,
 			       perm_string name,
@@ -854,7 +957,10 @@ static void pform_make_modgate(perm_string type,
 	    cur->set_parameters(overrides->by_order);
       }
 
-      pform_cur_module->add_gate(cur);
+      if (pform_cur_generate)
+	    pform_cur_generate->add_gate(cur);
+      else
+	    pform_cur_module->add_gate(cur);
 }
 
 static void pform_make_modgate(perm_string type,
@@ -894,7 +1000,11 @@ static void pform_make_modgate(perm_string type,
 	    cur->set_parameters(overrides->by_order);
       }
 
-      pform_cur_module->add_gate(cur);
+
+      if (pform_cur_generate)
+	    pform_cur_generate->add_gate(cur);
+      else
+	    pform_cur_module->add_gate(cur);
 }
 
 void pform_make_modgates(perm_string type,
@@ -956,7 +1066,11 @@ static PGAssign* pform_make_pgassign(PExpr*lval, PExpr*rval,
       cur->strength0(str.str0);
       cur->strength1(str.str1);
 
-      pform_cur_module->add_gate(cur);
+      if (pform_cur_generate)
+	    pform_cur_generate->add_gate(cur);
+      else
+	    pform_cur_module->add_gate(cur);
+
       return cur;
 }
 
@@ -995,7 +1109,7 @@ void pform_make_pgassign_list(svector<PExpr*>*alist,
 void pform_make_reginit(const struct vlltype&li,
 			const char*name, PExpr*expr)
 {
-      const hname_t sname = hier_name(name);
+      const pform_name_t sname = hier_name(name);
       PWire*cur = pform_cur_module->get_wire(sname);
       if (cur == 0) {
 	    VLerror(li, "internal error: reginit to non-register?");
@@ -1034,11 +1148,11 @@ void pform_module_define_port(const struct vlltype&li,
 			      svector<PExpr*>*range,
 			      svector<named_pexpr_t*>*attr)
 {
-      hname_t name = hier_name(nm);
+      pform_name_t name = hier_name(nm);
       PWire*cur = pform_cur_module->get_wire(name);
       if (cur) {
 	    ostringstream msg;
-	    msg << name << " definition conflicts with "
+	    msg << nm << " definition conflicts with "
 		<< "definition at " << cur->get_line()
 		<< ".";
 	    VLerror(msg.str().c_str());
@@ -1089,31 +1203,37 @@ void pform_module_define_port(const struct vlltype&li,
  * do check to see if the name has already been declared, as this
  * function is called for every declaration.
  */
+
+/*
+ * this is the basic form of pform_makwire. This takes a single simple
+ * name, port type, net type, data type, and attributes, and creates
+ * the variable/net. Other forms of pform_makewire ultimately call
+ * this one to create the wire and stash it.
+ */
 void pform_makewire(const vlltype&li, const char*nm,
 		    NetNet::Type type, NetNet::PortType pt,
 		    ivl_variable_type_t dt,
 		    svector<named_pexpr_t*>*attr)
 {
-      hname_t name = hier_name(nm);
-      PWire*cur = pform_cur_module->get_wire(name);
-      if (cur) {
-	    if ((cur->get_wire_type() != NetNet::IMPLICIT)
-		&& (cur->get_wire_type() != NetNet::IMPLICIT_REG)) {
+      pform_name_t name = hier_name(nm);
+
+      PWire*cur = get_wire_in_module(name);
+
+	// If this is not implicit ("implicit" meaning we don't know
+	// what the type is yet) then  set thay type now.
+      if (cur && type != NetNet::IMPLICIT) {
+	    bool rc = cur->set_wire_type(type);
+	    if (rc == false) {
 		  ostringstream msg;
-		  msg << name << " previously defined at " <<
-			cur->get_line() << ".";
+		  msg << nm << " definition conflicts with "
+		      << "definition at " << cur->get_line()
+		      << ".";
 		  VLerror(msg.str().c_str());
-	    } else {
-		  bool rc = cur->set_wire_type(type);
-		  if (rc == false) {
-			ostringstream msg;
-			msg << name << " definition conflicts with "
-			    << "definition at " << cur->get_line()
-			    << ".";
-			VLerror(msg.str().c_str());
-		  }
+		  cerr << "XXXX type=" << type <<", curtype=" << cur->get_wire_type() << endl;
 	    }
 
+      }
+      if (cur) {
 	    cur->set_file(li.text);
 	    cur->set_lineno(li.first_line);
 	    return;
@@ -1130,9 +1250,17 @@ void pform_makewire(const vlltype&li, const char*nm,
 	    }
       }
 
-      pform_cur_module->add_wire(cur);
+      if (pform_cur_generate)
+	    pform_cur_generate->add_wire(cur);
+      else
+	    pform_cur_module->add_wire(cur);
 }
 
+/*
+ * This form takes a list of names and some type information, and
+ * generates a bunch of variables/nets. We hse the basic
+ * pform_makewire above.
+ */
 void pform_makewire(const vlltype&li,
 		    svector<PExpr*>*range,
 		    bool signed_flag,
@@ -1155,6 +1283,9 @@ void pform_makewire(const vlltype&li,
 	    delete range;
 }
 
+/*
+ * This form makes nets with delays and continuous assignments.
+ */
 void pform_makewire(const vlltype&li,
 		    svector<PExpr*>*range,
 		    bool signed_flag,
@@ -1173,10 +1304,11 @@ void pform_makewire(const vlltype&li,
 	    pform_makewire(li, first->name, type, NetNet::NOT_A_PORT, dt, 0);
 	    pform_set_net_range(first->name, range, signed_flag, dt);
 
-	    hname_t name = hier_name(first->name);
-	    PWire*cur = pform_cur_module->get_wire(name);
+	    perm_string first_name = lex_strings.make(first->name);
+	    pform_name_t name = hier_name(first_name);
+	    PWire*cur = get_wire_in_module(name);
 	    if (cur != 0) {
-		  PEIdent*lval = new PEIdent(hname_t(first->name));
+		  PEIdent*lval = new PEIdent(first_name);
 		  lval->set_file(li.text);
 		  lval->set_lineno(li.first_line);
 		  PGAssign*ass = pform_make_pgassign(lval, first->expr,
@@ -1194,7 +1326,7 @@ void pform_makewire(const vlltype&li,
 void pform_set_port_type(perm_string nm, NetNet::PortType pt,
 			 const char*file, unsigned lineno)
 {
-      hname_t name = hier_name(nm);
+      pform_name_t name = hier_name(nm);
       PWire*cur = pform_cur_module->get_wire(name);
       if (cur == 0) {
 	    cur = new PWire(name, NetNet::IMPLICIT, NetNet::PIMPLICIT, IVL_VT_LOGIC);
@@ -1211,14 +1343,14 @@ void pform_set_port_type(perm_string nm, NetNet::PortType pt,
 
 	  case NetNet::NOT_A_PORT:
 	    cerr << file << ":" << lineno << ": error: "
-		 << "port " << name << " is not in the port list."
+		 << "port " << nm << " is not in the port list."
 		 << endl;
 	    error_count += 1;
 	    break;
 
 	  default:
 	    cerr << file << ":" << lineno << ": error: "
-		 << "port " << name << " already has a port declaration."
+		 << "port " << nm << " already has a port declaration."
 		 << endl;
 	    error_count += 1;
 	    break;
@@ -1266,6 +1398,7 @@ void pform_set_port_type(perm_string nm, NetNet::PortType pt,
  * no output or inout ports.
  */
 svector<PWire*>*pform_make_task_ports(NetNet::PortType pt,
+				      ivl_variable_type_t vtype,
 				      bool signed_flag,
 				      svector<PExpr*>*range,
 				      list<perm_string>*names,
@@ -1278,7 +1411,7 @@ svector<PWire*>*pform_make_task_ports(NetNet::PortType pt,
 		 ; cur != names->end() ; cur ++ ) {
 
 	    perm_string txt = *cur;
-	    hname_t name = hier_name(txt);
+	    pform_name_t name = hier_name(txt);
 
 	      /* Look for a preexisting wire. If it exists, set the
 		 port direction. If not, create it. */
@@ -1286,8 +1419,7 @@ svector<PWire*>*pform_make_task_ports(NetNet::PortType pt,
 	    if (curw) {
 		  curw->set_port_type(pt);
 	    } else {
-		  curw = new PWire(name, NetNet::IMPLICIT_REG, pt,
-				   IVL_VT_LOGIC);
+		  curw = new PWire(name, NetNet::IMPLICIT_REG, pt, vtype);
 		  curw->set_file(file);
 		  curw->set_lineno(lineno);
 		  pform_cur_module->add_wire(curw);
@@ -1324,7 +1456,7 @@ void pform_set_function(perm_string name, PFunction*func)
 
 void pform_set_attrib(perm_string name, perm_string key, char*value)
 {
-      hname_t path (name);
+      pform_name_t path = hier_name(name);
 
       if (PWire*cur = pform_cur_module->get_wire(path)) {
 	    cur->attributes[key] = new PEString(value);
@@ -1417,20 +1549,76 @@ void pform_set_specparam(perm_string name, PExpr*expr)
       pform_cur_module->specparams[name] = expr;
 }
 
-void pform_set_defparam(const hname_t&name, PExpr*expr)
+void pform_set_defparam(const pform_name_t&name, PExpr*expr)
 {
       assert(expr);
       pform_cur_module->defparms[name] = expr;
 }
 
 /*
- * XXXX Not implemented yet.
+ * Specify paths.
  */
-extern void pform_make_specify_path(list<perm_string>*src, char pol,
-				    bool full_flag, list<perm_string>*dst)
+extern PSpecPath* pform_make_specify_path(const struct vlltype&li,
+					  list<perm_string>*src, char pol,
+					  bool full_flag, list<perm_string>*dst)
 {
+      PSpecPath*path = new PSpecPath(src->size(), dst->size());
+      path->set_file(li.text);
+      path->set_lineno(li.first_line);
+
+      unsigned idx;
+      list<perm_string>::const_iterator cur;
+
+      idx = 0;
+      for (idx = 0, cur = src->begin() ;  cur != src->end() ;  idx++, cur++) {
+	    path->src[idx] = *cur;
+      }
+      assert(idx == path->src.size());
       delete src;
+
+      for (idx = 0, cur = dst->begin() ;  cur != dst->end() ;  idx++, cur++) {
+	    path->dst[idx] = *cur;
+      }
+      assert(idx == path->dst.size());
       delete dst;
+
+      return path;
+}
+
+extern PSpecPath*pform_make_specify_edge_path(const struct vlltype&li,
+					 int edge_flag, /*posedge==true */
+					 list<perm_string>*src, char pol,
+					 bool full_flag, list<perm_string>*dst,
+					 PExpr*data_source_expression)
+{
+      PSpecPath*tmp = pform_make_specify_path(li, src, pol, full_flag, dst);
+      tmp->edge = edge_flag;
+      tmp->data_source_expression = data_source_expression;
+      return tmp;
+}
+
+extern PSpecPath* pform_assign_path_delay(PSpecPath*path, svector<PExpr*>*del)
+{
+      if (path == 0)
+	    return 0;
+
+      assert(path->delays.size() == 0);
+
+      path->delays.resize(del->count());
+      for (unsigned idx = 0 ;  idx < path->delays.size() ;  idx += 1)
+	    path->delays[idx] = (*del)[idx];
+
+      delete del;
+
+      return path;
+}
+
+
+extern void pform_module_specify_path(PSpecPath*obj)
+{
+      if (obj == 0)
+	    return;
+      pform_cur_module->specify_paths.push_back(obj);
 }
 
 void pform_set_port_type(const struct vlltype&li,
@@ -1455,7 +1643,7 @@ void pform_set_port_type(const struct vlltype&li,
 
 static void pform_set_reg_integer(const char*nm)
 {
-      hname_t name = hier_name(nm);
+      pform_name_t name = hier_name(nm);
       PWire*cur = pform_cur_module->get_wire(name);
       if (cur == 0) {
 	    cur = new PWire(name, NetNet::INTEGER,
@@ -1471,8 +1659,8 @@ static void pform_set_reg_integer(const char*nm)
       }
       assert(cur);
 
-      cur->set_range(new PENumber(new verinum(INTEGER_WIDTH-1, INTEGER_WIDTH)),
-		     new PENumber(new verinum(0UL, INTEGER_WIDTH)));
+      cur->set_range(new PENumber(new verinum(integer_width-1, integer_width)),
+		     new PENumber(new verinum((uint64_t)0, integer_width)));
       cur->set_signed(true);
 }
 
@@ -1489,7 +1677,7 @@ void pform_set_reg_integer(list<perm_string>*names)
 
 static void pform_set_reg_time(const char*nm)
 {
-      hname_t name = hier_name(nm);
+      pform_name_t name = hier_name(nm);
       PWire*cur = pform_cur_module->get_wire(name);
       if (cur == 0) {
 	    cur = new PWire(name, NetNet::REG, NetNet::NOT_A_PORT, IVL_VT_LOGIC);
@@ -1502,8 +1690,8 @@ static void pform_set_reg_time(const char*nm)
       }
       assert(cur);
 
-      cur->set_range(new PENumber(new verinum(TIME_WIDTH-1, INTEGER_WIDTH)),
-		     new PENumber(new verinum(0UL, INTEGER_WIDTH)));
+      cur->set_range(new PENumber(new verinum(TIME_WIDTH-1, integer_width)),
+		     new PENumber(new verinum((uint64_t)0, integer_width)));
 }
 
 void pform_set_reg_time(list<perm_string>*names)
@@ -1526,7 +1714,9 @@ svector<PWire*>* pform_make_udp_input_ports(list<perm_string>*names)
 		 ; cur != names->end()
 		 ; cur ++ ) {
 	    perm_string txt = *cur;
-	    PWire*pp = new PWire(hname_t(txt),
+	    pform_name_t tmp;
+	    tmp.push_back(name_component_t(txt));
+	    PWire*pp = new PWire(tmp,
 				 NetNet::IMPLICIT,
 				 NetNet::PINPUT,
 				 IVL_VT_LOGIC);
@@ -1551,7 +1741,11 @@ PProcess* pform_make_behavior(PProcess::Type type, Statement*st,
 	    delete attr;
       }
 
-      pform_cur_module->add_behavior(pp);
+      if (pform_cur_generate)
+	    pform_cur_generate->add_behavior(pp);
+      else
+	    pform_cur_module->add_behavior(pp);
+
       return pp;
 }
 
@@ -1596,6 +1790,55 @@ int pform_parse(const char*path, FILE*file)
 
 /*
  * $Log: pform.cc,v $
+ * Revision 1.148  2007/06/12 04:05:45  steve
+ *  Put instantiated modules in the proper generated scope.
+ *
+ * Revision 1.147  2007/06/02 03:42:13  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.146  2007/05/24 04:07:12  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.145  2007/04/26 03:06:22  steve
+ *  Rework hname_t to use perm_strings.
+ *
+ * Revision 1.144  2007/04/19 02:52:53  steve
+ *  Add support for -v flag in command file.
+ *
+ * Revision 1.143  2007/04/13 02:34:35  steve
+ *  Parse edge sensitive paths without edge specifier.
+ *
+ * Revision 1.142  2007/03/07 04:24:59  steve
+ *  Make integer width controllable.
+ *
+ * Revision 1.141  2007/03/05 05:59:10  steve
+ *  Handle processes within generate loops.
+ *
+ * Revision 1.140  2007/02/12 01:52:21  steve
+ *  Parse all specify paths to pform.
+ *
+ * Revision 1.139  2007/01/27 05:36:11  steve
+ *  Fix padding of x when literal is sized and unsigned.
+ *
+ * Revision 1.138  2007/01/16 05:44:15  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
+ *
+ * Revision 1.137  2006/09/23 04:57:19  steve
+ *  Basic support for specify timing.
+ *
+ * Revision 1.136  2006/08/08 05:11:37  steve
+ *  Handle 64bit delay constants.
+ *
+ * Revision 1.135  2006/04/10 00:37:42  steve
+ *  Add support for generate loops w/ wires and gates.
+ *
+ * Revision 1.134  2006/03/30 05:22:34  steve
+ *  task/function ports can have types.
+ *
  * Revision 1.133  2005/07/11 16:56:51  steve
  *  Remove NetVariable and ivl_variable_t structures.
  *

pform.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: pform.h,v 1.83 2005/07/07 16:22:49 steve Exp $"
+#ident "$Id: pform.h,v 1.91 2007/05/24 04:07:12 steve Exp $"
 #endif
 
 # include  "netlist.h"
@@ -57,6 +57,7 @@
  */
 class PGate;
 class PExpr;
+class PSpecPath;
 struct vlltype;
 
 /*
@@ -68,6 +69,12 @@ extern enum MIN_TYP_MAX { MIN, TYP, MAX } min_typ_max_flag;
 extern unsigned min_typ_max_warn;
 PExpr* pform_select_mtm_expr(PExpr*min, PExpr*typ, PExpr*max);
 
+/*
+ * This flag is true if the lexor thinks we are in a library source
+ * file.
+ */
+extern bool pform_library_flag;
+
 /*
  * These type are lexical types -- that is, types that are used as
  * lexical values to decorate the parse tree during parsing. They are
@@ -77,7 +84,8 @@ PExpr* pform_select_mtm_expr(PExpr*min, PExpr*typ, PExpr*max);
 /* This is information about port name information for named port
    connections. */
 
-typedef struct named<PExpr*> named_pexpr_t;
+//typedef struct named<PExpr*> named_pexpr_t;
+typedef named<PExpr*> named_pexpr_t;
 
 struct parmvalue_t {
       svector<PExpr*>*by_order;
@@ -166,6 +174,22 @@ extern void pform_pop_scope();
 extern verinum* pform_verinum_with_size(verinum*s, verinum*val,
 					const char*file, unsigned loneno);
 
+/*
+ * This function takes the list of names as new genvars to declare in
+ * the current module scope.
+ */
+extern void pform_genvars(list<perm_string>*names);
+
+extern void pform_start_generate_for(const struct vlltype&li,
+				     char*ident1,
+				     PExpr*init,
+				     PExpr*test,
+				     char*ident2,
+				     PExpr*next);
+extern void pform_generate_block_name(char*name);
+extern void pform_endgenerate();
+
+
 /*
  * The makewire functions announce to the pform code new wires. These
  * go into a module that is currently opened.
@@ -237,14 +261,24 @@ extern void pform_set_localparam(perm_string name,
 				bool signed_flag,
 				svector<PExpr*>*range,
 				 PExpr*expr);
-extern void pform_set_defparam(const hname_t&name, PExpr*expr);
+extern void pform_set_defparam(const pform_name_t&name, PExpr*expr);
 
 /*
  * Functions related to specify blocks.
  */
 extern void pform_set_specparam(perm_string name, PExpr*expr);
-extern void pform_make_specify_path(list<perm_string>*src, char pol,
-				    bool full_flag, list<perm_string>*dst);
+
+extern PSpecPath*pform_make_specify_path(const struct vlltype&li,
+					 list<perm_string>*src, char pol,
+					 bool full_flag, list<perm_string>*dst);
+extern PSpecPath*pform_make_specify_edge_path(const struct vlltype&li,
+					 int edge_flag, /*posedge==true */
+					 list<perm_string>*src, char pol,
+					 bool full_flag, list<perm_string>*dst,
+					 PExpr*data_source_expression);
+extern PSpecPath*pform_assign_path_delay(PSpecPath*obj, svector<PExpr*>*delays);
+
+extern void pform_module_specify_path(PSpecPath*obj);
 
 /*
  * pform_make_behavior creates processes that are declared with always
@@ -288,6 +322,7 @@ extern void pform_make_pgassign_list(svector<PExpr*>*alist,
 /* Given a port type and a list of names, make a list of wires that
    can be used as task port information. */
 extern svector<PWire*>*pform_make_task_ports(NetNet::PortType pt,
+					     ivl_variable_type_t vtype,
 					     bool signed_flag,
 					     svector<PExpr*>*range,
 					     list<perm_string>*names,
@@ -305,6 +340,31 @@ extern void pform_dump(ostream&out, Module*mod);
 
 /*
  * $Log: pform.h,v $
+ * Revision 1.91  2007/05/24 04:07:12  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.90  2007/04/19 02:52:53  steve
+ *  Add support for -v flag in command file.
+ *
+ * Revision 1.89  2007/04/13 02:34:35  steve
+ *  Parse edge sensitive paths without edge specifier.
+ *
+ * Revision 1.88  2007/02/12 01:52:21  steve
+ *  Parse all specify paths to pform.
+ *
+ * Revision 1.87  2006/09/23 04:57:19  steve
+ *  Basic support for specify timing.
+ *
+ * Revision 1.86  2006/04/10 00:37:42  steve
+ *  Add support for generate loops w/ wires and gates.
+ *
+ * Revision 1.85  2006/03/30 05:22:34  steve
+ *  task/function ports can have types.
+ *
+ * Revision 1.84  2005/12/05 21:21:18  steve
+ *  Fixes for stubborn compilers.
+ *
  * Revision 1.83  2005/07/07 16:22:49  steve
  *  Generalize signals to carry types.
  *

pform_dump.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1998-2004 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 1998-2006 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: pform_dump.cc,v 1.91 2005/10/04 04:09:26 steve Exp $"
+#ident "$Id: pform_dump.cc,v 1.101 2007/06/04 02:19:07 steve Exp $"
 #endif
 
 # include "config.h"
@@ -30,6 +30,8 @@
  */
 # include  "pform.h"
 # include  "PEvent.h"
+# include  "PGenerate.h"
+# include  "PSpec.h"
 # include  <iostream>
 # include  <iomanip>
 # include  <typeinfo>
@@ -70,6 +72,65 @@ ostream& operator<< (ostream&o, PGate::strength_t str)
       return o;
 }
 
+ostream& operator<< (ostream&out, perm_string that)
+{
+      out << that.str();
+      return out;
+}
+
+ostream& operator<< (ostream&out, const index_component_t&that)
+{
+      out << "[";
+      switch (that.sel) {
+	  case index_component_t::SEL_BIT:
+	    out << *that.msb;
+	    break;
+	  case index_component_t::SEL_PART:
+	    out << *that.msb << ":" << *that.lsb;
+	    break;
+	  case index_component_t::SEL_IDX_UP:
+	    out << *that.msb << "+:" << *that.lsb;
+	    break;
+	  case index_component_t::SEL_IDX_DO:
+	    out << *that.msb << "-:" << *that.lsb;
+	    break;
+	  default:
+	    out << "???";
+	    break;
+      }
+      out << "]";
+      return out;
+ }
+
+ostream& operator<< (ostream&out, const name_component_t&that)
+{
+      out << that.name.str();
+
+      typedef std::list<index_component_t>::const_iterator index_it_t;
+      for (index_it_t idx = that.index.begin()
+		 ; idx != that.index.end() ;  idx++) {
+
+	    out << *idx;
+      }
+      return out;
+}
+
+ostream& operator<< (ostream&o, const pform_name_t&that)
+{
+      pform_name_t::const_iterator cur;
+
+      cur = that.begin();
+      o << *cur;
+
+      cur++;
+      while (cur != that.end()) {
+	    o << "." << *cur;
+	    cur++;
+      }
+
+      return o;
+}
+
 void PExpr::dump(ostream&out) const
 {
       out << typeid(*this).name();
@@ -143,24 +204,6 @@ void PENumber::dump(ostream&out) const
 void PEIdent::dump(ostream&out) const
 {
       out << path_;
-      if (msb_) {
-	    out << "[" << *msb_;
-	    if (lsb_) switch (sel_) {
-		case SEL_IDX_UP:
-		  out << "+:" << *lsb_;
-		  break;
-		case SEL_IDX_DO:
-		  out << "-:" << *lsb_;
-		  break;
-		case SEL_PART:
-		  out << ":" << *lsb_;
-		  break;
-		default:
-		  out << ":?:" << *lsb_;
-		  break;
-	    }
-	    out << "]";
-      }
 }
 
 void PEString::dump(ostream&out) const
@@ -211,9 +254,9 @@ void PEBinary::dump(ostream&out) const
 }
 
 
-void PWire::dump(ostream&out) const
+void PWire::dump(ostream&out, unsigned ind) const
 {
-      out << "    " << type_;
+      out << setw(ind) << "" << type_;
 
       switch (port_type_) {
 	  case NetNet::PIMPLICIT:
@@ -303,9 +346,9 @@ void PGate::dump_delays(ostream&out) const
       delay_.dump_delays(out);
 }
 
-void PGate::dump(ostream&out) const
+void PGate::dump(ostream&out, unsigned ind) const
 {
-      out << "    " << typeid(*this).name() << " ";
+      out << setw(ind) << "" << typeid(*this).name() << " ";
       delay_.dump_delays(out);
       out << " " << get_name() << "(";
       dump_pins(out);
@@ -313,45 +356,47 @@ void PGate::dump(ostream&out) const
 
 }
 
-void PGAssign::dump(ostream&out) const
+void PGAssign::dump(ostream&out, unsigned ind) const
 {
-      out << "    assign (" << strength0() << "0 " << strength1() << "1) ";
+      out << setw(ind) << "";
+      out << "assign (" << strength0() << "0 " << strength1() << "1) ";
       dump_delays(out);
       out << " " << *pin(0) << " = " << *pin(1) << ";" << endl;
 }
 
-void PGBuiltin::dump(ostream&out) const
+void PGBuiltin::dump(ostream&out, unsigned ind) const
 {
+      out << setw(ind) << "";
       switch (type()) {
 	  case PGBuiltin::BUFIF0:
-	    out << "    bufif0 ";
+	    out << "bufif0 ";
 	    break;
 	  case PGBuiltin::BUFIF1:
-	    out << "    bufif1 ";
+	    out << "bufif1 ";
 	    break;
 	  case PGBuiltin::NOTIF0:
-	    out << "    bufif0 ";
+	    out << "bufif0 ";
 	    break;
 	  case PGBuiltin::NOTIF1:
-	    out << "    bufif1 ";
+	    out << "bufif1 ";
 	    break;
 	  case PGBuiltin::NAND:
-	    out << "    nand ";
+	    out << "nand ";
 	    break;
 	  case PGBuiltin::NMOS:
-	    out << "    nmos ";
+	    out << "nmos ";
 	    break;
 	  case PGBuiltin::RNMOS:
-	    out << "    rnmos ";
+	    out << "rnmos ";
 	    break;
 	  case PGBuiltin::RPMOS:
-	    out << "    rpmos ";
+	    out << "rpmos ";
 	    break;
 	  case PGBuiltin::PMOS:
-	    out << "    pmos ";
+	    out << "pmos ";
 	    break;
 	  default:
-	    out << "    builtin gate ";
+	    out << "builtin gate ";
       }
 
       out << "(" << strength0() << "0 " << strength1() << "1) ";
@@ -367,9 +412,9 @@ void PGBuiltin::dump(ostream&out) const
       out << ");" << endl;
 }
 
-void PGModule::dump(ostream&out) const
+void PGModule::dump(ostream&out, unsigned ind) const
 {
-      out << "    " << type_ << " ";
+      out << setw(ind) << "" << type_ << " ";
 
 	// If parameters are overridden by order, dump them.
       if (overrides_) {
@@ -620,6 +665,9 @@ void PFunction::dump(ostream&out, unsigned ind) const
 	  case PTF_REG:
 	    out << "reg ";
 	    break;
+	  case PTF_REG_S:
+	    out << "reg_s ";
+	    break;
 	  case PTF_INTEGER:
 	    out << "integer ";
 	    break;
@@ -731,6 +779,98 @@ void PProcess::dump(ostream&out, unsigned ind) const
       statement_->dump(out, ind+2);
 }
 
+void PSpecPath::dump(std::ostream&out, unsigned ind) const
+{
+      out << setw(ind) << "" << "specify path ";
+
+      if (condition)
+	    out << "if (" << *condition << ") ";
+
+      out << "(";
+      if (edge) {
+	    if (edge > 0)
+		  out << "posedge ";
+	    else
+		  out << "negedge ";
+      }
+
+      for (unsigned idx = 0 ;  idx < src.size() ;  idx += 1) {
+	    if (idx > 0) out << ", ";
+	    assert(src[idx]);
+	    out << src[idx];
+      }
+
+      out << " => ";
+
+      if (data_source_expression)
+	    out << "(";
+
+      for (unsigned idx = 0 ; idx < dst.size() ;  idx += 1) {
+	    if (idx > 0) out << ", ";
+	    assert(dst[idx]);
+	    out << dst[idx];
+      }
+
+      if (data_source_expression)
+	    out << " : " << *data_source_expression << ")";
+
+      out << ") = (";
+      for (unsigned idx = 0 ;  idx < delays.size() ;  idx += 1) {
+	    if (idx > 0) out << ", ";
+	    assert(delays[idx]);
+	    out << *delays[idx];
+      }
+      out << ");" << endl;
+}
+
+void PGenerate::dump(ostream&out, unsigned indent) const
+{
+      out << setw(indent) << "" << "generate(" << id_number << ")";
+
+      switch (scheme_type) {
+	  case GS_NONE:
+	    break;
+	  case GS_LOOP:
+	    out << " for ("
+		<< loop_index
+		<< "=" << *loop_init
+		<< "; " << *loop_test
+		<< "; " << loop_index
+		<< "=" << *loop_step << ")";
+	    break;
+	  case GS_CONDIT:
+	    break;
+      }
+
+      if (scope_name)
+	    out << " : " << scope_name;
+
+      out << endl;
+
+      for (map<pform_name_t,PWire*>::const_iterator idx = wires.begin()
+		 ; idx != wires.end() ;  idx++) {
+
+	    (*idx).second->dump(out, indent+2);
+      }
+
+      for (list<PGate*>::const_iterator idx = gates.begin()
+		 ; idx != gates.end() ;  idx++) {
+	    (*idx)->dump(out, indent+2);
+      }
+
+      for (list<PProcess*>::const_iterator idx = behaviors.begin()
+		 ; idx != behaviors.end() ;  idx++) {
+	    (*idx)->dump(out, indent+2);
+      }
+
+      for (list<PGenerate*>::const_iterator idx = generates.begin()
+		 ; idx != generates.end() ;  idx++) {
+	    (*idx)->dump(out, indent+2);
+      }
+
+      out << "    endgenerate" << endl;
+}
+
 void Module::dump(ostream&out) const
 {
       if (attributes.begin() != attributes.end()) {
@@ -767,7 +907,7 @@ void Module::dump(ostream&out) const
       }
 
       typedef map<perm_string,param_expr_t>::const_iterator parm_iter_t;
-      typedef map<hname_t,PExpr*>::const_iterator parm_hiter_t;
+      typedef map<pform_name_t,PExpr*>::const_iterator parm_hiter_t;
       for (parm_iter_t cur = parameters.begin()
 		 ; cur != parameters.end() ; cur ++) {
 	    out << "    parameter ";
@@ -796,6 +936,18 @@ void Module::dump(ostream&out) const
 		  out << "/* ERROR */;" << endl;
       }
 
+      typedef list<perm_string>::const_iterator genvar_iter_t;
+      for (genvar_iter_t cur = genvars.begin()
+		 ; cur != genvars.end() ; cur++) {
+	    out << "    genvar " << (*cur) << ";" << endl;
+      }
+
+      typedef list<PGenerate*>::const_iterator genscheme_iter_t;
+      for (genscheme_iter_t cur = generate_schemes.begin()
+		 ; cur != generate_schemes.end() ; cur++) {
+	    (*cur)->dump(out, 4);
+      }
+
       typedef map<perm_string,PExpr*>::const_iterator specparm_iter_t;
       for (specparm_iter_t cur = specparams.begin()
 		 ; cur != specparams.end() ; cur ++) {
@@ -820,7 +972,7 @@ void Module::dump(ostream&out) const
       }
 
 	// Iterate through and display all the wires.
-      for (map<hname_t,PWire*>::const_iterator wire = wires_.begin()
+      for (map<pform_name_t,PWire*>::const_iterator wire = wires_.begin()
 		 ; wire != wires_.end()
 		 ; wire ++ ) {
 
@@ -862,6 +1014,13 @@ void Module::dump(ostream&out) const
 	    (*behav)->dump(out, 4);
       }
 
+      for (list<PSpecPath*>::const_iterator spec = specify_paths.begin()
+		 ; spec != specify_paths.end()
+		 ; spec ++ ) {
+
+	    (*spec)->dump(out, 4);
+      }
+
       out << "endmodule" << endl;
 }
 
@@ -914,6 +1073,37 @@ void PUdp::dump(ostream&out) const
 
 /*
  * $Log: pform_dump.cc,v $
+ * Revision 1.101  2007/06/04 02:19:07  steve
+ *  Handle bit/part select of array words in nets.
+ *
+ * Revision 1.100  2007/06/02 03:42:13  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.99  2007/05/31 18:35:50  steve
+ *  Missing return value to perm_string dump
+ *
+ * Revision 1.98  2007/05/24 04:07:12  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.97  2007/03/07 00:38:15  steve
+ *  Lint fixes.
+ *
+ * Revision 1.96  2007/03/05 05:59:10  steve
+ *  Handle processes within generate loops.
+ *
+ * Revision 1.95  2007/02/12 01:52:21  steve
+ *  Parse all specify paths to pform.
+ *
+ * Revision 1.94  2006/09/23 04:57:19  steve
+ *  Basic support for specify timing.
+ *
+ * Revision 1.93  2006/04/28 04:19:31  steve
+ *  Dump indexes of ident expressions
+ *
+ * Revision 1.92  2006/04/10 00:37:42  steve
+ *  Add support for generate loops w/ wires and gates.
+ *
  * Revision 1.91  2005/10/04 04:09:26  steve
  *  Add support for indexed select attached to parameters.
  *

pform_types.cc

@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2007 Stephen Williams (steve@icarus.com)
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: pform_types.cc,v 1.1 2007/05/24 04:07:12 steve Exp $"
+#endif
+
+
+# include  "pform_types.h"
+
+bool operator < (const name_component_t&lef, const name_component_t&rig)
+{
+      if (lef.name < rig.name)
+	    return true;
+
+      return false;
+}

pform_types.h

@@ -0,0 +1,74 @@
+#ifndef __pform_types_H
+#define __pform_types_H
+/*
+ * Copyright (c) 2007 Stephen Williams (steve@icarus.com)
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: pform_types.h,v 1.2 2007/06/04 02:19:07 steve Exp $"
+#endif
+
+// This for the perm_string type.
+# include  "StringHeap.h"
+# include  <iostream>
+# include  <list>
+
+/*
+ * parse-form types.
+ */
+
+struct index_component_t {
+      enum ctype_t { SEL_NONE, SEL_BIT, SEL_PART, SEL_IDX_UP, SEL_IDX_DO };
+
+      index_component_t() : sel(SEL_NONE), msb(0), lsb(0) { };
+      ~index_component_t() { }
+
+      ctype_t sel;
+      class PExpr*msb;
+      class PExpr*lsb;
+};
+
+struct name_component_t {
+      explicit name_component_t(perm_string n) : name(n) { }
+      ~name_component_t() { }
+
+      perm_string name;
+      std::list<index_component_t>index;
+};
+
+extern bool operator < (const name_component_t&lef, const name_component_t&rig);
+
+/*
+ * The pform_name_t is the general form for a heirarchical identifier.
+ */
+typedef std::list<name_component_t> pform_name_t;
+
+inline perm_string peek_head_name(const pform_name_t&that)
+{
+      return that.front().name;
+}
+
+inline perm_string peek_tail_name(const pform_name_t&that)
+{
+      return that.back().name;
+}
+
+extern std::ostream& operator<< (std::ostream&out, const pform_name_t&);
+extern std::ostream& operator<< (std::ostream&out, const name_component_t&that);
+extern std::ostream& operator<< (std::ostream&out, const index_component_t&that);
+
+#endif

set_width.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999-2003 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 1999-2006 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: set_width.cc,v 1.36 2005/05/17 20:56:55 steve Exp $"
+#ident "$Id: set_width.cc,v 1.42 2007/01/16 05:44:15 steve Exp $"
 #endif
 
 # include "config.h"
@@ -33,10 +33,11 @@
  */
 # include  "netlist.h"
 # include  "netmisc.h"
+# include  "compiler.h"
 # include  <typeinfo>
 
 
-bool NetExpr::set_width(unsigned w)
+bool NetExpr::set_width(unsigned w, bool)
 {
       cerr << get_line() << ": internal warning:  "
 	   <<typeid(*this).name() << ": set_width(unsigned) "
@@ -45,7 +46,7 @@ bool NetExpr::set_width(unsigned w)
       return false;
 }
 
-bool NetEBinary::set_width(unsigned w)
+bool NetEBinary::set_width(unsigned w, bool)
 {
       bool flag = true;
       switch (op_) {
@@ -80,7 +81,7 @@ bool NetEBinary::set_width(unsigned w)
  * The bitwise logical operators have operands the same size as the
  * result. Anything else is a mess.
  */
-bool NetEBAdd::set_width(unsigned w)
+bool NetEBAdd::set_width(unsigned w, bool)
 {
 
       unsigned wid = w;
@@ -113,7 +114,7 @@ bool NetEBAdd::set_width(unsigned w)
  * result. Anything else is a mess. I first try to get the operands to
  * shrink to the desired size. I then expand operands that are too small.
  */
-bool NetEBBits::set_width(unsigned w)
+bool NetEBBits::set_width(unsigned w, bool)
 {
 	/* First, give the operands a chance to adjust themselves to
 	   the requested width. */
@@ -153,7 +154,7 @@ bool NetEBBits::set_width(unsigned w)
  * their own natural width, but the comparison operator result has a
  * fixed width of 1.
  */
-bool NetEBComp::set_width(unsigned w)
+bool NetEBComp::set_width(unsigned w, bool)
 {
       return (w == 1);
 }
@@ -162,12 +163,12 @@ bool NetEBComp::set_width(unsigned w)
  * There is nothing we can do to the operands of a division to make it
  * confirm to the requested width. Force the context to pad or truncate.
  */
-bool NetEBDiv::set_width(unsigned w)
+bool NetEBDiv::set_width(unsigned w, bool)
 {
       return w == expr_width();
 }
 
-bool NetEBLogic::set_width(unsigned w)
+bool NetEBLogic::set_width(unsigned w, bool)
 {
       bool flag;
       flag = left_->set_width(right_->expr_width());
@@ -180,17 +181,23 @@ bool NetEBLogic::set_width(unsigned w)
  * There is nothing we can do to the operands of a multiply to make it
  * confirm to the requested width. Force the context to pad or truncate.
  */
-bool NetEBMult::set_width(unsigned w)
+bool NetEBMult::set_width(unsigned w, bool)
 {
       return w == expr_width();
 }
 
+bool NetEBPow::set_width(unsigned w, bool last_chance)
+{
+      bool flag = left_->set_width(w, last_chance);
+      return flag;
+}
+
 /*
  * The shift operator allows the shift amount to have its own
  * natural width. The width of the operator result is the width of the
  * left operand, the value that is to be shifted.
  */
-bool NetEBShift::set_width(unsigned w)
+bool NetEBShift::set_width(unsigned w, bool)
 {
       bool flag = true;
 
@@ -228,7 +235,7 @@ bool NetEBShift::set_width(unsigned w)
  * matter because the null expression is indication of an error and
  * the compiler will not go beyond elaboration.
  */
-bool NetEConcat::set_width(unsigned w)
+bool NetEConcat::set_width(unsigned w, bool)
 {
       unsigned sum = 0;
       for (unsigned idx = 0 ;  idx < parms_.count() ;  idx += 1)
@@ -241,7 +248,7 @@ bool NetEConcat::set_width(unsigned w)
       return true;
 }
 
-bool NetEConst::set_width(unsigned w)
+bool NetEConst::set_width(unsigned w, bool last_chance)
 {
       if (w == value_.len()) {
 	    expr_width(w);
@@ -289,17 +296,19 @@ bool NetEConst::set_width(unsigned w)
 		  ? value_[value_.len() - 1]
 		  : verinum::V0;
 
-	      // Don't reduce a number too small to hold all the
-	      // significant bits.
-	    for (unsigned idx = w ;  idx < value_.len() ;  idx += 1)
-		  if (value_[idx] != pad_bit)
-			use_w = idx+1;
+	    if (! last_chance) {
+		    // Don't reduce a number too small to hold all the
+		    // significant bits.
+		  for (unsigned idx = w ;  idx < value_.len() ;  idx += 1)
+			if (value_[idx] != pad_bit)
+			      use_w = idx+1;
 
-	      // Correct for the special case of signed value. We
-	      // cannot have the result change sign on us.
-	    if (value_.has_sign() && (use_w < value_.len())
-		&& (value_[use_w-1] != pad_bit))
-		use_w += 1;
+		    // Correct for the special case of signed value. We
+		    // cannot have the result change sign on us.
+		  if (value_.has_sign() && (use_w < value_.len())
+		      && (value_[use_w-1] != pad_bit))
+			use_w += 1;
+	    }
 
 	    verinum tmp (verinum::V0, use_w, has_width());
 	    for (unsigned idx = 0 ;  idx < use_w ;  idx += 1)
@@ -316,7 +325,7 @@ bool NetEConst::set_width(unsigned w)
  * Parameter vectors cannot be resized because they refer to a common
  * value.
  */
-bool NetEConstParam::set_width(unsigned w)
+bool NetEConstParam::set_width(unsigned w, bool)
 {
       return w == expr_width();
 }
@@ -326,13 +335,13 @@ bool NetEConstParam::set_width(unsigned w)
  * because it isn't really a vector. The environment will convert this
  * to a vector at the right time.
  */
-bool NetECReal::set_width(unsigned w)
+bool NetECReal::set_width(unsigned w, bool)
 {
       expr_width(w);
       return true;
 }
-
-bool NetEMemory::set_width(unsigned w)
+#if 0
+bool NetEMemory::set_width(unsigned w, bool)
 {
       if (w != mem_->width())
 	    return false;
@@ -340,13 +349,21 @@ bool NetEMemory::set_width(unsigned w)
       expr_width(w);
       return true;
 }
-
-bool NetEParam::set_width(unsigned)
+#endif
+bool NetEParam::set_width(unsigned, bool)
 {
       return false;
 }
 
-bool NetESFunc::set_width(unsigned w)
+bool NetESelect::set_width(unsigned w, bool)
+{
+      if (expr_width() == 1)
+	    return true;
+      else
+	    return false;
+}
+
+bool NetESFunc::set_width(unsigned w, bool)
 {
       return w == expr_width();
 }
@@ -355,19 +372,29 @@ bool NetESFunc::set_width(unsigned w)
  * The signal should automatically pad with zeros to get to the desired
  * width. Do not allow signal bits to be truncated, however.
  */
-bool NetESignal::set_width(unsigned w)
+bool NetESignal::set_width(unsigned w, bool)
 {
-      if (w != bit_count())
+      if (w != vector_width())
 	    return false;
 
       return true;
 }
 
-bool NetETernary::set_width(unsigned w)
+bool NetETernary::set_width(unsigned w, bool last_chance)
 {
       bool flag = true;
-      flag = flag && true_val_->set_width(w);
-      flag = flag && false_val_->set_width(w);
+      flag = flag && true_val_->set_width(w, last_chance);
+      flag = flag && false_val_->set_width(w, last_chance);
+
+	/* The ternary really insists that the true and false clauses
+	   have the same width. Even if we fail to make the width that
+	   the user requests, at least pad the smaller width to suit
+	   the larger. */
+      if (true_val_->expr_width() < false_val_->expr_width())
+	    true_val_ = pad_to_width(true_val_, false_val_->expr_width());
+      if (false_val_->expr_width() < true_val_->expr_width())
+	    false_val_ = pad_to_width(false_val_, true_val_->expr_width());
+
       expr_width(true_val_->expr_width());
       return flag;
 }
@@ -377,13 +404,13 @@ bool NetETernary::set_width(unsigned w)
  * width. What I really need to do is note the width of the output
  * parameter of the function definition and take that into account.
  */
-bool NetEUFunc::set_width(unsigned wid)
+bool NetEUFunc::set_width(unsigned wid, bool)
 {
       expr_width(wid);
       return true;
 }
 
-bool NetEUnary::set_width(unsigned w)
+bool NetEUnary::set_width(unsigned w, bool)
 {
       bool flag = true;
       switch (op_) {
@@ -406,7 +433,7 @@ bool NetEUnary::set_width(unsigned w)
  * Unary reduction operators allow its operand to have any width. The
  * result is defined to be 1.
  */
-bool NetEUReduce::set_width(unsigned w)
+bool NetEUReduce::set_width(unsigned w, bool)
 {
       return w == 1;
 }
@@ -414,6 +441,29 @@ bool NetEUReduce::set_width(unsigned w)
 
 /*
  * $Log: set_width.cc,v $
+ * Revision 1.42  2007/01/16 05:44:15  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
+ *
+ * Revision 1.41  2006/11/04 06:19:25  steve
+ *  Remove last bits of relax_width methods, and use test_width
+ *  to calculate the width of an r-value expression that may
+ *  contain unsized numbers.
+ *
+ * Revision 1.40  2006/10/30 05:44:49  steve
+ *  Expression widths with unsized literals are pseudo-infinite width.
+ *
+ * Revision 1.39  2006/07/31 03:50:17  steve
+ *  Add support for power in constant expressions.
+ *
+ * Revision 1.38  2006/05/02 04:29:42  steve
+ *  Be more stubborn about widths.
+ *
+ * Revision 1.37  2005/11/26 00:35:44  steve
+ *  More precise about r-value width of constants.
+ *
  * Revision 1.36  2005/05/17 20:56:55  steve
  *  Parameters cannot have their width changed.
  *

solaris/README-solaris_pkg.txt

@@ -1,8 +1,8 @@
-# $Id: README-solaris_pkg.txt,v 1.2 2004/10/04 01:10:56 steve Exp $
+# $Id: README-solaris_pkg.txt,v 1.3 2007/02/26 19:49:49 steve Exp $
 
 Notes about the solaris package.
 
-I.  Installing a prebuild solaris package
+I.  Installing a prebuilt solaris package
 -----------------------------------------
 
 To install the solaris package do the following as root on your machine:
@@ -24,10 +24,10 @@ To install the solaris package do the following as root on your machine:
    this will install the package.  The package will be registered under the
    name "IVLver"
 
-II.  Deinstalling the solaris package
+II.  Uninstalling the solaris package
 -------------------------------------
 
-To deinstall an installed solaris package do the following as root on your machine:
+To uninstall an installed solaris package do the following as root on your machine:
 
     pkgrm IVLver
 

svector.h

@@ -21,7 +21,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: svector.h,v 1.10 2005/06/14 19:13:43 steve Exp $"
+#ident "$Id: svector.h,v 1.11 2007/03/22 16:08:17 steve Exp $"
 #endif
 
 # include  "config.h"
@@ -31,7 +31,7 @@
 /*
  * This is a way simplified vector class that cannot grow or shrink,
  * and is really only able to handle values. It is intended to be
- * lighter weight then the STL list class.
+ * lighter weight than the STL list class.
  */
 
 template <class TYPE> class svector {
@@ -109,6 +109,9 @@ template <> inline svector<std::string>::svector(unsigned size)
 
 /*
  * $Log: svector.h,v $
+ * Revision 1.11  2007/03/22 16:08:17  steve
+ *  Spelling fixes from Larry
+ *
  * Revision 1.10  2005/06/14 19:13:43  steve
  *  gcc3/4 compile errors.
  *

symbol_search.cc

@@ -17,58 +17,51 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: symbol_search.cc,v 1.2 2005/07/11 16:56:51 steve Exp $"
+#ident "$Id: symbol_search.cc,v 1.7 2007/06/02 03:42:13 steve Exp $"
 #endif
 
 # include  "netlist.h"
+# include  "netmisc.h"
 # include  <assert.h>
 
 
 /*
  * Search for the hierarchical name.
  */
-NetScope*symbol_search(Design*des, NetScope*scope, hname_t path,
+NetScope*symbol_search(Design*des, NetScope*scope, pform_name_t path,
 		       NetNet*&net,
-		       NetMemory*&mem,
 		       const NetExpr*&par,
-		       NetEvent*&eve)
+		       NetEvent*&eve,
+		       const NetExpr*&ex1, const NetExpr*&ex2)
 {
       assert(scope);
 
 	/* Get the tail name of the object we are looking for. */
-      char*key = path.remove_tail_name();
+      perm_string key = peek_tail_name(path);
+      path.pop_back();
 
 	/* Initialize output argument to cleared. */
       net = 0;
-      mem = 0;
       par = 0;
       eve = 0;
 
 	/* If the path has a scope part, then search for the specified
 	   scope that we are supposed to search. */
-      if (path.peek_name(0))
-	    scope = des->find_scope(scope, path);
+      if (! path.empty()) {
+	    list<hname_t> path_list = eval_scope_path(des, scope, path);
+	    assert(path_list.size() == path.size());
+	    scope = des->find_scope(scope, path_list);
+      }
 
       while (scope) {
-	    if ( (net = scope->find_signal(key)) ) {
-		  delete key;
+	    if ( (net = scope->find_signal(key)) )
 		  return scope;
-	    }
 
-	    if ( (mem = scope->find_memory(key)) ) {
-		  delete key;
+	    if ( (eve = scope->find_event(key)) )
 		  return scope;
-	    }
 
-	    if ( (eve = scope->find_event(key)) ) {
-		  delete key;
+	    if ( (par = scope->get_parameter(key, ex1, ex2)) )
 		  return scope;
-	    }
-
-	    if ( (par = scope->get_parameter(key)) ) {
-		  delete key;
-		  return scope;
-	    }
 
 	    if (scope->type() == NetScope::MODULE)
 		  scope = 0;
@@ -76,12 +69,31 @@ NetScope*symbol_search(Design*des, NetScope*scope, hname_t path,
 		  scope = scope->parent();
       }
 
-      delete key;
       return 0;
 }
 
+
 /*
  * $Log: symbol_search.cc,v $
+ * Revision 1.7  2007/06/02 03:42:13  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.6  2007/05/24 04:07:12  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.5  2007/04/26 03:06:22  steve
+ *  Rework hname_t to use perm_strings.
+ *
+ * Revision 1.4  2007/01/16 05:44:15  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
+ *
+ * Revision 1.3  2005/11/27 05:56:20  steve
+ *  Handle bit select of parameter with ranges.
+ *
  * Revision 1.2  2005/07/11 16:56:51  steve
  *  Remove NetVariable and ivl_variable_t structures.
  *

syn-rules.y

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: syn-rules.y,v 1.33 2005/04/24 23:44:02 steve Exp $"
+#ident "$Id: syn-rules.y,v 1.34 2007/01/16 05:44:15 steve Exp $"
 #endif
 
 # include "config.h"
@@ -118,7 +118,7 @@ static void hookup_DFF_CE(NetFF*ff, NetESignal*d, NetEvProbe*pclk,
 	// where lval is really a "reg [7:0]". In other words, part
 	// selects in the l-value are handled by loff and the lwidth().
 
-      connect(ff->pin_Data(), d->bit(0));
+      connect(ff->pin_Data(), d->sig()->pin(0));
       connect(ff->pin_Q(), a->sig()->pin(0));
 
       connect(ff->pin_Clock(), pclk->pin(0));
@@ -137,41 +137,6 @@ static void hookup_DFF_CE(NetFF*ff, NetESignal*d, NetEvProbe*pclk,
       a->turn_sig_to_wire_on_release();
 }
 
-static void hookup_RAMDQ(NetRamDq*ram, NetESignal*d, NetNet*adr,
-			 NetEvProbe*pclk, NetNet*ce,
-			 NetAssign_*a, unsigned rval_pinoffset)
-{
-      assert(d);
-      assert(a);
-
-	/* Connect the input Data bits of the RAM, from the r-value of
-	   the assignment. */
-      connect(ram->pin_Data(), d->bit(rval_pinoffset));
-
-	/* Connect the Address pins from the addr net discovered by the
-	   caller. */
-      connect(ram->pin_Address(), adr->pin(0));
-
-	/* Connect the input clock and the WE of the RAM. */
-      assert(pclk);
-      connect(ram->pin_InClock(), pclk->pin(0));
-      if (ce) {
-	    connect(ram->pin_WE(), ce->pin(0));
-      } /* XXX does ram CE default to true if not connected? */
-
-	/* This notices any other NetRamDq objects connected to the
-	   same NetMemory, that have the same address pins and are
-	   otherwise compatible. This absorbs them into this object. */
-      ram->absorb_partners();
-
-	/* This lval_ represents a reg that is a WIRE in the
-	   synthesized results. This function signals the destructor
-	   to change the REG that this l-value refers to into a
-	   WIRE. It is done then, at the last minute, so that pending
-	   synthesis can continue to work with it as a WIRE. */
-      a->turn_sig_to_wire_on_release();
-}
-
 static void make_DFF_CE(Design*des, NetProcTop*top, NetEvWait*wclk,
 			NetEvent*eclk, NetExpr*cexp, NetAssignBase*asn)
 {
@@ -207,13 +172,6 @@ static void make_DFF_CE(Design*des, NetProcTop*top, NetEvWait*wclk,
 				   a->sig()->vector_width());
               hookup_DFF_CE(ff, d, pclk, ce, a, rval_pinoffset);
               des->add_node(ff);
-	    } else if (a->mem()) {
-	      NetMemory *m=a->mem();
-	      NetNet *adr = a->bmux()->synthesize(des);
-	      NetRamDq*ram = new NetRamDq(top->scope(), m->name(),
-					  m, adr->pin_count());
-	      hookup_RAMDQ(ram, d, adr, pclk, ce, a, rval_pinoffset);
-              des->add_node(ram);
 	    }
             rval_pinoffset += a->lwidth();
       }
@@ -233,7 +191,7 @@ static void make_initializer(Design*des, NetProcTop*top, NetAssignBase*asn)
 
       for (unsigned idx = 0 ;  idx < asn->l_val(0)->lwidth() ;  idx += 1) {
 
-	    verinum::V bit = rsig->bit(idx).nexus()->driven_value();
+	    verinum::V bit = rsig->sig()->pin(idx).nexus()->driven_value();
 
 	    Nexus*nex = asn->l_val(0)->sig()->pin(idx).nexus();
 	    for (Link*cur = nex->first_nlink()

synth2.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: synth2.cc,v 1.45 2005/08/27 04:32:08 steve Exp $"
+#ident "$Id: synth2.cc,v 1.46 2007/03/22 16:08:17 steve Exp $"
 #endif
 
 # include "config.h"
@@ -766,7 +766,7 @@ bool NetEvWait::synth_sync(Design*des, NetScope*scope, NetFF*ff,
 
       assert(events_in.count() == 0);
 
-	/* This can't be other then one unless there are named events,
+	/* This can't be other than one unless there are named events,
 	   which I cannot synthesize. */
       assert(nevents_ == 1);
       NetEvent*ev = events_[0];
@@ -1000,6 +1000,9 @@ void synth2(Design*des)
 
 /*
  * $Log: synth2.cc,v $
+ * Revision 1.46  2007/03/22 16:08:17  steve
+ *  Spelling fixes from Larry
+ *
  * Revision 1.45  2005/08/27 04:32:08  steve
  *  Handle synthesis of fully packed case statements.
  *