Nick Gasson
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ba36e47575
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Add new vhdl_scope class and refactor
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2008-06-24 18:12:00 +01:00 |
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Nick Gasson
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3866c4526e
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Simplify code to emit operators
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2008-06-24 14:58:58 +01:00 |
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Nick Gasson
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cb08f02de1
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Resize signed/unsigned bit vectors correctly
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2008-06-24 10:58:21 +01:00 |
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Nick Gasson
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4188fbecee
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Add XOR operator and catch default case branch
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2008-06-24 10:55:45 +01:00 |
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Nick Gasson
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88dc9b6b63
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Remove debugging information from the output
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2008-06-23 15:02:26 +01:00 |
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Nick Gasson
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632a265e14
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Fix casting/resizing order bug
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2008-06-23 15:00:55 +01:00 |
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Nick Gasson
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449cd0a76e
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Correctly generate signed/unsigned types
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2008-06-23 14:28:27 +01:00 |
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Nick Gasson
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e5ef0d97bd
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Fix signed/unsigned resizing
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2008-06-23 13:04:28 +01:00 |
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Nick Gasson
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d06f5c7c54
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Emit loop statements with the correct indent
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2008-06-23 12:27:30 +01:00 |
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Nick Gasson
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9911939576
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Simplify casting code
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2008-06-23 12:21:10 +01:00 |
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Nick Gasson
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c9ace14c40
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Shift operators working correctly
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2008-06-23 12:14:12 +01:00 |
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Nick Gasson
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75f7c9ae0c
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Only move constant assignments into initialisation
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2008-06-21 16:40:18 +01:00 |
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Nick Gasson
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5cfe7ea0aa
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Tidy up output
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2008-06-21 16:28:07 +01:00 |
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Nick Gasson
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c70fb4ba08
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Simple implementation of IVL_EX_SELECT
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2008-06-21 16:17:44 +01:00 |
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Nick Gasson
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7cba9f3cb2
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Shift left/right
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2008-06-21 15:19:33 +01:00 |
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Nick Gasson
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d6acb8d059
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Less than / greater than
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2008-06-21 15:16:22 +01:00 |
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Nick Gasson
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ec23b70bb7
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While loops
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2008-06-21 15:13:44 +01:00 |
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Nick Gasson
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0caf4fd9d0
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Add case statement
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2008-06-21 15:03:36 +01:00 |
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Nick Gasson
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d7bb5658f2
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Translate IVL_ST_DELAYX statements
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2008-06-19 12:16:19 +01:00 |
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Nick Gasson
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254ccb9ccb
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First passing at blocking assignment
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2008-06-18 13:06:27 +01:00 |
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Nick Gasson
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d2bebee9d9
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Refactor before adding blocking assignment
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2008-06-18 12:51:11 +01:00 |
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Nick Gasson
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af8c08e6a7
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Allow optional VHPI $finish implementation
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2008-06-17 20:16:16 +01:00 |
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Nick Gasson
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ae0b09dd3a
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Don't bother emitting else part if it's empty
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2008-06-16 19:53:42 +01:00 |
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Nick Gasson
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8d0afa632d
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Subtraction and multiplication LPM devices
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2008-06-16 19:49:24 +01:00 |
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Nick Gasson
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ce72eb4eb4
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Fix Valgrind warnings
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2008-06-16 14:26:38 +01:00 |
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Nick Gasson
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7cde5f247e
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Add translation for not-equals operator
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2008-06-16 12:47:41 +01:00 |
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Nick Gasson
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2fb57805ea
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Use signed rather than std_logic_vector
Arithmetic operators now working correctly
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2008-06-14 18:03:25 +01:00 |
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Nick Gasson
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919c1d695c
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Adding binary +
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2008-06-14 17:09:31 +01:00 |
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Nick Gasson
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9fbb449e06
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Optimise away empty (VHDL) processes
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2008-06-13 14:17:24 +01:00 |
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Nick Gasson
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be3c4cf268
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Generate signal initial values from `initial' processes
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2008-06-13 14:10:28 +01:00 |
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Nick Gasson
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b8c1f9ab67
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A system for linking ivl_signal_t to entities
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2008-06-12 20:26:23 +01:00 |
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Nick Gasson
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0df3eabe26
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Convert `if (foo) ..' to `if foo = '1' then ..'
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2008-06-12 11:36:21 +01:00 |
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Nick Gasson
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8fe2211e2b
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Generate `after' modifier instead of `wait' statements
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2008-06-12 11:24:43 +01:00 |
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Nick Gasson
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d6f1162547
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Generate correct VHDL signal values
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2008-06-12 10:50:46 +01:00 |
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Nick Gasson
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46991aa65c
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Generate process bodies in the right place
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2008-06-12 10:47:52 +01:00 |
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Nick Gasson
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a7cfdc3a87
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Add VHDL if statement to AST types
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2008-06-11 14:11:37 +01:00 |
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Nick Gasson
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b010b8e3ca
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Use `assert false' as initial translation of $finish
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2008-06-11 13:37:21 +01:00 |
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Nick Gasson
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5a7cfd8c02
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Clean up vhdl_comp_inst
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2008-06-10 14:00:15 +01:00 |
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Nick Gasson
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babe694366
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Generate port mappings
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2008-06-10 13:58:41 +01:00 |
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Nick Gasson
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f6753a9013
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Add ports to component declarations
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2008-06-10 11:24:16 +01:00 |
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Nick Gasson
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1fb01d4d98
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Emit port declarations
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2008-06-09 16:37:05 +01:00 |
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Nick Gasson
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3106fe0ed6
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Generate port declarations for entities.
But doesn't emit them yet!
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2008-06-09 16:27:04 +01:00 |
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Nick Gasson
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e29954e03f
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Generate concurrent assignments from logic gates
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2008-06-09 15:05:32 +01:00 |
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Nick Gasson
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3b5d56e087
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Allow n-ary expressions
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2008-06-09 14:53:50 +01:00 |
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Nick Gasson
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aa91186119
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Add AST elements for unary/binary expressions to model logic gates
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2008-06-09 14:39:58 +01:00 |
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Nick Gasson
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d08f5af9c6
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Add concurrent assignments
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2008-06-09 14:21:55 +01:00 |
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Nick Gasson
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b96e471fa2
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Stub code for handling logic gates
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2008-06-09 14:08:27 +01:00 |
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Nick Gasson
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7120ab7b13
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Expression type might be null in some cases
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2008-06-09 12:54:21 +01:00 |
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Nick Gasson
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120b5dc80e
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Add constant integers
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2008-06-09 12:46:55 +01:00 |
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Nick Gasson
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d762253f74
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Wait statements
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2008-06-09 12:40:59 +01:00 |
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Nick Gasson
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1d28b935e8
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Split vhdl_element.cc into multiple files
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2008-06-08 13:27:48 +01:00 |