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iverilog/tgt-vvp/eval_expr.c

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Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
/*
NB-assign needs to convert reals at the l-value width. This patch mimics what was done for normal assignments to get the width correct for nonblocking assignments when converting a real r-value to a l-value vector.
2010-03-13 23:27:20 +01:00
* Copyright (c) 2001-2010 Stephen Williams (steve@icarus.com)
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
# include "vvp_priv.h"
Add error checking definitions for malloc(), realloc() and calloc() This patch adds defines that translate all malloc(), realloc() and calloc() calls into ones with error checking when ivl_alloc.h is included.
2010-10-10 00:04:05 +02:00
# include "ivl_alloc.h"
Pass parameters to system functions.
2001-07-07 22:20:10 +02:00
# include <string.h>
Make configure detect malloc.h
2001-09-15 20:27:04 +02:00
# include <stdlib.h>
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
# include <assert.h>
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static void draw_eval_expr_dest(ivl_expr_t expr, struct vector_info dest,
Concatenation can evaluate sub-expressions in place.
2002-11-06 06:41:37 +01:00
int ok_flags);
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static void draw_signal_dest(ivl_expr_t expr, struct vector_info res,
Load_add_immediate to work with signed expressions The %load/vp0 instruction adds a signed value to the signal value being loaded, but it doesn't allow for a signed source vector. Add the %load/vp0/s instruction that pads the loaded vector, and add the code generator details to properly use it.
2008-06-14 05:23:40 +02:00
int add_index, long immediate);
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
int number_is_unknown(ivl_expr_t expr)
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
{
const char*bits;
unsigned idx;
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if (ivl_expr_type(expr) == IVL_EX_ULONG)
Optomize runtime using immediate compare Implement compare-immediate instructions and generate code to use these new instructions to improve runtime performance. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-04 05:58:40 +02:00
return 0;
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
assert(ivl_expr_type(expr) == IVL_EX_NUMBER);
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
bits = ivl_expr_bits(expr);
for (idx = 0 ; idx < ivl_expr_width(expr) ; idx += 1)
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
if ((bits[idx] != '0') && (bits[idx] != '1'))
return 1;
return 0;
}
/*
Fix some large/negative immediate value compiler bugs. Fix how immediate values are checked and allow a large negative value to be returned from get_number_immediate().
2010-05-24 05:50:21 +02:00
* This function returns TRUE if the number can be represented as a
* lim_wid immediate value. This amounts to verifying that any upper
* bits are the same. For a negative value we do not support the most
* negative twos-complement value since it can not be negated. This
* code generator always emits positive values, hence the negation
* requirement.
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
*/
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
int number_is_immediate(ivl_expr_t expr, unsigned lim_wid, int negative_ok_flag)
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
{
Fix some large/negative immediate value compiler bugs. Fix how immediate values are checked and allow a large negative value to be returned from get_number_immediate().
2010-05-24 05:50:21 +02:00
const char *bits;
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
unsigned nbits = ivl_expr_width(expr);
Allow that sum immediate values can be signed. Actually, the immediate value handling is a little chaotic and should be cleaned up. This patch opens the door for allowing signed immediate values, and uses them in a few places where they are explicitly handled. We must go through the opcodes that can take immediate values and make explicit whether they are signed/unsigned/etc, and what their size limits are.
2008-06-13 22:32:06 +02:00
char pad_bit = '0';
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
unsigned idx;
Fix some large/negative immediate value compiler bugs. Fix how immediate values are checked and allow a large negative value to be returned from get_number_immediate().
2010-05-24 05:50:21 +02:00
/* We can only convert numbers to an immediate value. */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if (ivl_expr_type(expr) != IVL_EX_NUMBER
&& ivl_expr_type(expr) != IVL_EX_ULONG
&& ivl_expr_type(expr) != IVL_EX_DELAY)
Node delays can be more general expressions in structural contexts.
2006-01-02 06:33:19 +01:00
return 0;
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
Fix some large/negative immediate value compiler bugs. Fix how immediate values are checked and allow a large negative value to be returned from get_number_immediate().
2010-05-24 05:50:21 +02:00
/* If a negative value is OK, then we really have one less
* significant bit because of the sign bit. */
if (negative_ok_flag) lim_wid -= 1;
/* This is an unsigned value so it can not have the -2**N problem. */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if (ivl_expr_type(expr) == IVL_EX_ULONG) {
Fix some large/negative immediate value compiler bugs. Fix how immediate values are checked and allow a large negative value to be returned from get_number_immediate().
2010-05-24 05:50:21 +02:00
unsigned long imm;
if (lim_wid >= 8*sizeof(unsigned long)) return 1;
/* At this point we know that lim_wid is smaller than an
* unsigned long variable. */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
imm = ivl_expr_uvalue(expr);
Fix some large/negative immediate value compiler bugs. Fix how immediate values are checked and allow a large negative value to be returned from get_number_immediate().
2010-05-24 05:50:21 +02:00
if (imm < (1UL << lim_wid)) return 1;
Check that numbers fit into the correct immediate width (32 bits). Even on 64 bit machines immediate values should be limited to 32 bits so that the a.out file will run correctly on a 32 bit machine. This patch fixes a number of places where the code generator was not checking for/observing this.
2008-10-07 01:22:34 +02:00
else return 0;
}
Fix some large/negative immediate value compiler bugs. Fix how immediate values are checked and allow a large negative value to be returned from get_number_immediate().
2010-05-24 05:50:21 +02:00
/* This is an unsigned value so it can not have the -2**N problem. */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if (ivl_expr_type(expr) == IVL_EX_DELAY) {
Fix some large/negative immediate value compiler bugs. Fix how immediate values are checked and allow a large negative value to be returned from get_number_immediate().
2010-05-24 05:50:21 +02:00
uint64_t imm;
Add support for 64 bit delays in procedural non-blocking assignments. This patch adds support for 64 bit non-blocking delays in procedural code. We fixed the procedural delay operator (blocking delays) earlier. This patch mostly mimics what was done there. The continuous assignment delay operator still needs to be fixed.
2009-02-17 01:44:52 +01:00
if (lim_wid >= 8*sizeof(uint64_t)) return 1;
Fix some large/negative immediate value compiler bugs. Fix how immediate values are checked and allow a large negative value to be returned from get_number_immediate().
2010-05-24 05:50:21 +02:00
/* At this point we know that lim_wid is smaller than a
* uint64_t variable. */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
imm = ivl_expr_delay_val(expr);
Fix some large/negative immediate value compiler bugs. Fix how immediate values are checked and allow a large negative value to be returned from get_number_immediate().
2010-05-24 05:50:21 +02:00
if (imm < ((uint64_t)1 << lim_wid)) return 1;
Add support for 64 bit delays in procedural non-blocking assignments. This patch adds support for 64 bit non-blocking delays in procedural code. We fixed the procedural delay operator (blocking delays) earlier. This patch mostly mimics what was done there. The continuous assignment delay operator still needs to be fixed.
2009-02-17 01:44:52 +01:00
else return 0;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
bits = ivl_expr_bits(expr);
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if (ivl_expr_signed(expr) && bits[nbits-1]=='1') pad_bit = '1';
Allow that sum immediate values can be signed. Actually, the immediate value handling is a little chaotic and should be cleaned up. This patch opens the door for allowing signed immediate values, and uses them in a few places where they are explicitly handled. We must go through the opcodes that can take immediate values and make explicit whether they are signed/unsigned/etc, and what their size limits are.
2008-06-13 22:32:06 +02:00
Fix some large/negative immediate value compiler bugs. Fix how immediate values are checked and allow a large negative value to be returned from get_number_immediate().
2010-05-24 05:50:21 +02:00
if (pad_bit == '1' && !negative_ok_flag) return 0;
Optomize runtime using immediate compare Implement compare-immediate instructions and generate code to use these new instructions to improve runtime performance. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-04 05:58:40 +02:00
Allow that sum immediate values can be signed. Actually, the immediate value handling is a little chaotic and should be cleaned up. This patch opens the door for allowing signed immediate values, and uses them in a few places where they are explicitly handled. We must go through the opcodes that can take immediate values and make explicit whether they are signed/unsigned/etc, and what their size limits are.
2008-06-13 22:32:06 +02:00
for (idx = lim_wid ; idx < nbits ; idx += 1)
Fix some large/negative immediate value compiler bugs. Fix how immediate values are checked and allow a large negative value to be returned from get_number_immediate().
2010-05-24 05:50:21 +02:00
if (bits[idx] != pad_bit) return 0;
/* If we have a negative number make sure it is not too big. */
if (pad_bit == '1') {
for (idx = 0; idx < lim_wid; idx += 1)
if (bits[idx] == '1') return 1;
return 0;
}
Allow that sum immediate values can be signed. Actually, the immediate value handling is a little chaotic and should be cleaned up. This patch opens the door for allowing signed immediate values, and uses them in a few places where they are explicitly handled. We must go through the opcodes that can take immediate values and make explicit whether they are signed/unsigned/etc, and what their size limits are.
2008-06-13 22:32:06 +02:00
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
return 1;
}
Fix some large/negative immediate value compiler bugs. Fix how immediate values are checked and allow a large negative value to be returned from get_number_immediate().
2010-05-24 05:50:21 +02:00
/*
* We can return positive or negative values. You must verify that the
* number is not unknown (number_is_unknown) and is small enough
* (number_is_immediate).
*/
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
long get_number_immediate(ivl_expr_t expr)
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
{
Allow canonical part select of net vectors to be larger then the vector The part select of a vector is converted by the compiler during elaboration to a 0-based canonical address. But since it is legal to address bits below the LSB, the canonical address can be negative. So make the part select base for selecting from signals work with signed arithmetic and make the code generator generate negative indices when needed.
2008-06-13 06:41:11 +02:00
long imm = 0;
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
unsigned idx;
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
switch (ivl_expr_type(expr)) {
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
case IVL_EX_ULONG:
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
imm = ivl_expr_uvalue(expr);
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
break;
case IVL_EX_NUMBER: {
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
const char*bits = ivl_expr_bits(expr);
unsigned nbits = ivl_expr_width(expr);
Fix some large/negative immediate value compiler bugs. Fix how immediate values are checked and allow a large negative value to be returned from get_number_immediate().
2010-05-24 05:50:21 +02:00
/* We can not copy more bits than fit into a long. */
if (nbits > 8*sizeof(long)) nbits = 8*sizeof(long);
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
for (idx = 0 ; idx < nbits ; idx += 1) switch (bits[idx]){
case '0':
break;
case '1':
Allow canonical part select of net vectors to be larger then the vector The part select of a vector is converted by the compiler during elaboration to a 0-based canonical address. But since it is legal to address bits below the LSB, the canonical address can be negative. So make the part select base for selecting from signals work with signed arithmetic and make the code generator generate negative indices when needed.
2008-06-13 06:41:11 +02:00
imm |= 1L << idx;
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
break;
default:
assert(0);
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if (ivl_expr_signed(expr) && bits[nbits-1]=='1' &&
Fix some large/negative immediate value compiler bugs. Fix how immediate values are checked and allow a large negative value to be returned from get_number_immediate().
2010-05-24 05:50:21 +02:00
nbits < 8*sizeof(long)) imm |= -1L << nbits;
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
break;
}
default:
assert(0);
}
return imm;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
uint64_t get_number_immediate64(ivl_expr_t expr)
Allow constant delay literals to be handled as 64bits. This is mostly a minor definition change in the parsing of literal numbers by the vvp lexor. Allow for 64bit numbers in the .delay records, and have the code generator also able to cope with the situation.
2009-02-24 22:50:18 +01:00
{
uint64_t imm = 0;
unsigned idx;
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
switch (ivl_expr_type(expr)) {
Allow constant delay literals to be handled as 64bits. This is mostly a minor definition change in the parsing of literal numbers by the vvp lexor. Allow for 64bit numbers in the .delay records, and have the code generator also able to cope with the situation.
2009-02-24 22:50:18 +01:00
case IVL_EX_ULONG:
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
imm = ivl_expr_uvalue(expr);
Allow constant delay literals to be handled as 64bits. This is mostly a minor definition change in the parsing of literal numbers by the vvp lexor. Allow for 64bit numbers in the .delay records, and have the code generator also able to cope with the situation.
2009-02-24 22:50:18 +01:00
break;
case IVL_EX_NUMBER: {
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
const char*bits = ivl_expr_bits(expr);
unsigned nbits = ivl_expr_width(expr);
Allow constant delay literals to be handled as 64bits. This is mostly a minor definition change in the parsing of literal numbers by the vvp lexor. Allow for 64bit numbers in the .delay records, and have the code generator also able to cope with the situation.
2009-02-24 22:50:18 +01:00
for (idx = 0 ; idx < nbits ; idx += 1) switch (bits[idx]){
case '0':
break;
case '1':
assert(idx < 64);
imm |= UINT64_C(1) << idx;
break;
default:
assert(0);
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if (ivl_expr_signed(expr) && bits[nbits-1]=='1' && nbits < 64)
Delays expressions are 64bit integers. Fix the PDelay processing to account for the fact that delay expressions are 64bits. Use int64_t instead of unsigned long.
2009-02-26 06:30:05 +01:00
imm |= (-UINT64_C(1)) << nbits;
Allow constant delay literals to be handled as 64bits. This is mostly a minor definition change in the parsing of literal numbers by the vvp lexor. Allow for 64bit numbers in the .delay records, and have the code generator also able to cope with the situation.
2009-02-24 22:50:18 +01:00
break;
}
default:
assert(0);
}
return imm;
}
Add %ix/getv instruction The %ix/getv instruction loads an integer register directly from a signal vector. This is an optimization that an index register is loaded from an expression is only a signal. It avoids the thread vector space.
2007-12-07 22:12:19 +01:00
static void eval_logic_into_integer(ivl_expr_t expr, unsigned ix)
{
switch (ivl_expr_type(expr)) {
Allow canonical part select of net vectors to be larger then the vector The part select of a vector is converted by the compiler during elaboration to a 0-based canonical address. But since it is legal to address bits below the LSB, the canonical address can be negative. So make the part select base for selecting from signals work with signed arithmetic and make the code generator generate negative indices when needed.
2008-06-13 06:41:11 +02:00
case IVL_EX_NUMBER:
Add %ix/getv instruction The %ix/getv instruction loads an integer register directly from a signal vector. This is an optimization that an index register is loaded from an expression is only a signal. It avoids the thread vector space.
2007-12-07 22:12:19 +01:00
case IVL_EX_ULONG:
Allow canonical part select of net vectors to be larger then the vector The part select of a vector is converted by the compiler during elaboration to a 0-based canonical address. But since it is legal to address bits below the LSB, the canonical address can be negative. So make the part select base for selecting from signals work with signed arithmetic and make the code generator generate negative indices when needed.
2008-06-13 06:41:11 +02:00
{
Check that numbers fit into the correct immediate width (32 bits). Even on 64 bit machines immediate values should be limited to 32 bits so that the a.out file will run correctly on a 32 bit machine. This patch fixes a number of places where the code generator was not checking for/observing this.
2008-10-07 01:22:34 +02:00
assert(number_is_immediate(expr, IMM_WID, 1));
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
if (number_is_unknown(expr)) {
/* We are loading a 'bx so mimic %ix/get. */
fprintf(vvp_out, " %%ix/load %u, 0, 0;\n", ix);
fprintf(vvp_out, " %%mov 4, 1, 1;\n");
break;
}
Allow canonical part select of net vectors to be larger then the vector The part select of a vector is converted by the compiler during elaboration to a 0-based canonical address. But since it is legal to address bits below the LSB, the canonical address can be negative. So make the part select base for selecting from signals work with signed arithmetic and make the code generator generate negative indices when needed.
2008-06-13 06:41:11 +02:00
long imm = get_number_immediate(expr);
if (imm >= 0) {
Add support for 64 bit delays in procedural non-blocking assignments. This patch adds support for 64 bit non-blocking delays in procedural code. We fixed the procedural delay operator (blocking delays) earlier. This patch mostly mimics what was done there. The continuous assignment delay operator still needs to be fixed.
2009-02-17 01:44:52 +01:00
fprintf(vvp_out, " %%ix/load %u, %ld, 0;\n", ix, imm);
Allow canonical part select of net vectors to be larger then the vector The part select of a vector is converted by the compiler during elaboration to a 0-based canonical address. But since it is legal to address bits below the LSB, the canonical address can be negative. So make the part select base for selecting from signals work with signed arithmetic and make the code generator generate negative indices when needed.
2008-06-13 06:41:11 +02:00
} else {
Add support for 64 bit delays in procedural non-blocking assignments. This patch adds support for 64 bit non-blocking delays in procedural code. We fixed the procedural delay operator (blocking delays) earlier. This patch mostly mimics what was done there. The continuous assignment delay operator still needs to be fixed.
2009-02-17 01:44:52 +01:00
fprintf(vvp_out, " %%ix/load %u, 0, 0; loading %ld\n", ix, imm);
fprintf(vvp_out, " %%ix/sub %u, %ld, 0;\n", ix, -imm);
Allow canonical part select of net vectors to be larger then the vector The part select of a vector is converted by the compiler during elaboration to a 0-based canonical address. But since it is legal to address bits below the LSB, the canonical address can be negative. So make the part select base for selecting from signals work with signed arithmetic and make the code generator generate negative indices when needed.
2008-06-13 06:41:11 +02:00
}
When evaluating a constant into an index make sure to clear bit 4. When evaluating an expression into an index register bit 4 is used to determine if the expression had any X/Z bits. In the case of a constant immediate value this can not happen so make sure the bit is cleared.
2008-09-18 01:18:17 +02:00
/* This can not have have a X/Z value so clear bit 4. */
fprintf(vvp_out, " %%mov 4, 0, 1;\n");
Allow canonical part select of net vectors to be larger then the vector The part select of a vector is converted by the compiler during elaboration to a 0-based canonical address. But since it is legal to address bits below the LSB, the canonical address can be negative. So make the part select base for selecting from signals work with signed arithmetic and make the code generator generate negative indices when needed.
2008-06-13 06:41:11 +02:00
}
break;
Add %ix/getv instruction The %ix/getv instruction loads an integer register directly from a signal vector. This is an optimization that an index register is loaded from an expression is only a signal. It avoids the thread vector space.
2007-12-07 22:12:19 +01:00
case IVL_EX_SIGNAL: {
ivl_signal_t sig = ivl_expr_signal(expr);
Rework variable arrays to not have vpi handles for every word. Save tons of space per memory word by not creating a vpi handle for each and every word of a variable array. (Net arrays still get a vpiHandle for every word.) The consequence of this is that all accesses to a variable array need to go through the indexing. This commit handles the most common places where this impacts, but there are still problems.
2008-05-16 19:38:32 +02:00
Add %ix/getv instruction The %ix/getv instruction loads an integer register directly from a signal vector. This is an optimization that an index register is loaded from an expression is only a signal. It avoids the thread vector space.
2007-12-07 22:12:19 +01:00
unsigned word = 0;
Use ivl_signal_dimensions to detect that signal is an array. It is possible for an array to have 1 word in it, so using the array count to detect an array is incorrect. Use the ivl_signal_dimensions function, which is there exactly for that purpose.
2008-05-19 20:31:40 +02:00
if (ivl_signal_dimensions(sig) > 0) {
Content-free portability fixes. These are patches from ITOH Yasufumi and Larry Doolittle of pr2120948. They change nothing, but make the code compile with older compilers.
2008-09-30 03:06:47 +02:00
ivl_expr_t ixe;
Down payment on const-correctness Clears out the unambiguous and easy-to-fix const faults, so we can focus better on the fundamental ones.
2010-09-27 20:03:43 +02:00
const char*type = ivl_expr_signed(expr) ? "/s" : "";
Rework variable arrays to not have vpi handles for every word. Save tons of space per memory word by not creating a vpi handle for each and every word of a variable array. (Net arrays still get a vpiHandle for every word.) The consequence of this is that all accesses to a variable array need to go through the indexing. This commit handles the most common places where this impacts, but there are still problems.
2008-05-16 19:38:32 +02:00
/* Detect the special case that this is a
variable array. In this case, the ix/getv
will not work, so do it the hard way. */
if (ivl_signal_type(sig) == IVL_SIT_REG) {
struct vector_info rv;
rv = draw_eval_expr(expr, 0);
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
fprintf(vvp_out, " %%ix/get%s %u, %u, %u;\n",
type, ix, rv.base, rv.wid);
Rework variable arrays to not have vpi handles for every word. Save tons of space per memory word by not creating a vpi handle for each and every word of a variable array. (Net arrays still get a vpiHandle for every word.) The consequence of this is that all accesses to a variable array need to go through the indexing. This commit handles the most common places where this impacts, but there are still problems.
2008-05-16 19:38:32 +02:00
clr_vector(rv);
break;
}
Content-free portability fixes. These are patches from ITOH Yasufumi and Larry Doolittle of pr2120948. They change nothing, but make the code compile with older compilers.
2008-09-30 03:06:47 +02:00
ixe = ivl_expr_oper1(expr);
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
if (number_is_immediate(ixe, IMM_WID, 0)) {
assert(! number_is_unknown(ixe));
Evaluate non-immediate signal selection. This patch adds code to treat non-immediate signal selection the same as the default logic evaluation
2008-01-15 00:57:01 +01:00
word = get_number_immediate(ixe);
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
} else {
Evaluate non-immediate signal selection. This patch adds code to treat non-immediate signal selection the same as the default logic evaluation
2008-01-15 00:57:01 +01:00
struct vector_info rv;
rv = draw_eval_expr(expr, 0);
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
fprintf(vvp_out, " %%ix/get%s %u, %u, %u;\n",
type, ix, rv.base, rv.wid);
Evaluate non-immediate signal selection. This patch adds code to treat non-immediate signal selection the same as the default logic evaluation
2008-01-15 00:57:01 +01:00
clr_vector(rv);
break;
}
Add %ix/getv instruction The %ix/getv instruction loads an integer register directly from a signal vector. This is an optimization that an index register is loaded from an expression is only a signal. It avoids the thread vector space.
2007-12-07 22:12:19 +01:00
}
Down payment on const-correctness Clears out the unambiguous and easy-to-fix const faults, so we can focus better on the fundamental ones.
2010-09-27 20:03:43 +02:00
const char*type = ivl_signal_signed(sig) ? "/s" : "";
Partial non-blocking event control implementation This patch pushes the non-blocking event control information to the code generator. It adds the %evctl statements that are used to put the event control information into the special thread event control registers. The signed version (%evctl/s) required the implementation of %ix/getv/s to load a signed value into an index register. It then adds %assign/wr/e event control based non-blocking assignment for real values. It also fixes the other non-blocking real assignments to use Transport instead of inertial delays.
2008-09-11 04:37:11 +02:00
fprintf(vvp_out, " %%ix/getv%s %u, v%p_%u;\n", type, ix,
sig, word);
Add %ix/getv instruction The %ix/getv instruction loads an integer register directly from a signal vector. This is an optimization that an index register is loaded from an expression is only a signal. It avoids the thread vector space.
2007-12-07 22:12:19 +01:00
break;
}
default: {
struct vector_info rv;
rv = draw_eval_expr(expr, 0);
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
/* Is this a signed expression? */
if (ivl_expr_signed(expr)) {
fprintf(vvp_out, " %%ix/get/s %u, %u, %u;\n",
ix, rv.base, rv.wid);
} else {
fprintf(vvp_out, " %%ix/get %u, %u, %u;\n",
ix, rv.base, rv.wid);
}
Add %ix/getv instruction The %ix/getv instruction loads an integer register directly from a signal vector. This is an optimization that an index register is loaded from an expression is only a signal. It avoids the thread vector space.
2007-12-07 22:12:19 +01:00
clr_vector(rv);
break;
}
}
}
Allow part selects of memory words in l-values.
2006-02-02 03:43:57 +01:00
/*
* This function, in addition to setting the value into index 0, sets
* bit 4 to 1 if the value is unknown.
*/
void draw_eval_expr_into_integer(ivl_expr_t expr, unsigned ix)
{
int word;
switch (ivl_expr_value(expr)) {
case IVL_VT_BOOL:
case IVL_VT_LOGIC:
Add %ix/getv instruction The %ix/getv instruction loads an integer register directly from a signal vector. This is an optimization that an index register is loaded from an expression is only a signal. It avoids the thread vector space.
2007-12-07 22:12:19 +01:00
eval_logic_into_integer(expr, ix);
Allow part selects of memory words in l-values.
2006-02-02 03:43:57 +01:00
break;
case IVL_VT_REAL:
word = draw_eval_real(expr);
Fix for pr2913404. In combination with the patch to make all operations on thread words operate on 64-bit values, this patch ensures casts between real values and large vector values work correctly.
2009-12-20 00:34:54 +01:00
fprintf(vvp_out, " %%cvt/sr %u, %u;\n", ix, word);
Fix the compiler and modpath scaling of real delays. A real delay must be scaled and rounded using the local precision before it is finally scaled to the simulation time units. This patch fixes the compiler to do this correctly or generate the correct code for run time calculated delays. Delays in a CA already worked correctly. The run time was also fixed to scale modpath (SDF back annotation) delays correctly.
2010-06-19 01:03:17 +02:00
clr_word(word);
Allow part selects of memory words in l-values.
2006-02-02 03:43:57 +01:00
break;
default:
fprintf(stderr, "XXXX ivl_expr_value == %d\n",
ivl_expr_value(expr));
assert(0);
}
}
Optimize ==1 when in context where x vs z doesnt matter.
2002-09-13 05:12:50 +02:00
/*
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
* The STUFF_OK_XZ bit is true if the output is going to be further
Spelling fixes (larry doolittle)
2007-02-26 20:49:48 +01:00
* processed so that x and z values are equivalent. This may allow for
Optimize ==1 when in context where x vs z doesnt matter.
2002-09-13 05:12:50 +02:00
* new optimizations.
*/
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_eq_immediate(ivl_expr_t expr, unsigned ewid,
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
ivl_expr_t le,
Optimize ==1 when in context where x vs z doesnt matter.
2002-09-13 05:12:50 +02:00
ivl_expr_t re,
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
int stuff_ok_flag)
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
{
unsigned wid;
struct vector_info lv;
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
unsigned long imm;
assert(number_is_immediate(re, IMM_WID, 0));
assert(! number_is_unknown(re));
imm = get_number_immediate(re);
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
wid = ivl_expr_width(le);
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
lv = draw_eval_expr_wid(le, wid, stuff_ok_flag);
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
switch (ivl_expr_opcode(expr)) {
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
case 'E': /* === */
fprintf(vvp_out, " %%cmpi/u %u, %lu, %u;\n",
lv.base, imm, wid);
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
if (lv.base >= 8)
clr_vector(lv);
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
lv.base = 6;
lv.wid = 1;
break;
case 'e': /* == */
Optimize ==1 when in context where x vs z doesnt matter.
2002-09-13 05:12:50 +02:00
/* If this is a single bit being compared to 1, and the
output doesn't care about x vs z, then just return
the value itself. */
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
if ((stuff_ok_flag&STUFF_OK_XZ) && (lv.wid == 1) && (imm == 1))
Optimize ==1 when in context where x vs z doesnt matter.
2002-09-13 05:12:50 +02:00
break;
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
fprintf(vvp_out, " %%cmpi/u %u, %lu, %u;\n",
lv.base, imm, wid);
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
if (lv.base >= 8)
clr_vector(lv);
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
lv.base = 4;
lv.wid = 1;
break;
case 'N': /* !== */
fprintf(vvp_out, " %%cmpi/u %u, %lu, %u;\n",
lv.base, imm, wid);
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
if (lv.base >= 8)
clr_vector(lv);
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
lv.base = 6;
lv.wid = 1;
fprintf(vvp_out, " %%inv 6, 1;\n");
break;
case 'n': /* != */
single bit optimization for != in expressions, and expand ++ and != results if needed.
2002-09-13 06:09:51 +02:00
/* If this is a single bit being compared to 0, and the
output doesn't care about x vs z, then just return
the value itself. */
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
if ((stuff_ok_flag&STUFF_OK_XZ) && (lv.wid == 1) && (imm == 0))
single bit optimization for != in expressions, and expand ++ and != results if needed.
2002-09-13 06:09:51 +02:00
break;
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
fprintf(vvp_out, " %%cmpi/u %u, %lu, %u;\n",
lv.base, imm, wid);
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
if (lv.base >= 8)
clr_vector(lv);
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
lv.base = 4;
lv.wid = 1;
fprintf(vvp_out, " %%inv 4, 1;\n");
break;
default:
assert(0);
}
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
/* In the special case that 47 bits are ok, and this really is
a single bit value, then we are done. */
if ((lv.wid == 1) && (ewid == 1) && (stuff_ok_flag&STUFF_OK_47))
return lv;
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
/* Move the result out out the 4-7 bit that the compare
uses. This is because that bit may be clobbered by other
expressions. */
Optimize ==1 when in context where x vs z doesnt matter.
2002-09-13 05:12:50 +02:00
if (lv.base < 8) {
Remove short int restrictions from vvp opcodes.
2003-06-17 21:17:42 +02:00
unsigned base = allocate_vector(ewid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
if (base == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"for result of equality compare.\n",
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_file(expr), ivl_expr_lineno(expr), wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
vvp_errors += 1;
}
Optimize ==1 when in context where x vs z doesnt matter.
2002-09-13 05:12:50 +02:00
fprintf(vvp_out, " %%mov %u, %u, 1;\n", base, lv.base);
lv.base = base;
lv.wid = ewid;
if (ewid > 1)
fprintf(vvp_out, " %%mov %u, 0, %u;\n", base+1, ewid-1);
single bit optimization for != in expressions, and expand ++ and != results if needed.
2002-09-13 06:09:51 +02:00
} else if (lv.wid < ewid) {
Remove short int restrictions from vvp opcodes.
2003-06-17 21:17:42 +02:00
unsigned base = allocate_vector(ewid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
if (base == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"for result of equality compare.\n",
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_file(expr), ivl_expr_lineno(expr), wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
vvp_errors += 1;
}
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
if (lv.base >= 8)
clr_vector(lv);
single bit optimization for != in expressions, and expand ++ and != results if needed.
2002-09-13 06:09:51 +02:00
fprintf(vvp_out, " %%mov %u, %u, %u;\n", base,
lv.base, lv.wid);
fprintf(vvp_out, " %%mov %u, 0, %u;\n",
base+lv.wid, ewid-lv.wid);
lv.base = base;
lv.wid = ewid;
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
}
return lv;
}
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
/*
* This handles the special case that the operands of the comparison
* are real valued expressions.
*/
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_binary_expr_eq_real(ivl_expr_t expr)
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
{
struct vector_info res;
int lword, rword;
res.base = allocate_vector(1);
res.wid = 1;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
assert(res.base);
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
lword = draw_eval_real(ivl_expr_oper1(expr));
rword = draw_eval_real(ivl_expr_oper2(expr));
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
clr_word(lword);
clr_word(rword);
fprintf(vvp_out, " %%cmp/wr %d, %d;\n", lword, rword);
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
switch (ivl_expr_opcode(expr)) {
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
case 'e':
fprintf(vvp_out, " %%mov %u, 4, 1;\n", res.base);
break;
case 'n': /* != */
fprintf(vvp_out, " %%mov %u, 4, 1;\n", res.base);
fprintf(vvp_out, " %%inv %u, 1;\n", res.base);
break;
default:
assert(0);
}
return res;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_binary_expr_eq(ivl_expr_t expr,
Optimize ==1 when in context where x vs z doesnt matter.
2002-09-13 05:12:50 +02:00
unsigned ewid,
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
int stuff_ok_flag)
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
{
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_t le = ivl_expr_oper1(expr);
ivl_expr_t re = ivl_expr_oper2(expr);
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
unsigned wid;
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
struct vector_info lv;
struct vector_info rv;
Watch out for real compared to constant. Handle as real.
2004-06-30 05:07:32 +02:00
if ((ivl_expr_value(le) == IVL_VT_REAL)
||(ivl_expr_value(re) == IVL_VT_REAL)) {
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
return draw_binary_expr_eq_real(expr);
Watch out for real compared to constant. Handle as real.
2004-06-30 05:07:32 +02:00
}
Allow that sum immediate values can be signed. Actually, the immediate value handling is a little chaotic and should be cleaned up. This patch opens the door for allowing signed immediate values, and uses them in a few places where they are explicitly handled. We must go through the opcodes that can take immediate values and make explicit whether they are signed/unsigned/etc, and what their size limits are.
2008-06-13 22:32:06 +02:00
if (number_is_immediate(re,16,0) && !number_is_unknown(re))
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
return draw_eq_immediate(expr, ewid, le, re, stuff_ok_flag);
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
Support bool expressions and compares handle them optimally.
2005-09-14 04:53:13 +02:00
assert(ivl_expr_value(le) == IVL_VT_LOGIC
|| ivl_expr_value(le) == IVL_VT_BOOL);
assert(ivl_expr_value(re) == IVL_VT_LOGIC
|| ivl_expr_value(re) == IVL_VT_BOOL);
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
Generate %cmpi/u where appropriate.
2002-06-02 20:57:17 +02:00
wid = ivl_expr_width(le);
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
if (ivl_expr_width(re) > wid)
wid = ivl_expr_width(re);
More robust use of precalculated expressions, and Separate lookaside for written variables that can also be reused.
2005-09-17 03:01:00 +02:00
lv = draw_eval_expr_wid(le, wid, stuff_ok_flag&~STUFF_OK_47);
rv = draw_eval_expr_wid(re, wid, stuff_ok_flag&~STUFF_OK_47);
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
switch (ivl_expr_opcode(expr)) {
Evaluate === and !==
2001-03-27 08:43:27 +02:00
case 'E': /* === */
assert(lv.wid == rv.wid);
fprintf(vvp_out, " %%cmp/u %u, %u, %u;\n", lv.base,
rv.base, lv.wid);
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
if (lv.base >= 8)
clr_vector(lv);
if (rv.base >= 8)
clr_vector(rv);
Evaluate === and !==
2001-03-27 08:43:27 +02:00
lv.base = 6;
lv.wid = 1;
break;
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
case 'e': /* == */
Fix the size of unsized constant operants to compare (PR#274)
2001-09-29 03:53:22 +02:00
if (lv.wid != rv.wid) {
Add unlimited tail recursion for the real ternary operator. This patch modifies the real ternary operator code to support unlimited tail recursion without overflowing the thread registers. Head recursion is still limited by the available registers. It fixes the thread word checks to use a new define that has the correct number of thread words (16). It adds a message instead of just an assert if the thread words are exhausted. And it also changes some of the error messages to use vvp.tgt in the message to be consistent with the other messages.
2010-07-07 23:33:10 +02:00
fprintf(stderr,"vvp.tgt error: operands of == "
Fix the size of unsized constant operants to compare (PR#274)
2001-09-29 03:53:22 +02:00
" have different widths: %u vs %u\n",
lv.wid, rv.wid);
}
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
assert(lv.wid == rv.wid);
fprintf(vvp_out, " %%cmp/u %u, %u, %u;\n", lv.base,
rv.base, lv.wid);
clr_vector(lv);
clr_vector(rv);
lv.base = 4;
lv.wid = 1;
break;
Evaluate === and !==
2001-03-27 08:43:27 +02:00
case 'N': /* !== */
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
if (lv.wid != rv.wid) {
Add unlimited tail recursion for the real ternary operator. This patch modifies the real ternary operator code to support unlimited tail recursion without overflowing the thread registers. Head recursion is still limited by the available registers. It fixes the thread word checks to use a new define that has the correct number of thread words (16). It adds a message instead of just an assert if the thread words are exhausted. And it also changes some of the error messages to use vvp.tgt in the message to be consistent with the other messages.
2010-07-07 23:33:10 +02:00
fprintf(stderr,"vvp.tgt error: operands of !== "
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
" have different widths: %u vs %u\n",
lv.wid, rv.wid);
}
Evaluate === and !==
2001-03-27 08:43:27 +02:00
assert(lv.wid == rv.wid);
fprintf(vvp_out, " %%cmp/u %u, %u, %u;\n", lv.base,
rv.base, lv.wid);
fprintf(vvp_out, " %%inv 6, 1;\n");
clr_vector(lv);
clr_vector(rv);
lv.base = 6;
lv.wid = 1;
break;
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
case 'n': /* != */
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
if (lv.wid != rv.wid) {
Add unlimited tail recursion for the real ternary operator. This patch modifies the real ternary operator code to support unlimited tail recursion without overflowing the thread registers. Head recursion is still limited by the available registers. It fixes the thread word checks to use a new define that has the correct number of thread words (16). It adds a message instead of just an assert if the thread words are exhausted. And it also changes some of the error messages to use vvp.tgt in the message to be consistent with the other messages.
2010-07-07 23:33:10 +02:00
fprintf(stderr,"vvp.tgt error: operands of != "
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
" have different widths: %u vs %u\n",
lv.wid, rv.wid);
}
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
assert(lv.wid == rv.wid);
fprintf(vvp_out, " %%cmp/u %u, %u, %u;\n", lv.base,
rv.base, lv.wid);
fprintf(vvp_out, " %%inv 4, 1;\n");
clr_vector(lv);
clr_vector(rv);
lv.base = 4;
lv.wid = 1;
break;
default:
assert(0);
}
Lor takes advantave of STUFF_OK_47 It is ot uncommon for the arguments to logical or to leave stuff in bit registers 4-7. Allow the lor itself to take advantage of that to save some %mov instructions.
2008-11-22 19:45:15 +01:00
if ((stuff_ok_flag&STUFF_OK_47) && (ewid == 1)) {
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
return lv;
}
Comparisons cant leave their results in the opcode result area or their values will be clobbered by other parts of a complex expression.
2001-05-01 04:07:34 +02:00
/* Move the result out out the 4-7 bit that the compare
uses. This is because that bit may be clobbered by other
expressions. */
Remove short int restrictions from vvp opcodes.
2003-06-17 21:17:42 +02:00
{ unsigned base = allocate_vector(ewid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
if (base == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"for result of equality compare.\n",
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_file(expr), ivl_expr_lineno(expr), wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
vvp_errors += 1;
}
Comparisons cant leave their results in the opcode result area or their values will be clobbered by other parts of a complex expression.
2001-05-01 04:07:34 +02:00
fprintf(vvp_out, " %%mov %u, %u, 1;\n", base, lv.base);
lv.base = base;
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
lv.wid = ewid;
if (ewid > 1)
fprintf(vvp_out, " %%mov %u, 0, %u;\n", base+1, ewid-1);
Comparisons cant leave their results in the opcode result area or their values will be clobbered by other parts of a complex expression.
2001-05-01 04:07:34 +02:00
}
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
return lv;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_binary_expr_land(ivl_expr_t expr, unsigned wid)
Evaluate the logical AND operator.
2001-04-01 08:49:32 +02:00
{
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_t le = ivl_expr_oper1(expr);
ivl_expr_t re = ivl_expr_oper2(expr);
Evaluate the logical AND operator.
2001-04-01 08:49:32 +02:00
struct vector_info lv;
struct vector_info rv;
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
lv = draw_eval_expr(le, STUFF_OK_XZ);
Support vectors as operands to logical and.
2001-10-10 06:47:43 +02:00
if ((lv.base >= 4) && (lv.wid > 1)) {
struct vector_info tmp;
clr_vector(lv);
tmp.base = allocate_vector(1);
tmp.wid = 1;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
assert(tmp.base);
Support vectors as operands to logical and.
2001-10-10 06:47:43 +02:00
fprintf(vvp_out, " %%or/r %u, %u, %u;\n", tmp.base,
lv.base, lv.wid);
lv = tmp;
}
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
rv = draw_eval_expr(re, STUFF_OK_XZ);
Support vectors as operands to logical and.
2001-10-10 06:47:43 +02:00
if ((rv.base >= 4) && (rv.wid > 1)) {
struct vector_info tmp;
clr_vector(rv);
tmp.base = allocate_vector(1);
tmp.wid = 1;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
assert(tmp.base);
Support vectors as operands to logical and.
2001-10-10 06:47:43 +02:00
fprintf(vvp_out, " %%or/r %u, %u, %u;\n", tmp.base,
rv.base, rv.wid);
rv = tmp;
}
Evaluate the logical AND operator.
2001-04-01 08:49:32 +02:00
if (lv.base < 4) {
if (rv.base < 4) {
unsigned lb = lv.base;
unsigned rb = rv.base;
if ((lb == 0) || (rb == 0)) {
lv.base = 0;
} else if ((lb == 1) && (rb == 1)) {
lv.base = 1;
} else {
lv.base = 2;
}
Support vectors as operands to logical and.
2001-10-10 06:47:43 +02:00
lv.wid = 1;
Evaluate the logical AND operator.
2001-04-01 08:49:32 +02:00
} else {
fprintf(vvp_out, " %%and %u, %u, 1;\n", rv.base, lv.base);
lv = rv;
}
} else {
fprintf(vvp_out, " %%and %u, %u, 1;\n", lv.base, rv.base);
clr_vector(rv);
}
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
/* If we only want the single bit result, then we are done. */
if (wid == 1)
return lv;
/* Write the result into a zero-padded result. */
Remove short int restrictions from vvp opcodes.
2003-06-17 21:17:42 +02:00
{ unsigned base = allocate_vector(wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
if (base == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"for result of padded logical AND.\n",
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_file(expr), ivl_expr_lineno(expr), wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
vvp_errors += 1;
}
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
fprintf(vvp_out, " %%mov %u, %u, 1;\n", base, lv.base);
clr_vector(lv);
lv.base = base;
lv.wid = wid;
fprintf(vvp_out, " %%mov %u, 0, %u;\n", base+1, wid-1);
}
Evaluate the logical AND operator.
2001-04-01 08:49:32 +02:00
return lv;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_binary_expr_lor(ivl_expr_t expr, unsigned wid,
Lor takes advantave of STUFF_OK_47 It is ot uncommon for the arguments to logical or to leave stuff in bit registers 4-7. Allow the lor itself to take advantage of that to save some %mov instructions.
2008-11-22 19:45:15 +01:00
int stuff_ok_flag)
Evalulate logical or (||)
2001-04-29 22:47:39 +02:00
{
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_t le = ivl_expr_oper1(expr);
ivl_expr_t re = ivl_expr_oper2(expr);
Evalulate logical or (||)
2001-04-29 22:47:39 +02:00
struct vector_info lv;
struct vector_info rv;
Proper width handling of || expressions.
2003-05-10 04:38:49 +02:00
lv = draw_eval_expr(le, STUFF_OK_XZ);
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
/* if the left operand has width, then evaluate the single-bit
Spelling fixes (larry doolittle)
2007-02-26 20:49:48 +01:00
logical equivalent. */
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
if ((lv.base >= 4) && (lv.wid > 1)) {
struct vector_info tmp;
clr_vector(lv);
tmp.base = allocate_vector(1);
tmp.wid = 1;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
assert(tmp.base);
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
fprintf(vvp_out, " %%or/r %u, %u, %u;\n", tmp.base,
lv.base, lv.wid);
lv = tmp;
}
Lor takes advantave of STUFF_OK_47 It is ot uncommon for the arguments to logical or to leave stuff in bit registers 4-7. Allow the lor itself to take advantage of that to save some %mov instructions.
2008-11-22 19:45:15 +01:00
/* The right expression may be left in registers 4-7 because
I'll be using it immediately. */
rv = draw_eval_expr(re, STUFF_OK_XZ|STUFF_OK_47);
Evalulate logical or (||)
2001-04-29 22:47:39 +02:00
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
/* if the right operand has width, then evaluate the single-bit
Spelling fixes (larry doolittle)
2007-02-26 20:49:48 +01:00
logical equivalent. */
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
if ((rv.base >= 4) && (rv.wid > 1)) {
struct vector_info tmp;
clr_vector(rv);
tmp.base = allocate_vector(1);
tmp.wid = 1;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
assert(tmp.base);
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
fprintf(vvp_out, " %%or/r %u, %u, %u;\n", tmp.base,
rv.base, rv.wid);
rv = tmp;
}
Evalulate logical or (||)
2001-04-29 22:47:39 +02:00
if (lv.base < 4) {
if (rv.base < 4) {
unsigned lb = lv.base;
unsigned rb = rv.base;
if ((lb == 0) && (rb == 0)) {
lv.base = 0;
} else if ((lb == 1) || (rb == 1)) {
lv.base = 1;
} else {
lv.base = 2;
}
Lor takes advantave of STUFF_OK_47 It is ot uncommon for the arguments to logical or to leave stuff in bit registers 4-7. Allow the lor itself to take advantage of that to save some %mov instructions.
2008-11-22 19:45:15 +01:00
} else if (lv.base==0) {
lv = rv;
Evalulate logical or (||)
2001-04-29 22:47:39 +02:00
} else {
fprintf(vvp_out, " %%or %u, %u, 1;\n", rv.base, lv.base);
lv = rv;
}
Lor takes advantave of STUFF_OK_47 It is ot uncommon for the arguments to logical or to leave stuff in bit registers 4-7. Allow the lor itself to take advantage of that to save some %mov instructions.
2008-11-22 19:45:15 +01:00
} else if (rv.base == 0) {
; /* Just return lv. */
Evalulate logical or (||)
2001-04-29 22:47:39 +02:00
} else {
Lor takes advantave of STUFF_OK_47 It is ot uncommon for the arguments to logical or to leave stuff in bit registers 4-7. Allow the lor itself to take advantage of that to save some %mov instructions.
2008-11-22 19:45:15 +01:00
if (rv.base >= 8 && lv.base < 8 && !(stuff_ok_flag&STUFF_OK_47)) {
/* If STUFF_OK_47 is false, and rv is not in the
47 area (and lv is) then plan to or the result
into the rv instead. This can case a %mov later. */
struct vector_info tmp = lv;
lv = rv;
rv = tmp;
}
OR is %or. Get this right.
2001-04-30 07:11:18 +02:00
fprintf(vvp_out, " %%or %u, %u, 1;\n", lv.base, rv.base);
Lor takes advantave of STUFF_OK_47 It is ot uncommon for the arguments to logical or to leave stuff in bit registers 4-7. Allow the lor itself to take advantage of that to save some %mov instructions.
2008-11-22 19:45:15 +01:00
if (rv.base >= 8) clr_vector(rv);
Evalulate logical or (||)
2001-04-29 22:47:39 +02:00
}
Lor takes advantave of STUFF_OK_47 It is ot uncommon for the arguments to logical or to leave stuff in bit registers 4-7. Allow the lor itself to take advantage of that to save some %mov instructions.
2008-11-22 19:45:15 +01:00
if (wid==1 && (lv.base<4 || lv.base>=8 || (stuff_ok_flag&STUFF_OK_47)))
return lv;
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
/* If we only want the single bit result, then we are done. */
Lor takes advantave of STUFF_OK_47 It is ot uncommon for the arguments to logical or to leave stuff in bit registers 4-7. Allow the lor itself to take advantage of that to save some %mov instructions.
2008-11-22 19:45:15 +01:00
if (wid == 1) {
if (lv.base >= 4 && lv.base < 8) {
unsigned tmp = allocate_vector(1);
fprintf(vvp_out, " %%mov %u, %u, 1;\n", tmp, lv.base);
lv.base = tmp;
}
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
return lv;
Lor takes advantave of STUFF_OK_47 It is ot uncommon for the arguments to logical or to leave stuff in bit registers 4-7. Allow the lor itself to take advantage of that to save some %mov instructions.
2008-11-22 19:45:15 +01:00
}
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
/* Write the result into a zero-padded result. */
Remove short int restrictions from vvp opcodes.
2003-06-17 21:17:42 +02:00
{ unsigned base = allocate_vector(wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
if (base == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"for result of padded logical OR.\n",
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_file(expr), ivl_expr_lineno(expr), wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
vvp_errors += 1;
}
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
fprintf(vvp_out, " %%mov %u, %u, 1;\n", base, lv.base);
Lor takes advantave of STUFF_OK_47 It is ot uncommon for the arguments to logical or to leave stuff in bit registers 4-7. Allow the lor itself to take advantage of that to save some %mov instructions.
2008-11-22 19:45:15 +01:00
if (lv.base >= 8) clr_vector(lv);
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
lv.base = base;
lv.wid = wid;
fprintf(vvp_out, " %%mov %u, 0, %u;\n", base+1, wid-1);
}
Evalulate logical or (||)
2001-04-29 22:47:39 +02:00
return lv;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_binary_expr_le_real(ivl_expr_t expr)
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
{
struct vector_info res;
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_t le = ivl_expr_oper1(expr);
ivl_expr_t re = ivl_expr_oper2(expr);
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
int lword = draw_eval_real(le);
int rword = draw_eval_real(re);
res.base = allocate_vector(1);
res.wid = 1;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
assert(res.base);
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
clr_word(lword);
clr_word(rword);
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
switch (ivl_expr_opcode(expr)) {
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
case '<':
fprintf(vvp_out, " %%cmp/wr %d, %d;\n", lword, rword);
fprintf(vvp_out, " %%mov %u, 5, 1;\n", res.base);
break;
Handle real value subtract and comparisons.
2003-02-07 03:46:16 +01:00
case 'L': /* <= */
fprintf(vvp_out, " %%cmp/wr %d, %d;\n", lword, rword);
fprintf(vvp_out, " %%or 5, 4, 1;\n");
fprintf(vvp_out, " %%mov %u, 5, 1;\n", res.base);
break;
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
case '>':
fprintf(vvp_out, " %%cmp/wr %d, %d;\n", rword, lword);
fprintf(vvp_out, " %%mov %u, 5, 1;\n", res.base);
break;
Handle real value subtract and comparisons.
2003-02-07 03:46:16 +01:00
case 'G': /* >= */
fprintf(vvp_out, " %%cmp/wr %d, %d;\n", rword, lword);
fprintf(vvp_out, " %%or 5, 4, 1;\n");
fprintf(vvp_out, " %%mov %u, 5, 1;\n", res.base);
break;
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
default:
assert(0);
}
return res;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_binary_expr_le_bool(ivl_expr_t expr,
Support bool expressions and compares handle them optimally.
2005-09-14 04:53:13 +02:00
unsigned wid)
{
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_t le = ivl_expr_oper1(expr);
ivl_expr_t re = ivl_expr_oper2(expr);
Support bool expressions and compares handle them optimally.
2005-09-14 04:53:13 +02:00
int lw, rw;
struct vector_info tmp;
char s_flag = (ivl_expr_signed(le) && ivl_expr_signed(re)) ? 's' : 'u';
assert(ivl_expr_value(le) == IVL_VT_BOOL);
assert(ivl_expr_value(re) == IVL_VT_BOOL);
lw = draw_eval_bool64(le);
rw = draw_eval_bool64(re);
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
switch (ivl_expr_opcode(expr)) {
Support bool expressions and compares handle them optimally.
2005-09-14 04:53:13 +02:00
case 'G':
fprintf(vvp_out, " %%cmp/w%c %u, %u;\n", s_flag, rw, lw);
fprintf(vvp_out, " %%or 5, 4, 1;\n");
break;
case 'L':
fprintf(vvp_out, " %%cmp/w%c %u, %u;\n", s_flag, lw, rw);
fprintf(vvp_out, " %%or 5, 4, 1;\n");
break;
case '<':
fprintf(vvp_out, " %%cmp/w%c %u, %u;\n", s_flag, lw, rw);
break;
case '>':
fprintf(vvp_out, " %%cmp/w%c %u, %u;\n", s_flag, rw, lw);
break;
default:
assert(0);
}
clr_word(lw);
clr_word(rw);
/* Move the result out out the 4-7 bit that the compare
uses. This is because that bit may be clobbered by other
expressions. */
{ unsigned base = allocate_vector(wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
if (base == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"for result of padded inequality compare.\n",
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_file(expr), ivl_expr_lineno(expr), wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
vvp_errors += 1;
}
Support bool expressions and compares handle them optimally.
2005-09-14 04:53:13 +02:00
fprintf(vvp_out, " %%mov %u, 5, 1;\n", base);
tmp.base = base;
tmp.wid = wid;
if (wid > 1)
fprintf(vvp_out, " %%mov %u, 0, %u;\n", base+1, wid-1);
}
return tmp;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_binary_expr_le(ivl_expr_t expr,
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
unsigned wid,
int stuff_ok_flag)
Generate code for < and <=.
2001-04-01 09:22:42 +02:00
{
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_t le = ivl_expr_oper1(expr);
ivl_expr_t re = ivl_expr_oper2(expr);
Generate code for < and <=.
2001-04-01 09:22:42 +02:00
struct vector_info lv;
struct vector_info rv;
Get signed compares working correctly in vvp.
2001-04-05 03:12:27 +02:00
char s_flag = (ivl_expr_signed(le) && ivl_expr_signed(re)) ? 's' : 'u';
Generate code for < and <=.
2001-04-01 09:22:42 +02:00
unsigned owid = ivl_expr_width(le);
if (ivl_expr_width(re) > owid)
owid = ivl_expr_width(re);
Handle real value subtract and comparisons.
2003-02-07 03:46:16 +01:00
if (ivl_expr_value(le) == IVL_VT_REAL)
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
return draw_binary_expr_le_real(expr);
Handle real value subtract and comparisons.
2003-02-07 03:46:16 +01:00
if (ivl_expr_value(re) == IVL_VT_REAL)
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
return draw_binary_expr_le_real(expr);
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
Support bool expressions and compares handle them optimally.
2005-09-14 04:53:13 +02:00
/* Detect the special case that we can do this with integers. */
if (ivl_expr_value(le) == IVL_VT_BOOL
&& ivl_expr_value(re) == IVL_VT_BOOL
&& owid < 64) {
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
return draw_binary_expr_le_bool(expr, wid);
Support bool expressions and compares handle them optimally.
2005-09-14 04:53:13 +02:00
}
assert(ivl_expr_value(le) == IVL_VT_LOGIC
|| ivl_expr_value(le) == IVL_VT_BOOL);
assert(ivl_expr_value(re) == IVL_VT_LOGIC
|| ivl_expr_value(re) == IVL_VT_BOOL);
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
More lint removal tgt-vvp/eval_expr.c uninitialized variables vpi/sys_display.c uninitialized variables vvp/vpi_priv.cc deprecated string constant usage vvp/vpi_vthr_vector.cc deprecated string constant usage the last entry invokes vpip_name_string() and uses const char * in the same way as the other 9 callers in vvp/*.cc, the only difference is that the argument is static instead of computed.
2008-01-04 21:25:16 +01:00
lv.wid = 0; lv.base=0;
rv.wid = 0; rv.base=0;
Generate code for < and <=.
2001-04-01 09:22:42 +02:00
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
switch (ivl_expr_opcode(expr)) {
Get signed compares working correctly in vvp.
2001-04-05 03:12:27 +02:00
case 'G':
Optomize runtime using immediate compare Implement compare-immediate instructions and generate code to use these new instructions to improve runtime performance. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-04 05:58:40 +02:00
rv = draw_eval_expr_wid(re, owid, STUFF_OK_XZ);
Allow that sum immediate values can be signed. Actually, the immediate value handling is a little chaotic and should be cleaned up. This patch opens the door for allowing signed immediate values, and uses them in a few places where they are explicitly handled. We must go through the opcodes that can take immediate values and make explicit whether they are signed/unsigned/etc, and what their size limits are.
2008-06-13 22:32:06 +02:00
if (number_is_immediate(le,16,0) && !number_is_unknown(le)) {
Revert bad merge from vhdl branch
2010-10-02 20:02:27 +02:00
long imm = get_number_immediate(le);
Optomize runtime using immediate compare Implement compare-immediate instructions and generate code to use these new instructions to improve runtime performance. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-04 05:58:40 +02:00
assert(imm >= 0);
Revert bad merge from vhdl branch
2010-10-02 20:02:27 +02:00
fprintf(vvp_out, " %%cmpi/%c %u, %ld, %u;\n", s_flag,
Optomize runtime using immediate compare Implement compare-immediate instructions and generate code to use these new instructions to improve runtime performance. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-04 05:58:40 +02:00
rv.base, imm, rv.wid);
} else {
lv = draw_eval_expr_wid(le, owid, STUFF_OK_XZ);
assert(lv.wid == rv.wid);
fprintf(vvp_out, " %%cmp/%c %u, %u, %u;\n", s_flag,
rv.base, lv.base, lv.wid);
}
Get signed compares working correctly in vvp.
2001-04-05 03:12:27 +02:00
fprintf(vvp_out, " %%or 5, 4, 1;\n");
break;
Generate code for < and <=.
2001-04-01 09:22:42 +02:00
case 'L':
Optomize runtime using immediate compare Implement compare-immediate instructions and generate code to use these new instructions to improve runtime performance. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-04 05:58:40 +02:00
lv = draw_eval_expr_wid(le, owid, STUFF_OK_XZ);
Allow that sum immediate values can be signed. Actually, the immediate value handling is a little chaotic and should be cleaned up. This patch opens the door for allowing signed immediate values, and uses them in a few places where they are explicitly handled. We must go through the opcodes that can take immediate values and make explicit whether they are signed/unsigned/etc, and what their size limits are.
2008-06-13 22:32:06 +02:00
if (number_is_immediate(re,16,0) && !number_is_unknown(re)) {
Revert bad merge from vhdl branch
2010-10-02 20:02:27 +02:00
long imm = get_number_immediate(re);
Optomize runtime using immediate compare Implement compare-immediate instructions and generate code to use these new instructions to improve runtime performance. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-04 05:58:40 +02:00
assert(imm >= 0);
Revert bad merge from vhdl branch
2010-10-02 20:02:27 +02:00
fprintf(vvp_out, " %%cmpi/%c %u, %ld, %u;\n", s_flag,
Optomize runtime using immediate compare Implement compare-immediate instructions and generate code to use these new instructions to improve runtime performance. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-04 05:58:40 +02:00
lv.base, imm, lv.wid);
} else {
rv = draw_eval_expr_wid(re, owid, STUFF_OK_XZ);
assert(lv.wid == rv.wid);
fprintf(vvp_out, " %%cmp/%c %u, %u, %u;\n", s_flag,
lv.base, rv.base, lv.wid);
}
Generate code for < and <=.
2001-04-01 09:22:42 +02:00
fprintf(vvp_out, " %%or 5, 4, 1;\n");
break;
case '<':
Optomize runtime using immediate compare Implement compare-immediate instructions and generate code to use these new instructions to improve runtime performance. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-04 05:58:40 +02:00
lv = draw_eval_expr_wid(le, owid, STUFF_OK_XZ);
Allow that sum immediate values can be signed. Actually, the immediate value handling is a little chaotic and should be cleaned up. This patch opens the door for allowing signed immediate values, and uses them in a few places where they are explicitly handled. We must go through the opcodes that can take immediate values and make explicit whether they are signed/unsigned/etc, and what their size limits are.
2008-06-13 22:32:06 +02:00
if (number_is_immediate(re,16,0) && !number_is_unknown(re)) {
Revert bad merge from vhdl branch
2010-10-02 20:02:27 +02:00
long imm = get_number_immediate(re);
Optomize runtime using immediate compare Implement compare-immediate instructions and generate code to use these new instructions to improve runtime performance. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-04 05:58:40 +02:00
assert(imm >= 0);
Revert bad merge from vhdl branch
2010-10-02 20:02:27 +02:00
fprintf(vvp_out, " %%cmpi/%c %u, %ld, %u;\n", s_flag,
Optomize runtime using immediate compare Implement compare-immediate instructions and generate code to use these new instructions to improve runtime performance. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-04 05:58:40 +02:00
lv.base, imm, lv.wid);
} else {
rv = draw_eval_expr_wid(re, owid, STUFF_OK_XZ);
assert(lv.wid == rv.wid);
fprintf(vvp_out, " %%cmp/%c %u, %u, %u;\n", s_flag,
lv.base, rv.base, lv.wid);
}
Get signed compares working correctly in vvp.
2001-04-05 03:12:27 +02:00
break;
case '>':
Optomize runtime using immediate compare Implement compare-immediate instructions and generate code to use these new instructions to improve runtime performance. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-04 05:58:40 +02:00
rv = draw_eval_expr_wid(re, owid, STUFF_OK_XZ);
Allow that sum immediate values can be signed. Actually, the immediate value handling is a little chaotic and should be cleaned up. This patch opens the door for allowing signed immediate values, and uses them in a few places where they are explicitly handled. We must go through the opcodes that can take immediate values and make explicit whether they are signed/unsigned/etc, and what their size limits are.
2008-06-13 22:32:06 +02:00
if (number_is_immediate(le,16,0) && !number_is_unknown(le)) {
Revert bad merge from vhdl branch
2010-10-02 20:02:27 +02:00
long imm = get_number_immediate(le);
Optomize runtime using immediate compare Implement compare-immediate instructions and generate code to use these new instructions to improve runtime performance. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-04 05:58:40 +02:00
assert(imm >= 0);
Revert bad merge from vhdl branch
2010-10-02 20:02:27 +02:00
fprintf(vvp_out, " %%cmpi/%c %u, %ld, %u;\n", s_flag,
Optomize runtime using immediate compare Implement compare-immediate instructions and generate code to use these new instructions to improve runtime performance. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-04 05:58:40 +02:00
rv.base, imm, rv.wid);
} else {
lv = draw_eval_expr_wid(le, owid, STUFF_OK_XZ);
assert(lv.wid == rv.wid);
fprintf(vvp_out, " %%cmp/%c %u, %u, %u;\n", s_flag,
rv.base, lv.base, lv.wid);
}
Generate code for < and <=.
2001-04-01 09:22:42 +02:00
break;
default:
assert(0);
}
Optomize runtime using immediate compare Implement compare-immediate instructions and generate code to use these new instructions to improve runtime performance. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-04 05:58:40 +02:00
if (lv.wid > 0) clr_vector(lv);
if (rv.wid > 0) clr_vector(rv);
Generate code for < and <=.
2001-04-01 09:22:42 +02:00
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
if ((stuff_ok_flag&STUFF_OK_47) && (wid == 1)) {
lv.base = 5;
lv.wid = wid;
return lv;
}
Comparisons cant leave their results in the opcode result area or their values will be clobbered by other parts of a complex expression.
2001-05-01 04:07:34 +02:00
/* Move the result out out the 4-7 bit that the compare
uses. This is because that bit may be clobbered by other
expressions. */
Remove short int restrictions from vvp opcodes.
2003-06-17 21:17:42 +02:00
{ unsigned base = allocate_vector(wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
if (base == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"for result of padded inequality compare.\n",
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_file(expr), ivl_expr_lineno(expr), wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
vvp_errors += 1;
}
Comparisons cant leave their results in the opcode result area or their values will be clobbered by other parts of a complex expression.
2001-05-01 04:07:34 +02:00
fprintf(vvp_out, " %%mov %u, 5, 1;\n", base);
lv.base = base;
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
lv.wid = wid;
if (wid > 1)
fprintf(vvp_out, " %%mov %u, 0, %u;\n", base+1, wid-1);
Comparisons cant leave their results in the opcode result area or their values will be clobbered by other parts of a complex expression.
2001-05-01 04:07:34 +02:00
}
Generate code for < and <=.
2001-04-01 09:22:42 +02:00
return lv;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_logic_immediate(ivl_expr_t expr,
Better use of immediate operands. Clarify that operands are typically 32bits, and have the code generator make better use of this. Also improve the %movi implementation to work well with marger vectors. Add the %andi instruction to use immediate operands.
2008-05-28 02:51:28 +02:00
ivl_expr_t le,
ivl_expr_t re,
unsigned wid)
{
struct vector_info lv = draw_eval_expr_wid(le, wid, STUFF_OK_XZ);
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
assert(number_is_immediate(re, IMM_WID, 0));
assert(! number_is_unknown(re));
Better use of immediate operands. Clarify that operands are typically 32bits, and have the code generator make better use of this. Also improve the %movi implementation to work well with marger vectors. Add the %andi instruction to use immediate operands.
2008-05-28 02:51:28 +02:00
unsigned long imm = get_number_immediate(re);
assert(lv.base >= 4);
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
switch (ivl_expr_opcode(expr)) {
Better use of immediate operands. Clarify that operands are typically 32bits, and have the code generator make better use of this. Also improve the %movi implementation to work well with marger vectors. Add the %andi instruction to use immediate operands.
2008-05-28 02:51:28 +02:00
case '&':
fprintf(vvp_out, " %%andi %u, %lu, %u;\n", lv.base, imm, lv.wid);
break;
default:
assert(0);
break;
}
return lv;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_binary_expr_logic(ivl_expr_t expr,
Evaluate binary & and | operators.
2001-04-02 05:47:49 +02:00
unsigned wid)
{
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_t le = ivl_expr_oper1(expr);
ivl_expr_t re = ivl_expr_oper2(expr);
Content-free portability fixes. These are patches from ITOH Yasufumi and Larry Doolittle of pr2120948. They change nothing, but make the code compile with older compilers.
2008-09-30 03:06:47 +02:00
struct vector_info lv;
struct vector_info rv;
Evaluate binary & and | operators.
2001-04-02 05:47:49 +02:00
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if (ivl_expr_opcode(expr) == '&') {
Allow that sum immediate values can be signed. Actually, the immediate value handling is a little chaotic and should be cleaned up. This patch opens the door for allowing signed immediate values, and uses them in a few places where they are explicitly handled. We must go through the opcodes that can take immediate values and make explicit whether they are signed/unsigned/etc, and what their size limits are.
2008-06-13 22:32:06 +02:00
if (number_is_immediate(re, IMM_WID, 0) && !number_is_unknown(re))
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
return draw_logic_immediate(expr, le, re, wid);
Allow that sum immediate values can be signed. Actually, the immediate value handling is a little chaotic and should be cleaned up. This patch opens the door for allowing signed immediate values, and uses them in a few places where they are explicitly handled. We must go through the opcodes that can take immediate values and make explicit whether they are signed/unsigned/etc, and what their size limits are.
2008-06-13 22:32:06 +02:00
if (number_is_immediate(le, IMM_WID, 0) && !number_is_unknown(le))
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
return draw_logic_immediate(expr, re, le, wid);
Better use of immediate operands. Clarify that operands are typically 32bits, and have the code generator make better use of this. Also improve the %movi implementation to work well with marger vectors. Add the %andi instruction to use immediate operands.
2008-05-28 02:51:28 +02:00
}
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
lv = draw_eval_expr_wid(le, wid, STUFF_OK_XZ);
rv = draw_eval_expr_wid(re, wid, STUFF_OK_XZ);
Evaluate binary & and | operators.
2001-04-02 05:47:49 +02:00
Add support for behavioral xnor.
2001-04-15 06:07:56 +02:00
/* The result goes into the left operand, and that is returned
as the result. The instructions do not allow the lv value
to be a constant bit, so we either switch the operands, or
copy the vector into a new area. */
if (lv.base < 4) {
if (rv.base > 4) {
struct vector_info tmp = lv;
lv = rv;
rv = tmp;
} else {
struct vector_info tmp;
tmp.base = allocate_vector(lv.wid);
tmp.wid = lv.wid;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
if (tmp.base == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"for result of binary logic.\n",
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_file(expr), ivl_expr_lineno(expr),
wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
vvp_errors += 1;
}
Add support for behavioral xnor.
2001-04-15 06:07:56 +02:00
fprintf(vvp_out, " %%mov %u, %u, %u;\n",
tmp.base, lv.base, tmp.wid);
lv = tmp;
}
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
switch (ivl_expr_opcode(expr)) {
Evaluate binary & and | operators.
2001-04-02 05:47:49 +02:00
case '&':
Generate mixed real/vector expressions when needed. When generating a real expression you can have bits of the expression that use vector only operands. When this happens evaluate that part of the expression as a vector and then convert it to a real value.
2008-04-21 22:45:32 +02:00
fprintf(vvp_out, " %%and %u, %u, %u;\n",
Evaluate binary & and | operators.
2001-04-02 05:47:49 +02:00
lv.base, rv.base, wid);
break;
case '|':
Generate mixed real/vector expressions when needed. When generating a real expression you can have bits of the expression that use vector only operands. When this happens evaluate that part of the expression as a vector and then convert it to a real value.
2008-04-21 22:45:32 +02:00
fprintf(vvp_out, " %%or %u, %u, %u;\n",
Evaluate binary & and | operators.
2001-04-02 05:47:49 +02:00
lv.base, rv.base, wid);
break;
add XOR support.
2001-04-15 18:37:48 +02:00
case '^':
Generate mixed real/vector expressions when needed. When generating a real expression you can have bits of the expression that use vector only operands. When this happens evaluate that part of the expression as a vector and then convert it to a real value.
2008-04-21 22:45:32 +02:00
fprintf(vvp_out, " %%xor %u, %u, %u;\n",
add XOR support.
2001-04-15 18:37:48 +02:00
lv.base, rv.base, wid);
break;
Add support for binary nand operator.
2002-09-12 17:49:43 +02:00
case 'A': /* NAND (~&) */
fprintf(vvp_out, " %%nand %u, %u, %u;\n",
lv.base, rv.base, wid);
break;
Add support for binary NOR operator.
2002-09-18 06:29:55 +02:00
case 'O': /* NOR (~|) */
fprintf(vvp_out, " %%nor %u, %u, %u;\n",
lv.base, rv.base, wid);
break;
Add support for behavioral xnor.
2001-04-15 06:07:56 +02:00
case 'X': /* exclusive nor (~^) */
fprintf(vvp_out, " %%xnor %u, %u, %u;\n",
lv.base, rv.base, wid);
break;
Evaluate binary & and | operators.
2001-04-02 05:47:49 +02:00
default:
assert(0);
}
clr_vector(rv);
return lv;
}
Generate %shiftl instructions for shift.
2001-06-23 20:40:34 +02:00
/*
* Draw code to evaluate the << expression. Use the %shiftl/i0
Support non-const right shift (unsigned).
2001-06-30 23:07:26 +02:00
* or %shiftr/i0 instruction to do the real work of shifting. This
* means that I can handle both left and right shifts in this
* function, with the only difference the opcode I generate at the
* end.
Generate %shiftl instructions for shift.
2001-06-23 20:40:34 +02:00
*/
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_binary_expr_lrs(ivl_expr_t expr, unsigned wid)
Left shift by a constant amount.
2001-04-21 03:49:17 +02:00
{
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_t le = ivl_expr_oper1(expr);
ivl_expr_t re = ivl_expr_oper2(expr);
Evaluate shift index after shift operand because the chift operand may use the index register itself.
2002-12-20 02:11:14 +01:00
const char*opcode = "?";
Left shift by a constant amount.
2001-04-21 03:49:17 +02:00
struct vector_info lv;
Evaluate shift index after shift operand because the chift operand may use the index register itself.
2002-12-20 02:11:14 +01:00
/* Evaluate the expression that is to be shifted. */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
switch (ivl_expr_opcode(expr)) {
Right shift by constant.
2001-04-21 05:26:23 +02:00
Support non-const right shift (unsigned).
2001-06-30 23:07:26 +02:00
case 'l': /* << (left shift) */
Allow right values of right shift to shift in.
2002-11-21 23:42:48 +01:00
lv = draw_eval_expr_wid(le, wid, 0);
Careful of left operands to shift that are constant.
2002-11-22 01:01:50 +01:00
/* shifting 0 gets 0. */
if (lv.base == 0)
Fix bug generating code for shift of constant zero. The code generator detects this case, but instead of returning the constant zero, it breaks out and writes partial code for the shift.
2008-11-13 06:46:23 +01:00
return lv;
Careful of left operands to shift that are constant.
2002-11-22 01:01:50 +01:00
if (lv.base < 4) {
struct vector_info tmp;
tmp.base = allocate_vector(lv.wid);
tmp.wid = lv.wid;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
if (tmp.base == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"for result of left shift (<<).\n",
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_file(expr), ivl_expr_lineno(expr),
wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
vvp_errors += 1;
}
Careful of left operands to shift that are constant.
2002-11-22 01:01:50 +01:00
fprintf(vvp_out, " %%mov %u, %u, %u;\n",
tmp.base, lv.base, lv.wid);
lv = tmp;
}
Evaluate shift index after shift operand because the chift operand may use the index register itself.
2002-12-20 02:11:14 +01:00
opcode = "%shiftl";
Support non-const right shift (unsigned).
2001-06-30 23:07:26 +02:00
break;
Right shift by constant.
2001-04-21 05:26:23 +02:00
Support non-const right shift (unsigned).
2001-06-30 23:07:26 +02:00
case 'r': /* >> (unsigned right shift) */
Allow right values of right shift to shift in.
2002-11-21 23:42:48 +01:00
/* with the right shift, there may be high bits that are
shifted into the desired width of the expression, so
we let the expression size itself, if it is bigger
then what is requested of us. */
if (wid > ivl_expr_width(le)) {
lv = draw_eval_expr_wid(le, wid, 0);
} else {
lv = draw_eval_expr_wid(le, ivl_expr_width(le), 0);
}
Careful of left operands to shift that are constant.
2002-11-22 01:01:50 +01:00
/* shifting 0 gets 0. */
if (lv.base == 0)
Fix bug generating code for shift of constant zero. The code generator detects this case, but instead of returning the constant zero, it breaks out and writes partial code for the shift.
2008-11-13 06:46:23 +01:00
return lv;
Careful of left operands to shift that are constant.
2002-11-22 01:01:50 +01:00
if (lv.base < 4) {
struct vector_info tmp;
tmp.base = allocate_vector(lv.wid);
tmp.wid = lv.wid;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
if (tmp.base == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"for result of right shift (>>).\n",
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_file(expr), ivl_expr_lineno(expr),
lv.wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
vvp_errors += 1;
}
Careful of left operands to shift that are constant.
2002-11-22 01:01:50 +01:00
fprintf(vvp_out, " %%mov %u, %u, %u;\n",
tmp.base, lv.base, lv.wid);
lv = tmp;
}
Evaluate shift index after shift operand because the chift operand may use the index register itself.
2002-12-20 02:11:14 +01:00
opcode = "%shiftr";
Right shift by constant.
2001-04-21 05:26:23 +02:00
break;
Support non-const right shift (unsigned).
2001-06-30 23:07:26 +02:00
Add arithmetic shift operators.
2003-06-18 05:55:18 +02:00
case 'R': /* >>> (signed right shift) */
/* with the right shift, there may be high bits that are
shifted into the desired width of the expression, so
we let the expression size itself, if it is bigger
then what is requested of us. */
if (wid > ivl_expr_width(le)) {
lv = draw_eval_expr_wid(le, wid, 0);
} else {
lv = draw_eval_expr_wid(le, ivl_expr_width(le), 0);
}
/* shifting 0 gets 0. */
if (lv.base == 0)
Fix bug generating code for shift of constant zero. The code generator detects this case, but instead of returning the constant zero, it breaks out and writes partial code for the shift.
2008-11-13 06:46:23 +01:00
return lv;
Add arithmetic shift operators.
2003-06-18 05:55:18 +02:00
/* Sign extend any constant begets itself, if this
expression is signed. */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if ((lv.base < 4) && (ivl_expr_signed(expr)))
Shifting a signed constant should just return the L-value. We already covered the case of shifting zero, but the case of shifting a signed constant was missed.
2008-11-14 02:23:39 +01:00
return lv;
Add arithmetic shift operators.
2003-06-18 05:55:18 +02:00
if (lv.base < 4) {
struct vector_info tmp;
tmp.base = allocate_vector(lv.wid);
tmp.wid = lv.wid;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
if (tmp.base == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"for result of right shift (>>>).\n",
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_file(expr), ivl_expr_lineno(expr),
lv.wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
vvp_errors += 1;
}
Add arithmetic shift operators.
2003-06-18 05:55:18 +02:00
fprintf(vvp_out, " %%mov %u, %u, %u;\n",
tmp.base, lv.base, lv.wid);
lv = tmp;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if (ivl_expr_signed(expr))
Add arithmetic shift operators.
2003-06-18 05:55:18 +02:00
opcode = "%shiftr/s";
else
opcode = "%shiftr";
break;
Right shift by constant.
2001-04-21 05:26:23 +02:00
default:
assert(0);
}
Evaluate shift index after shift operand because the chift operand may use the index register itself.
2002-12-20 02:11:14 +01:00
/* Figure out the shift amount and load that into the index
register. The value may be a constant, or may need to be
evaluated at run time. */
Add %ix/getv instruction The %ix/getv instruction loads an integer register directly from a signal vector. This is an optimization that an index register is loaded from an expression is only a signal. It avoids the thread vector space.
2007-12-07 22:12:19 +01:00
eval_logic_into_integer(re,0);
Evaluate shift index after shift operand because the chift operand may use the index register itself.
2002-12-20 02:11:14 +01:00
fprintf(vvp_out, " %s/i0 %u, %u;\n", opcode, lv.base, lv.wid);
if (lv.base >= 8)
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
save_expression_lookaside(lv.base, expr, lv.wid);
Evaluate shift index after shift operand because the chift operand may use the index register itself.
2002-12-20 02:11:14 +01:00
Support non-const right shift (unsigned).
2001-06-30 23:07:26 +02:00
return lv;
Right shift by constant.
2001-04-21 05:26:23 +02:00
}
Optimize load-add with load/add instruction Where and expression is an immediate value added to a signal value, it is possible to optimize them to a single instruction that combines the load with an add at the same time.
2007-12-05 04:15:15 +01:00
static struct vector_info draw_load_add_immediate(ivl_expr_t le,
ivl_expr_t re,
Load_add_immediate to work with signed expressions The %load/vp0 instruction adds a signed value to the signal value being loaded, but it doesn't allow for a signed source vector. Add the %load/vp0/s instruction that pads the loaded vector, and add the code generator details to properly use it.
2008-06-14 05:23:40 +02:00
unsigned wid,
int signed_flag)
Optimize load-add with load/add instruction Where and expression is an immediate value added to a signal value, it is possible to optimize them to a single instruction that combines the load with an add at the same time.
2007-12-05 04:15:15 +01:00
{
struct vector_info lv;
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
long imm;
assert(! number_is_unknown(re));
Add support for 64 bit delays in procedural non-blocking assignments. This patch adds support for 64 bit non-blocking delays in procedural code. We fixed the procedural delay operator (blocking delays) earlier. This patch mostly mimics what was done there. The continuous assignment delay operator still needs to be fixed.
2009-02-17 01:44:52 +01:00
assert(number_is_immediate(re, IMM_WID, 1));
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
imm = get_number_immediate(re);
Optimize load-add with load/add instruction Where and expression is an immediate value added to a signal value, it is possible to optimize them to a single instruction that combines the load with an add at the same time.
2007-12-05 04:15:15 +01:00
lv.base = allocate_vector(wid);
lv.wid = wid;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
if (lv.base == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"for result of addition.\n",
ivl_expr_file(le), ivl_expr_lineno(le), wid);
vvp_errors += 1;
}
Optimize load-add with load/add instruction Where and expression is an immediate value added to a signal value, it is possible to optimize them to a single instruction that combines the load with an add at the same time.
2007-12-05 04:15:15 +01:00
Add %load/avp0 opcode and fix %load/vp0. This patch adds a new opcode %load/avp0 that is used to load a word from an array and add a value to it. %load/vp0 was changed/fixed to do the summation at the result width not the vector width. This allows small vectors to index large arrays with an offset. A few errors in the opcodes.txt file were also fixed.
2008-01-13 03:22:46 +01:00
/* Load the signal value with a %load that adds the index
Optimize load-add with load/add instruction Where and expression is an immediate value added to a signal value, it is possible to optimize them to a single instruction that combines the load with an add at the same time.
2007-12-05 04:15:15 +01:00
register to the value being loaded. */
Load_add_immediate to work with signed expressions The %load/vp0 instruction adds a signed value to the signal value being loaded, but it doesn't allow for a signed source vector. Add the %load/vp0/s instruction that pads the loaded vector, and add the code generator details to properly use it.
2008-06-14 05:23:40 +02:00
draw_signal_dest(le, lv, signed_flag, imm);
Optimize load-add with load/add instruction Where and expression is an immediate value added to a signal value, it is possible to optimize them to a single instruction that combines the load with an add at the same time.
2007-12-05 04:15:15 +01:00
return lv;
}
Generate %muli instructions when possible.
2002-05-31 22:04:57 +02:00
static struct vector_info draw_add_immediate(ivl_expr_t le,
ivl_expr_t re,
unsigned wid)
{
struct vector_info lv;
unsigned long imm;
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
lv = draw_eval_expr_wid(le, wid, STUFF_OK_XZ);
Generate %muli instructions when possible.
2002-05-31 22:04:57 +02:00
assert(lv.wid == wid);
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
assert(! number_is_unknown(re));
assert(number_is_immediate(re, IMM_WID, 0));
Generate %muli instructions when possible.
2002-05-31 22:04:57 +02:00
imm = get_number_immediate(re);
Fix handling of 32bit IMM in %addi on 32bit machines The handling of immediate add used to do 16bits at a time. When it went up to 32bits, the need to work in chunks vanished, but the chunk handling was still there, this time shifting by 32, which causes problems on 32bit machines. Simplify the %addi handling to avoid this.
2008-05-28 17:47:28 +02:00
/* This shouldn't generally happen, because the elaborator
should take care of simple constant propagation like this,
but it doesn't have to and it is easy to catch here. */
if (imm == 0)
return lv;
switch (lv.base) {
case 0: /* Left expression is 0. */
lv.base = allocate_vector(wid);
if (lv.base == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"for result of addition.\n",
ivl_expr_file(re), ivl_expr_lineno(re), wid);
vvp_errors += 1;
}
Fix some large/negative immediate value compiler bugs. Fix how immediate values are checked and allow a large negative value to be returned from get_number_immediate().
2010-05-24 05:50:21 +02:00
fprintf(vvp_out, " %%movi %u, %lu %u;\n", lv.base, imm, wid);
Fix handling of 32bit IMM in %addi on 32bit machines The handling of immediate add used to do 16bits at a time. When it went up to 32bits, the need to work in chunks vanished, but the chunk handling was still there, this time shifting by 32, which causes problems on 32bit machines. Simplify the %addi handling to avoid this.
2008-05-28 17:47:28 +02:00
break;
case 1: /* Left expression is 1...1 (i.e. -1) */
imm -= 1;
if (imm == 0) {
lv.base = 0;
} else {
lv.base = allocate_vector(wid);
if (lv.base == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"for result of addition.\n",
ivl_expr_file(re), ivl_expr_lineno(re), wid);
vvp_errors += 1;
}
Fix some large/negative immediate value compiler bugs. Fix how immediate values are checked and allow a large negative value to be returned from get_number_immediate().
2010-05-24 05:50:21 +02:00
fprintf(vvp_out, " %%movi %u, %lu %u;\n", lv.base, imm, wid);
Fix handling of 32bit IMM in %addi on 32bit machines The handling of immediate add used to do 16bits at a time. When it went up to 32bits, the need to work in chunks vanished, but the chunk handling was still there, this time shifting by 32, which causes problems on 32bit machines. Simplify the %addi handling to avoid this.
2008-05-28 17:47:28 +02:00
}
break;
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
case 2: /* Left expression is 'bx or 'bz */
Fix handling of 32bit IMM in %addi on 32bit machines The handling of immediate add used to do 16bits at a time. When it went up to 32bits, the need to work in chunks vanished, but the chunk handling was still there, this time shifting by 32, which causes problems on 32bit machines. Simplify the %addi handling to avoid this.
2008-05-28 17:47:28 +02:00
case 3:
lv.base = 2;
break;
default: /* The regular case. */
Fix some large/negative immediate value compiler bugs. Fix how immediate values are checked and allow a large negative value to be returned from get_number_immediate().
2010-05-24 05:50:21 +02:00
fprintf(vvp_out, " %%addi %u, %lu, %u;\n", lv.base, imm, wid);
Fix handling of 32bit IMM in %addi on 32bit machines The handling of immediate add used to do 16bits at a time. When it went up to 32bits, the need to work in chunks vanished, but the chunk handling was still there, this time shifting by 32, which causes problems on 32bit machines. Simplify the %addi handling to avoid this.
2008-05-28 17:47:28 +02:00
break;
Use addi with wide immediate values.
2002-05-30 03:57:23 +02:00
}
Add %addi, which is faster to simulate.
2002-05-29 18:29:34 +02:00
return lv;
}
Support non-const right shift (unsigned).
2001-06-30 23:07:26 +02:00
Add the %subi instruction, and use it where possible.
2002-08-28 20:38:07 +02:00
/*
* The subi is restricted to imm operands that are <= 16 bits wide.
*/
static struct vector_info draw_sub_immediate(ivl_expr_t le,
ivl_expr_t re,
unsigned wid)
{
struct vector_info lv;
unsigned long imm;
Subtract from constant values.
2003-08-03 05:53:38 +02:00
unsigned tmp;
Add the %subi instruction, and use it where possible.
2002-08-28 20:38:07 +02:00
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
lv = draw_eval_expr_wid(le, wid, STUFF_OK_XZ);
Add the %subi instruction, and use it where possible.
2002-08-28 20:38:07 +02:00
assert(lv.wid == wid);
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
assert(! number_is_unknown(re));
assert(number_is_immediate(re, IMM_WID, 0));
Add the %subi instruction, and use it where possible.
2002-08-28 20:38:07 +02:00
imm = get_number_immediate(re);
Fix handling of 32bit IMM in %addi on 32bit machines The handling of immediate add used to do 16bits at a time. When it went up to 32bits, the need to work in chunks vanished, but the chunk handling was still there, this time shifting by 32, which causes problems on 32bit machines. Simplify the %addi handling to avoid this.
2008-05-28 17:47:28 +02:00
if (imm == 0)
return lv;
Add the %subi instruction, and use it where possible.
2002-08-28 20:38:07 +02:00
Subtract from constant values.
2003-08-03 05:53:38 +02:00
switch (lv.base) {
case 0:
case 1:
tmp = allocate_vector(wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
if (tmp == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"for result of subtraction.\n",
ivl_expr_file(le), ivl_expr_lineno(le), wid);
vvp_errors += 1;
}
When evaluating a constant into an index make sure to clear bit 4. When evaluating an expression into an index register bit 4 is used to determine if the expression had any X/Z bits. In the case of a constant immediate value this can not happen so make sure the bit is cleared.
2008-09-18 01:18:17 +02:00
fprintf(vvp_out, " %%mov %u, %u, %u;\n", tmp, lv.base, wid);
Subtract from constant values.
2003-08-03 05:53:38 +02:00
lv.base = tmp;
When evaluating a constant into an index make sure to clear bit 4. When evaluating an expression into an index register bit 4 is used to determine if the expression had any X/Z bits. In the case of a constant immediate value this can not happen so make sure the bit is cleared.
2008-09-18 01:18:17 +02:00
fprintf(vvp_out, " %%subi %u, %lu, %u;\n", lv.base, imm, wid);
Fix handling of 32bit IMM in %addi on 32bit machines The handling of immediate add used to do 16bits at a time. When it went up to 32bits, the need to work in chunks vanished, but the chunk handling was still there, this time shifting by 32, which causes problems on 32bit machines. Simplify the %addi handling to avoid this.
2008-05-28 17:47:28 +02:00
break;
Subtract from constant values.
2003-08-03 05:53:38 +02:00
case 2:
case 3:
lv.base = 2;
Fix handling of 32bit IMM in %addi on 32bit machines The handling of immediate add used to do 16bits at a time. When it went up to 32bits, the need to work in chunks vanished, but the chunk handling was still there, this time shifting by 32, which causes problems on 32bit machines. Simplify the %addi handling to avoid this.
2008-05-28 17:47:28 +02:00
break;
Subtract from constant values.
2003-08-03 05:53:38 +02:00
default:
When evaluating a constant into an index make sure to clear bit 4. When evaluating an expression into an index register bit 4 is used to determine if the expression had any X/Z bits. In the case of a constant immediate value this can not happen so make sure the bit is cleared.
2008-09-18 01:18:17 +02:00
fprintf(vvp_out, " %%subi %u, %lu, %u;\n", lv.base, imm, wid);
Fix handling of 32bit IMM in %addi on 32bit machines The handling of immediate add used to do 16bits at a time. When it went up to 32bits, the need to work in chunks vanished, but the chunk handling was still there, this time shifting by 32, which causes problems on 32bit machines. Simplify the %addi handling to avoid this.
2008-05-28 17:47:28 +02:00
break;
Subtract from constant values.
2003-08-03 05:53:38 +02:00
}
Add the %subi instruction, and use it where possible.
2002-08-28 20:38:07 +02:00
return lv;
}
Generate %muli instructions when possible.
2002-05-31 22:04:57 +02:00
static struct vector_info draw_mul_immediate(ivl_expr_t le,
ivl_expr_t re,
unsigned wid)
{
struct vector_info lv;
unsigned long imm;
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
lv = draw_eval_expr_wid(le, wid, STUFF_OK_XZ);
Generate %muli instructions when possible.
2002-05-31 22:04:57 +02:00
assert(lv.wid == wid);
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
assert(! number_is_unknown(re));
assert(number_is_immediate(re, IMM_WID, 0));
Generate %muli instructions when possible.
2002-05-31 22:04:57 +02:00
imm = get_number_immediate(re);
Fix handling of 32bit IMM in %addi on 32bit machines The handling of immediate add used to do 16bits at a time. When it went up to 32bits, the need to work in chunks vanished, but the chunk handling was still there, this time shifting by 32, which causes problems on 32bit machines. Simplify the %addi handling to avoid this.
2008-05-28 17:47:28 +02:00
if (imm == 0)
return lv;
Generate %muli instructions when possible.
2002-05-31 22:04:57 +02:00
When evaluating a constant into an index make sure to clear bit 4. When evaluating an expression into an index register bit 4 is used to determine if the expression had any X/Z bits. In the case of a constant immediate value this can not happen so make sure the bit is cleared.
2008-09-18 01:18:17 +02:00
fprintf(vvp_out, " %%muli %u, %lu, %u;\n", lv.base, imm, lv.wid);
Generate %muli instructions when possible.
2002-05-31 22:04:57 +02:00
return lv;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_binary_expr_arith(ivl_expr_t expr, unsigned wid)
Generate code for + and concat expressions.
2001-03-31 04:00:44 +02:00
{
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_t le = ivl_expr_oper1(expr);
ivl_expr_t re = ivl_expr_oper2(expr);
Generate code for + and concat expressions.
2001-03-31 04:00:44 +02:00
struct vector_info lv;
struct vector_info rv;
Use correct sign for signal and constant addition. This was incorrectly using the expression sign not checking if the two sub-expressions are both signed. This likely used to work, but in the context of $signed which sets the expression to signed so we can have a signed expression without both sub-expressions being signed.
2009-06-24 19:07:12 +02:00
int signed_flag = ivl_expr_signed(le) && ivl_expr_signed(re) ? 1 : 0;
const char*sign_string = signed_flag ? "/s" : "";
Support signed integer division.
2002-04-14 20:41:34 +02:00
Load_add_immediate to work with signed expressions The %load/vp0 instruction adds a signed value to the signal value being loaded, but it doesn't allow for a signed source vector. Add the %load/vp0/s instruction that pads the loaded vector, and add the code generator details to properly use it.
2008-06-14 05:23:40 +02:00
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if ((ivl_expr_opcode(expr) == '+')
Optimize load-add with load/add instruction Where and expression is an immediate value added to a signal value, it is possible to optimize them to a single instruction that combines the load with an add at the same time.
2007-12-05 04:15:15 +01:00
&& (ivl_expr_type(le) == IVL_EX_SIGNAL)
Check that numbers fit into the correct immediate width (32 bits). Even on 64 bit machines immediate values should be limited to 32 bits so that the a.out file will run correctly on a 32 bit machine. This patch fixes a number of places where the code generator was not checking for/observing this.
2008-10-07 01:22:34 +02:00
&& (ivl_expr_type(re) == IVL_EX_ULONG)
&& number_is_immediate(re, IMM_WID, 1))
Load_add_immediate to work with signed expressions The %load/vp0 instruction adds a signed value to the signal value being loaded, but it doesn't allow for a signed source vector. Add the %load/vp0/s instruction that pads the loaded vector, and add the code generator details to properly use it.
2008-06-14 05:23:40 +02:00
return draw_load_add_immediate(le, re, wid, signed_flag);
Optimize load-add with load/add instruction Where and expression is an immediate value added to a signal value, it is possible to optimize them to a single instruction that combines the load with an add at the same time.
2007-12-05 04:15:15 +01:00
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if ((ivl_expr_opcode(expr) == '+')
Optimize load-add with load/add instruction Where and expression is an immediate value added to a signal value, it is possible to optimize them to a single instruction that combines the load with an add at the same time.
2007-12-05 04:15:15 +01:00
&& (ivl_expr_type(le) == IVL_EX_SIGNAL)
Check that numbers fit into the correct immediate width (32 bits). Even on 64 bit machines immediate values should be limited to 32 bits so that the a.out file will run correctly on a 32 bit machine. This patch fixes a number of places where the code generator was not checking for/observing this.
2008-10-07 01:22:34 +02:00
&& (ivl_expr_type(re) == IVL_EX_NUMBER)
&& (! number_is_unknown(re))
&& number_is_immediate(re, IMM_WID, 1))
Load_add_immediate to work with signed expressions The %load/vp0 instruction adds a signed value to the signal value being loaded, but it doesn't allow for a signed source vector. Add the %load/vp0/s instruction that pads the loaded vector, and add the code generator details to properly use it.
2008-06-14 05:23:40 +02:00
return draw_load_add_immediate(le, re, wid, signed_flag);
Optimize load-add with load/add instruction Where and expression is an immediate value added to a signal value, it is possible to optimize them to a single instruction that combines the load with an add at the same time.
2007-12-05 04:15:15 +01:00
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if ((ivl_expr_opcode(expr) == '+')
Optimize load-add with load/add instruction Where and expression is an immediate value added to a signal value, it is possible to optimize them to a single instruction that combines the load with an add at the same time.
2007-12-05 04:15:15 +01:00
&& (ivl_expr_type(re) == IVL_EX_SIGNAL)
Check that numbers fit into the correct immediate width (32 bits). Even on 64 bit machines immediate values should be limited to 32 bits so that the a.out file will run correctly on a 32 bit machine. This patch fixes a number of places where the code generator was not checking for/observing this.
2008-10-07 01:22:34 +02:00
&& (ivl_expr_type(le) == IVL_EX_ULONG)
&& number_is_immediate(re, IMM_WID, 1))
Load_add_immediate to work with signed expressions The %load/vp0 instruction adds a signed value to the signal value being loaded, but it doesn't allow for a signed source vector. Add the %load/vp0/s instruction that pads the loaded vector, and add the code generator details to properly use it.
2008-06-14 05:23:40 +02:00
return draw_load_add_immediate(re, le, wid, signed_flag);
Optimize load-add with load/add instruction Where and expression is an immediate value added to a signal value, it is possible to optimize them to a single instruction that combines the load with an add at the same time.
2007-12-05 04:15:15 +01:00
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if ((ivl_expr_opcode(expr) == '+')
Optimize load-add with load/add instruction Where and expression is an immediate value added to a signal value, it is possible to optimize them to a single instruction that combines the load with an add at the same time.
2007-12-05 04:15:15 +01:00
&& (ivl_expr_type(re) == IVL_EX_SIGNAL)
Check that numbers fit into the correct immediate width (32 bits). Even on 64 bit machines immediate values should be limited to 32 bits so that the a.out file will run correctly on a 32 bit machine. This patch fixes a number of places where the code generator was not checking for/observing this.
2008-10-07 01:22:34 +02:00
&& (ivl_expr_type(le) == IVL_EX_NUMBER)
&& (! number_is_unknown(le))
&& number_is_immediate(le, IMM_WID, 1))
Load_add_immediate to work with signed expressions The %load/vp0 instruction adds a signed value to the signal value being loaded, but it doesn't allow for a signed source vector. Add the %load/vp0/s instruction that pads the loaded vector, and add the code generator details to properly use it.
2008-06-14 05:23:40 +02:00
return draw_load_add_immediate(re, le, wid, signed_flag);
Optimize load-add with load/add instruction Where and expression is an immediate value added to a signal value, it is possible to optimize them to a single instruction that combines the load with an add at the same time.
2007-12-05 04:15:15 +01:00
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if ((ivl_expr_opcode(expr) == '+')
Check that numbers fit into the correct immediate width (32 bits). Even on 64 bit machines immediate values should be limited to 32 bits so that the a.out file will run correctly on a 32 bit machine. This patch fixes a number of places where the code generator was not checking for/observing this.
2008-10-07 01:22:34 +02:00
&& (ivl_expr_type(re) == IVL_EX_ULONG)
&& number_is_immediate(re, IMM_WID, 0))
Add %addi, which is faster to simulate.
2002-05-29 18:29:34 +02:00
return draw_add_immediate(le, re, wid);
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if ((ivl_expr_opcode(expr) == '+')
Use addi with wide immediate values.
2002-05-30 03:57:23 +02:00
&& (ivl_expr_type(re) == IVL_EX_NUMBER)
Generate %muli instructions when possible.
2002-05-31 22:04:57 +02:00
&& (! number_is_unknown(re))
Check that numbers fit into the correct immediate width (32 bits). Even on 64 bit machines immediate values should be limited to 32 bits so that the a.out file will run correctly on a 32 bit machine. This patch fixes a number of places where the code generator was not checking for/observing this.
2008-10-07 01:22:34 +02:00
&& number_is_immediate(re, IMM_WID, 0))
Add %addi, which is faster to simulate.
2002-05-29 18:29:34 +02:00
return draw_add_immediate(le, re, wid);
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if ((ivl_expr_opcode(expr) == '-')
Check that numbers fit into the correct immediate width (32 bits). Even on 64 bit machines immediate values should be limited to 32 bits so that the a.out file will run correctly on a 32 bit machine. This patch fixes a number of places where the code generator was not checking for/observing this.
2008-10-07 01:22:34 +02:00
&& (ivl_expr_type(re) == IVL_EX_ULONG)
&& number_is_immediate(re, IMM_WID, 0))
Add the %subi instruction, and use it where possible.
2002-08-28 20:38:07 +02:00
return draw_sub_immediate(le, re, wid);
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if ((ivl_expr_opcode(expr) == '-')
Add the %subi instruction, and use it where possible.
2002-08-28 20:38:07 +02:00
&& (ivl_expr_type(re) == IVL_EX_NUMBER)
&& (! number_is_unknown(re))
Allow that sum immediate values can be signed. Actually, the immediate value handling is a little chaotic and should be cleaned up. This patch opens the door for allowing signed immediate values, and uses them in a few places where they are explicitly handled. We must go through the opcodes that can take immediate values and make explicit whether they are signed/unsigned/etc, and what their size limits are.
2008-06-13 22:32:06 +02:00
&& number_is_immediate(re, IMM_WID, 0))
Add the %subi instruction, and use it where possible.
2002-08-28 20:38:07 +02:00
return draw_sub_immediate(le, re, wid);
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if ((ivl_expr_opcode(expr) == '*')
Generate %muli instructions when possible.
2002-05-31 22:04:57 +02:00
&& (ivl_expr_type(re) == IVL_EX_NUMBER)
&& (! number_is_unknown(re))
Allow that sum immediate values can be signed. Actually, the immediate value handling is a little chaotic and should be cleaned up. This patch opens the door for allowing signed immediate values, and uses them in a few places where they are explicitly handled. We must go through the opcodes that can take immediate values and make explicit whether they are signed/unsigned/etc, and what their size limits are.
2008-06-13 22:32:06 +02:00
&& number_is_immediate(re, IMM_WID, 0))
Generate %muli instructions when possible.
2002-05-31 22:04:57 +02:00
return draw_mul_immediate(le, re, wid);
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
lv = draw_eval_expr_wid(le, wid, STUFF_OK_XZ);
More robust use of precalculated expressions, and Separate lookaside for written variables that can also be reused.
2005-09-17 03:01:00 +02:00
rv = draw_eval_expr_wid(re, wid, STUFF_OK_XZ|STUFF_OK_RO);
Generate code for + and concat expressions.
2001-03-31 04:00:44 +02:00
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
if (lv.wid != wid) {
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
fprintf(stderr, "XXXX ivl_expr_opcode(expr) = %c,"
" lv.wid=%u, wid=%u\n", ivl_expr_opcode(expr),
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
lv.wid, wid);
}
Add support for structural multiply in t-dll. Add code generators and vvp support for both structural and behavioral multiply.
2001-06-17 01:45:05 +02:00
assert(lv.wid == wid);
assert(rv.wid == wid);
Handle constant bits in arithmetic expressions.
2001-10-14 05:24:35 +02:00
/* The arithmetic instructions replace the left operand with
the result. If the left operand is a replicated constant,
Spelling fixes (larry doolittle)
2007-02-26 20:49:48 +01:00
then I need to make a writable copy so that the
Handle constant bits in arithmetic expressions.
2001-10-14 05:24:35 +02:00
instruction can operate. */
if (lv.base < 4) {
struct vector_info tmp;
tmp.base = allocate_vector(wid);
tmp.wid = wid;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
if (tmp.base == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"for result of arithmetic expression.\n",
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_file(expr), ivl_expr_lineno(expr), wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
vvp_errors += 1;
}
Handle constant bits in arithmetic expressions.
2001-10-14 05:24:35 +02:00
fprintf(vvp_out, " %%mov %u, %u, %u;\n", tmp.base,
lv.base, wid);
lv = tmp;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
switch (ivl_expr_opcode(expr)) {
Add behavioral modulus.
2001-05-24 06:20:10 +02:00
case '+':
Support behavioral subtraction.
2001-05-02 03:57:25 +02:00
fprintf(vvp_out, " %%add %u, %u, %u;\n", lv.base, rv.base, wid);
Add behavioral modulus.
2001-05-24 06:20:10 +02:00
break;
case '-':
fprintf(vvp_out, " %%sub %u, %u, %u;\n", lv.base, rv.base, wid);
break;
Add support for structural multiply in t-dll. Add code generators and vvp support for both structural and behavioral multiply.
2001-06-17 01:45:05 +02:00
case '*':
fprintf(vvp_out, " %%mul %u, %u, %u;\n", lv.base, rv.base, wid);
break;
Generate %div instructions for binary /.
2001-10-16 03:27:17 +02:00
case '/':
Support signed integer division.
2002-04-14 20:41:34 +02:00
fprintf(vvp_out, " %%div%s %u, %u, %u;\n", sign_string,
lv.base, rv.base, wid);
Generate %div instructions for binary /.
2001-10-16 03:27:17 +02:00
break;
Add behavioral modulus.
2001-05-24 06:20:10 +02:00
case '%':
Generate signed modulus if appropriate.
2004-06-19 18:17:37 +02:00
fprintf(vvp_out, " %%mod%s %u, %u, %u;\n", sign_string,
lv.base, rv.base, wid);
Add behavioral modulus.
2001-05-24 06:20:10 +02:00
break;
Catch that we do not currently support unsigned bit based power. This patch adds a check and prints a warning message when the power operator is used with unsigned bit based values. It also fixes a couple of typos and adds an asserts if the above power operator happens to get to the tgt-vvp back end.
2008-02-04 22:04:20 +01:00
case 'p':
A power needs to use the signed (real pow) if either argument is signed. The power operator is different in that it uses the signed version if either of it's arguments are signed. This patch fixes the code generator to do this correctly.
2008-11-27 03:55:12 +01:00
if (ivl_expr_signed(le) || ivl_expr_signed(re)) {
Fix the white space errors in tgt-vvp
2010-07-24 04:24:10 +02:00
fprintf(vvp_out, " %%pow/s %u, %u, %u;\n",
A power needs to use the signed (real pow) if either argument is signed. The power operator is different in that it uses the signed version if either of it's arguments are signed. This patch fixes the code generator to do this correctly.
2008-11-27 03:55:12 +01:00
lv.base, rv.base, wid);
} else {
Fix the white space errors in tgt-vvp
2010-07-24 04:24:10 +02:00
fprintf(vvp_out, " %%pow %u, %u, %u;\n",
A power needs to use the signed (real pow) if either argument is signed. The power operator is different in that it uses the signed version if either of it's arguments are signed. This patch fixes the code generator to do this correctly.
2008-11-27 03:55:12 +01:00
lv.base, rv.base, wid);
}
Catch that we do not currently support unsigned bit based power. This patch adds a check and prints a warning message when the power operator is used with unsigned bit based values. It also fixes a couple of typos and adds an asserts if the above power operator happens to get to the tgt-vvp back end.
2008-02-04 22:04:20 +01:00
break;
Add behavioral modulus.
2001-05-24 06:20:10 +02:00
default:
assert(0);
}
Generate code for + and concat expressions.
2001-03-31 04:00:44 +02:00
clr_vector(rv);
return lv;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_binary_expr(ivl_expr_t expr,
Optimize ==1 when in context where x vs z doesnt matter.
2002-09-13 05:12:50 +02:00
unsigned wid,
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
int stuff_ok_flag)
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
{
struct vector_info rv;
Properly set or clear expression lookaside for binary expressions.
2002-10-20 04:55:37 +02:00
int stuff_ok_used_flag = 0;
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
switch (ivl_expr_opcode(expr)) {
Evaluate the logical AND operator.
2001-04-01 08:49:32 +02:00
case 'a': /* && (logical and) */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
rv = draw_binary_expr_land(expr, wid);
Evaluate the logical AND operator.
2001-04-01 08:49:32 +02:00
break;
Evaluate === and !==
2001-03-27 08:43:27 +02:00
case 'E': /* === */
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
case 'e': /* == */
Evaluate === and !==
2001-03-27 08:43:27 +02:00
case 'N': /* !== */
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
case 'n': /* != */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
rv = draw_binary_expr_eq(expr, wid, stuff_ok_flag);
Properly set or clear expression lookaside for binary expressions.
2002-10-20 04:55:37 +02:00
stuff_ok_used_flag = 1;
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
break;
Generate code for < and <=.
2001-04-01 09:22:42 +02:00
case '<':
Get signed compares working correctly in vvp.
2001-04-05 03:12:27 +02:00
case '>':
Generate code for < and <=.
2001-04-01 09:22:42 +02:00
case 'L': /* <= */
Get signed compares working correctly in vvp.
2001-04-05 03:12:27 +02:00
case 'G': /* >= */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
rv = draw_binary_expr_le(expr, wid, stuff_ok_flag);
Properly set or clear expression lookaside for binary expressions.
2002-10-20 04:55:37 +02:00
stuff_ok_used_flag = 1;
Generate code for < and <=.
2001-04-01 09:22:42 +02:00
break;
Generate code for + and concat expressions.
2001-03-31 04:00:44 +02:00
case '+':
Support behavioral subtraction.
2001-05-02 03:57:25 +02:00
case '-':
Add support for structural multiply in t-dll. Add code generators and vvp support for both structural and behavioral multiply.
2001-06-17 01:45:05 +02:00
case '*':
Generate %div instructions for binary /.
2001-10-16 03:27:17 +02:00
case '/':
Add behavioral modulus.
2001-05-24 06:20:10 +02:00
case '%':
Catch that we do not currently support unsigned bit based power. This patch adds a check and prints a warning message when the power operator is used with unsigned bit based values. It also fixes a couple of typos and adds an asserts if the above power operator happens to get to the tgt-vvp back end.
2008-02-04 22:04:20 +01:00
case 'p':
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
rv = draw_binary_expr_arith(expr, wid);
Generate code for + and concat expressions.
2001-03-31 04:00:44 +02:00
break;
Right shift by constant.
2001-04-21 05:26:23 +02:00
case 'l': /* << */
Support non-const right shift (unsigned).
2001-06-30 23:07:26 +02:00
case 'r': /* >> */
Add arithmetic shift operators.
2003-06-18 05:55:18 +02:00
case 'R': /* >>> */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
rv = draw_binary_expr_lrs(expr, wid);
Left shift by a constant amount.
2001-04-21 03:49:17 +02:00
break;
Evalulate logical or (||)
2001-04-29 22:47:39 +02:00
case 'o': /* || (logical or) */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
rv = draw_binary_expr_lor(expr, wid, stuff_ok_flag);
Lor takes advantave of STUFF_OK_47 It is ot uncommon for the arguments to logical or to leave stuff in bit registers 4-7. Allow the lor itself to take advantage of that to save some %mov instructions.
2008-11-22 19:45:15 +01:00
stuff_ok_used_flag = 1;
Evalulate logical or (||)
2001-04-29 22:47:39 +02:00
break;
Evaluate binary & and | operators.
2001-04-02 05:47:49 +02:00
case '&':
case '|':
add XOR support.
2001-04-15 18:37:48 +02:00
case '^':
Add support for binary nand operator.
2002-09-12 17:49:43 +02:00
case 'A': /* NAND (~&) */
Add support for binary NOR operator.
2002-09-18 06:29:55 +02:00
case 'O': /* NOR (~|) */
Add support for binary nand operator.
2002-09-12 17:49:43 +02:00
case 'X': /* XNOR (~^) */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
rv = draw_binary_expr_logic(expr, wid);
Evaluate binary & and | operators.
2001-04-02 05:47:49 +02:00
break;
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
default:
Generate code for + and concat expressions.
2001-03-31 04:00:44 +02:00
fprintf(stderr, "vvp.tgt error: unsupported binary (%c)\n",
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_opcode(expr));
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
assert(0);
}
Properly set or clear expression lookaside for binary expressions.
2002-10-20 04:55:37 +02:00
/* Mark in the lookaside that this value is done. If any OK
flags besides the STUFF_OK_47 flag are set, then the result
may not be a pure one, so clear the lookaside for the range
instead of setting in to the new expression result.
The stuff_ok_used_flag tells me if the stuff_ok_flag was
even used by anything. If not, then I can ignore it in the
following logic. */
if (rv.base >= 8) {
if (stuff_ok_used_flag && (stuff_ok_flag & ~STUFF_OK_47))
save_expression_lookaside(rv.base, 0, wid);
else
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
save_expression_lookaside(rv.base, expr, wid);
Properly set or clear expression lookaside for binary expressions.
2002-10-20 04:55:37 +02:00
}
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
return rv;
}
Handle short l-values to concatenation.
2001-09-20 05:46:38 +02:00
/*
* The concatenation operator is evaluated by evaluating each sub-
Spelling fixes (larry doolittle)
2007-02-26 20:49:48 +01:00
* expression, then copying it into the contiguous vector of the
Handle short l-values to concatenation.
2001-09-20 05:46:38 +02:00
* result. Do this until the result vector is filled.
*/
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_concat_expr(ivl_expr_t expr, unsigned wid,
More robust use of precalculated expressions, and Separate lookaside for written variables that can also be reused.
2005-09-17 03:01:00 +02:00
int stuff_ok_flag)
Generate code for + and concat expressions.
2001-03-31 04:00:44 +02:00
{
Fix a few more cppcheck issues. Here are some more cleanups recommended by cppcheck. Mostly fixing the variable scope and removing some unneeded code.
2010-04-19 19:25:42 +02:00
unsigned rep, expr_wid, concat_wid, num_sube, idx;
Generate code for + and concat expressions.
2001-03-31 04:00:44 +02:00
struct vector_info res;
More robust use of precalculated expressions, and Separate lookaside for written variables that can also be reused.
2005-09-17 03:01:00 +02:00
int alloc_exclusive = (stuff_ok_flag&STUFF_OK_RO) ? 0 : 1;
Fix procedural concatenation/repetition problems This patch evaluates the whole concatenation expression and makes the concatenation padding sign aware. This is needed when $signed({...}) is passed as an argument. A repetition is just N copies of the base expression not N evaluations of the base expression. This is only a problem when functions have side effects. It's also faster to copy. The evaluation must also be done when the replication count is zero (see 1364-2005).
2009-07-24 18:52:48 +02:00
/* Find out how wide the base concatenation expression is. */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
num_sube = ivl_expr_parms(expr);
Fix procedural concatenation/repetition problems This patch evaluates the whole concatenation expression and makes the concatenation padding sign aware. This is needed when $signed({...}) is passed as an argument. A repetition is just N copies of the base expression not N evaluations of the base expression. This is only a problem when functions have side effects. It's also faster to copy. The evaluation must also be done when the replication count is zero (see 1364-2005).
2009-07-24 18:52:48 +02:00
expr_wid = 0;
for (idx = 0 ; idx < num_sube; idx += 1) {
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
expr_wid += ivl_expr_width(ivl_expr_parm(expr, idx));
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
}
Handle short l-values to concatenation.
2001-09-20 05:46:38 +02:00
/* Get the repeat count. This must be a constant that has been
evaluated at compile time. The operands will be repeated to
form the result. */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
rep = ivl_expr_repeat(expr);
Handle short l-values to concatenation.
2001-09-20 05:46:38 +02:00
Fix procedural concatenation/repetition problems This patch evaluates the whole concatenation expression and makes the concatenation padding sign aware. This is needed when $signed({...}) is passed as an argument. A repetition is just N copies of the base expression not N evaluations of the base expression. This is only a problem when functions have side effects. It's also faster to copy. The evaluation must also be done when the replication count is zero (see 1364-2005).
2009-07-24 18:52:48 +02:00
/* Allocate a vector to hold the result. */
if (rep == 0) {
/* If the replication is zero we need to allocate temporary
* space to build the concatenation. */
res.base = allocate_vector(expr_wid);
res.wid = expr_wid;
} else {
res.base = allocate_vector(wid);
res.wid = wid;
}
if (res.base == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"for result of concatenation.\n",
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_file(expr), ivl_expr_lineno(expr),
Fix procedural concatenation/repetition problems This patch evaluates the whole concatenation expression and makes the concatenation padding sign aware. This is needed when $signed({...}) is passed as an argument. A repetition is just N copies of the base expression not N evaluations of the base expression. This is only a problem when functions have side effects. It's also faster to copy. The evaluation must also be done when the replication count is zero (see 1364-2005).
2009-07-24 18:52:48 +02:00
rep ? wid : expr_wid);
vvp_errors += 1;
}
Handle short l-values to concatenation.
2001-09-20 05:46:38 +02:00
Fix procedural concatenation/repetition problems This patch evaluates the whole concatenation expression and makes the concatenation padding sign aware. This is needed when $signed({...}) is passed as an argument. A repetition is just N copies of the base expression not N evaluations of the base expression. This is only a problem when functions have side effects. It's also faster to copy. The evaluation must also be done when the replication count is zero (see 1364-2005).
2009-07-24 18:52:48 +02:00
/* If the result is the right size we can just build this in place. */
concat_wid = rep*expr_wid;
if (concat_wid <= wid) {
Fix a few more cppcheck issues. Here are some more cleanups recommended by cppcheck. Mostly fixing the variable scope and removing some unneeded code.
2010-04-19 19:25:42 +02:00
unsigned off = 0;
Fix procedural concatenation/repetition problems This patch evaluates the whole concatenation expression and makes the concatenation padding sign aware. This is needed when $signed({...}) is passed as an argument. A repetition is just N copies of the base expression not N evaluations of the base expression. This is only a problem when functions have side effects. It's also faster to copy. The evaluation must also be done when the replication count is zero (see 1364-2005).
2009-07-24 18:52:48 +02:00
/* Evaluate the base expression. */
for (idx = num_sube; idx > 0; idx -= 1) {
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_t arg = ivl_expr_parm(expr, idx-1);
Handle repeat for concatenation expressions.
2001-07-22 21:33:51 +02:00
unsigned awid = ivl_expr_width(arg);
Add thread expression lookaside map.
2002-09-27 18:33:34 +02:00
struct vector_info avec;
Fix procedural concatenation/repetition problems This patch evaluates the whole concatenation expression and makes the concatenation padding sign aware. This is needed when $signed({...}) is passed as an argument. A repetition is just N copies of the base expression not N evaluations of the base expression. This is only a problem when functions have side effects. It's also faster to copy. The evaluation must also be done when the replication count is zero (see 1364-2005).
2009-07-24 18:52:48 +02:00
assert(awid+off <= expr_wid);
Add thread expression lookaside map.
2002-09-27 18:33:34 +02:00
/* Try to locate the subexpression in the
Fix procedural concatenation/repetition problems This patch evaluates the whole concatenation expression and makes the concatenation padding sign aware. This is needed when $signed({...}) is passed as an argument. A repetition is just N copies of the base expression not N evaluations of the base expression. This is only a problem when functions have side effects. It's also faster to copy. The evaluation must also be done when the replication count is zero (see 1364-2005).
2009-07-24 18:52:48 +02:00
* lookaside map and use it when available. */
More robust use of precalculated expressions, and Separate lookaside for written variables that can also be reused.
2005-09-17 03:01:00 +02:00
avec.base = allocate_vector_exp(arg, awid, alloc_exclusive);
Add thread expression lookaside map.
2002-09-27 18:33:34 +02:00
avec.wid = awid;
Concatenation can evaluate sub-expressions in place.
2002-11-06 06:41:37 +01:00
if (avec.base != 0) {
assert(awid == avec.wid);
Fix procedural concatenation/repetition problems This patch evaluates the whole concatenation expression and makes the concatenation padding sign aware. This is needed when $signed({...}) is passed as an argument. A repetition is just N copies of the base expression not N evaluations of the base expression. This is only a problem when functions have side effects. It's also faster to copy. The evaluation must also be done when the replication count is zero (see 1364-2005).
2009-07-24 18:52:48 +02:00
fprintf(vvp_out, " %%mov %u, %u, %u; Reuse "
"calculated expression.\n",
res.base+off, avec.base, awid);
Fix the white space errors in tgt-vvp
2010-07-24 04:24:10 +02:00
clr_vector(avec);
Concatenation can evaluate sub-expressions in place.
2002-11-06 06:41:37 +01:00
} else {
struct vector_info dest;
dest.base = res.base+off;
Fix procedural concatenation/repetition problems This patch evaluates the whole concatenation expression and makes the concatenation padding sign aware. This is needed when $signed({...}) is passed as an argument. A repetition is just N copies of the base expression not N evaluations of the base expression. This is only a problem when functions have side effects. It's also faster to copy. The evaluation must also be done when the replication count is zero (see 1364-2005).
2009-07-24 18:52:48 +02:00
dest.wid = awid;
Concatenation can evaluate sub-expressions in place.
2002-11-06 06:41:37 +01:00
draw_eval_expr_dest(arg, dest, 0);
}
Handle short l-values to concatenation.
2001-09-20 05:46:38 +02:00
Fix procedural concatenation/repetition problems This patch evaluates the whole concatenation expression and makes the concatenation padding sign aware. This is needed when $signed({...}) is passed as an argument. A repetition is just N copies of the base expression not N evaluations of the base expression. This is only a problem when functions have side effects. It's also faster to copy. The evaluation must also be done when the replication count is zero (see 1364-2005).
2009-07-24 18:52:48 +02:00
off += awid;
}
Handle repeat for concatenation expressions.
2001-07-22 21:33:51 +02:00
Fix procedural concatenation/repetition problems This patch evaluates the whole concatenation expression and makes the concatenation padding sign aware. This is needed when $signed({...}) is passed as an argument. A repetition is just N copies of the base expression not N evaluations of the base expression. This is only a problem when functions have side effects. It's also faster to copy. The evaluation must also be done when the replication count is zero (see 1364-2005).
2009-07-24 18:52:48 +02:00
/* Now repeat the expression as needed. */
if (rep != 0) {
rep -= 1;
} else {
/* Clear the temporary space and return nothing.
* This will be caught in draw_eval_expr_dest()
* and dropped. */
Fix the white space errors in tgt-vvp
2010-07-24 04:24:10 +02:00
clr_vector(res);
Fix procedural concatenation/repetition problems This patch evaluates the whole concatenation expression and makes the concatenation padding sign aware. This is needed when $signed({...}) is passed as an argument. A repetition is just N copies of the base expression not N evaluations of the base expression. This is only a problem when functions have side effects. It's also faster to copy. The evaluation must also be done when the replication count is zero (see 1364-2005).
2009-07-24 18:52:48 +02:00
res.base = 0;
res.wid = 0;
}
while (rep > 0) {
fprintf(vvp_out, " %%mov %u, %u, %u; Repetition %u\n",
res.base+expr_wid*rep, res.base, expr_wid,
rep+1);
rep -= 1;
Handle repeat for concatenation expressions.
2001-07-22 21:33:51 +02:00
}
Generate code for + and concat expressions.
2001-03-31 04:00:44 +02:00
Fix procedural concatenation/repetition problems This patch evaluates the whole concatenation expression and makes the concatenation padding sign aware. This is needed when $signed({...}) is passed as an argument. A repetition is just N copies of the base expression not N evaluations of the base expression. This is only a problem when functions have side effects. It's also faster to copy. The evaluation must also be done when the replication count is zero (see 1364-2005).
2009-07-24 18:52:48 +02:00
/* Pad the expression when needed. */
if (wid > concat_wid) {
/* We can get a signed concatenation with $signed({...}). */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if (ivl_expr_signed(expr)) {
Fix procedural concatenation/repetition problems This patch evaluates the whole concatenation expression and makes the concatenation padding sign aware. This is needed when $signed({...}) is passed as an argument. A repetition is just N copies of the base expression not N evaluations of the base expression. This is only a problem when functions have side effects. It's also faster to copy. The evaluation must also be done when the replication count is zero (see 1364-2005).
2009-07-24 18:52:48 +02:00
unsigned base = res.base+concat_wid-1;
for (idx = 1; idx <= wid-concat_wid; idx += 1) {
fprintf(vvp_out, " %%mov %u, %u, 1;\n",
base+idx, base);
}
} else {
fprintf(vvp_out, " %%mov %u, 0, %u;\n",
res.base+concat_wid, wid-concat_wid);
}
}
} else {
/* The concatenation is too big for the result so draw it
* at full width and then copy the bits that are needed. */
struct vector_info full_res;
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
full_res = draw_concat_expr(expr, concat_wid, stuff_ok_flag);
Fix procedural concatenation/repetition problems This patch evaluates the whole concatenation expression and makes the concatenation padding sign aware. This is needed when $signed({...}) is passed as an argument. A repetition is just N copies of the base expression not N evaluations of the base expression. This is only a problem when functions have side effects. It's also faster to copy. The evaluation must also be done when the replication count is zero (see 1364-2005).
2009-07-24 18:52:48 +02:00
assert(full_res.base);
fprintf(vvp_out, " %%mov %u, %u, %u;\n", res.base,
full_res.base, wid);
Fix the white space errors in tgt-vvp
2010-07-24 04:24:10 +02:00
clr_vector(full_res);
Generate code for + and concat expressions.
2001-03-31 04:00:44 +02:00
}
Add thread expression lookaside map.
2002-09-27 18:33:34 +02:00
/* Save the accumulated result in the lookaside map. */
if (res.base >= 8)
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
save_expression_lookaside(res.base, expr, wid);
Add thread expression lookaside map.
2002-09-27 18:33:34 +02:00
Generate code for + and concat expressions.
2001-03-31 04:00:44 +02:00
return res;
}
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
/*
* A number in an expression is made up by copying constant bits into
* the allocated vector.
*/
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_number_expr(ivl_expr_t expr, unsigned wid)
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
{
unsigned idx;
Handle truncation/padding of numbers.
2001-03-29 07:16:25 +02:00
unsigned nwid;
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
struct vector_info res;
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
const char*bits = ivl_expr_bits(expr);
Content-free portability fixes. These are patches from ITOH Yasufumi and Larry Doolittle of pr2120948. They change nothing, but make the code compile with older compilers.
2008-09-30 03:06:47 +02:00
unsigned long val;
unsigned val_bits;
unsigned val_addr;
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
res.wid = wid;
Handle truncation/padding of numbers.
2001-03-29 07:16:25 +02:00
nwid = wid;
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if (ivl_expr_width(expr) < nwid)
nwid = ivl_expr_width(expr);
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
/* If all the bits of the number have the same value, then we
can use a constant bit. There is no need to allocate wr
bits, and there is no need to generate any code. */
Handle truncation/padding of numbers.
2001-03-29 07:16:25 +02:00
for (idx = 1 ; idx < nwid ; idx += 1) {
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
if (bits[idx] != bits[0])
break;
}
Handle truncation/padding of numbers.
2001-03-29 07:16:25 +02:00
if (idx >= res.wid) {
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
switch (bits[0]) {
case '0':
res.base = 0;
break;
case '1':
res.base = 1;
break;
case 'x':
res.base = 2;
break;
case 'z':
res.base = 3;
break;
Fix warnings about uninitialized variables.
2005-09-19 22:18:20 +02:00
default:
assert(0);
res.base = 0;
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
}
return res;
}
/* The number value needs to be represented as an allocated
vector. Allocate the vector and use %mov instructions to
load the constant bit values. */
res.base = allocate_vector(wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
if (res.base == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"for number value.\n",
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_file(expr), ivl_expr_lineno(expr), wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
vvp_errors += 1;
}
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
Better optimization of constants in expressions Be more sophisticated with the code generated for constant values. When values are large, use an optimal mix of %movi and %mov instructions to get the desired value, no matter what the content.
2008-08-28 03:22:23 +02:00
/* Detect the special case that the entire number fits in an
immediate. In this case we generate a single %movi
instruction. */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if ((!number_is_unknown(expr)) && number_is_immediate(expr, IMM_WID,0)) {
unsigned long val2 = get_number_immediate(expr);
Shadow reduction part 5 Continue cleaning up shadowed variables, flagged by turning on -Wshadow. No intended change in functionality. Patch looks right, and is tested to compile and run on my machine. No regressions in test suite. This patch set covers C code, with the notable exception of vpi/lxt_write{,2}.c.
2008-12-18 17:45:47 +01:00
fprintf(vvp_out, " %%movi %u, %lu, %u;\n", res.base, val2, wid);
Optomize runtime using immediate compare Implement compare-immediate instructions and generate code to use these new instructions to improve runtime performance. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-04 05:58:40 +02:00
return res;
}
Better optimization of constants in expressions Be more sophisticated with the code generated for constant values. When values are large, use an optimal mix of %movi and %mov instructions to get the desired value, no matter what the content.
2008-08-28 03:22:23 +02:00
/* Use %movi as much as possible to build the value into the
destination. Use the %mov to handle the remaining general
bits. */
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
idx = 0;
Content-free portability fixes. These are patches from ITOH Yasufumi and Larry Doolittle of pr2120948. They change nothing, but make the code compile with older compilers.
2008-09-30 03:06:47 +02:00
val = 0;
val_bits = 0;
val_addr = res.base;
Handle truncation/padding of numbers.
2001-03-29 07:16:25 +02:00
while (idx < nwid) {
Better optimization of constants in expressions Be more sophisticated with the code generated for constant values. When values are large, use an optimal mix of %movi and %mov instructions to get the desired value, no matter what the content.
2008-08-28 03:22:23 +02:00
char src = 0;
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
switch (bits[idx]) {
case '0':
Better optimization of constants in expressions Be more sophisticated with the code generated for constant values. When values are large, use an optimal mix of %movi and %mov instructions to get the desired value, no matter what the content.
2008-08-28 03:22:23 +02:00
val_bits += 1;
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
break;
case '1':
Better optimization of constants in expressions Be more sophisticated with the code generated for constant values. When values are large, use an optimal mix of %movi and %mov instructions to get the desired value, no matter what the content.
2008-08-28 03:22:23 +02:00
val |= 1UL << val_bits;
val_bits += 1;
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
break;
case 'x':
src = '2';
break;
case 'z':
src = '3';
break;
}
Better optimization of constants in expressions Be more sophisticated with the code generated for constant values. When values are large, use an optimal mix of %movi and %mov instructions to get the desired value, no matter what the content.
2008-08-28 03:22:23 +02:00
if (val_bits >= IMM_WID
|| (val_bits>0 && src != 0)
|| (val_bits>0 && idx+1==nwid)) {
When evaluating a constant into an index make sure to clear bit 4. When evaluating an expression into an index register bit 4 is used to determine if the expression had any X/Z bits. In the case of a constant immediate value this can not happen so make sure the bit is cleared.
2008-09-18 01:18:17 +02:00
fprintf(vvp_out, " %%movi %u, %lu, %u;\n",
Better optimization of constants in expressions Be more sophisticated with the code generated for constant values. When values are large, use an optimal mix of %movi and %mov instructions to get the desired value, no matter what the content.
2008-08-28 03:22:23 +02:00
val_addr, val, val_bits);
val_addr += val_bits;
val_bits = 0;
val = 0;
}
if (src != 0) {
unsigned cnt;
Content-free portability fixes. These are patches from ITOH Yasufumi and Larry Doolittle of pr2120948. They change nothing, but make the code compile with older compilers.
2008-09-30 03:06:47 +02:00
assert(val_bits == 0);
Better optimization of constants in expressions Be more sophisticated with the code generated for constant values. When values are large, use an optimal mix of %movi and %mov instructions to get the desired value, no matter what the content.
2008-08-28 03:22:23 +02:00
for (cnt = 1 ; idx+cnt < nwid ; cnt += 1)
if (bits[idx+cnt] != bits[idx])
break;
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
When evaluating a constant into an index make sure to clear bit 4. When evaluating an expression into an index register bit 4 is used to determine if the expression had any X/Z bits. In the case of a constant immediate value this can not happen so make sure the bit is cleared.
2008-09-18 01:18:17 +02:00
fprintf(vvp_out, " %%mov %u, %c, %u;\n", val_addr, src, cnt);
Better optimization of constants in expressions Be more sophisticated with the code generated for constant values. When values are large, use an optimal mix of %movi and %mov instructions to get the desired value, no matter what the content.
2008-08-28 03:22:23 +02:00
val_addr += cnt;
idx += cnt-1;
}
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
Better optimization of constants in expressions Be more sophisticated with the code generated for constant values. When values are large, use an optimal mix of %movi and %mov instructions to get the desired value, no matter what the content.
2008-08-28 03:22:23 +02:00
idx += 1;
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
}
Handle truncation/padding of numbers.
2001-03-29 07:16:25 +02:00
/* Pad the number up to the expression width. */
Proper pad of signed constants.
2003-06-11 04:23:45 +02:00
if (idx < wid) {
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if (ivl_expr_signed(expr) && bits[nwid-1] == '1')
Proper pad of signed constants.
2003-06-11 04:23:45 +02:00
fprintf(vvp_out, " %%mov %u, 1, %u;\n",
res.base+idx, wid-idx);
else if (bits[nwid-1] == 'x')
fprintf(vvp_out, " %%mov %u, 2, %u;\n",
res.base+idx, wid-idx);
else if (bits[nwid-1] == 'z')
fprintf(vvp_out, " %%mov %u, 3, %u;\n",
res.base+idx, wid-idx);
else
fprintf(vvp_out, " %%mov %u, 0, %u;\n",
res.base+idx, wid-idx);
}
Handle truncation/padding of numbers.
2001-03-29 07:16:25 +02:00
Add thread expression lookaside map.
2002-09-27 18:33:34 +02:00
if (res.base >= 8)
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
save_expression_lookaside(res.base, expr, wid);
Add thread expression lookaside map.
2002-09-27 18:33:34 +02:00
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
return res;
}
Support drawing some select expressions in place. Select of signals is natural for evaluating in place, if possible. Doing so can save instructions for certain expressions.
2008-11-23 06:17:05 +01:00
/*
* This little helper function generates the instructions to pad a
Spelling fixes Mostly comments, but includes user-visible debug messages.
2009-03-08 02:16:13 +01:00
* vector in place. It is assumed that the calling function has set up
Revert bad merge from vhdl branch
2010-10-02 20:02:27 +02:00
* the first sub_width bits of the dest vector, and the signed_flag is
Support drawing some select expressions in place. Select of signals is natural for evaluating in place, if possible. Doing so can save instructions for certain expressions.
2008-11-23 06:17:05 +01:00
* true if the extension is to be signed.
*/
static void pad_in_place(struct vector_info dest, unsigned sub_width, int signed_flag)
{
if (signed_flag) {
unsigned idx;
for (idx = sub_width ; idx < dest.wid ; idx += 1)
fprintf(vvp_out, " %%mov %u, %u, 1;\n",
dest.base+idx, dest.base+sub_width-1);
} else {
fprintf(vvp_out, " %%mov %u, 0, %u;\n",
dest.base+sub_width, dest.wid - sub_width);
}
}
Start handling pad of expressions in code generators.
2003-07-26 05:34:42 +02:00
/*
* The PAD expression takes a smaller node and pads it out to a larger
* value. It will zero extend or sign extend depending on the
* signedness of the expression.
*/
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_pad_expr(ivl_expr_t expr, unsigned wid)
Start handling pad of expressions in code generators.
2003-07-26 05:34:42 +02:00
{
struct vector_info subv;
struct vector_info res;
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_t subexpr = ivl_expr_oper1(expr);
Pad expression in place When padding expressions, pre-allocate the target space and calculate the sub-expression directly into the target. Then pad from there. This saves a move into the result space.
2008-11-22 06:12:40 +01:00
/* If the sub-expression is at least as wide as the target
width, then instead of pad, we truncate. Evaluate the
expression and return that expression with the width
reduced to what we want. */
if (wid <= ivl_expr_width(subexpr)) {
subv = draw_eval_expr(subexpr, 0);
assert(subv.wid >= wid);
Relaxed width constraint on pad_expression output.
2004-09-10 02:14:31 +02:00
res.base = subv.base;
res.wid = wid;
Pad expression in place When padding expressions, pre-allocate the target space and calculate the sub-expression directly into the target. Then pad from there. This saves a move into the result space.
2008-11-22 06:12:40 +01:00
if (subv.base >= 8)
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
save_expression_lookaside(subv.base, expr, subv.wid);
Relaxed width constraint on pad_expression output.
2004-09-10 02:14:31 +02:00
return res;
Start handling pad of expressions in code generators.
2003-07-26 05:34:42 +02:00
}
Pad expression in place When padding expressions, pre-allocate the target space and calculate the sub-expression directly into the target. Then pad from there. This saves a move into the result space.
2008-11-22 06:12:40 +01:00
/* So now we know that the subexpression is smaller then the
desired result (the usual case) so we build the
result. Evaluate the subexpression into the target buffer,
then pad it as appropriate. */
Start handling pad of expressions in code generators.
2003-07-26 05:34:42 +02:00
res.base = allocate_vector(wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
if (res.base == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"to pad expression.\n",
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_file(expr), ivl_expr_lineno(expr), wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
vvp_errors += 1;
}
Start handling pad of expressions in code generators.
2003-07-26 05:34:42 +02:00
Pad expression in place When padding expressions, pre-allocate the target space and calculate the sub-expression directly into the target. Then pad from there. This saves a move into the result space.
2008-11-22 06:12:40 +01:00
res.wid = wid;
Start handling pad of expressions in code generators.
2003-07-26 05:34:42 +02:00
Pad expression in place When padding expressions, pre-allocate the target space and calculate the sub-expression directly into the target. Then pad from there. This saves a move into the result space.
2008-11-22 06:12:40 +01:00
subv.base = res.base;
subv.wid = ivl_expr_width(subexpr);
draw_eval_expr_dest(subexpr, subv, 0);
Start handling pad of expressions in code generators.
2003-07-26 05:34:42 +02:00
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
pad_in_place(res, subv.wid, ivl_expr_signed(expr));
Support drawing some select expressions in place. Select of signals is natural for evaluating in place, if possible. Doing so can save instructions for certain expressions.
2008-11-23 06:17:05 +01:00
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
save_expression_lookaside(res.base, expr, wid);
Start handling pad of expressions in code generators.
2003-07-26 05:34:42 +02:00
return res;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_realnum_expr(ivl_expr_t expr, unsigned wid)
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
{
struct vector_info res;
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
double val = ivl_expr_dvalue(expr);
Handle real constants in vector expressions.
2007-01-19 06:24:53 +01:00
long ival = val;
NB-assign needs to convert reals at the l-value width. This patch mimics what was done for normal assignments to get the width correct for nonblocking assignments when converting a real r-value to a l-value vector.
2010-03-13 23:27:20 +01:00
assert(wid <= 8*sizeof(long));
Handle real constants in vector expressions.
2007-01-19 06:24:53 +01:00
unsigned addr, run, idx;
int bit;
fprintf(vvp_out, "; draw_realnum_expr(%f, %u) as %ld\n",
val, wid, ival);
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
res.base = allocate_vector(wid);
res.wid = wid;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
assert(res.base);
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
Handle real constants in vector expressions.
2007-01-19 06:24:53 +01:00
addr = res.base;
run = 1;
bit = ival & 1;
NB-assign needs to convert reals at the l-value width. This patch mimics what was done for normal assignments to get the width correct for nonblocking assignments when converting a real r-value to a l-value vector.
2010-03-13 23:27:20 +01:00
ival >>= 1;
Handle real constants in vector expressions.
2007-01-19 06:24:53 +01:00
for (idx = 1 ; idx < wid ; idx += 1) {
int next_bit = ival & 1;
NB-assign needs to convert reals at the l-value width. This patch mimics what was done for normal assignments to get the width correct for nonblocking assignments when converting a real r-value to a l-value vector.
2010-03-13 23:27:20 +01:00
ival >>= 1;
Handle real constants in vector expressions.
2007-01-19 06:24:53 +01:00
if (next_bit == bit) {
run += 1;
continue;
}
When evaluating a constant into an index make sure to clear bit 4. When evaluating an expression into an index register bit 4 is used to determine if the expression had any X/Z bits. In the case of a constant immediate value this can not happen so make sure the bit is cleared.
2008-09-18 01:18:17 +02:00
fprintf(vvp_out, " %%mov %u, %d, %u;\n", addr, bit, run);
Handle real constants in vector expressions.
2007-01-19 06:24:53 +01:00
addr += run;
run = 1;
bit = next_bit;
}
When evaluating a constant into an index make sure to clear bit 4. When evaluating an expression into an index register bit 4 is used to determine if the expression had any X/Z bits. In the case of a constant immediate value this can not happen so make sure the bit is cleared.
2008-09-18 01:18:17 +02:00
fprintf(vvp_out, " %%mov %u, %d, %u;\n", addr, bit, run);
Handle real constants in vector expressions.
2007-01-19 06:24:53 +01:00
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
return res;
}
Process expression strings with octal constants correctly (tgt-vvp) tgt-vvp was taking strings and processing them as is, but the strings could contain octal constants. These constants needed to be converted to binary form before they could be turned into a bit pattern.
2007-11-14 04:51:20 +01:00
static char *process_octal_codes(const char *in, unsigned width)
{
unsigned idx = 0;
unsigned ridx = 0;
unsigned str_len = strlen(in);
char *out = (char *)malloc(str_len+1);
/* If we do not have any octal codes just return the input. */
if (width/8 == str_len) {
strcpy(out, in);
return out;
}
Fix two comparisons in tgt-vvp/eval_expr.c to use correct variable. This patch fixes two comparison that were using the wrong variable to determine when the end of the object had been reached.
2008-04-02 05:23:08 +02:00
while (ridx < str_len) {
Process expression strings with octal constants correctly (tgt-vvp) tgt-vvp was taking strings and processing them as is, but the strings could contain octal constants. These constants needed to be converted to binary form before they could be turned into a bit pattern.
2007-11-14 04:51:20 +01:00
/* An octal constant always has three digits. */
if (in[ridx] == '\\') {
out[idx] = (in[ridx+1]-'0')*64 + (in[ridx+2]-'0')*8 +
(in[ridx+3]-'0');
idx += 1;
ridx += 4;
} else {
out[idx] = in[ridx];
idx += 1;
ridx += 1;
}
}
out[idx] = '\0';
return out;
}
Evaluate string expressions (Philip Blundell)
2001-10-18 18:41:49 +02:00
/*
* A string in an expression is made up by copying constant bits into
* the allocated vector.
*/
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_string_expr(ivl_expr_t expr, unsigned wid)
Evaluate string expressions (Philip Blundell)
2001-10-18 18:41:49 +02:00
{
struct vector_info res;
Process expression strings with octal constants correctly (tgt-vvp) tgt-vvp was taking strings and processing them as is, but the strings could contain octal constants. These constants needed to be converted to binary form before they could be turned into a bit pattern.
2007-11-14 04:51:20 +01:00
char *p, *fp;
Evaluate string expressions (Philip Blundell)
2001-10-18 18:41:49 +02:00
unsigned ewid, nwid;
Use movi to load string values. String values are known to be 2-value bits, so they are natural candidates for using the movi instruction to load the value in far fewer instructions. With this patch, up to 16bits (two bytes) at a time can be loaded per instruction. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-11-14 06:14:07 +01:00
unsigned idx;
Evaluate string expressions (Philip Blundell)
2001-10-18 18:41:49 +02:00
res.wid = wid;
nwid = wid;
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ewid = ivl_expr_width(expr);
Evaluate string expressions (Philip Blundell)
2001-10-18 18:41:49 +02:00
if (ewid < nwid)
nwid = ewid;
Process expression strings with octal constants correctly (tgt-vvp) tgt-vvp was taking strings and processing them as is, but the strings could contain octal constants. These constants needed to be converted to binary form before they could be turned into a bit pattern.
2007-11-14 04:51:20 +01:00
/* Our string may have embedded \xxx sequences so they need
to be removed before we proceed. Returns a new string. */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
fp = process_octal_codes(ivl_expr_string(expr), ewid);
Process expression strings with octal constants correctly (tgt-vvp) tgt-vvp was taking strings and processing them as is, but the strings could contain octal constants. These constants needed to be converted to binary form before they could be turned into a bit pattern.
2007-11-14 04:51:20 +01:00
p = fp;
Evaluate string expressions (Philip Blundell)
2001-10-18 18:41:49 +02:00
p += (ewid / 8) - 1;
/* The string needs to be represented as an allocated
vector. Allocate the vector and use %mov instructions to
load the constant bit values. */
res.base = allocate_vector(wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
if (res.base == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"for string value.\n",
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_file(expr), ivl_expr_lineno(expr), wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
vvp_errors += 1;
}
Evaluate string expressions (Philip Blundell)
2001-10-18 18:41:49 +02:00
Use movi to load string values. String values are known to be 2-value bits, so they are natural candidates for using the movi instruction to load the value in far fewer instructions. With this patch, up to 16bits (two bytes) at a time can be loaded per instruction. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-11-14 06:14:07 +01:00
/* Since this is a string, we know that all the bits are
defined and each character represents exactly 8 bits. Use
the %movi instruction to more efficiently move the string
around. */
Evaluate string expressions (Philip Blundell)
2001-10-18 18:41:49 +02:00
idx = 0;
while (idx < nwid) {
Use movi to load string values. String values are known to be 2-value bits, so they are natural candidates for using the movi instruction to load the value in far fewer instructions. With this patch, up to 16bits (two bytes) at a time can be loaded per instruction. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-11-14 06:14:07 +01:00
unsigned bits;
Better use of immediate operands. Clarify that operands are typically 32bits, and have the code generator make better use of this. Also improve the %movi implementation to work well with marger vectors. Add the %andi instruction to use immediate operands.
2008-05-28 02:51:28 +02:00
unsigned trans = IMM_WID;
if (nwid-idx < trans)
Use movi to load string values. String values are known to be 2-value bits, so they are natural candidates for using the movi instruction to load the value in far fewer instructions. With this patch, up to 16bits (two bytes) at a time can be loaded per instruction. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-11-14 06:14:07 +01:00
trans = nwid-idx;
bits = *p;
p -= 1;
if (trans > 8) {
bits |= *p << 8;
p -= 1;
Better use of immediate operands. Clarify that operands are typically 32bits, and have the code generator make better use of this. Also improve the %movi implementation to work well with marger vectors. Add the %andi instruction to use immediate operands.
2008-05-28 02:51:28 +02:00
if (trans > 16) {
bits |= *p << 16;
p -= 1;
if (trans > 24) {
bits |= *p << 24;
p -= 1;
}
}
Evaluate string expressions (Philip Blundell)
2001-10-18 18:41:49 +02:00
}
When evaluating a constant into an index make sure to clear bit 4. When evaluating an expression into an index register bit 4 is used to determine if the expression had any X/Z bits. In the case of a constant immediate value this can not happen so make sure the bit is cleared.
2008-09-18 01:18:17 +02:00
fprintf(vvp_out, " %%movi %u, %u, %u;\n", res.base+idx,bits,trans);
Evaluate string expressions (Philip Blundell)
2001-10-18 18:41:49 +02:00
Use movi to load string values. String values are known to be 2-value bits, so they are natural candidates for using the movi instruction to load the value in far fewer instructions. With this patch, up to 16bits (two bytes) at a time can be loaded per instruction. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-11-14 06:14:07 +01:00
idx += trans;
Evaluate string expressions (Philip Blundell)
2001-10-18 18:41:49 +02:00
}
/* Pad the number up to the expression width. */
if (idx < wid)
When evaluating a constant into an index make sure to clear bit 4. When evaluating an expression into an index register bit 4 is used to determine if the expression had any X/Z bits. In the case of a constant immediate value this can not happen so make sure the bit is cleared.
2008-09-18 01:18:17 +02:00
fprintf(vvp_out, " %%mov %u, 0, %u;\n", res.base+idx, wid-idx);
Evaluate string expressions (Philip Blundell)
2001-10-18 18:41:49 +02:00
Add thread expression lookaside map.
2002-09-27 18:33:34 +02:00
if (res.base >= 8)
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
save_expression_lookaside(res.base, expr, wid);
Add thread expression lookaside map.
2002-09-27 18:33:34 +02:00
Process expression strings with octal constants correctly (tgt-vvp) tgt-vvp was taking strings and processing them as is, but the strings could contain octal constants. These constants needed to be converted to binary form before they could be turned into a bit pattern.
2007-11-14 04:51:20 +01:00
free(fp);
Evaluate string expressions (Philip Blundell)
2001-10-18 18:41:49 +02:00
return res;
}
Get padding right when loading array word into big vector.
2007-02-12 05:37:58 +01:00
/*
* This function is given an expression, the preallocated vector
* result, and the swid that is filled in so far. The caller has
* already calculated the load swid bits of exp into the beginning of
* the res vector. This function just calculates the pad to fill out
* the res area.
*/
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
void pad_expr_in_place(ivl_expr_t expr, struct vector_info res, unsigned swid)
Get padding right when loading array word into big vector.
2007-02-12 05:37:58 +01:00
{
if (res.wid <= swid)
return;
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if (ivl_expr_signed(expr)) {
Get padding right when loading array word into big vector.
2007-02-12 05:37:58 +01:00
unsigned idx;
for (idx = swid ; idx < res.wid ; idx += 1)
fprintf(vvp_out, " %%mov %u, %u, 1;\n",
res.base+idx, res.base+swid-1);
} else {
Better use of immediate operands. Clarify that operands are typically 32bits, and have the code generator make better use of this. Also improve the %movi implementation to work well with marger vectors. Add the %andi instruction to use immediate operands.
2008-05-28 02:51:28 +02:00
unsigned base = res.base+swid;
unsigned count = res.wid-swid;
/* The %movi is faster for larger widths, but for very
small counts, the %mov is faster. */
if (count > 4)
When evaluating a constant into an index make sure to clear bit 4. When evaluating an expression into an index register bit 4 is used to determine if the expression had any X/Z bits. In the case of a constant immediate value this can not happen so make sure the bit is cleared.
2008-09-18 01:18:17 +02:00
fprintf(vvp_out, " %%movi %u, 0, %u;\n", base, count);
Better use of immediate operands. Clarify that operands are typically 32bits, and have the code generator make better use of this. Also improve the %movi implementation to work well with marger vectors. Add the %andi instruction to use immediate operands.
2008-05-28 02:51:28 +02:00
else
When evaluating a constant into an index make sure to clear bit 4. When evaluating an expression into an index register bit 4 is used to determine if the expression had any X/Z bits. In the case of a constant immediate value this can not happen so make sure the bit is cleared.
2008-09-18 01:18:17 +02:00
fprintf(vvp_out, " %%mov %u, 0, %u;\n", base, count);
Get padding right when loading array word into big vector.
2007-02-12 05:37:58 +01:00
}
}
Handle part select expressions as variants of NetESignal/IVL_EX_SIGNAL objects, instead of creating new and useless temporary signals.
2001-07-27 06:51:44 +02:00
/*
* Evaluating a signal expression means loading the bits of the signal
* into the thread bits. Remember to account for the part select by
* offsetting the read from the lsi (least significant index) of the
* signal.
Optimize load-add with load/add instruction Where and expression is an immediate value added to a signal value, it is possible to optimize them to a single instruction that combines the load with an add at the same time.
2007-12-05 04:15:15 +01:00
*
Load_add_immediate to work with signed expressions The %load/vp0 instruction adds a signed value to the signal value being loaded, but it doesn't allow for a signed source vector. Add the %load/vp0/s instruction that pads the loaded vector, and add the code generator details to properly use it.
2008-06-14 05:23:40 +02:00
* If the add_index is 0, then generate a %load/vp0 to add the
* word0 value to the loaded value before storing it into the
* destination. If the add_index is 1, then generate a %load/vp0/s to
* do a signed load.
Handle part select expressions as variants of NetESignal/IVL_EX_SIGNAL objects, instead of creating new and useless temporary signals.
2001-07-27 06:51:44 +02:00
*/
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static void draw_signal_dest(ivl_expr_t expr, struct vector_info res,
Load_add_immediate to work with signed expressions The %load/vp0 instruction adds a signed value to the signal value being loaded, but it doesn't allow for a signed source vector. Add the %load/vp0/s instruction that pads the loaded vector, and add the code generator details to properly use it.
2008-06-14 05:23:40 +02:00
int add_index, long immediate)
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
{
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
unsigned swid = ivl_expr_width(expr);
ivl_signal_t sig = ivl_expr_signal(expr);
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
Major rework of array handling. Memories are replaced with the more general concept of arrays. The NetMemory and NetEMemory classes are removed from the ivl core program, and the IVL_LPM_RAM lpm type is removed from the ivl_target API.
2007-01-16 06:44:14 +01:00
unsigned word = 0;
Concatenation can evaluate sub-expressions in place.
2002-11-06 06:41:37 +01:00
if (swid > res.wid)
swid = res.wid;
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
Add vpiFile and vpiLineNo for system functions. Add the vpiFile and vpiLineNo properties to system functions. Most other objects have stubs that return "N/A"/0. Interactive functions (called from the debugger) use <interactive> for the file name.
2008-01-01 18:45:02 +01:00
/* If this is an access to an array, handle that by emitting a
Major rework of array handling. Memories are replaced with the more general concept of arrays. The NetMemory and NetEMemory classes are removed from the ivl core program, and the IVL_LPM_RAM lpm type is removed from the ivl_target API.
2007-01-16 06:44:14 +01:00
load/av instruction. */
Use ivl_signal_dimensions to detect that signal is an array. It is possible for an array to have 1 word in it, so using the array count to detect an array is incorrect. Use the ivl_signal_dimensions function, which is there exactly for that purpose.
2008-05-19 20:31:40 +02:00
if (ivl_signal_dimensions(sig) > 0) {
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_t ix = ivl_expr_oper1(expr);
Add %load/avp0 opcode and fix %load/vp0. This patch adds a new opcode %load/avp0 that is used to load a word from an array and add a value to it. %load/vp0 was changed/fixed to do the summation at the result width not the vector width. This allows small vectors to index large arrays with an offset. A few errors in the opcodes.txt file were also fixed.
2008-01-13 03:22:46 +01:00
Rework variable arrays to not have vpi handles for every word. Save tons of space per memory word by not creating a vpi handle for each and every word of a variable array. (Net arrays still get a vpiHandle for every word.) The consequence of this is that all accesses to a variable array need to go through the indexing. This commit handles the most common places where this impacts, but there are still problems.
2008-05-16 19:38:32 +02:00
draw_eval_expr_into_integer(ix, 3);
if (add_index < 0) {
When evaluating a constant into an index make sure to clear bit 4. When evaluating an expression into an index register bit 4 is used to determine if the expression had any X/Z bits. In the case of a constant immediate value this can not happen so make sure the bit is cleared.
2008-09-18 01:18:17 +02:00
fprintf(vvp_out, " %%load/av %u, v%p, %u;\n",
Rework variable arrays to not have vpi handles for every word. Save tons of space per memory word by not creating a vpi handle for each and every word of a variable array. (Net arrays still get a vpiHandle for every word.) The consequence of this is that all accesses to a variable array need to go through the indexing. This commit handles the most common places where this impacts, but there are still problems.
2008-05-16 19:38:32 +02:00
res.base, sig, swid);
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
pad_expr_in_place(expr, res, swid);
Rework variable arrays to not have vpi handles for every word. Save tons of space per memory word by not creating a vpi handle for each and every word of a variable array. (Net arrays still get a vpiHandle for every word.) The consequence of this is that all accesses to a variable array need to go through the indexing. This commit handles the most common places where this impacts, but there are still problems.
2008-05-16 19:38:32 +02:00
} else {
Signed load-and-add for arrays. The load-and-add for vectors %load/vp0/s can be combined with the load-and-add for array words, and the %load/avp0/s added to round out the combinations. This can make for fewer instructions when words are padded in arithmetic expressions.
2008-06-15 04:59:57 +02:00
const char*sign_flag = (add_index>0)? "/s" : "";
Major rework of array handling. Memories are replaced with the more general concept of arrays. The NetMemory and NetEMemory classes are removed from the ivl core program, and the IVL_LPM_RAM lpm type is removed from the ivl_target API.
2007-01-16 06:44:14 +01:00
Rework variable arrays to not have vpi handles for every word. Save tons of space per memory word by not creating a vpi handle for each and every word of a variable array. (Net arrays still get a vpiHandle for every word.) The consequence of this is that all accesses to a variable array need to go through the indexing. This commit handles the most common places where this impacts, but there are still problems.
2008-05-16 19:38:32 +02:00
/* Add an immediate value to an array value. */
Add support for 64 bit delays in procedural non-blocking assignments. This patch adds support for 64 bit non-blocking delays in procedural code. We fixed the procedural delay operator (blocking delays) earlier. This patch mostly mimics what was done there. The continuous assignment delay operator still needs to be fixed.
2009-02-17 01:44:52 +01:00
fprintf(vvp_out, " %%ix/load 0, %lu, 0;\n", immediate);
When evaluating a constant into an index make sure to clear bit 4. When evaluating an expression into an index register bit 4 is used to determine if the expression had any X/Z bits. In the case of a constant immediate value this can not happen so make sure the bit is cleared.
2008-09-18 01:18:17 +02:00
fprintf(vvp_out, " %%load/avp0%s %u, v%p, %u;\n",
Signed load-and-add for arrays. The load-and-add for vectors %load/vp0/s can be combined with the load-and-add for array words, and the %load/avp0/s added to round out the combinations. This can make for fewer instructions when words are padded in arithmetic expressions.
2008-06-15 04:59:57 +02:00
sign_flag, res.base, sig, res.wid);
Rework variable arrays to not have vpi handles for every word. Save tons of space per memory word by not creating a vpi handle for each and every word of a variable array. (Net arrays still get a vpiHandle for every word.) The consequence of this is that all accesses to a variable array need to go through the indexing. This commit handles the most common places where this impacts, but there are still problems.
2008-05-16 19:38:32 +02:00
}
return;
Major rework of array handling. Memories are replaced with the more general concept of arrays. The NetMemory and NetEMemory classes are removed from the ivl core program, and the IVL_LPM_RAM lpm type is removed from the ivl_target API.
2007-01-16 06:44:14 +01:00
}
Fix code generation for real expressions Real value are vector width of 1, fix real literal to reflect this. fix leaking real registers in code generation for function arguments. Load of signal should handle conversion from real to vector. Function arguments, type vector passed a real value, are an example where this comes up. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-06-30 06:10:37 +02:00
if (ivl_signal_data_type(sig) == IVL_VT_REAL) {
Content-free portability fixes. These are patches from ITOH Yasufumi and Larry Doolittle of pr2120948. They change nothing, but make the code compile with older compilers.
2008-09-30 03:06:47 +02:00
int tmp;
Fix code generation for real expressions Real value are vector width of 1, fix real literal to reflect this. fix leaking real registers in code generation for function arguments. Load of signal should handle conversion from real to vector. Function arguments, type vector passed a real value, are an example where this comes up. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-06-30 06:10:37 +02:00
Optimize load-add with load/add instruction Where and expression is an immediate value added to a signal value, it is possible to optimize them to a single instruction that combines the load with an add at the same time.
2007-12-05 04:15:15 +01:00
assert(add_index < 0);
Content-free portability fixes. These are patches from ITOH Yasufumi and Larry Doolittle of pr2120948. They change nothing, but make the code compile with older compilers.
2008-09-30 03:06:47 +02:00
tmp = allocate_word();
When evaluating a constant into an index make sure to clear bit 4. When evaluating an expression into an index register bit 4 is used to determine if the expression had any X/Z bits. In the case of a constant immediate value this can not happen so make sure the bit is cleared.
2008-09-18 01:18:17 +02:00
fprintf(vvp_out, " %%load/wr %d, v%p_%u;\n", tmp, sig, word);
fprintf(vvp_out, " %%cvt/vr %u, %d, %u;\n", res.base, tmp, res.wid);
Fix code generation for real expressions Real value are vector width of 1, fix real literal to reflect this. fix leaking real registers in code generation for function arguments. Load of signal should handle conversion from real to vector. Function arguments, type vector passed a real value, are an example where this comes up. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-06-30 06:10:37 +02:00
clr_word(tmp);
Optimize load-add with load/add instruction Where and expression is an immediate value added to a signal value, it is possible to optimize them to a single instruction that combines the load with an add at the same time.
2007-12-05 04:15:15 +01:00
} else if (add_index >= 0) {
Load_add_immediate to work with signed expressions The %load/vp0 instruction adds a signed value to the signal value being loaded, but it doesn't allow for a signed source vector. Add the %load/vp0/s instruction that pads the loaded vector, and add the code generator details to properly use it.
2008-06-14 05:23:40 +02:00
const char*sign_flag = add_index==1? "/s" : "";
Optimize load-add with load/add instruction Where and expression is an immediate value added to a signal value, it is possible to optimize them to a single instruction that combines the load with an add at the same time.
2007-12-05 04:15:15 +01:00
/* If this is a REG (a variable) then I can do a vector read. */
Load_add_immediate to work with signed expressions The %load/vp0 instruction adds a signed value to the signal value being loaded, but it doesn't allow for a signed source vector. Add the %load/vp0/s instruction that pads the loaded vector, and add the code generator details to properly use it.
2008-06-14 05:23:40 +02:00
if (immediate >= 0) {
Add support for 64 bit delays in procedural non-blocking assignments. This patch adds support for 64 bit non-blocking delays in procedural code. We fixed the procedural delay operator (blocking delays) earlier. This patch mostly mimics what was done there. The continuous assignment delay operator still needs to be fixed.
2009-02-17 01:44:52 +01:00
fprintf(vvp_out, " %%ix/load 0, %lu, 0;\n", immediate);
Load_add_immediate to work with signed expressions The %load/vp0 instruction adds a signed value to the signal value being loaded, but it doesn't allow for a signed source vector. Add the %load/vp0/s instruction that pads the loaded vector, and add the code generator details to properly use it.
2008-06-14 05:23:40 +02:00
} else {
Add support for 64 bit delays in procedural non-blocking assignments. This patch adds support for 64 bit non-blocking delays in procedural code. We fixed the procedural delay operator (blocking delays) earlier. This patch mostly mimics what was done there. The continuous assignment delay operator still needs to be fixed.
2009-02-17 01:44:52 +01:00
fprintf(vvp_out, " %%ix/load 0, 0, 0; immediate=%ld\n", immediate);
fprintf(vvp_out, " %%ix/sub 0, %ld, 0;\n", -immediate);
Load_add_immediate to work with signed expressions The %load/vp0 instruction adds a signed value to the signal value being loaded, but it doesn't allow for a signed source vector. Add the %load/vp0/s instruction that pads the loaded vector, and add the code generator details to properly use it.
2008-06-14 05:23:40 +02:00
}
fprintf(vvp_out, " %%load/vp0%s %u, v%p_%u, %u;\n", sign_flag,
res.base, sig,word, res.wid);
Add %load/avp0 opcode and fix %load/vp0. This patch adds a new opcode %load/avp0 that is used to load a word from an array and add a value to it. %load/vp0 was changed/fixed to do the summation at the result width not the vector width. This allows small vectors to index large arrays with an offset. A few errors in the opcodes.txt file were also fixed.
2008-01-13 03:22:46 +01:00
swid = res.wid;
Optimize load-add with load/add instruction Where and expression is an immediate value added to a signal value, it is possible to optimize them to a single instruction that combines the load with an add at the same time.
2007-12-05 04:15:15 +01:00
Fix code generation for real expressions Real value are vector width of 1, fix real literal to reflect this. fix leaking real registers in code generation for function arguments. Load of signal should handle conversion from real to vector. Function arguments, type vector passed a real value, are an example where this comes up. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-06-30 06:10:37 +02:00
} else {
/* If this is a REG (a variable) then I can do a vector read. */
fprintf(vvp_out, " %%load/v %u, v%p_%u, %u;\n",
res.base, sig, word, swid);
}
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
pad_expr_in_place(expr, res, swid);
Concatenation can evaluate sub-expressions in place.
2002-11-06 06:41:37 +01:00
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_signal_expr(ivl_expr_t expr, unsigned wid,
More robust use of precalculated expressions, and Separate lookaside for written variables that can also be reused.
2005-09-17 03:01:00 +02:00
int stuff_ok_flag)
Concatenation can evaluate sub-expressions in place.
2002-11-06 06:41:37 +01:00
{
struct vector_info res;
More robust use of precalculated expressions, and Separate lookaside for written variables that can also be reused.
2005-09-17 03:01:00 +02:00
int alloc_exclusive = (stuff_ok_flag&STUFF_OK_RO) ? 0 : 1;
Concatenation can evaluate sub-expressions in place.
2002-11-06 06:41:37 +01:00
/* Already in the vector lookaside? */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
res.base = allocate_vector_exp(expr, wid, alloc_exclusive);
Concatenation can evaluate sub-expressions in place.
2002-11-06 06:41:37 +01:00
res.wid = wid;
More robust use of precalculated expressions, and Separate lookaside for written variables that can also be reused.
2005-09-17 03:01:00 +02:00
if (res.base != 0) {
fprintf(vvp_out, "; Reuse signal base=%u wid=%u from lookaside.\n",
res.base, res.wid);
Concatenation can evaluate sub-expressions in place.
2002-11-06 06:41:37 +01:00
return res;
More robust use of precalculated expressions, and Separate lookaside for written variables that can also be reused.
2005-09-17 03:01:00 +02:00
}
Concatenation can evaluate sub-expressions in place.
2002-11-06 06:41:37 +01:00
res.base = allocate_vector(wid);
res.wid = wid;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
if (res.base == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"to load variable/wire.\n",
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_file(expr), ivl_expr_lineno(expr), wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
vvp_errors += 1;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
save_expression_lookaside(res.base, expr, wid);
Concatenation can evaluate sub-expressions in place.
2002-11-06 06:41:37 +01:00
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
draw_signal_dest(expr, res, -1, 0L);
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
return res;
}
Finish up part select of array words.
2007-04-14 06:43:01 +02:00
static struct vector_info draw_select_array(ivl_expr_t sube,
ivl_expr_t bit_idx,
unsigned bit_width,
unsigned wid)
{
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
unsigned idx, label;
Finish up part select of array words.
2007-04-14 06:43:01 +02:00
ivl_signal_t sig = ivl_expr_signal(sube);
Fix optimization of base==0 part select Some patch caused a variable that held the constant base of a part select to become unassigned. This led to unexplained failures to part select a signal. Fix by properly detecting the case of a constant base of 0 for the part select.
2007-12-10 02:00:32 +01:00
/* unsigned sig_wid = ivl_expr_width(sube); */
Finish up part select of array words.
2007-04-14 06:43:01 +02:00
ivl_expr_t ix = ivl_expr_oper1(sube);
struct vector_info shiv;
struct vector_info res;
shiv = draw_eval_expr(bit_idx, STUFF_OK_XZ|STUFF_OK_RO);
draw_eval_expr_into_integer(ix, 3);
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
label = local_count++;
/* We can safely skip the bit index load below if the array word
* index is undefined. We need to do this so that the bit index
* load does not reset bit 4 to zero by loading a defined value. */
fprintf(vvp_out, " %%jmp/1 T_%d.%d, 4;\n", thread_count, label);
if (ivl_expr_signed(bit_idx)) {
fprintf(vvp_out, " %%ix/get/s 0, %u, %u;\n", shiv.base,
shiv.wid);
} else {
fprintf(vvp_out, " %%ix/get 0, %u, %u;\n", shiv.base, shiv.wid);
}
fprintf(vvp_out, "T_%d.%d ;\n", thread_count, label);
Finish up part select of array words.
2007-04-14 06:43:01 +02:00
if (shiv.base >= 8)
clr_vector(shiv);
res.base = allocate_vector(wid);
res.wid = wid;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
if (res.base == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"to hold selected value.\n",
ivl_expr_file(sube), ivl_expr_lineno(sube), wid);
vvp_errors += 1;
}
Finish up part select of array words.
2007-04-14 06:43:01 +02:00
for (idx = 0 ; idx < wid ; idx += 1) {
When evaluating a constant into an index make sure to clear bit 4. When evaluating an expression into an index register bit 4 is used to determine if the expression had any X/Z bits. In the case of a constant immediate value this can not happen so make sure the bit is cleared.
2008-09-18 01:18:17 +02:00
fprintf(vvp_out, " %%load/avx.p %u, v%p, 0;\n", res.base+idx, sig);
Finish up part select of array words.
2007-04-14 06:43:01 +02:00
}
return res;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_select_signal(ivl_expr_t expr,
A signal select is signed if the select not the signal is signed. The padding for a signal select was using the signal to determine if the padding should be singed or not. In reality this should be unsigned padding unless the select was enclosed in a $signed().
2010-01-06 20:52:02 +01:00
ivl_expr_t sube,
Support constant part select writes to l-values, and large part select reads from signals.
2005-02-15 08:12:55 +01:00
ivl_expr_t bit_idx,
Pad part selects
2005-12-22 16:42:22 +01:00
unsigned bit_wid,
Support constant part select writes to l-values, and large part select reads from signals.
2005-02-15 08:12:55 +01:00
unsigned wid)
{
ivl_signal_t sig = ivl_expr_signal(sube);
struct vector_info res;
Major rework of array handling. Memories are replaced with the more general concept of arrays. The NetMemory and NetEMemory classes are removed from the ivl core program, and the IVL_LPM_RAM lpm type is removed from the ivl_target API.
2007-01-16 06:44:14 +01:00
/* Use this word of the signal. */
unsigned use_word = 0;
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
unsigned use_wid, lab_x, lab_end;
Finish up part select of array words.
2007-04-14 06:43:01 +02:00
/* If this is an access to an array, try to get the index as a
Careful that select signal does not try to select reg words directly.
2008-05-19 20:44:03 +02:00
constant. If it is (and the array is not a reg array then
this reduces to a signal access and we stay here. If it is
not constant, then give up and do an array index in front
of this part select. */
Finish up part select of array words.
2007-04-14 06:43:01 +02:00
Use ivl_signal_dimensions to detect that signal is an array. It is possible for an array to have 1 word in it, so using the array count to detect an array is incorrect. Use the ivl_signal_dimensions function, which is there exactly for that purpose.
2008-05-19 20:31:40 +02:00
if (ivl_signal_dimensions(sig) > 0) {
Major rework of array handling. Memories are replaced with the more general concept of arrays. The NetMemory and NetEMemory classes are removed from the ivl core program, and the IVL_LPM_RAM lpm type is removed from the ivl_target API.
2007-01-16 06:44:14 +01:00
ivl_expr_t ix = ivl_expr_oper1(sube);
Finish up part select of array words.
2007-04-14 06:43:01 +02:00
Careful that select signal does not try to select reg words directly.
2008-05-19 20:44:03 +02:00
if (ivl_signal_type(sig)==IVL_SIT_REG
Check that numbers fit into the correct immediate width (32 bits). Even on 64 bit machines immediate values should be limited to 32 bits so that the a.out file will run correctly on a 32 bit machine. This patch fixes a number of places where the code generator was not checking for/observing this.
2008-10-07 01:22:34 +02:00
|| !number_is_immediate(ix, IMM_WID, 0))
Finish up part select of array words.
2007-04-14 06:43:01 +02:00
return draw_select_array(sube, bit_idx, bit_wid, wid);
Major rework of array handling. Memories are replaced with the more general concept of arrays. The NetMemory and NetEMemory classes are removed from the ivl core program, and the IVL_LPM_RAM lpm type is removed from the ivl_target API.
2007-01-16 06:44:14 +01:00
/* The index is constant, so we can return to direct
readout with the specific word selected. */
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
assert(! number_is_unknown(ix));
Major rework of array handling. Memories are replaced with the more general concept of arrays. The NetMemory and NetEMemory classes are removed from the ivl core program, and the IVL_LPM_RAM lpm type is removed from the ivl_target API.
2007-01-16 06:44:14 +01:00
use_word = get_number_immediate(ix);
}
Minor optimization of partial load/v When loading a part select from the least significant bits, it is OK to use the %load/v instruction to strip the high bits off. This allows the zero-based part select to work in one step, without loading excess bits.
2007-12-10 02:28:49 +01:00
/* Try the special case that the part is at the beginning of
the signal (or the entire width). Just load the early bits
in one go. */
Add unlimited tail recursion for the real ternary operator. This patch modifies the real ternary operator code to support unlimited tail recursion without overflowing the thread registers. Head recursion is still limited by the available registers. It fixes the thread word checks to use a new define that has the correct number of thread words (16). It adds a message instead of just an assert if the thread words are exhausted. And it also changes some of the error messages to use vvp.tgt in the message to be consistent with the other messages.
2010-07-07 23:33:10 +02:00
if (number_is_immediate(bit_idx, IMM_WID, 0)
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
&& !number_is_unknown(bit_idx)
Fix optimization of base==0 part select Some patch caused a variable that held the constant base of a part select to become unassigned. This led to unexplained failures to part select a signal. Fix by properly detecting the case of a constant base of 0 for the part select.
2007-12-10 02:00:32 +01:00
&& get_number_immediate(bit_idx) == 0
Correct bit widths and pad of certain part selects Zero-based part selects are a special case that is handled with optimized code. Properly handle the part select width to get the desired padding. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-12-26 17:22:33 +01:00
&& (ivl_expr_width(sube) >= bit_wid)) {
Minor optimization of partial load/v When loading a part select from the least significant bits, it is OK to use the %load/v instruction to strip the high bits off. This allows the zero-based part select to work in one step, without loading excess bits.
2007-12-10 02:28:49 +01:00
Improve loading of part selects when easy.
2005-09-17 06:01:32 +02:00
res.base = allocate_vector(wid);
res.wid = wid;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
assert(res.base);
When evaluating a constant into an index make sure to clear bit 4. When evaluating an expression into an index register bit 4 is used to determine if the expression had any X/Z bits. In the case of a constant immediate value this can not happen so make sure the bit is cleared.
2008-09-18 01:18:17 +02:00
fprintf(vvp_out, " %%load/v %u, v%p_%u, %u; Only need %u of %u bits\n",
Correct bit widths and pad of certain part selects Zero-based part selects are a special case that is handled with optimized code. Properly handle the part select width to get the desired padding. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-12-26 17:22:33 +01:00
res.base, sig, use_word, bit_wid, bit_wid, ivl_expr_width(sube));
Non-controversial whitespace cleanup Nothing to do with tab width! Eliminates useless trailing spaces and tabs, and nearly all <space><tab> pairings. No change to derived files (e.g., .vvp), non-master files (e.g., lxt2_write.c) or the new tgt-vhdl directory. Low priority, simple entropy reduction. Please apply unless it deletes some steganographic content you want to keep.
2008-09-04 18:41:51 +02:00
Correct bit widths and pad of certain part selects Zero-based part selects are a special case that is handled with optimized code. Properly handle the part select width to get the desired padding. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-12-26 17:22:33 +01:00
save_signal_lookaside(res.base, sig, use_word, bit_wid);
A signal select is signed if the select not the signal is signed. The padding for a signal select was using the signal to determine if the padding should be singed or not. In reality this should be unsigned padding unless the select was enclosed in a $signed().
2010-01-06 20:52:02 +01:00
/* Pad the part select to the desired width. Because of
$signed() this may be signed or unsigned (default). */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
pad_expr_in_place(expr, res, bit_wid);
Improve loading of part selects when easy.
2005-09-17 06:01:32 +02:00
return res;
}
/* Alas, do it the hard way. */
Change bit select instruction to a part select. There is no point in having a bit select instruction and running it in a loop (always) when we can simply turn it into a part select instruction.
2008-06-11 02:29:47 +02:00
draw_eval_expr_into_integer(bit_idx, 1);
Support constant part select writes to l-values, and large part select reads from signals.
2005-02-15 08:12:55 +01:00
res.base = allocate_vector(wid);
res.wid = wid;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
assert(res.base);
Support constant part select writes to l-values, and large part select reads from signals.
2005-02-15 08:12:55 +01:00
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
lab_x = local_count++;
lab_end = local_count++;
/* If the index is 'bx then we just return 'bx. */
fprintf(vvp_out, " %%jmp/1 T_%d.%d, 4;\n", thread_count, lab_x);
Content-free portability fixes. These are patches from ITOH Yasufumi and Larry Doolittle of pr2120948. They change nothing, but make the code compile with older compilers.
2008-09-30 03:06:47 +02:00
use_wid = res.wid;
Change bit select instruction to a part select. There is no point in having a bit select instruction and running it in a loop (always) when we can simply turn it into a part select instruction.
2008-06-11 02:29:47 +02:00
if (use_wid > bit_wid)
use_wid = bit_wid;
When evaluating a constant into an index make sure to clear bit 4. When evaluating an expression into an index register bit 4 is used to determine if the expression had any X/Z bits. In the case of a constant immediate value this can not happen so make sure the bit is cleared.
2008-09-18 01:18:17 +02:00
fprintf(vvp_out, " %%load/x1p %u, v%p_%u, %u;\n",
Change bit select instruction to a part select. There is no point in having a bit select instruction and running it in a loop (always) when we can simply turn it into a part select instruction.
2008-06-11 02:29:47 +02:00
res.base, sig, use_word, use_wid);
A signal select is signed if the select not the signal is signed. The padding for a signal select was using the signal to determine if the padding should be singed or not. In reality this should be unsigned padding unless the select was enclosed in a $signed().
2010-01-06 20:52:02 +01:00
/* Pad the part select to the desired width. Because of
$signed() this may be signed or unsigned (default). */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
pad_expr_in_place(expr, res, use_wid);
Support constant part select writes to l-values, and large part select reads from signals.
2005-02-15 08:12:55 +01:00
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
fprintf(vvp_out, " %%jmp T_%d.%d;\n", thread_count, lab_end);
fprintf(vvp_out, "T_%d.%d ;\n", thread_count, lab_x);
fprintf(vvp_out, " %%mov %u, 2, %u;\n", res.base, res.wid);
fprintf(vvp_out, "T_%d.%d ;\n", thread_count, lab_end);
Support constant part select writes to l-values, and large part select reads from signals.
2005-02-15 08:12:55 +01:00
return res;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static void draw_select_signal_dest(ivl_expr_t expr,
A signal select is signed if the select not the signal is signed. The padding for a signal select was using the signal to determine if the padding should be singed or not. In reality this should be unsigned padding unless the select was enclosed in a $signed().
2010-01-06 20:52:02 +01:00
ivl_expr_t sube,
Support drawing some select expressions in place. Select of signals is natural for evaluating in place, if possible. Doing so can save instructions for certain expressions.
2008-11-23 06:17:05 +01:00
ivl_expr_t bit_idx,
struct vector_info dest,
int stuff_ok_flag)
{
struct vector_info tmp;
ivl_signal_t sig = ivl_expr_signal(sube);
/* Special case: If the operand is a signal (not an array) and
the part select is coming from the LSB, and the part select
is no larger then the signal itself, then we can load the
value in place, directly. */
if ((ivl_signal_dimensions(sig) == 0)
&& (ivl_expr_width(sube) >= dest.wid)
Add unlimited tail recursion for the real ternary operator. This patch modifies the real ternary operator code to support unlimited tail recursion without overflowing the thread registers. Head recursion is still limited by the available registers. It fixes the thread word checks to use a new define that has the correct number of thread words (16). It adds a message instead of just an assert if the thread words are exhausted. And it also changes some of the error messages to use vvp.tgt in the message to be consistent with the other messages.
2010-07-07 23:33:10 +02:00
&& number_is_immediate(bit_idx, IMM_WID, 0)
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
&& ! number_is_unknown(bit_idx)
Support drawing some select expressions in place. Select of signals is natural for evaluating in place, if possible. Doing so can save instructions for certain expressions.
2008-11-23 06:17:05 +01:00
&& get_number_immediate(bit_idx) == 0) {
unsigned use_word = 0;
fprintf(vvp_out, " %%load/v %u, v%p_%u, %u; Select %u out of %u bits\n",
dest.base, sig, use_word, dest.wid,
dest.wid, ivl_expr_width(sube));
return;
}
/* Fallback, just draw the expression and copy the result into
the destination. */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
tmp = draw_select_signal(expr, sube, bit_idx, dest.wid, dest.wid);
Support drawing some select expressions in place. Select of signals is natural for evaluating in place, if possible. Doing so can save instructions for certain expressions.
2008-11-23 06:17:05 +01:00
assert(tmp.wid == dest.wid);
fprintf(vvp_out, " %%mov %u, %u, %u; Move signal select into place\n",
dest.base, tmp.base, dest.wid);
if (tmp.base >= 8) {
save_expression_lookaside(tmp.base, sube, tmp.wid);
clr_vector(tmp);
}
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_select_unsized_literal(ivl_expr_t expr,
Handle selects unsized literal values accounting for bit extension. When selecting bits from unsized literals, we do not put a limit on the size of the literal, so there is no top above which we stop getting literal bits.
2010-03-07 01:21:10 +01:00
unsigned wid,
int stuff_ok_flag)
Add support for bit select of parameters. This leads to a NetESelect node and the vvp code generator to support that.
2002-01-28 01:52:41 +01:00
{
struct vector_info subv, shiv, res;
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_t sube = ivl_expr_oper1(expr);
ivl_expr_t shift = ivl_expr_oper2(expr);
Add support for bit select of parameters. This leads to a NetESelect node and the vvp code generator to support that.
2002-01-28 01:52:41 +01:00
Handle selects unsized literal values accounting for bit extension. When selecting bits from unsized literals, we do not put a limit on the size of the literal, so there is no top above which we stop getting literal bits.
2010-03-07 01:21:10 +01:00
assert(!ivl_expr_sized(sube));
Fix warnings about uninitialized variables.
2005-09-19 22:18:20 +02:00
res.wid = wid;
Add support for bit select of parameters. This leads to a NetESelect node and the vvp code generator to support that.
2002-01-28 01:52:41 +01:00
/* Evaluate the sub-expression. */
Optimize ==1 when in context where x vs z doesnt matter.
2002-09-13 05:12:50 +02:00
subv = draw_eval_expr(sube, 0);
Add support for bit select of parameters. This leads to a NetESelect node and the vvp code generator to support that.
2002-01-28 01:52:41 +01:00
Handle special case bit selects if unsized 0/-1. Unsized constant 0 and -1 are pretty special, and part selects of these values can be handled very specially.
2010-03-06 04:36:54 +01:00
/* Special case: Any bit/part select of an unsized constant
zero by an unsigned base is another constant zero, so short
circuit and return the value we know. */
Handle selects unsized literal values accounting for bit extension. When selecting bits from unsized literals, we do not put a limit on the size of the literal, so there is no top above which we stop getting literal bits.
2010-03-07 01:21:10 +01:00
if (subv.base == 0 && !ivl_expr_signed(shift)) {
fprintf(vvp_out, "; Part select of unsized zero with unsigned shift is zero.\n");
Add support for bit select of parameters. This leads to a NetESelect node and the vvp code generator to support that.
2002-01-28 01:52:41 +01:00
subv.wid = wid;
return subv;
}
Handle special case bit selects if unsized 0/-1. Unsized constant 0 and -1 are pretty special, and part selects of these values can be handled very specially.
2010-03-06 04:36:54 +01:00
/* Special case: Any bit/part select of an unsized constant -1
by an unsigned base is another constant -1, so short
circuit and return the value we know. */
Handle selects unsized literal values accounting for bit extension. When selecting bits from unsized literals, we do not put a limit on the size of the literal, so there is no top above which we stop getting literal bits.
2010-03-07 01:21:10 +01:00
if (subv.base == 1 && ivl_expr_signed(sube) && !ivl_expr_signed(shift)) {
fprintf(vvp_out, "; Part select of unsized -1 with unsigned shift is -1.\n");
Handle special case bit selects if unsized 0/-1. Unsized constant 0 and -1 are pretty special, and part selects of these values can be handled very specially.
2010-03-06 04:36:54 +01:00
subv.wid = wid;
return subv;
}
/* Evaluate the bit select base expression. */
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
shiv = draw_eval_expr(shift, STUFF_OK_XZ);
Special handling of constant shift 0.
2005-01-28 06:37:48 +01:00
Handle special case bit selects if unsized 0/-1. Unsized constant 0 and -1 are pretty special, and part selects of these values can be handled very specially.
2010-03-06 04:36:54 +01:00
/* Special case: If the shift is a constant 0, skip the shift
and return the subexpression with the width trimmed down to
the part select width. */
Special handling of constant shift 0.
2005-01-28 06:37:48 +01:00
if (shiv.base == 0) {
Handle special case bit selects if unsized 0/-1. Unsized constant 0 and -1 are pretty special, and part selects of these values can be handled very specially.
2010-03-06 04:36:54 +01:00
fprintf(vvp_out, "; Part select with shift==0 skips shift.\n");
Special handling of constant shift 0.
2005-01-28 06:37:48 +01:00
assert(subv.wid >= wid);
res.base = subv.base;
return res;
}
Handle special case bit selects if unsized 0/-1. Unsized constant 0 and -1 are pretty special, and part selects of these values can be handled very specially.
2010-03-06 04:36:54 +01:00
/* Special case: If the expression is an unsized zero (and we
know that the shift is signed) then the expression value is
0 if the shift is >= 0, and x otherwise. The trickery in
this special case assumes the output width is 1. */
Handle selects unsized literal values accounting for bit extension. When selecting bits from unsized literals, we do not put a limit on the size of the literal, so there is no top above which we stop getting literal bits.
2010-03-07 01:21:10 +01:00
if (subv.base==0 && wid==1) {
Handle special case bit selects if unsized 0/-1. Unsized constant 0 and -1 are pretty special, and part selects of these values can be handled very specially.
2010-03-06 04:36:54 +01:00
assert(ivl_expr_signed(shift));
if (shiv.base < 4) {
assert(shiv.base != 0);
res.base = 2;
res.wid = wid;
return res;
}
/* Test if the shift is <0 by looking at the sign
bit. If the sign bit is 1, then it is negative and
the result is 1'bx. If the sign bit is 0, then the
result is 1'b0. */
clr_vector(shiv);
res.base = allocate_vector(wid);
res.wid = wid;
fprintf(vvp_out, " %%mov %u, 2, 1;\n", res.base);
fprintf(vvp_out, " %%and %u, %u, 1; x if shift<0, 0 otherwise\n",
res.base, shiv.base+shiv.wid-1);
return res;
}
/* Special case: If the expression is an unsized -1 (and we
know that the shift is signed) then the expression value is
1 if the shift is >= 0, and x otherwise. The trickery in
this special case assumes the output width is 1. */
Handle selects unsized literal values accounting for bit extension. When selecting bits from unsized literals, we do not put a limit on the size of the literal, so there is no top above which we stop getting literal bits.
2010-03-07 01:21:10 +01:00
if (subv.base==1 && ivl_expr_signed(sube) && wid==1) {
Handle special case bit selects if unsized 0/-1. Unsized constant 0 and -1 are pretty special, and part selects of these values can be handled very specially.
2010-03-06 04:36:54 +01:00
assert(ivl_expr_signed(shift));
if (shiv.base < 4) {
assert(shiv.base != 0);
res.base = 2;
res.wid = wid;
return res;
}
/* Test if the shift is <0 by looking at the sign
bit. If the sign bit is 1, then it is negative and
the result is 1'bx. If the sign bit is 0, then the
result is 1'b1. */
clr_vector(shiv);
res.base = allocate_vector(wid);
res.wid = wid;
fprintf(vvp_out, " %%mov %u, 2, 1;\n", res.base);
fprintf(vvp_out, " %%nand %u, %u, 1; x if shift<0, 1 otherwise\n",
res.base, shiv.base+shiv.wid-1);
return res;
}
Handle selects unsized literal values accounting for bit extension. When selecting bits from unsized literals, we do not put a limit on the size of the literal, so there is no top above which we stop getting literal bits.
2010-03-07 01:21:10 +01:00
/* Fall back to doing it the hard way. */
unsigned lab_end = local_count++;
unsigned lab_x = local_count++;
/* Store the bit select base into index register 0, in
preparation for doing a shift. */
if (ivl_expr_signed(shift)) {
fprintf(vvp_out, " %%ix/get/s 0, %u, %u;\n", shiv.base,
shiv.wid);
} else {
fprintf(vvp_out, " %%ix/get 0, %u, %u;\n", shiv.base, shiv.wid);
}
clr_vector(shiv);
/* If we have an undefined index then just produce a 'bx result. */
fprintf(vvp_out, " %%jmp/1 T_%d.%d, 4;\n", thread_count, lab_x);
Revert bad merge from vhdl branch
2010-10-02 20:02:27 +02:00
/* If the subv result is a magic constant, then make a copy in
Handle selects unsized literal values accounting for bit extension. When selecting bits from unsized literals, we do not put a limit on the size of the literal, so there is no top above which we stop getting literal bits.
2010-03-07 01:21:10 +01:00
writable vector space and work from there instead. */
if (subv.base < 4) {
res.base = allocate_vector(subv.wid);
res.wid = subv.wid;
assert(res.base);
fprintf(vvp_out, " %%mov %u, %u, %u;\n", res.base,
subv.base, res.wid);
subv = res;
}
/* If the subv result is narrower then the select width, then
copy it into a wider vector. */
if (subv.wid < wid && ivl_expr_signed(sube)) {
res.base = allocate_vector(wid);
res.wid = wid;
assert(res.base);
fprintf(vvp_out, " %%mov %u, %u, %u; Pad sub-expression to match width\n",
res.base, subv.base, subv.wid);
if (ivl_expr_signed(sube)) {
Revert bad merge from vhdl branch
2010-10-02 20:02:27 +02:00
unsigned idx;
Handle selects unsized literal values accounting for bit extension. When selecting bits from unsized literals, we do not put a limit on the size of the literal, so there is no top above which we stop getting literal bits.
2010-03-07 01:21:10 +01:00
for (idx = subv.wid ; idx < res.wid ; idx += 1) {
fprintf(vvp_out, " %%mov %u, %u, 1;\n",
res.base+idx, subv.base+subv.wid-1);
}
} else {
fprintf(vvp_out, " %%mov %u, 0, %u\n",
res.base+subv.wid, wid-subv.wid);
}
subv = res;
}
if (ivl_expr_signed(sube))
fprintf(vvp_out, " %%shiftr/s/i0 %u, %u; Sign-extending pad\n", subv.base, subv.wid);
else
fprintf(vvp_out, " %%shiftr/i0 %u, %u;\n", subv.base, subv.wid);
fprintf(vvp_out, " %%jmp T_%d.%d;\n", thread_count, lab_end);
fprintf(vvp_out, "T_%d.%d ; Return 'bx value\n", thread_count, lab_x);
fprintf(vvp_out, " %%mov %u, 2, %u;\n", subv.base, wid);
fprintf(vvp_out, " %%jmp T_%d.%d;\n", thread_count, lab_end);
/* DONE */
fprintf(vvp_out, "T_%d.%d ;\n", thread_count, lab_end);
if (subv.wid > wid) {
res.base = subv.base;
res.wid = wid;
subv.base += wid;
subv.wid -= wid;
clr_vector(subv);
} else {
assert(subv.wid == wid);
res = subv;
}
return res;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_select_expr(ivl_expr_t expr, unsigned wid,
Handle selects unsized literal values accounting for bit extension. When selecting bits from unsized literals, we do not put a limit on the size of the literal, so there is no top above which we stop getting literal bits.
2010-03-07 01:21:10 +01:00
int stuff_ok_flag)
{
struct vector_info subv, shiv, res;
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_t sube = ivl_expr_oper1(expr);
ivl_expr_t shift = ivl_expr_oper2(expr);
Handle selects unsized literal values accounting for bit extension. When selecting bits from unsized literals, we do not put a limit on the size of the literal, so there is no top above which we stop getting literal bits.
2010-03-07 01:21:10 +01:00
int alloc_exclusive = (stuff_ok_flag&STUFF_OK_RO)? 0 : 1;
int cmp;
unsigned lab_l, lab_end;
res.wid = wid;
/* First look for the self expression in the lookaside, and
allocate that if possible. If I find it, then immediately
return that. */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if ( (res.base = allocate_vector_exp(expr, wid, alloc_exclusive)) != 0) {
Handle selects unsized literal values accounting for bit extension. When selecting bits from unsized literals, we do not put a limit on the size of the literal, so there is no top above which we stop getting literal bits.
2010-03-07 01:21:10 +01:00
fprintf(vvp_out, "; Reuse base=%u wid=%u from lookaside.\n",
res.base, wid);
return res;
}
if (ivl_expr_type(sube) == IVL_EX_SIGNAL) {
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
res = draw_select_signal(expr, sube, shift, ivl_expr_width(expr),
wid);
Handle selects unsized literal values accounting for bit extension. When selecting bits from unsized literals, we do not put a limit on the size of the literal, so there is no top above which we stop getting literal bits.
2010-03-07 01:21:10 +01:00
fprintf(vvp_out, "; Save base=%u wid=%u in lookaside.\n",
res.base, wid);
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
save_expression_lookaside(res.base, expr, wid);
Handle selects unsized literal values accounting for bit extension. When selecting bits from unsized literals, we do not put a limit on the size of the literal, so there is no top above which we stop getting literal bits.
2010-03-07 01:21:10 +01:00
return res;
}
if (! ivl_expr_sized(sube)) {
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
res = draw_select_unsized_literal(expr, wid, stuff_ok_flag);
Handle selects unsized literal values accounting for bit extension. When selecting bits from unsized literals, we do not put a limit on the size of the literal, so there is no top above which we stop getting literal bits.
2010-03-07 01:21:10 +01:00
return res;
}
subv = draw_eval_expr(sube, 0);
/* Evaluate the bit select base expression. */
shiv = draw_eval_expr(shift, STUFF_OK_XZ);
/* Special case: If the shift is a constant 0, skip the shift
and return the subexpression with the width trimmed down to
the part select width. */
if (shiv.base == 0) {
fprintf(vvp_out, "; Part select with shift==0 skips shift.\n");
assert(subv.wid >= wid);
res.base = subv.base;
return res;
}
Handle special case bit selects if unsized 0/-1. Unsized constant 0 and -1 are pretty special, and part selects of these values can be handled very specially.
2010-03-06 04:36:54 +01:00
/* Store the bit select base into index register 0, in
preparation for doing a shift. */
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
if (ivl_expr_signed(shift)) {
fprintf(vvp_out, " %%ix/get/s 0, %u, %u;\n", shiv.base,
shiv.wid);
} else {
fprintf(vvp_out, " %%ix/get 0, %u, %u;\n", shiv.base, shiv.wid);
}
Add support for bit select of parameters. This leads to a NetESelect node and the vvp code generator to support that.
2002-01-28 01:52:41 +01:00
clr_vector(shiv);
/* If the subv result is a magic constant, then make a copy in
Spelling fixes (larry doolittle)
2007-02-26 20:49:48 +01:00
writable vector space and work from there instead. */
Fix parameter bit select check for magic constants.
2002-02-03 06:53:00 +01:00
if (subv.base < 4) {
Add support for bit select of parameters. This leads to a NetESelect node and the vvp code generator to support that.
2002-01-28 01:52:41 +01:00
res.base = allocate_vector(subv.wid);
Keep bit select subexpression width if it is constant.
2002-12-20 00:11:29 +01:00
res.wid = subv.wid;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
assert(res.base);
Add support for bit select of parameters. This leads to a NetESelect node and the vvp code generator to support that.
2002-01-28 01:52:41 +01:00
fprintf(vvp_out, " %%mov %u, %u, %u;\n", res.base,
subv.base, res.wid);
subv = res;
}
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
lab_l = local_count++;
lab_end = local_count++;
/* If we have an undefined index then just produce a 'bx result. */
fprintf(vvp_out, " %%jmp/1 T_%d.%d, 4;\n", thread_count, lab_l);
cmp = allocate_word();
assert(subv.wid >= wid);
/* Determine if we need to shift a 'bx into the top. */
fprintf(vvp_out, " %%ix/load %u, %u, 0;\n", cmp, subv.wid - wid);
fprintf(vvp_out, " %%cmp/ws %u, 0;\n", cmp);
clr_word(cmp);
fprintf(vvp_out, " %%jmp/1 T_%d.%d, 5;\n", thread_count, lab_l);
/* Clear the cmp bit if the two values are equal. */
fprintf(vvp_out, " %%mov 4, 0, 1;\n");
Add support for bit select of parameters. This leads to a NetESelect node and the vvp code generator to support that.
2002-01-28 01:52:41 +01:00
fprintf(vvp_out, " %%shiftr/i0 %u, %u;\n", subv.base, subv.wid);
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
fprintf(vvp_out, " %%jmp T_%d.%d;\n", thread_count, lab_end);
fprintf(vvp_out, "T_%d.%d ;\n", thread_count, lab_l);
/* Multiply by -1. */
fprintf(vvp_out, " %%ix/mul 0, %u, %u;\n", 0xFFFFFFFF, 0xFFFFFFFF);
fprintf(vvp_out, " %%shiftl/i0 %u, %u;\n", subv.base, subv.wid);
fprintf(vvp_out, "T_%d.%d ;\n", thread_count, lab_end);
Add support for bit select of parameters. This leads to a NetESelect node and the vvp code generator to support that.
2002-01-28 01:52:41 +01:00
if (subv.wid > wid) {
res.base = subv.base;
res.wid = wid;
subv.base += wid;
More robust use of precalculated expressions, and Separate lookaside for written variables that can also be reused.
2005-09-17 03:01:00 +02:00
subv.wid -= wid;
Add support for bit select of parameters. This leads to a NetESelect node and the vvp code generator to support that.
2002-01-28 01:52:41 +01:00
clr_vector(subv);
Fix warnings about uninitialized variables.
2005-09-19 22:18:20 +02:00
} else {
assert(subv.wid == wid);
Add support for bit select of parameters. This leads to a NetESelect node and the vvp code generator to support that.
2002-01-28 01:52:41 +01:00
res = subv;
}
Better reuse of IVL_EX_SELECT expressions.
2005-09-15 04:49:47 +02:00
if (res.base >= 8) {
fprintf(vvp_out, "; Save expression base=%u wid=%u in lookaside\n",
res.base, wid);
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
save_expression_lookaside(res.base, expr, wid);
Better reuse of IVL_EX_SELECT expressions.
2005-09-15 04:49:47 +02:00
}
Add thread expression lookaside map.
2002-09-27 18:33:34 +02:00
Add support for bit select of parameters. This leads to a NetESelect node and the vvp code generator to support that.
2002-01-28 01:52:41 +01:00
return res;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static void draw_select_expr_dest(ivl_expr_t expr, struct vector_info dest,
Support drawing some select expressions in place. Select of signals is natural for evaluating in place, if possible. Doing so can save instructions for certain expressions.
2008-11-23 06:17:05 +01:00
int stuff_ok_flag)
{
struct vector_info tmp;
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_t sube = ivl_expr_oper1(expr);
ivl_expr_t shift= ivl_expr_oper2(expr);
Support drawing some select expressions in place. Select of signals is natural for evaluating in place, if possible. Doing so can save instructions for certain expressions.
2008-11-23 06:17:05 +01:00
/* If the shift expression is not present, then this is really
a pad expression, and that can be handled pretty
Spelling fixes Mostly comments, but includes user-visible debug messages.
2009-03-08 02:16:13 +01:00
easily. Evaluate the subexpression into the destination,
Support drawing some select expressions in place. Select of signals is natural for evaluating in place, if possible. Doing so can save instructions for certain expressions.
2008-11-23 06:17:05 +01:00
then pad in place. */
if (shift == 0) {
struct vector_info subv;
subv.base = dest.base;
subv.wid = ivl_expr_width(sube);
if (subv.wid > dest.wid)
subv.wid = dest.wid;
draw_eval_expr_dest(sube, subv, stuff_ok_flag);
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
pad_in_place(dest, subv.wid, ivl_expr_signed(expr));
Support drawing some select expressions in place. Select of signals is natural for evaluating in place, if possible. Doing so can save instructions for certain expressions.
2008-11-23 06:17:05 +01:00
return;
}
if (ivl_expr_type(sube) == IVL_EX_SIGNAL) {
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
draw_select_signal_dest(expr, sube, shift, dest, stuff_ok_flag);
Support drawing some select expressions in place. Select of signals is natural for evaluating in place, if possible. Doing so can save instructions for certain expressions.
2008-11-23 06:17:05 +01:00
return;
}
/* Fallback, is to draw the expression by width, and mov it to
the required dest. */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
tmp = draw_select_expr(expr, dest.wid, stuff_ok_flag);
Support drawing some select expressions in place. Select of signals is natural for evaluating in place, if possible. Doing so can save instructions for certain expressions.
2008-11-23 06:17:05 +01:00
assert(tmp.wid == dest.wid);
fprintf(vvp_out, " %%mov %u, %u, %u; Move select into place\n",
dest.base, tmp.base, dest.wid);
if (tmp.base >= 8) {
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
save_expression_lookaside(tmp.base, expr, tmp.wid);
Support drawing some select expressions in place. Select of signals is natural for evaluating in place, if possible. Doing so can save instructions for certain expressions.
2008-11-23 06:17:05 +01:00
clr_vector(tmp);
}
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_ternary_expr(ivl_expr_t expr, unsigned wid)
Behavioral ternary operators for vvp.
2001-05-17 06:37:02 +02:00
{
More efficient code for ternary expressions.
2003-06-16 00:49:32 +02:00
struct vector_info res, tru, fal, tst;
Behavioral ternary operators for vvp.
2001-05-17 06:37:02 +02:00
Fix behavioral eval of x?a:b expressions.
2002-08-22 05:38:40 +02:00
unsigned lab_true, lab_false, lab_out;
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_t cond = ivl_expr_oper1(expr);
ivl_expr_t true_ex = ivl_expr_oper2(expr);
ivl_expr_t false_ex = ivl_expr_oper3(expr);
Behavioral ternary operators for vvp.
2001-05-17 06:37:02 +02:00
Fix behavioral eval of x?a:b expressions.
2002-08-22 05:38:40 +02:00
lab_true = local_count++;
Behavioral ternary operators for vvp.
2001-05-17 06:37:02 +02:00
lab_false = local_count++;
lab_out = local_count++;
More efficient code for ternary expressions.
2003-06-16 00:49:32 +02:00
/* Evaluate the condition expression, and if necessary reduce
it to a single bit. */
More robust use of precalculated expressions, and Separate lookaside for written variables that can also be reused.
2005-09-17 03:01:00 +02:00
tst = draw_eval_expr(cond, STUFF_OK_XZ|STUFF_OK_RO);
More efficient code for ternary expressions.
2003-06-16 00:49:32 +02:00
if ((tst.base >= 4) && (tst.wid > 1)) {
struct vector_info tmp;
Behavioral ternary operators for vvp.
2001-05-17 06:37:02 +02:00
Use all bits of ?: condit expression.
2002-07-12 20:10:45 +02:00
fprintf(vvp_out, " %%or/r %u, %u, %u;\n",
More efficient code for ternary expressions.
2003-06-16 00:49:32 +02:00
tst.base, tst.base, tst.wid);
tmp = tst;
tmp.base += 1;
tmp.wid -= 1;
clr_vector(tmp);
tst.wid = 1;
Use all bits of ?: condit expression.
2002-07-12 20:10:45 +02:00
}
More efficient code for ternary expressions.
2003-06-16 00:49:32 +02:00
fprintf(vvp_out, " %%jmp/0 T_%d.%d, %u;\n",
thread_count, lab_true, tst.base);
tru = draw_eval_expr_wid(true_ex, wid, 0);
/* The true result must be in a writable register, because the
blend might want to manipulate it. */
if (tru.base < 4) {
struct vector_info tmp;
tmp.base = allocate_vector(wid);
tmp.wid = wid;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
assert(tmp.base);
More efficient code for ternary expressions.
2003-06-16 00:49:32 +02:00
fprintf(vvp_out, " %%mov %u, %u, %u;\n",
tmp.base, tru.base, wid);
tru = tmp;
}
Behavioral ternary operators for vvp.
2001-05-17 06:37:02 +02:00
Fix behavioral eval of x?a:b expressions.
2002-08-22 05:38:40 +02:00
fprintf(vvp_out, " %%jmp/1 T_%d.%d, %u;\n",
More efficient code for ternary expressions.
2003-06-16 00:49:32 +02:00
thread_count, lab_out, tst.base);
Behavioral ternary operators for vvp.
2001-05-17 06:37:02 +02:00
Clear expression lookaside after true cause of ternary.
2003-09-24 22:46:20 +02:00
clear_expression_lookaside();
More efficient code for ternary expressions.
2003-06-16 00:49:32 +02:00
fprintf(vvp_out, "T_%d.%d ; End of true expr.\n",
thread_count, lab_true);
Fix behavioral eval of x?a:b expressions.
2002-08-22 05:38:40 +02:00
More efficient code for ternary expressions.
2003-06-16 00:49:32 +02:00
fal = draw_eval_expr_wid(false_ex, wid, 0);
Fix behavioral eval of x?a:b expressions.
2002-08-22 05:38:40 +02:00
More efficient code for ternary expressions.
2003-06-16 00:49:32 +02:00
fprintf(vvp_out, " %%jmp/0 T_%d.%d, %u;\n",
thread_count, lab_false, tst.base);
Fix behavioral eval of x?a:b expressions.
2002-08-22 05:38:40 +02:00
More efficient code for ternary expressions.
2003-06-16 00:49:32 +02:00
fprintf(vvp_out, " ; End of false expr.\n");
Fix behavioral eval of x?a:b expressions.
2002-08-22 05:38:40 +02:00
More efficient code for ternary expressions.
2003-06-16 00:49:32 +02:00
clr_vector(tst);
clr_vector(fal);
Behavioral ternary operators for vvp.
2001-05-17 06:37:02 +02:00
More efficient code for ternary expressions.
2003-06-16 00:49:32 +02:00
fprintf(vvp_out, " %%blend %u, %u, %u; Condition unknown.\n",
tru.base, fal.base, wid);
fprintf(vvp_out, " %%jmp T_%d.%d;\n",
Fix fprintf warning.
2003-06-17 00:14:15 +02:00
thread_count, lab_out);
Fix behavioral eval of x?a:b expressions.
2002-08-22 05:38:40 +02:00
Behavioral ternary operators for vvp.
2001-05-17 06:37:02 +02:00
fprintf(vvp_out, "T_%d.%d ;\n", thread_count, lab_false);
More efficient code for ternary expressions.
2003-06-16 00:49:32 +02:00
fprintf(vvp_out, " %%mov %u, %u, %u; Return false value\n",
tru.base, fal.base, wid);
Behavioral ternary operators for vvp.
2001-05-17 06:37:02 +02:00
Fix behavioral eval of x?a:b expressions.
2002-08-22 05:38:40 +02:00
/* This is the out label. */
Behavioral ternary operators for vvp.
2001-05-17 06:37:02 +02:00
fprintf(vvp_out, "T_%d.%d ;\n", thread_count, lab_out);
Allow expression lookaside map to spam statements.
2002-09-27 22:24:42 +02:00
clear_expression_lookaside();
Behavioral ternary operators for vvp.
2001-05-17 06:37:02 +02:00
More efficient code for ternary expressions.
2003-06-16 00:49:32 +02:00
res = tru;
Add thread expression lookaside map.
2002-09-27 18:33:34 +02:00
if (res.base >= 8)
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
save_expression_lookaside(res.base, expr, wid);
Add thread expression lookaside map.
2002-09-27 18:33:34 +02:00
Behavioral ternary operators for vvp.
2001-05-17 06:37:02 +02:00
return res;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_sfunc_expr(ivl_expr_t expr, unsigned wid)
Initial support for system functions.
2001-05-20 03:02:55 +02:00
{
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
unsigned parm_count = ivl_expr_parms(expr);
Initial support for system functions.
2001-05-20 03:02:55 +02:00
struct vector_info res;
Pass parameters to system functions.
2001-07-07 22:20:10 +02:00
/* If the function has no parameters, then use this short-form
to draw the statement. */
if (parm_count == 0) {
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
assert(ivl_expr_value(expr) == IVL_VT_LOGIC
|| ivl_expr_value(expr) == IVL_VT_BOOL);
Pass parameters to system functions.
2001-07-07 22:20:10 +02:00
res.base = allocate_vector(wid);
res.wid = wid;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
assert(res.base);
Add vpiFile and vpiLineNo for system functions. Add the vpiFile and vpiLineNo properties to system functions. Most other objects have stubs that return "N/A"/0. Interactive functions (called from the debugger) use <interactive> for the file name.
2008-01-01 18:45:02 +01:00
fprintf(vvp_out, " %%vpi_func %u %u \"%s\", %u, %u;\n",
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_file_table_index(ivl_expr_file(expr)),
ivl_expr_lineno(expr), ivl_expr_name(expr),
Add vpiFile and vpiLineNo for system functions. Add the vpiFile and vpiLineNo properties to system functions. Most other objects have stubs that return "N/A"/0. Interactive functions (called from the debugger) use <interactive> for the file name.
2008-01-01 18:45:02 +01:00
res.base, res.wid);
Pass parameters to system functions.
2001-07-07 22:20:10 +02:00
return res;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
res = draw_vpi_func_call(expr, wid);
Pass parameters to system functions.
2001-07-07 22:20:10 +02:00
Add thread expression lookaside map.
2002-09-27 18:33:34 +02:00
/* New basic block starts after VPI calls. */
clear_expression_lookaside();
Initial support for system functions.
2001-05-20 03:02:55 +02:00
return res;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static struct vector_info draw_unary_expr(ivl_expr_t expr, unsigned wid)
Add unary ~ operator to tgt-vvp.
2001-03-29 04:52:39 +02:00
{
struct vector_info res;
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_t sub = ivl_expr_oper1(expr);
Support vectors as operands to logical and.
2001-10-10 06:47:43 +02:00
const char *rop = 0;
Fix the compiler and modpath scaling of real delays. A real delay must be scaled and rounded using the local precision before it is finally scaled to the simulation time units. This patch fixes the compiler to do this correctly or generate the correct code for run time calculated delays. Delays in a CA already worked correctly. The run time was also fixed to scale modpath (SDF back annotation) delays correctly.
2010-06-19 01:03:17 +02:00
int word, inv = 0;
More behavioral unary reduction operators. (Stephan Boettcher)
2001-06-18 03:09:32 +02:00
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
switch (ivl_expr_opcode(expr)) {
More behavioral unary reduction operators. (Stephan Boettcher)
2001-06-18 03:09:32 +02:00
case '&': rop = "and"; break;
case '|': rop = "or"; break;
case '^': rop = "xor"; break;
case 'A': rop = "nand"; break;
case 'N': rop = "nor"; break;
case 'X': rop = "xnor"; break;
}
Add unary ~ operator to tgt-vvp.
2001-03-29 04:52:39 +02:00
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
switch (ivl_expr_opcode(expr)) {
Add unary ~ operator to tgt-vvp.
2001-03-29 04:52:39 +02:00
case '~':
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
res = draw_eval_expr_wid(sub, wid, STUFF_OK_XZ);
Handle update in place of repeat constants.
2001-08-31 03:37:56 +02:00
switch (res.base) {
case 0:
res.base = 1;
break;
case 1:
res.base = 0;
break;
case 2:
case 3:
res.base = 2;
break;
default:
fprintf(vvp_out, " %%inv %u, %u;\n", res.base, res.wid);
break;
}
Add unary ~ operator to tgt-vvp.
2001-03-29 04:52:39 +02:00
break;
Generate code for unary minus (PR#272)
2001-09-29 06:37:44 +02:00
case '-':
/* Unary minus is implemented by generating the 2's
complement of the number. That is the 1's complement
(bitwise invert) with a 1 added in. Note that the
%sub subtracts -1 (1111...) to get %add of +1. */
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
res = draw_eval_expr_wid(sub, wid, STUFF_OK_XZ);
Generate code for unary minus (PR#272)
2001-09-29 06:37:44 +02:00
switch (res.base) {
case 0:
res.base = 0;
break;
case 1:
res.base = 1;
break;
case 2:
case 3:
res.base = 2;
break;
default:
fprintf(vvp_out, " %%inv %u, %u;\n", res.base, res.wid);
Slightly more efficient unary minus.
2003-10-01 19:44:20 +02:00
fprintf(vvp_out, " %%addi %u, 1, %u;\n",res.base,res.wid);
Generate code for unary minus (PR#272)
2001-09-29 06:37:44 +02:00
break;
}
break;
Implement the unary ! operator.
2001-04-01 23:47:29 +02:00
case '!':
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
res = draw_eval_expr(sub, STUFF_OK_XZ);
The ! expression returns 0 to x and z values.
2001-10-24 07:06:54 +02:00
if (res.wid > 1) {
/* a ! on a vector is implemented with a reduction
nor. Generate the result into the first bit of
the input vector and free the rest of the
vector. */
struct vector_info tmp;
assert(res.base >= 4);
tmp.base = res.base+1;
tmp.wid = res.wid - 1;
fprintf(vvp_out, " %%nor/r %u, %u, %u;\n",
res.base, res.base, res.wid);
clr_vector(tmp);
res.wid = 1;
Handle x case of unary ! properly.
2002-05-07 05:49:58 +02:00
} else switch (res.base) {
case 0:
res.base = 1;
break;
case 1:
res.base = 0;
break;
case 2:
case 3:
res.base = 2;
break;
default:
fprintf(vvp_out, " %%inv %u, 1;\n", res.base);
break;
The ! expression returns 0 to x and z values.
2001-10-24 07:06:54 +02:00
}
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
/* If the result needs to be bigger then the calculated
value, then write it into a padded vector. */
if (res.wid < wid) {
struct vector_info tmp;
tmp.base = allocate_vector(wid);
tmp.wid = wid;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
if (tmp.base == 0) {
fprintf(stderr, "%s:%u: vvp.tgt error: "
"Unable to allocate %u thread bits "
"to pad unary expression result.\n",
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_file(expr), ivl_expr_lineno(expr),
wid);
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
vvp_errors += 1;
}
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
fprintf(vvp_out, " %%mov %u, %u, %u;\n",
tmp.base, res.base, res.wid);
Better use of immediate operands. Clarify that operands are typically 32bits, and have the code generator make better use of this. Also improve the %movi implementation to work well with marger vectors. Add the %andi instruction to use immediate operands.
2008-05-28 02:51:28 +02:00
fprintf(vvp_out, " %%movi %u, 0, %u;\n",
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
tmp.base+res.wid, tmp.wid-res.wid);
clr_vector(res);
res = tmp;
}
The ! expression returns 0 to x and z values.
2001-10-24 07:06:54 +02:00
break;
More behavioral unary reduction operators. (Stephan Boettcher)
2001-06-18 03:09:32 +02:00
case 'N':
case 'A':
case 'X':
inv = 1;
case '&':
case '|':
case '^':
Optimize ==1 when in context where x vs z doesnt matter.
2002-09-13 05:12:50 +02:00
res = draw_eval_expr(sub, 0);
Implement the unary ! operator.
2001-04-01 23:47:29 +02:00
if (res.wid > 1) {
struct vector_info tmp;
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
/* If the previous result is in the constant area
(and is a vector) then copy it out into some
temporary space. */
if (res.base < 4) {
tmp.base = allocate_vector(res.wid);
tmp.wid = res.wid;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
assert(res.base);
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
fprintf(vvp_out, " %%mov %u, %u, %u;\n",
tmp.base, res.base, res.wid);
res = tmp;
}
Implement the unary ! operator.
2001-04-01 23:47:29 +02:00
tmp.base = res.base+1;
tmp.wid = res.wid - 1;
More behavioral unary reduction operators. (Stephan Boettcher)
2001-06-18 03:09:32 +02:00
fprintf(vvp_out, " %%%s/r %u, %u, %u;\n",
rop,
Implement the unary ! operator.
2001-04-01 23:47:29 +02:00
res.base, res.base, res.wid);
clr_vector(tmp);
res.wid = 1;
More behavioral unary reduction operators. (Stephan Boettcher)
2001-06-18 03:09:32 +02:00
} else if (inv) {
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
assert(res.base >= 4);
Implement the unary ! operator.
2001-04-01 23:47:29 +02:00
fprintf(vvp_out, " %%inv %u, 1;\n", res.base);
A non-negated reduction needs to change a 1'bz into a 1'bx. In a procedural single bit non-negated reduction (&, | or ^) we need to translate a 1'bz to a 1'bx. The easiest way to do that is with two %inv opcodes. This patch modifies the code generator to do this for this very special case.
2008-11-18 00:59:40 +01:00
} else {
/* We need to convert a 1'bz to 1'bx. */
assert(res.base >= 4);
fprintf(vvp_out, " %%inv %u, 1;\n", res.base);
fprintf(vvp_out, " %%inv %u, 1;\n", res.base);
Implement the unary ! operator.
2001-04-01 23:47:29 +02:00
}
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
/* If the result needs to be bigger then the calculated
value, then write it into a passed vector. */
if (res.wid < wid) {
struct vector_info tmp;
tmp.base = allocate_vector(wid);
tmp.wid = wid;
Detect thread bit allocation failures Detect thread bit allocation failures and fail gracefully. Print an error message that points at the expression in question, and return with an error code so that the compiler exits with an error.
2008-04-16 06:51:03 +02:00
assert(res.base);
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
fprintf(vvp_out, " %%mov %u, %u, %u;\n",
tmp.base, res.base, res.wid);
Better use of immediate operands. Clarify that operands are typically 32bits, and have the code generator make better use of this. Also improve the %movi implementation to work well with marger vectors. Add the %andi instruction to use immediate operands.
2008-05-28 02:51:28 +02:00
fprintf(vvp_out, " %%movi %u, 0, %u;\n",
Handle padding out of logical values.
2001-11-19 05:25:46 +01:00
tmp.base+res.wid, tmp.wid-res.wid);
clr_vector(res);
res = tmp;
}
Implement the unary ! operator.
2001-04-01 23:47:29 +02:00
break;
Add support for abs() in logic threads. Add the code generator code to handle the abs() function in signed logic. Handle some of the interesting special cases as well.
2008-05-05 07:00:01 +02:00
case 'm': /* abs() */
res = draw_eval_expr_wid(sub, wid, 0);
if (!ivl_expr_signed(sub))
break;
if (res.base == 0 || res.base == 2 || res.base == 3)
break;
/* Handle the special case of a -1 constant. Make the
result a 1. */
if (res.base == 1) {
res.base = allocate_vector(wid);
When evaluating a constant into an index make sure to clear bit 4. When evaluating an expression into an index register bit 4 is used to determine if the expression had any X/Z bits. In the case of a constant immediate value this can not happen so make sure the bit is cleared.
2008-09-18 01:18:17 +02:00
fprintf(vvp_out, " %%movi %d, 1, %u;\n",
Add support for abs() in logic threads. Add the code generator code to handle the abs() function in signed logic. Handle some of the interesting special cases as well.
2008-05-05 07:00:01 +02:00
res.base, res.wid);
break;
}
When evaluating a constant into an index make sure to clear bit 4. When evaluating an expression into an index register bit 4 is used to determine if the expression had any X/Z bits. In the case of a constant immediate value this can not happen so make sure the bit is cleared.
2008-09-18 01:18:17 +02:00
fprintf(vvp_out, " %%cmpi/s %d, 0, %u;\n", res.base, res.wid);
Fix the compiler and modpath scaling of real delays. A real delay must be scaled and rounded using the local precision before it is finally scaled to the simulation time units. This patch fixes the compiler to do this correctly or generate the correct code for run time calculated delays. Delays in a CA already worked correctly. The run time was also fixed to scale modpath (SDF back annotation) delays correctly.
2010-06-19 01:03:17 +02:00
fprintf(vvp_out, " %%jmp/0xz T_%u.%u, 5;\n", thread_count,
local_count);
When evaluating a constant into an index make sure to clear bit 4. When evaluating an expression into an index register bit 4 is used to determine if the expression had any X/Z bits. In the case of a constant immediate value this can not happen so make sure the bit is cleared.
2008-09-18 01:18:17 +02:00
fprintf(vvp_out, " %%inv %d, %u;\n", res.base, res.wid);
fprintf(vvp_out, " %%addi %d, 1, %u;\n", res.base, res.wid);
Add support for abs() in logic threads. Add the code generator code to handle the abs() function in signed logic. Handle some of the interesting special cases as well.
2008-05-05 07:00:01 +02:00
fprintf(vvp_out, "T_%u.%u ;\n", thread_count, local_count);
local_count += 1;
break;
Cast expressions from logic to bool. Handle assignments from logic to bool variables by inserting the proper cast expression nodes.
2010-10-20 04:09:06 +02:00
case '2': /* Cast logic to bool */
assert(ivl_expr_value(sub) == IVL_VT_LOGIC);
res = draw_eval_expr_wid(sub, wid, 0);
/* Handle special case that value is 0 or 1. */
if (res.base == 0 || res.base == 1)
break;
if (res.base == 2 || res.base == 2) {
res.base = 0;
break;
}
fprintf(vvp_out, " %%cast2 %d, %d, %u;\n", res.base, res.base, res.wid);
break;
Fix the compiler and modpath scaling of real delays. A real delay must be scaled and rounded using the local precision before it is finally scaled to the simulation time units. This patch fixes the compiler to do this correctly or generate the correct code for run time calculated delays. Delays in a CA already worked correctly. The run time was also fixed to scale modpath (SDF back annotation) delays correctly.
2010-06-19 01:03:17 +02:00
case 'i': /* Cast a real value to an integer. */
assert(ivl_expr_value(sub) == IVL_VT_REAL);
word = draw_eval_real(sub);
res.base = allocate_vector(wid);
res.wid = wid;
fprintf(vvp_out, " %%cvt/vr %u, %u, %u;\n", res.base, word,
res.wid);
clr_word(word);
break;
case 'r': /* Handled in eval_real.c. */
Add unlimited tail recursion for the real ternary operator. This patch modifies the real ternary operator code to support unlimited tail recursion without overflowing the thread registers. Head recursion is still limited by the available registers. It fixes the thread word checks to use a new define that has the correct number of thread words (16). It adds a message instead of just an assert if the thread words are exhausted. And it also changes some of the error messages to use vvp.tgt in the message to be consistent with the other messages.
2010-07-07 23:33:10 +02:00
fprintf(stderr, "vvp.tgt error: integer -> real cast in integer "
Fix the compiler and modpath scaling of real delays. A real delay must be scaled and rounded using the local precision before it is finally scaled to the simulation time units. This patch fixes the compiler to do this correctly or generate the correct code for run time calculated delays. Delays in a CA already worked correctly. The run time was also fixed to scale modpath (SDF back annotation) delays correctly.
2010-06-19 01:03:17 +02:00
"context.\n");
assert(0);
break;
Add unary ~ operator to tgt-vvp.
2001-03-29 04:52:39 +02:00
default:
Add unlimited tail recursion for the real ternary operator. This patch modifies the real ternary operator code to support unlimited tail recursion without overflowing the thread registers. Head recursion is still limited by the available registers. It fixes the thread word checks to use a new define that has the correct number of thread words (16). It adds a message instead of just an assert if the thread words are exhausted. And it also changes some of the error messages to use vvp.tgt in the message to be consistent with the other messages.
2010-07-07 23:33:10 +02:00
fprintf(stderr, "vvp.tgt error: unhandled unary operator: %c\n",
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_opcode(expr));
Add unary ~ operator to tgt-vvp.
2001-03-29 04:52:39 +02:00
assert(0);
}
Add thread expression lookaside map.
2002-09-27 18:33:34 +02:00
if (res.base >= 8)
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
save_expression_lookaside(res.base, expr, wid);
Add thread expression lookaside map.
2002-09-27 18:33:34 +02:00
Add unary ~ operator to tgt-vvp.
2001-03-29 04:52:39 +02:00
return res;
}
Concatenation can evaluate sub-expressions in place.
2002-11-06 06:41:37 +01:00
/*
* Sometimes we know ahead of time where we want the expression value
* to go. In that case, call this function. It will check to see if
* the expression can be preplaced, and if so it will evaluate it in
* place.
*/
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
static void draw_eval_expr_dest(ivl_expr_t expr, struct vector_info dest,
Concatenation can evaluate sub-expressions in place.
2002-11-06 06:41:37 +01:00
int stuff_ok_flag)
{
struct vector_info tmp;
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
switch (ivl_expr_type(expr)) {
Concatenation can evaluate sub-expressions in place.
2002-11-06 06:41:37 +01:00
case IVL_EX_SIGNAL:
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
draw_signal_dest(expr, dest, -1, 0L);
Concatenation can evaluate sub-expressions in place.
2002-11-06 06:41:37 +01:00
return;
Support drawing some select expressions in place. Select of signals is natural for evaluating in place, if possible. Doing so can save instructions for certain expressions.
2008-11-23 06:17:05 +01:00
case IVL_EX_SELECT:
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
draw_select_expr_dest(expr, dest, stuff_ok_flag);
Support drawing some select expressions in place. Select of signals is natural for evaluating in place, if possible. Doing so can save instructions for certain expressions.
2008-11-23 06:17:05 +01:00
return;
Concatenation can evaluate sub-expressions in place.
2002-11-06 06:41:37 +01:00
default:
break;
}
Ignore zero replication constants. This patch enhances elaboration to drop/ignore zero replication count constants. Not doing this was causing problems later in the compiler. We still pass non-constant expressions since both user and system functions must be run for their possible side effects. Constants can never have a side effect so just dropping them is acceptable.
2010-03-22 06:00:44 +01:00
/* Fallback, is to draw the expression by width, and move it to
Concatenation can evaluate sub-expressions in place.
2002-11-06 06:41:37 +01:00
the required dest. */
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
tmp = draw_eval_expr_wid(expr, dest.wid, stuff_ok_flag);
Concatenation can evaluate sub-expressions in place.
2002-11-06 06:41:37 +01:00
assert(tmp.wid == dest.wid);
Fix procedural concatenation/repetition problems This patch evaluates the whole concatenation expression and makes the concatenation padding sign aware. This is needed when $signed({...}) is passed as an argument. A repetition is just N copies of the base expression not N evaluations of the base expression. This is only a problem when functions have side effects. It's also faster to copy. The evaluation must also be done when the replication count is zero (see 1364-2005).
2009-07-24 18:52:48 +02:00
/* If the replication is 0 we can have a zero width, so skip it. */
if (dest.wid) fprintf(vvp_out, " %%mov %u, %u, %u;\n",
dest.base, tmp.base, dest.wid);
Concatenation can evaluate sub-expressions in place.
2002-11-06 06:41:37 +01:00
if (tmp.base >= 8)
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
save_expression_lookaside(tmp.base, expr, tmp.wid);
Concatenation can evaluate sub-expressions in place.
2002-11-06 06:41:37 +01:00
clr_vector(tmp);
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
struct vector_info draw_eval_expr_wid(ivl_expr_t expr, unsigned wid,
Allow results in register bits 47 in certain cases.
2002-09-24 06:20:32 +02:00
int stuff_ok_flag)
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
{
struct vector_info res;
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
switch (ivl_expr_type(expr)) {
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
default:
Generate code for + and concat expressions.
2001-03-31 04:00:44 +02:00
case IVL_EX_NONE:
Add unlimited tail recursion for the real ternary operator. This patch modifies the real ternary operator code to support unlimited tail recursion without overflowing the thread registers. Head recursion is still limited by the available registers. It fixes the thread word checks to use a new define that has the correct number of thread words (16). It adds a message instead of just an assert if the thread words are exhausted. And it also changes some of the error messages to use vvp.tgt in the message to be consistent with the other messages.
2010-07-07 23:33:10 +02:00
fprintf(stderr, "%s:%u: vvp.tgt error: unhandled expr. type: "
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
"%u at %s:%d\n", ivl_expr_file(expr), ivl_expr_lineno(expr),
ivl_expr_type(expr), __FILE__, __LINE__);
NetESignal::dup_expr() was not passing the word_ information. The dup_expr() function for NetESignal was not copying the word_ expression. This would cause an individual array access to turn into an entire array access. The file and line information was also not being set correctly. An assert() in tgt-vvp/eval_expr.c was also replaced with an exit() since the appropriate information was already being printed.
2008-03-12 22:58:45 +01:00
exit(1);
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
res.base = 0;
res.wid = 0;
break;
Add file/line information to named events and better expr. error. This patch adds file and line number information to named events. It also modifies the draw_eval_expr_wid() routine to fail with an appropriate message for named events. This checking needs to be pushed into the elaboration stage, but this will give a better message than we had before.
2009-09-07 19:55:44 +02:00
case IVL_EX_EVENT:
Add unlimited tail recursion for the real ternary operator. This patch modifies the real ternary operator code to support unlimited tail recursion without overflowing the thread registers. Head recursion is still limited by the available registers. It fixes the thread word checks to use a new define that has the correct number of thread words (16). It adds a message instead of just an assert if the thread words are exhausted. And it also changes some of the error messages to use vvp.tgt in the message to be consistent with the other messages.
2010-07-07 23:33:10 +02:00
fprintf(stderr, "%s:%u: vvp.tgt error: A named event is not "
Add file/line information to named events and better expr. error. This patch adds file and line number information to named events. It also modifies the draw_eval_expr_wid() routine to fail with an appropriate message for named events. This checking needs to be pushed into the elaboration stage, but this will give a better message than we had before.
2009-09-07 19:55:44 +02:00
"handled in this context (expression).\n",
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
ivl_expr_file(expr), ivl_expr_lineno(expr));
Add file/line information to named events and better expr. error. This patch adds file and line number information to named events. It also modifies the draw_eval_expr_wid() routine to fail with an appropriate message for named events. This checking needs to be pushed into the elaboration stage, but this will give a better message than we had before.
2009-09-07 19:55:44 +02:00
exit(1);
break;
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
More detailed messages about unsupported things.
2001-08-03 19:06:10 +02:00
case IVL_EX_STRING:
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
res = draw_string_expr(expr, wid);
More detailed messages about unsupported things.
2001-08-03 19:06:10 +02:00
break;
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
case IVL_EX_BINARY:
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
res = draw_binary_expr(expr, wid, stuff_ok_flag);
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
break;
Generate code for + and concat expressions.
2001-03-31 04:00:44 +02:00
case IVL_EX_CONCAT:
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
res = draw_concat_expr(expr, wid, stuff_ok_flag);
Generate code for + and concat expressions.
2001-03-31 04:00:44 +02:00
break;
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
case IVL_EX_NUMBER:
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
res = draw_number_expr(expr, wid);
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
break;
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
case IVL_EX_REALNUM:
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
res = draw_realnum_expr(expr, wid);
Rework expression parsing and elaboration to accommodate real/realtime values and expressions.
2003-01-26 22:15:58 +01:00
break;
Add support for bit select of parameters. This leads to a NetESelect node and the vvp code generator to support that.
2002-01-28 01:52:41 +01:00
case IVL_EX_SELECT:
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
if (ivl_expr_oper2(expr) == 0)
res = draw_pad_expr(expr, wid);
Start handling pad of expressions in code generators.
2003-07-26 05:34:42 +02:00
else
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
res = draw_select_expr(expr, wid, stuff_ok_flag);
Add support for bit select of parameters. This leads to a NetESelect node and the vvp code generator to support that.
2002-01-28 01:52:41 +01:00
break;
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
case IVL_EX_SIGNAL:
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
res = draw_signal_expr(expr, wid, stuff_ok_flag);
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
break;
Add unary ~ operator to tgt-vvp.
2001-03-29 04:52:39 +02:00
Behavioral ternary operators for vvp.
2001-05-17 06:37:02 +02:00
case IVL_EX_TERNARY:
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
res = draw_ternary_expr(expr, wid);
Behavioral ternary operators for vvp.
2001-05-17 06:37:02 +02:00
break;
Initial support for system functions.
2001-05-20 03:02:55 +02:00
case IVL_EX_SFUNC:
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
res = draw_sfunc_expr(expr, wid);
Initial support for system functions.
2001-05-20 03:02:55 +02:00
break;
Generate vvp code for functions with ports.
2001-04-06 04:28:02 +02:00
case IVL_EX_UFUNC:
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
res = draw_ufunc_expr(expr, wid);
Generate vvp code for functions with ports.
2001-04-06 04:28:02 +02:00
break;
Add unary ~ operator to tgt-vvp.
2001-03-29 04:52:39 +02:00
case IVL_EX_UNARY:
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
res = draw_unary_expr(expr, wid);
Add unary ~ operator to tgt-vvp.
2001-03-29 04:52:39 +02:00
break;
Geneate code for conditional statements.
2001-03-22 06:06:21 +01:00
}
return res;
}
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
struct vector_info draw_eval_expr(ivl_expr_t expr, int stuff_ok_flag)
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
{
Fix shadow warnings found on OpenBSD. gcc on OpenBSD reported shadow warnings for variables, arguments named log, time and exp. This patch renanes those variables to logic, timerec and expr.
2010-05-28 05:09:32 +02:00
return draw_eval_expr_wid(expr, ivl_expr_width(expr), stuff_ok_flag);
Assure that operands are the correct width.
2001-03-23 02:10:24 +01:00
}