Geneate code for conditional statements.
This commit is contained in:
steve
parent
b24011b84b
commit
565088160e
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@ -16,7 +16,7 @@
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# 59 Temple Place - Suite 330
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# Boston, MA 02111-1307, USA
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#
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#ident "$Id: Makefile.in,v 1.2 2001/03/21 01:49:43 steve Exp $"
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#ident "$Id: Makefile.in,v 1.3 2001/03/22 05:06:21 steve Exp $"
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#
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#
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SHELL = /bin/sh
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@ -49,7 +49,7 @@ all: vvp.tgt
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$(CC) -Wall $(CPPFLAGS) -I$(srcdir)/.. -MD -c $< -o $*.o
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mv $*.d dep
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O = vvp.o vvp_process.o vvp_scope.o
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O = vvp.o eval_expr.o vvp_process.o vvp_scope.o
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ifeq (@CYGWIN@,yes)
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TGTLDFLAGS=-L.. -livl
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@ -0,0 +1,202 @@
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/*
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* Copyright (c) 2001 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: eval_expr.c,v 1.1 2001/03/22 05:06:21 steve Exp $"
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#endif
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# include "vvp_priv.h"
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# include <assert.h>
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static unsigned char allocation_map[0x10000/8];
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static inline int peek_bit(unsigned addr)
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{
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unsigned bit = addr % 8;
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addr /= 8;
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return 1 & (allocation_map[addr] >> bit);
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}
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static inline void set_bit(unsigned addr)
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{
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unsigned bit = addr % 8;
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addr /= 8;
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allocation_map[addr] |= (1 << bit);
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}
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static inline void clr_bit(unsigned addr)
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{
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unsigned bit = addr % 8;
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addr /= 8;
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allocation_map[addr] &= ~(1 << bit);
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}
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static inline void clr_vector(struct vector_info vec)
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{
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unsigned idx;
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for (idx = 0 ; idx < vec.wid ; idx += 1)
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clr_bit(vec.base + idx);
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}
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static unsigned short allocate_vector(unsigned short wid)
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{
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unsigned short base = 8;
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unsigned short idx = 0;
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while (idx < wid) {
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assert((base + idx) < 0x10000);
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if (peek_bit(base+idx)) {
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base = base + idx + 1;
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idx = 0;
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} else {
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idx += 1;
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}
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}
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for (idx = 0 ; idx < wid ; idx += 1)
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set_bit(base+idx);
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return base;
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}
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/*
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* The draw_eval_expr() function draws code to evaluate the passed
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* expression, then returns the location and width of the result.
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*/
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static struct vector_info draw_binary_expr(ivl_expr_t exp)
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{
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struct vector_info lv = draw_eval_expr(ivl_expr_oper1(exp));
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struct vector_info rv = draw_eval_expr(ivl_expr_oper2(exp));
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switch (ivl_expr_opcode(exp)) {
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case 'e': /* == */
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assert(lv.wid == rv.wid);
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fprintf(vvp_out, " %%cmp/u %u, %u, %u;\n", lv.base,
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rv.base, lv.wid);
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clr_vector(lv);
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clr_vector(rv);
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lv.base = 4;
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lv.wid = 1;
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break;
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case 'n': /* != */
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assert(lv.wid == rv.wid);
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fprintf(vvp_out, " %%cmp/u %u, %u, %u;\n", lv.base,
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rv.base, lv.wid);
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fprintf(vvp_out, " %%inv 4, 1;\n");
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clr_vector(lv);
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clr_vector(rv);
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lv.base = 4;
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lv.wid = 1;
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break;
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default:
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assert(0);
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}
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return lv;
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}
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static struct vector_info draw_number_expr(ivl_expr_t exp)
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{
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unsigned idx;
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unsigned wid = ivl_expr_width(exp);
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const char*bits = ivl_expr_bits(exp);
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struct vector_info res;
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res.base = allocate_vector(wid);
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res.wid = wid;
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for (idx = 0 ; idx < wid ; idx += 1) {
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char src = '?';
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switch (bits[idx]) {
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case '0':
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src = '0';
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break;
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case '1':
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src = '1';
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break;
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case 'x':
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src = '2';
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break;
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case 'z':
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src = '3';
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break;
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}
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fprintf(vvp_out, " %%mov %u, %c, 1;\n", res.base+idx, src);
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}
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return res;
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}
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static struct vector_info draw_signal_expr(ivl_expr_t exp)
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{
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unsigned idx;
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unsigned wid = ivl_expr_width(exp);
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const char*name = ivl_expr_name(exp);
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struct vector_info res;
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res.base = allocate_vector(wid);
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res.wid = wid;
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for (idx = 0 ; idx < wid ; idx += 1)
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fprintf(vvp_out, " %%load %u, V_%s[%u];\n",
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res.base+idx, name, idx);
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return res;
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}
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struct vector_info draw_eval_expr(ivl_expr_t exp)
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{
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struct vector_info res;
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switch (ivl_expr_type(exp)) {
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case IVL_EX_NONE:
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default:
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assert(0);
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res.base = 0;
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res.wid = 0;
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break;
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case IVL_EX_BINARY:
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res = draw_binary_expr(exp);
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break;
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case IVL_EX_NUMBER:
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res = draw_number_expr(exp);
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break;
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case IVL_EX_SIGNAL:
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res = draw_signal_expr(exp);
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break;
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}
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return res;
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}
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/*
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* $Log: eval_expr.c,v $
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* Revision 1.1 2001/03/22 05:06:21 steve
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* Geneate code for conditional statements.
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*
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*/
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: vvp_priv.h,v 1.2 2001/03/21 01:49:43 steve Exp $"
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#ident "$Id: vvp_priv.h,v 1.3 2001/03/22 05:06:21 steve Exp $"
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#endif
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# include "ivl_target.h"
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@ -39,8 +39,23 @@ extern int draw_process(ivl_process_t net, void*x);
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extern int draw_scope(ivl_scope_t scope, ivl_scope_t parent);
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/*
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* The draw_eval_expr function writes out the code to evaluate a
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* behavioral expression.
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*/
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struct vector_info {
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unsigned short base;
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unsigned short wid;
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};
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extern struct vector_info draw_eval_expr(ivl_expr_t exp);
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/*
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* $Log: vvp_priv.h,v $
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* Revision 1.3 2001/03/22 05:06:21 steve
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* Geneate code for conditional statements.
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*
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* Revision 1.2 2001/03/21 01:49:43 steve
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* Scan the scopes of a design, and draw behavioral
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* blocking assignments of constants to vectors.
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: vvp_process.c,v 1.3 2001/03/21 01:49:43 steve Exp $"
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#ident "$Id: vvp_process.c,v 1.4 2001/03/22 05:06:21 steve Exp $"
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#endif
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# include "vvp_priv.h"
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@ -25,6 +25,9 @@
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static void show_statement(ivl_statement_t net);
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static unsigned local_count = 0;
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static unsigned thread_count = 0;
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/*
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* This file includes the code needed to generate VVP code for
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* processes. Scopes are already declared, we generate here the
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@ -67,7 +70,7 @@ static void set_to_nexus(ivl_nexus_t nex, char bit)
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bit = '3';
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break;
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}
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fprintf(vvp_out, " %%set V_%s[%u], %c\n",
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fprintf(vvp_out, " %%set V_%s[%u], %c;\n",
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ivl_signal_name(sig), pin, bit);
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}
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}
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@ -102,6 +105,35 @@ static void show_stmt_assign(ivl_statement_t net)
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fprintf(stderr, "XXXX EXPRESSION TOO COMPLEX FOR ME?\n");
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}
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static void show_stmt_condit(ivl_statement_t net)
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{
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unsigned lab_false, lab_out;
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ivl_expr_t exp = ivl_stmt_cond_expr(net);
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struct vector_info cond = draw_eval_expr(exp);
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assert(cond.wid == 1);
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lab_false = local_count++;
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lab_out = local_count++;
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fprintf(vvp_out, " %%jmp/0 T_%05d.%d, %u;\n",
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thread_count, lab_false, cond.base);
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show_statement(ivl_stmt_cond_true(net));
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if (ivl_stmt_cond_false(net)) {
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fprintf(vvp_out, " %%jmp T_%05d.%d;\n", thread_count, lab_out);
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fprintf(vvp_out, "T_%05d.%u\n", thread_count, lab_false);
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show_statement(ivl_stmt_cond_false(net));
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fprintf(vvp_out, "T_%05d.%u\n", thread_count, lab_out);
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} else {
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fprintf(vvp_out, "T_%05d.%u\n", thread_count, lab_false);
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}
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}
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/*
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* The delay statement is easy. Simply write a ``%delay <n>''
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* instruction to delay the thread, then draw the included statement.
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@ -180,6 +212,10 @@ static void show_statement(ivl_statement_t net)
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break;
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}
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case IVL_ST_CONDIT:
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show_stmt_condit(net);
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break;
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case IVL_ST_DELAY:
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show_stmt_delay(net);
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break;
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@ -207,9 +243,9 @@ static void show_statement(ivl_statement_t net)
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int draw_process(ivl_process_t net, void*x)
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{
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static unsigned thread_count = 0;
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ivl_scope_t scope = ivl_process_scope(net);
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local_count = 0;
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fprintf(vvp_out, " .scope S_%s;\n", ivl_scope_name(scope));
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/* Generate the entry label. Just give the thread a number so
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@ -245,6 +281,9 @@ int draw_process(ivl_process_t net, void*x)
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/*
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* $Log: vvp_process.c,v $
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* Revision 1.4 2001/03/22 05:06:21 steve
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* Geneate code for conditional statements.
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*
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* Revision 1.3 2001/03/21 01:49:43 steve
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* Scan the scopes of a design, and draw behavioral
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* blocking assignments of constants to vectors.
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