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5422 Commits

Author SHA1 Message Date
aletempiac 0c905f873b Fixes 2024-04-11 19:01:05 +02:00
aletempiac 6052d10fde Adding new command if -U for 2-LUT decompositions under delay profile 2024-04-11 15:45:37 +02:00
aletempiac e8924e5534 Fixes and improvements 2024-04-11 15:44:52 +02:00
aletempiac 5b49724fcc removing acd666 2024-04-11 15:43:22 +02:00
Alan Mishchenko ca78f5e6e5 Bug fix in the resub engine. 2024-04-11 05:05:52 -07:00
aletempiac 32bc1d4ab2 Cleaning and generalizing code 2024-04-11 11:31:28 +02:00
aletempiac 64fea5c4c2 Improving the performance and quality of acd66 2024-04-10 18:43:52 +02:00
aletempiac 6b5ebb3e76 Removing assertion when decomposing into LUTs smaller than 6 2024-04-10 18:42:52 +02:00
aletempiac 8f3447800c Support again decompositions into luts smaller than 6 2024-04-02 11:25:03 +02:00
Alan Mishchenko 6e1653426f Switch to randomly select one choice. 2024-03-28 16:22:06 +08:00
Alan Mishchenko a2cb5eb4e3 Adding command &pms to print miter status. 2024-03-25 23:39:03 +08:00
aletempiac 1f72ffce79 Improving ACD performance with bail-out conditions 2024-03-25 14:23:43 +01:00
Alan Mishchenko b0d2ff1c63 Exact synthesis using NAND-gates. 2024-03-24 00:10:08 +09:00
aletempiac 6aacf524aa Performance improvement and fixes 2024-03-22 19:19:35 +01:00
aletempiac 8a314db8dc Bug fix 2024-03-22 15:39:52 +01:00
Alan Mishchenko 2c0943ff62 Fixiing compiler problem on Windows. 2024-03-19 09:34:20 +09:00
Alan Mishchenko 5d3d77fcfe Fixing Windows compiler problem. 2024-03-19 08:54:32 +09:00
Alan Mishchenko c32f36af08 Fixing c vs c++ header file issue. 2024-03-19 08:13:07 +09:00
Alan Mishchenko b31ab1960b Fixing compilation issues on Windows. 2024-03-18 21:30:46 +09:00
aletempiac db72df7a63 Merge remote-tracking branch 'origin/master' into acd66 2024-03-18 10:08:48 +01:00
aletempiac 3737a69d8d Adding new ACD66 with support for multiple shared-set variables 2024-03-18 10:01:59 +01:00
Alan Mishchenko 210474b08c Bug fix in &gen_hie. 2024-03-18 07:49:35 +09:00
alanminko 3040b8ddd5
Merge pull request #282 from allen1236/master 
&brecover with speculative reduction
 2024-03-16 08:52:57 +09:00
Allen Ho b7884aaf2b clean up & add options for &brecover 2024-03-16 01:40:11 +08:00
Allen Ho 015dd2a367 use speculative in &brecover 2024-03-15 16:56:10 +08:00
Alan Mishchenko a16a0f1027 Writing Verilog for AIG using NAND gates. 2024-03-06 01:40:48 -08:00
Allen Ho d87b1cd543 fixed some warnings in bsat2 2024-03-04 10:16:14 +08:00
Allen Ho bfbec71211 &stc_eco and &brecover done 2024-03-04 09:36:35 +08:00
Allen Ho bcf04fadb6 &brecover done 2024-03-04 00:54:23 +08:00
Alan Mishchenko a747f46292 More changes to compile with g++. 2024-03-02 17:21:05 -08:00
Alan Mishchenko eb24d29777 More changes. 2024-03-02 17:10:30 -08:00
Alan Mishchenko b73f1030a6 More changes. 2024-03-02 17:03:42 -08:00
Alan Mishchenko b627aa7cb5 More changes. 2024-03-02 16:57:00 -08:00
Alan Mishchenko ce44eda85a More changes. 2024-03-02 16:46:09 -08:00
Alan Mishchenko f6f542c873 More changes to compile with namespaces. 2024-03-02 16:38:16 -08:00
Alan Mishchenko 4de4605836 More changees to compile new code with namespaces. 2024-03-02 16:31:41 -08:00
Alan Mishchenko a1159d98df Fixing a compiler problem with namespaces. 2024-03-02 16:10:37 -08:00
alanminko 390a0e8ef3
Merge pull request #279 from allen1236/master 
Sat-sweeping-based ECO (&str_eco)
 2024-03-02 15:38:08 -08:00
Allen Ho 23654254e1 clean up 2024-03-03 03:06:13 +08:00
Allen Ho f5f4dca013 clean up 2024-03-02 21:08:10 +08:00
aletempiac cd407e2ba3 Activate use_first flag in acd_decompose 2024-03-01 10:05:30 +01:00
aletempiac 9bec2afd60 Removing -z flag to execute delay-driven ACD 2024-03-01 10:04:48 +01:00
Allen Ho 6f5656c188 shared EI/EO not handled yet 2024-03-01 16:05:41 +08:00
Alan Mishchenko 1fd79c8430 Fixing a bug in input/output name ordering. 2024-02-29 15:19:47 -08:00
aletempiac fa8a277765 Changing search space exploration of ACD to search for better implementation and prune unnecessary computations based on theoretical properties 2024-02-29 17:16:49 +01:00
aletempiac 48b5f3b399 ACD66 performance improvements by avoiding unnecessary computation 2024-02-29 17:15:29 +01:00
aletempiac 75abcd376b Adding bindings to use ACD66 instead of generic ACD 2024-02-28 09:51:32 +01:00
aletempiac 44a65c23ed Adding relaxation on the maximum free set constraint 2024-02-27 17:47:43 +01:00
aletempiac d3f140f1df Performance improvements 2024-02-27 17:36:24 +01:00
aletempiac f72000f5ae Adding ACD cascade 666, performance improvements 2024-02-21 18:25:48 +01:00
aletempiac eba56b088f Cleaning code and performance improvements 2024-02-21 17:13:29 +01:00
aletempiac 13fd0d55c7 Removing unnecessary structs 2024-02-21 09:47:16 +01:00
aletempiac 0cd548f1cb Performance improvements to ACD 2024-02-20 17:28:50 +01:00
aletempiac 0e471e3ff8 Performance improvements of ACD 66 2024-02-20 14:41:52 +01:00
aletempiac 7b74810047 Changing policy of finding ACD 66 decomposition (faster and 100 percent coverage) 2024-02-16 16:43:24 +01:00
aletempiac 17afd93c78 Extending ACD to work up to 11 variables 2024-02-08 15:36:09 +01:00
aletempiac 3f80b202cd C++11 compatible code 2024-02-08 14:57:42 +01:00
aletempiac 2afaeac823 Adding hash table to reduce computations 2024-02-08 11:20:19 +01:00
aletempiac 2d9af6c9a4 Adding ACD for 66 LUT structure using a new method 2024-02-08 09:36:58 +01:00
Alan Mishchenko 52e0a10bf7 Fixing a compiler problem. 2024-02-05 20:49:36 -08:00
Alan Mishchenko e9a0bf6bf9 Adding reversing of simulation bits in &sim_read. 2024-02-05 20:32:11 -08:00
Alan Mishchenko d7ef3cc030 Bug fix in &fx. 2024-02-05 19:29:50 -08:00
Alan Mishchenko 62a22c7574 Bug fix in blasting multipliers with different argument bit-width. 2024-02-05 19:26:36 -08:00
Allen Ho c74144c6eb str_eco ver1 2024-02-01 07:25:46 +08:00
Alan Mishchenko 6d1d52deaa Adding an option to read the RTL elaboration library from the current directory. 2024-01-30 20:22:55 -08:00
Alan Mishchenko d6555f48dd Adding a switch to not write the timestamp in the AIGER file. 2024-01-26 07:31:20 -08:00
Alan Mishchenko 5fa9192412 Change how &stochsyn runs on a single core. 2024-01-18 18:34:50 -08:00
Alan Mishchenko 8da884de85 Switch to reverse the order of bits. 2024-01-18 18:23:11 -08:00
Baruch Sterin 234af64a8c Workaround for C++17 compilation (on clang) 2024-01-18 09:58:18 -08:00
Baruch Sterin d140535d64 Adapt previous merge by @aletempiac to compile with ABC namespaces. 2024-01-17 15:04:31 -08:00
aletempiac d223898f3d Merge remote-tracking branch 'origin/master' into acd 2024-01-16 17:44:45 +01:00
aletempiac 67aab70cff Moving ACD package to if folder 2024-01-16 17:42:43 +01:00
Alan Mishchenko 5bc99574fc Eliminating dependency on "abc.rc" in "&deepsyn". 2024-01-12 22:54:44 -08:00
aletempiac 38e632a954 Consider buffers in matrix covering as free 2024-01-12 14:50:34 +01:00
Alan Mishchenko 8c7327b8df Recognizing interface of the module when writing Verilog. 2024-01-11 22:19:50 -08:00
Alan Mishchenko dc68fe27f9 Saving module interface. 2024-01-11 19:45:42 -08:00
aletempiac 7dcc10a254 Minor fixes 2024-01-10 15:18:39 +01:00
alanminko 7f0a319564
Merge pull request #269 from rmlarsen/speedup_scanning 
Micro-optimizations to speed up the Liberty parser by ~1.67x.
 2023-12-21 12:58:42 +09:00
Alan Mishchenko 5978ccdb52 Updating sleep command to wait for file. 2023-12-21 12:16:33 +09:00
Rasmus Munk Larsen 706112ebd8 Micro-optimizations to speed up the Liberty parser by ~1.67x. 
Signed-off-by: Rasmus Munk Larsen <rmlarsen@google.com>
 2023-12-19 16:13:52 -08:00
Alan Mishchenko 7fe92148cc New command to put computation to sleep. 2023-12-18 21:04:31 +09:00
Allen Ho 284b9d6a9c extended box report; 2023-12-10 21:30:46 +08:00
Alan Mishchenko 16a3c5fc30 Add copying names in &saveaig and &loadaig. 2023-12-09 21:53:48 +08:00
Allen Ho 9bb5333f62 extend bo 2023-12-07 19:07:52 +08:00
aletempiac b3d2419d9a Formatting, renaming, and cleaning code 2023-11-27 13:38:36 +01:00
aletempiac 6097fd4349 Code formatting 2023-11-24 14:24:20 +01:00
aletempiac 23cfcc1e1f Improving efficiency and removing useless code 2023-11-24 12:18:49 +01:00
aletempiac 43f4dccb4f run time improvements in computing the column multiplicity 2023-11-23 16:29:33 +01:00
Allen Ho a316847341 correct fanout count 2023-11-23 19:33:05 +08:00
aletempiac acdd08fd9b Performance improvements 2023-11-21 11:47:56 +01:00
aletempiac d10d450f38 Final implementation 2023-11-19 21:59:40 +01:00
aletempiac 219d6d86d6 Simplifying code 2023-11-19 19:33:19 +01:00
aletempiac 672fd1b629 removing not used methods 2023-11-19 18:53:54 +01:00
aletempiac f7a520b957 restructuring code 2023-11-19 18:51:50 +01:00
aletempiac 1d7dfd25c6 Improving ACD mapping 2023-11-17 16:58:17 +01:00
aletempiac 3d602e2f00 Adding sorting of columns in heuristic covering 2023-11-17 15:55:10 +01:00
aletempiac 1ca7a3a353 Remove symmetries in covering table 2023-11-17 15:49:29 +01:00
aletempiac b77bdeeb17 Enabling ACD for area 2023-11-16 19:21:29 +01:00
aletempiac 8aa57c5d54 Decisions on late arrival 2023-11-16 18:53:02 +01:00
aletempiac 548fd6afb2 New version of enumeration of combinations 2023-11-16 18:20:05 +01:00
aletempiac b32bbdfef3 Improving set covering using unitary cost 2023-11-16 15:33:19 +01:00
aletempiac dcc960beba Adding local search for covering 2023-11-15 21:57:29 +01:00
aletempiac c07080f818 Adding heuristic set covering solver 2023-11-15 21:32:34 +01:00
aletempiac 66cdd36d20 Runtime improvements in decomposition 2023-11-15 19:03:29 +01:00
aletempiac 1632dc0d4e First version of ACD 2023-11-15 18:38:00 +01:00
Alan Mishchenko 6ca7eab466 Prototype of integrating decomposition into "if". 2023-11-14 12:58:03 -08:00
Alan Mishchenko eb264c5d22 Suggested fixes. 2023-11-13 17:19:54 -08:00
WWFUG 67a2b97cf0 added -I options in &bmiter 2023-11-08 19:00:03 +08:00
Alan Mishchenko 04dba9eed9 Adding callback for wire caps during sizing. 2023-11-06 17:35:41 -08:00
Allen Ho 50010139ef why 2023-11-06 18:37:40 +08:00
Allen Ho ba64d6118b out-side box matching 2023-10-30 15:09:01 -07:00
Alan Mishchenko 5de12aa6b3 Experiments with SAT solving. 2023-10-23 11:30:44 -07:00
Alan Mishchenko 1bf21626c0 Bug fix. 2023-10-23 11:04:35 -07:00
Alan Mishchenko 76e8d21aaf Printout changes. 2023-10-23 10:48:43 -07:00
Alan Mishchenko 538ecb4515 Updating printouts. 2023-10-23 09:38:24 -07:00
Alan Mishchenko 01ad71b26f Experiments with verification. 2023-10-23 09:38:08 -07:00
Alan Mishchenko 8dbf8965fd Adding batch option to "scrgen". 2023-10-23 09:37:04 -07:00
Alan Mishchenko 652a0aaef7 Compiler warning. 2023-10-20 22:42:40 -07:00
Alan Mishchenko 72b423ba14 Experiments with SAT solving. 2023-10-20 20:53:43 -07:00
wjrforcyber c2fdb86a4d Refactor(Typo): Typo in ACD 2023-10-07 13:53:22 +08:00
wjrforcyber fb6a4722c2 Merge remote-tracking branch 'upstream/master' into typo 2023-10-07 13:50:29 +08:00
Alan Mishchenko 3c4c558656 Experiment with script generation. 2023-10-02 16:47:37 -07:00
Alan Mishchenko 65ccd3cc69 Enabled literal remapping. 2023-09-29 16:07:29 -07:00
Alan Mishchenko cc636a0d83 Experiments with verification. 2023-09-28 06:40:57 -07:00
wjrforcyber ecf6255985 Refactor(Typo):Missing a parameter fUseLutLib and use fSaveBest twice 2023-09-26 14:24:02 +08:00
Alan Mishchenko 0f11580fce Experiments with retiming. 2023-09-24 22:18:45 +08:00
wjrforcyber 3781c1df61 Refactor(Typo): Link is NOT FOUND page(not available), change to the book name 2023-09-24 19:31:37 +08:00
Alan Mishchenko 4d1618f600 Enable dumping Verilog with assign-statements. 2023-09-21 11:08:43 +08:00
Alan Mishchenko 73dac01c15 Warning regarding PathMatchSpec() on Windows. 2023-09-21 11:08:16 +08:00
Allen Ho 31ad17fa1a add abc9RecoverBoundary 2023-09-20 14:23:47 +08:00
Alan Mishchenko 7fd4b01fb3 Automatic script file generation. 2023-09-18 16:30:09 +08:00
Alan Mishchenko 09b0295c1a Adding aliases for some commands. 2023-09-18 16:27:54 +08:00
wjrforcyber eae19f7a62 Refactor(Typo): Typo in strash 2023-09-18 13:56:18 +08:00
wjrforcyber 05c897a753 Refactor(Typo): Typo in read_aiger 2023-09-17 19:34:56 +08:00
wjrforcyber e1db615384 Merge branch 'master' into typo 2023-09-17 13:28:57 +08:00
wjrforcyber 7ec8f17094 Refactor(Typo): Typo update in write_aiger message 2023-09-17 13:27:00 +08:00
Alan Mishchenko 9399faac48 Improvements to &gen_hie. 2023-09-17 12:40:33 +08:00
Alan Mishchenko 2f5b81119b Experiments with retiming. 2023-09-17 12:17:27 +08:00
wjrforcyber 6e1323caa2 Refactor(Typo): Typo update in bblif comment 2023-09-16 22:31:47 +08:00
wjrforcyber 136bae27d8 Refactor(Typo): Typo update in read_aiger comment 2023-09-16 19:43:03 +08:00
Alan Mishchenko 475c8dad8e Compiler problem. 2023-09-16 07:13:10 +08:00
Cunxi Yu 1261f71248
Merge branch 'berkeley-abc:master' into master 2023-09-15 13:25:27 -07:00
Alan Mishchenko 318d5cb54b Do not create spec outputs in the boundary miter. 2023-09-15 23:10:42 +08:00
Alan Mishchenko 57cc2bd089 Compiler problem. 2023-09-15 22:51:11 +08:00
Alan Mishchenko 09013f3a6e New command &gen_hie to generate hierarchical designs. 2023-09-15 22:44:31 +08:00
wjrforcyber 3a53a950aa Refactor(Typo): Typo update on buffer 2023-09-12 11:57:18 +08:00
wjrforcyber 7fe7449685 Refactor(Typo):Typo update on dnsize 2023-09-12 10:40:59 +08:00
Alan Mishchenko 1153b3b6b9 Commenting out an assert that signals a non-critical formance bug. 2023-09-11 12:12:52 +07:00
Alan Mishchenko 1ffdbbbebe Corner-case bug fix. 2023-09-11 10:46:38 +07:00
Alan Mishchenko 588122dc72 Writing an interface module when dumping Verilog. 2023-09-11 09:44:22 +07:00
Alan Mishchenko 6d866dab6b Updating command "time" to report wall time. 2023-09-09 10:06:33 +07:00
Alan Mishchenko a4755a37cb Experiments with CEC. 2023-09-08 22:42:41 +07:00
Alan Mishchenko 55aba1731c Fixing a typo. 2023-09-08 19:57:45 +07:00
Alan Mishchenko f844fb1057 Command to add one flop to the design. 2023-09-08 16:46:14 +07:00
Alan Mishchenko 0c719ab69e Adding procedure to merge two libraries. 2023-09-08 14:23:14 +07:00
alanminko 00fa1e3714
Merge pull request #241 from wjrforcyber/typo 
Refactor(Typo):Typo currently exists
 2023-09-05 14:09:40 +07:00
alanminko 1f0c51533f
Merge pull request #232 from phsauter/fix-retime-segfault 
fix Segfault in retime command
 2023-09-05 14:09:13 +07:00
alanminko 4c718f7b50
Merge pull request #218 from seccipon/master 
1. Fix bug (using pDesign without check if == NULL) 2. Switch type of variables containing file size to (int => long)
 2023-09-05 14:08:51 +07:00
alanminko 7f22cc07b8
Merge pull request #194 from jamesjer/badfile 
Do not pass NULL to fprintf
 2023-09-05 14:07:35 +07:00
alanminko e3feb5c44a
Merge pull request #183 from j2kun/patch-1 
typo: Libery -> Liberty
 2023-09-05 14:06:53 +07:00
alanminko 0e88e2739f
Merge pull request #177 from mmicko/fix_large_liberty 
Enable loading of large liberty files
 2023-09-05 14:06:07 +07:00
alanminko 1cd5a2ce04
Merge pull request #156 from Teemperor/FixMemoryLeak 
Fix some memory leaks
 2023-09-05 14:05:09 +07:00
alanminko 3daa630a03
Merge pull request #242 from DanielG/spelling-fixes 
treewide: Fix spelling mistakes
 2023-09-05 13:31:50 +07:00
Alan Mishchenko 7df17e3c5e Experiments with the SAT sweeper. 2023-09-05 11:13:08 +07:00
Alan Mishchenko 167fceac37 Enabling command history on Linux. 2023-09-05 11:11:18 +07:00
Alan Mishchenko 301469432d Experiments with the SAT sweeper. 2023-09-04 19:58:31 +07:00
Alan Mishchenko a13dae7a4a Corner-case bug in truth table reading. 2023-09-04 08:18:02 +07:00
Alan Mishchenko 1cdb2dacee Problem fix: <unistd.h> is not properly defined. 2023-09-04 08:13:00 +07:00
wjrforcyber 1a525c57a6 Merge remote-tracking branch 'upstream/master' into typo 2023-08-29 10:57:06 +08:00
wjrforcyber b8f5708ec1 Refactor(Typo):Expends->Expands 2023-08-29 10:46:57 +08:00
Cunxi Yu 3488a35472
Merge branch 'berkeley-abc:master' into master 2023-08-27 10:21:43 -07:00
CUNXI YU 855976c61d correct the naming of augmentation 2023-08-27 11:19:26 -06:00
CUNXI YU 0fe977a33c correct the naming of augmentation 2023-08-27 11:18:35 -06:00
Daniel Gröber b7d1435db1 treewide: Fix spelling mistakes 
A particularly pedantic set of changes currently used in Debian

Authored-By: Ruben Undheim <ruben.undheim@gmail.com>
 2023-08-27 14:13:20 +02:00
Alan Mishchenko 3309ccabd4 Cleaning up AIG output in EQN format. 2023-08-26 17:12:50 +07:00
Alan Mishchenko 750f8f174e Extending &ps -n NPN profile to use cut pairs. 2023-08-24 21:44:38 +07:00
Cunxi Yu 01f4eb9b43
Merge branch 'berkeley-abc:master' into master 2023-08-23 20:24:33 -06:00
Alan Mishchenko 756e21a81d Problem fix: <unistd.h> is not properly defined. 2023-08-20 15:50:59 +07:00
wjrforcyber 0971429b56 Refactor(Typo):rec_add2 is no longer exist 2023-08-18 12:42:13 +08:00
Ethan Mahintorabi aae3a39914
map: Fixes windows fnmatch build issue 
Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
 2023-08-15 19:10:42 +00:00
Ethan Mahintorabi 503c4a34b0
map: Adds a user configurable dont_use flag to liberty 
This flag (-X <glob>) will allow a user to set this flag
multiple times with a glob pattern to exclude cells that
user doesn't want to show up in a mapped netlist.

Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
 2023-08-14 18:19:20 +00:00
lyj1201 0fab82384a add AIG random synthesis based RTL argumentation; command = aigarg 2023-08-14 12:04:33 -06:00
Alan Mishchenko c4839c92a8 Fixing 'read_truth' to read a constant truth table 2023-08-14 21:21:02 +07:00
Alan Mishchenko c2517679d6 Code to compute CNF of a cardinality constraint. 2023-08-14 20:59:32 +07:00
Alan Mishchenko 42683a7370 Fixed performance bug in Feb 28 commit (0d0063f). 2023-08-12 16:36:18 +07:00
Alan Mishchenko a7aa3deac9 Fixed a corner-case bug in Aug 5 commit (3daecc0). 2023-08-12 16:32:56 +07:00
Alan Mishchenko a603186d8e "Fixing usage message of &ps." 2023-08-11 07:14:11 +07:00
Philippe Sauter 0fa51fd627
Merge branch 'berkeley-abc:master' into fix-retime-segfault 2023-08-10 13:56:20 +02:00
alanminko e387ddf849
Merge pull request #236 from MyskYko/fix_rwr 
update reverse level when co is replaced
 2023-08-06 08:52:20 +07:00
MyskYko 3daecc0ea8 update reverse level when co is replaced 2023-08-05 13:35:41 -07:00
Alan Mishchenko 039f05cb56 Adding preprocessing to command &splitsat. 2023-07-27 20:50:02 -07:00
Alan Mishchenko 74157fc0ab New command &splitsat. 2023-07-27 16:00:17 -07:00
Alan edb7fb100d Removing checking for the binary in the current dir. 2023-07-26 20:27:17 -07:00
Alan Mishchenko c51c081d90 Changing default time counting from thread time to wall time. 2023-07-25 12:54:22 -07:00
Alan Mishchenko a3942996e7 Bug fix in &splitprove. 2023-07-25 12:53:50 -07:00
Alan Mishchenko d9f6af51af Experiment with CNF cofactoring. 2023-07-24 16:21:42 -07:00
Alan Mishchenko 19eaa55c2a Experiments with cube ordering. 2023-07-23 10:14:35 -07:00
Alan Mishchenko 683882f2bb Experiments with stochastic synthesis. 2023-07-22 22:18:28 -07:00
Alan Mishchenko 0108175c6c Bug fix in 'dsd'. 2023-07-22 17:08:01 -07:00
Alan Mishchenko a620c09c40 Adding functional comparison to &compare. 2023-07-22 16:44:33 -07:00
phsauter 0f7d05d531 fix Segfault in retime command 2023-07-22 21:20:09 +02:00
Alan Mishchenko 3592078ddb Partitioned &scorr. 2023-07-21 18:49:06 -07:00
Alan Mishchenko 55ed1e6698 Changing command &permute to generate random NPNP transformations. 2023-07-21 16:15:34 -07:00
Alan Mishchenko 623d0f3c9f Change in how signal names are printing in 'print_level'. 2023-07-18 21:00:13 -07:00
Alan Mishchenko 0828ac28a0 Bug fix in Verilog writer. 2023-07-18 15:53:20 -07:00
alanminko 354d302fef
Merge pull request #231 from salfter/c++17-fix 
fix errors when compiling within Yosys: "ISO C++17 does not allow 'register' storage class specifier"
 2023-07-18 11:33:57 -07:00
Scott Alfter 927b60b7a0 fix errors when compiling within Yosys: "ISO C++17 does not allow 'register' storage class specifier" 2023-07-18 09:17:58 -07:00
Alan Mishchenko 59cfcd2240 Compiler warnings. 2023-07-18 09:00:11 -07:00
Cunxi Yu 5bb7fb76a7 add orchestration function (local greedy); usage: orchestrate -h 2023-07-16 12:20:10 -06:00
Alan Mishchenko 766f64e221 Updating 'sim' command to print input patterns. 2023-07-14 20:23:56 -07:00
Alan Mishchenko c70de10002 Updating &saveaig command. 2023-07-14 20:06:22 -07:00
Alan Mishchenko e61194bbed Bug fix. 2023-07-08 10:18:18 -07:00
Alan Mishchenko a82bbaa91d Bug fix in equiv class filtering. 2023-07-07 14:03:35 -07:00
Alan Mishchenko 373c5eccf3 Experiment with multipliers. 2023-07-07 13:12:22 -07:00
Rajit Manohar 62b85322ea no need to call strlen on a constant 2023-06-24 12:34:24 -04:00
Rajit Manohar bbdfe37bf9 fix segv when obj is a primary input 2023-06-24 12:17:57 -04:00
alanminko a5a6254db1
Merge pull request #173 from mmicko/namespace_fix 
Prevent types from stdint to be defined under abc namespace
 2023-05-19 18:15:09 -07:00
alanminko cf25d25dd0
Merge pull request #195 from hzeller/20221121-fix-msan-issue 
Make sure all 32 bits of bit-field are initialized.
 2023-05-18 22:33:14 -07:00
alanminko ea40a95830
Merge pull request #196 from hzeller/20221121-fix-ub 
Fix undefined behavior in signed/unsigned shifting.
 2023-05-18 22:33:01 -07:00
alanminko 4f0cdd2167
Merge pull request #217 from hzeller/20230427-avoid-double-define 
Don't #define _DEFAULT_SOURCE if already defined.
 2023-05-18 22:32:48 -07:00
alanminko 80c1c01641
Merge pull request #225 from hzeller/20230515-fully-qualify-inserter 
Fully namespace-qualify std::inserter(); add missing include.
 2023-05-18 22:32:35 -07:00
Alan Mishchenko 5a9a902044 Bug fix in equivalence class handling (another try). 2023-05-17 10:34:14 -07:00
Henner Zeller ed7de06726 Fully namespace-qualify std::inserter(); add missing include. 
Signed-off-by: Henner Zeller <hzeller@google.com>
 2023-05-15 09:14:40 -07:00
alanminko 3d35624be6
Merge pull request #224 from MyskYko/transduction 
Transduction option fix and multi-threading
 2023-05-14 14:12:26 -07:00
Yukio Miyasaka 16894c56ee thread parallelism 2023-05-14 13:48:40 -07:00
Alan Mishchenko 96e1de436e Bug fix in equivalence class handling (another try). 2023-05-14 12:43:07 -07:00
Alan Mishchenko bb4378934d Removing a global variable in resub. 2023-05-13 13:53:59 -07:00
Yukio Miyasaka 3af039d7c3 zero cost hop 2023-05-12 22:10:40 -07:00
Yukio Miyasaka a3fb930e44 fix option 2023-05-12 21:44:29 -07:00
Alan Mishchenko 7e501b9b02 Bug fix in equivalence class handling. 2023-05-12 18:39:47 -07:00
alanminko 41a2b2a0ef
Merge pull request #223 from MyskYko/transduction 
transtoch with exdc
 2023-05-12 12:36:05 -07:00
MyskYko 1f16d8bc90 transtoch with exdc 2023-05-12 12:15:23 -07:00
Alan Mishchenko 26edc73b04 Bug fix in miter generation. 2023-05-11 19:20:27 -07:00
Alan Mishchenko 2c9937e0dd Small bug in managing AIG manager name. 2023-05-10 15:05:08 -07:00
Alan Mishchenko 7c04730a24 A minor change and adding ABC file markers. 2023-05-10 12:20:15 -07:00
alanminko 233680f286
Merge pull request #220 from MyskYko/transduction 
Stochastic Transduction Script
 2023-05-10 12:09:45 -07:00
MyskYko 36b357175a stochastic script for transduction 2023-05-06 04:15:34 -07:00
Alan Mishchenko 875ef73275 Temporarily disabling &transduction for an old windows compiler. 2023-05-04 12:27:08 -07:00
alanminko 38cd47b46c
Merge pull request #219 from MyskYko/transduction 
Transduction method
 2023-05-04 14:20:34 -04:00
MyskYko 3b946e76e3 options 2023-05-04 02:12:58 -07:00
MyskYko 920f4dbb7d verbose 2023-05-04 01:49:30 -07:00
MyskYko ec626957b5 option change 2023-05-03 10:46:42 -07:00
MyskYko d1ceefee82 compiler warning 2023-05-02 18:17:46 -07:00
MyskYko 323229a438 fix build 2023-05-02 17:27:01 -07:00
MyskYko ce3843ec8c fix enum 2023-05-02 17:08:02 -07:00
MyskYko 13b0d17169 abc cxx namespace 2023-05-02 17:02:04 -07:00
MyskYko 6e985705fc transduction 2023-05-02 16:48:33 -07:00
Alan Mishchenko eff805a644 Bug fix in choice computation. 2023-04-28 08:02:04 -04:00
Andrey Rogov d785775f64 1. Fix bug (using pDesign without check if == NULL) 
2. Switch type of variables containing file size to (int => long)
 2023-04-28 01:52:01 +03:00
Henner Zeller dfd8fabdd7 Don't #define _DEFAULT_SOURCE if already defined. 2023-04-27 13:44:13 -07:00