Commit Graph

89 Commits

Author SHA1 Message Date
AngeloJacobo 2e6c2183aa added sim duration for possible bus delays 2023-06-08 13:55:20 +08:00
AngeloJacobo de37c5a972 added wires for loadingg delay tap 2023-06-08 13:53:07 +08:00
AngeloJacobo b9204332b1 made delay tap loadable 2023-06-08 13:52:04 +08:00
AngeloJacobo c3707dab53 made delay tap loadable and made delay more flexible to use all 32 taps for both dqs and dq 2023-06-08 11:01:56 +08:00
AngeloJacobo 0e5d95098e added more pins to be debugged 2023-06-08 10:55:32 +08:00
Angelo Jacobo 710d477014
added vivado gtkw for micron model simulation 2023-06-03 14:31:29 +08:00
Angelo Jacobo 98ed92a65b
added testbench for a single ddr3 device sim 2023-06-03 14:28:55 +08:00
Angelo Jacobo 9a19f82377
added testbench for model simulation 2023-06-03 14:24:11 +08:00
Angelo Jacobo 884fd2bcad
Add files via upload 2023-06-01 19:59:45 +08:00
Angelo Jacobo 35c992d6fd
uploaded model.log 2023-06-01 19:30:16 +08:00
Angelo Jacobo 748274ffff
Update README.md 2023-06-01 19:27:25 +08:00
Angelo Jacobo 6127bba77a
fixed data alignment for write operation, fixed CL and CWL for 100MHz:400MHz clk 2023-06-01 19:18:41 +08:00
Angelo Jacobo 26af4960e9
fixed display for prev_cmd and time difference 2023-06-01 19:15:36 +08:00
Angelo Jacobo 0a43b04f9e
added phy for generating differential o_ddr3_clk 2023-05-29 21:51:48 +08:00
Angelo Jacobo d6b6c0b9a4
added o_ddr3_clk port 2023-05-29 21:48:44 +08:00
Angelo Jacobo d674b1c9c2
added autofpga text file for including the controller 2023-05-29 20:59:12 +08:00
Angelo Jacobo 9e529131c0
fixed error "added_read_pipe has multiple drivers" 2023-05-29 20:52:48 +08:00
Angelo Jacobo a56e6a8a24
changed write calibration pattern with high autocorrel stat 2023-05-29 16:40:41 +08:00
Angelo Jacobo 400a277cdc
added 52ns sync reset (IDELAYCTRL requirement) 2023-05-29 16:19:32 +08:00
Angelo Jacobo f4f0a5c11c
Update run.sh with the new ddr3 files 2023-05-28 16:24:22 +08:00
Angelo Jacobo 7480704b3d
Delete kluster.xdc 2023-05-28 16:21:43 +08:00
Angelo Jacobo 02d512df55
Delete sdram.txt 2023-05-28 16:20:52 +08:00
Angelo Jacobo 12b533a9d1
added top module which instantiates the controller and phy 2023-05-28 16:20:22 +08:00
Angelo Jacobo f648035e4e
added phy interface (separated from controller) 2023-05-28 16:19:47 +08:00
Angelo Jacobo ab26902f7a
include only the controller (phy is now a separate module) 2023-05-28 16:18:14 +08:00
Angelo Jacobo 854839dde9
readme file from Micron 2023-05-28 16:14:21 +08:00
Angelo Jacobo b9154a38bb
Delete rtl/DDR3 directory
clean-up the repo
2023-05-28 16:11:49 +08:00
Angelo Jacobo fb8dd029e3
Delete ug586_7Series_MIS.pdf 2023-05-28 16:08:40 +08:00
Angelo Jacobo 5092543e74
Add files via upload 2023-05-25 19:45:06 +08:00
Angelo Jacobo 30b5675b41
Update README.md 2023-05-25 19:41:51 +08:00
Angelo Jacobo 6710b5b62b
Add files via upload 2023-05-25 19:14:12 +08:00
Angelo Jacobo 1e89a236df
fixed implementation errors in Vivado 2023-05-25 19:13:30 +08:00
Angelo Jacobo 4e07df4018
Update README.md 2023-05-22 19:59:17 +08:00
Angelo Jacobo a7de749ddf
Add files via upload 2023-05-22 19:53:20 +08:00
Angelo Jacobo f91e5ea75d
Update README.md 2023-05-18 11:51:19 +08:00
Angelo Jacobo 94d6253069
Add files via upload 2023-05-18 11:02:40 +08:00
Angelo Jacobo 991dcad40b
Add files via upload 2023-05-18 10:50:30 +08:00
Angelo Jacobo 8e6c422689
complete read and write calibration 2023-05-18 10:45:26 +08:00
Angelo Jacobo ee990dd647
Update README.md 2023-05-11 19:36:56 +08:00
Angelo Jacobo 9602a4225d
Update README.md 2023-05-11 19:23:11 +08:00
Angelo Jacobo 614fd7dfe2
Update README.md 2023-05-11 19:22:34 +08:00
Angelo Jacobo 520300ecb0
Update README.md 2023-05-11 19:12:16 +08:00
Angelo Jacobo f280ba3efd
Update README.md 2023-05-11 19:07:17 +08:00
Angelo Jacobo 233b89dafb
Update README.md 2023-05-11 18:58:25 +08:00
Angelo Jacobo c21879c165
Update README.md 2023-05-11 18:50:59 +08:00
Angelo Jacobo b631fe7ebc
Update README.md 2023-05-11 18:24:12 +08:00
Angelo Jacobo ec8d957291
Update README.md 2023-05-11 18:03:30 +08:00
Angelo Jacobo c33bc40bd3
Update ddr3_controller.v 2023-05-11 15:35:34 +08:00
Angelo Jacobo 9be5b5a616
Update ddr3_controller.v 2023-05-11 14:49:47 +08:00
Angelo Jacobo f3c4b1b465
Update ddr3_controller.v 2023-05-10 15:23:48 +08:00