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luke
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OpenRAM
mirror of
https://github.com/VLSIDA/OpenRAM.git
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60ba2c1aa5
OpenRAM
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mrg
843e9414df
Parameterize vdd and gnd pin in write driver array.
2020-04-16 11:28:35 -07:00
..
bank.py
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bank_select.py
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bitcell_array.py
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bitcell_base_array.py
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control_logic.py
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delay_chain.py
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dff.py
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dff_array.py
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dff_buf.py
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dff_buf_array.py
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dff_inv.py
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dff_inv_array.py
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dummy_array.py
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hierarchical_decoder.py
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hierarchical_predecode.py
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hierarchical_predecode2x4.py
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hierarchical_predecode3x8.py
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module_type.py
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multibank.py
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port_address.py
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port_data.py
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precharge_array.py
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replica_bitcell_array.py
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replica_column.py
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sense_amp.py
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sense_amp_array.py
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single_level_column_mux_array.py
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tri_gate.py
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tri_gate_array.py
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wordline_driver.py
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write_driver.py
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write_driver_array.py
Parameterize vdd and gnd pin in write driver array.
2020-04-16 11:28:35 -07:00
write_mask_and_array.py
…