mrg
8b0b2e2817
Merge branch 'dev' into rbl_revamp
2019-07-03 14:05:28 -07:00
mrg
bc4a3ee2b7
New port_data module works in SCMOS
2019-07-03 13:17:12 -07:00
Hunter Nichols
4e08e2da87
Merged and fixed conflicts with dev
2019-06-25 16:55:50 -07:00
Hunter Nichols
4f3340e973
Cleaned up graph additions to characterizer.
2019-06-25 16:37:35 -07:00
Matt Guthaus
6e044b776f
Merge branch 'pep8_cleanup' into dev
2019-06-14 08:47:10 -07:00
Matt Guthaus
a234b0af88
Fix space before comment
2019-06-14 08:43:41 -07:00
mrg
fc12ea24e9
Add boundary to every module and pgate for visual debug.
2019-06-03 15:27:37 -07:00
Hunter Nichols
d8617acff2
Merged with dev
2019-05-15 18:48:00 -07:00
Hunter Nichols
d54074d68e
Made timing graph more gate-level. Changed edges to be defined by inputs/ouputs and name based.
2019-05-07 00:52:27 -07:00
Matt Guthaus
0f03553689
Update copyright to correct years.
2019-05-06 06:50:15 -07:00
Matt Guthaus
3f9a987e51
Update copyright. Add header to all OpenRAM files.
2019-04-26 12:33:53 -07:00
Matt Guthaus
0439b129bb
Some pgates are designs since not a fixed height
2019-04-26 12:33:53 -07:00
Matt Guthaus
05ad4285af
Cleanup pgate code.
...
Moved create_netlist and create_layout to the pgate class
from which everything is derived. Modified all pgates
to have consistent debug output and order of init function.
2019-04-26 12:30:42 -07:00
Hunter Nichols
e292767166
Added graph creation and functions in base class and lower level modules.
2019-04-24 14:23:22 -07:00
Hunter Nichols
4f28295e20
Added initial graph for correct naming
2019-04-19 01:27:06 -07:00
Matt Guthaus
25bc3a66ed
Add far left option for contact placement in pgates.
2019-04-17 13:41:35 -07:00
Matt Guthaus
be20408fb2
Rewrite add_contact to use layer directions.
2019-04-15 18:00:36 -07:00
Hunter Nichols
25c034f85d
Added more accurate bitline delay capacitance estimations
2019-04-09 01:56:32 -07:00
Hunter Nichols
1438519495
Added check to pdriver for 0 fanout which can break compute_sizes.
2019-04-03 17:53:28 -07:00
Hunter Nichols
f6eefc1728
Added updated analytical characterization with combined models
2019-04-02 01:09:31 -07:00
Hunter Nichols
97777475b4
Added additions to account for custom delay chains.
2019-03-28 17:16:23 -07:00
Hunter Nichols
80a325fe32
Added corner information for analytical power estimation.
2019-03-04 19:27:53 -08:00
Hunter Nichols
0e96648211
Added linear corner factors in analytical delay model.
2019-03-04 00:42:18 -08:00
Hunter Nichols
5f01a52113
Fixed some delay model bugs.
2019-02-05 21:15:12 -08:00
Hunter Nichols
d1218778b1
Fixed merge conflicts
2019-01-28 22:33:08 -08:00
Matt Guthaus
18805423e3
Simplify pdriver code.
2019-01-25 17:18:12 -08:00
Matt Guthaus
beceb3fb60
Fix buggy analytical delay in pdriver
2019-01-25 16:22:59 -08:00
Matt Guthaus
09d6a63861
Change path to wire_path for Anaconda package conflict
2019-01-25 15:07:56 -08:00
Matt Guthaus
6f32bac1a2
Use rx of last pdriver instance after placing instances
2019-01-25 14:17:37 -08:00
Matt Guthaus
614aa54f17
Move clkbuf output lower to avoid dff outputs
2019-01-25 14:03:52 -08:00
Matt Guthaus
ddf734891a
Fix pdriver width error
2019-01-25 10:26:31 -08:00
Matt Guthaus
091b4e4c62
Add size commments to spize. Change pdriver stage effort.
2019-01-23 17:27:15 -08:00
Matt Guthaus
b58fd03083
Change pbuf/pinv to pdriver in control logic.
2019-01-23 12:03:52 -08:00
Matt Guthaus
91636be642
Convert all contacts to use the sram_factory
2019-01-16 16:56:06 -08:00
Matt Guthaus
5192a01f2d
Convert pgates to use ptx through the factory
2019-01-16 16:30:31 -08:00
Matt Guthaus
a418431a42
First draft of sram_factory code
2019-01-16 16:15:38 -08:00
Hunter Nichols
6152ec7ec5
Merge branch 'dev' into multiport_characterization
2019-01-15 16:33:39 -08:00
Hunter Nichols
8eb4812e16
Made parasitic delay parameter in Freepdk45 more accurate, added stage names to delay model.
2018-12-17 23:32:02 -08:00
Jennifer Eve Sowash
4a5c18b6cc
Removed line to skip pdriver_test
2018-12-13 19:10:38 -08:00
Jennifer Eve Sowash
bc44c80d40
Added height to init in pdriver.py
2018-12-13 19:03:31 -08:00
Hunter Nichols
0510aeb3ec
Merged with dev, removed commented out code.
2018-12-12 16:02:16 -08:00
Jennifer Eve Sowash
a51aacfa90
Added corner case for 1 inv pos polarity and renamed variables.
2018-12-07 19:42:11 -08:00
Jennifer Eve Sowash
a6eec10f41
Passed freepdk45 tests with pdriver.py
2018-12-07 12:58:05 -08:00
Jennifer Eve Sowash
a24e5229cb
Fixed method of determining inverter number.
2018-12-07 10:19:18 -08:00
Jennifer Eve Sowash
653ab3eda4
Changed method of determining number of inverters.
2018-12-06 19:34:19 -08:00
Jennifer Eve Sowash
8ea85e3e65
Merge branch 'dev' into pdriver
2018-12-06 14:38:08 -08:00
Jennifer Eve Sowash
5e19cf1e24
Updated naming, added compute_sizes(), and fixed sizing function.
2018-12-06 14:36:01 -08:00
Hunter Nichols
ea55bda493
Changed s_en delay calculation based recent control logic changes.
2018-12-05 17:10:11 -08:00
Jennifer Eve Sowash
2534a32e20
pdriver.py passes resgression tests. Size and number of inverters has been added.
2018-12-03 12:55:48 -08:00
Jennifer Sowash
887674aa85
Added pdriver.py for testing.
2018-12-03 09:11:12 -08:00