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Author SHA1 Message Date
nella 8788bbefd1 Update prep docs example. 2026-09-30 09:57:21 +02:00
George Rennie 17449ce5ce tests: add optbarriers tests 2026-09-30 09:52:46 +02:00
George Rennie b6251e4375 flatten: assert output isn't a constant when flattening with barriers 2026-09-30 09:52:46 +02:00
George Rennie e44fcbe19c kernel: remove $barrier from cellaigs and satgen 
* this was added earlier in the PR with the intention of making
  equiv_opt work, but it means barriers are lost through passes like
  aigmap and can potentially be used in optimization passes so it is better to
  remove it
 2026-09-30 09:52:46 +02:00
George Rennie c0d1032979 write_smt2: only take sign of cell if fit has one 
* this is needed to handle $barrier cells which otherwise are similar to
  $buf but do not have a sign parameter
 2026-09-30 09:52:46 +02:00
George Rennie 3cb100b6be optbarriers: comment typo 2026-09-30 09:52:46 +02:00
George Rennie 02ceecd45c optbarriers: preserve SCCs in processes 2026-09-30 09:52:46 +02:00
George Rennie 3fa36665cb optbarriers: add -noconns option 2026-09-30 09:52:46 +02:00
George Rennie a453664779 prep: add -barriers flag 
* This uses optbarriers and flatten -barriers to insert barriers on
  public wires in the design, limiting the optimization that can affect
  them
 2026-09-30 09:52:46 +02:00
George Rennie c028c3aa05 optbarriers: add command to add/remove optimization barriers 
* This can optionally ignore rewriting the outputs of cells or processes
* This by default rewrites drivers of wires with public names but can
  also optionally rewrite drivers of wires with private names
* A -remove flag allows cleaning up the design by replacing barriers
  with connections
 2026-09-30 09:52:46 +02:00
George Rennie 3a6d6ebd4b flatten: add -barriers flag 
* This uses $barrier optimization barriers to connect wires into the
  flattened module instead of connections
 2026-09-30 09:52:46 +02:00
George Rennie 332c8364d0 write_verilog: support $barrier 2026-09-30 09:52:46 +02:00
George Rennie e5fb9fba29 write_smt2: support $buf and $barrier 2026-09-30 09:52:46 +02:00
George Rennie b8e34c78d7 write_firrtl: support $buf and $barrier 2026-09-30 09:52:46 +02:00
George Rennie 80c6a7eaf3 write_btor: support $barrier, $buf and $_BUF_ 2026-09-30 09:52:46 +02:00
George Rennie 7871fe3c28 write_aiger2: support $barrier 2026-09-30 09:52:46 +02:00
George Rennie 5c17f435a9 opt_merge: don't merge $barrier cells 2026-09-30 09:52:46 +02:00
George Rennie 111322f675 kernel: define $barrier cell 
* This acts as an optimization barrier, limiting the rewriting allowed
* For now this forbids all optimization, but attributes can be added to
  opt in to specific optimizations as required
 2026-09-30 09:52:46 +02:00
nella 53f1cdd34c Merge pull request #6256 from YosysHQ/nella/shiftadd-bsigned 
peepopt shiftadd: check shift B signedness [sc-941]
 2026-09-30 16:38:34 +00:00
nella a74edc9be8 Check shift B signedness in shiftadd. 2026-09-30 18:15:40 +02:00
Emil J 5b4a2edb8a Merge pull request #6265 from SimonEbner/fix-run-command-eintr 
handle EINTR and signal termination in run_command
 2026-09-30 16:10:35 +00:00
Miodrag Milanović c09944d8ee Merge pull request #6266 from YosysHQ/mmicko/update_abc 
Update ABC as per 2026-09-30
 2026-09-30 15:50:54 +00:00
Miodrag Milanovic a1809aeba3 Update ABC as per 2026-09-30 2026-09-30 16:39:33 +02:00
Emil J cd7af6bcb6 Merge pull request #6263 from YosysHQ/emil/abc_new-unmapped-error-handling 
abc_new: improve error handling of &get
 2026-09-30 14:11:56 +00:00
nella 8ce92653e4 Merge pull request #6238 from YosysHQ/nella/shiftadd-signed-a 
Materialize A sign extension in shiftadd [sc-924]
 2026-09-30 13:40:11 +00:00
Emil J 4ca90baf18 Merge pull request #6260 from YosysHQ/emil/proc_dlatch-feedback-loop 
proc_dlatch: error on logic loop in mux tree
 2026-09-30 10:36:26 +00:00
Emil J. Tywoniak a51ed0614c abc_new: add test for &get error handling 2026-09-30 12:19:21 +02:00
Emil J. Tywoniak 49f45cf21f abc_new: error handling when sketchy scripts are used 2026-09-30 12:19:21 +02:00
Emil J. Tywoniak 4c391fdf5b read_xaiger: skip symbol table instead of crashing since its handling was removed 2026-09-30 11:43:00 +02:00
Simon Bucher aa6108d70f kernel: handle EINTR and signal termination in run_command 
When `run_command` reads subprocess output via `fgets` in a multi-threaded process, incoming signals can interrupt the underlying `read` syscall with `EINTR`. Previously, `while (fgets(...) != NULL)` exited the read loop immediately on `EINTR` and called `pclose`, closing the pipe early while the child was still running (or causing the child to die with `SIGPIPE`). Additionally, `run_command` returned `WEXITSTATUS(ret)` without checking `WIFEXITED(ret)`, which evaluates to `0` when a child terminates due to an unhandled signal.

Retry `fgets` after clearing the stream error state when `ferror(f) && errno == EINTR`, and return `-1` if `!WIFEXITED(ret)`.
 2026-09-30 07:30:59 +00:00
Miodrag Milanović a1a0ad7d45 Merge pull request #6257 from YosysHQ/mmicko/sv-elab 
Update sv-elab and slang to v12.0
 2026-09-29 16:47:37 +00:00
Miodrag Milanovic ef887f64f6 Update sv-elab and slang to v12.0 2026-09-29 18:09:25 +02:00
Emil J. Tywoniak ed4ae0e3f4 proc_dlatch: factor out traversal loop check 2026-09-29 17:36:00 +02:00
Emil J. Tywoniak 8520f2385a proc_dlatch: reject a logic loop in feedback traversal 2026-09-29 17:28:27 +02:00
nella 9d0c91b236 Merge pull request #6251 from YosysHQ/nella/abc9-private-init 
abc9: keep FF init on private wires
 2026-09-28 17:19:24 +00:00
nella 2b4f1bce68 Fix abc9 private init. 2026-09-27 19:55:42 +02:00
Miodrag Milanović 30d62572e8 Merge pull request #6247 from YosysHQ/mmicko/update_abc 
Update ABC as per 2026-09-25
 2026-09-25 12:18:42 +00:00
Miodrag Milanovic bcce843b93 Update ABC as per 2026-09-25 2026-09-25 13:50:25 +02:00
Miodrag Milanović 6f876ae0e2 Merge pull request #6244 from YosysHQ/mmicko/logger_fix 
logger: add highlighted text and fix formatting
 2026-09-24 08:06:14 +00:00
Miodrag Milanovic 709e780fe7 logger: add highlighted text and fix formatting 2026-09-24 09:05:39 +02:00
Miodrag Milanović 0d3483f04a Merge pull request #6240 from YosysHQ/use_homebrew_fix 
cmake: Fix Homebrew search on macOS
 2026-09-23 14:34:24 +00:00
N. Engelhardt 450b5ae1b7 cmake: Fix Homebrew search on macOS 2026-09-23 16:04:42 +02:00
Miodrag Milanović 303b1ff528 Merge pull request #6204 from YosysHQ/mmicko/logger 
logger: add LogSourceLocation
 2026-09-23 10:48:18 +00:00
Emil J beb32d697c Merge pull request #6239 from YosysHQ/emil/bufnorm-iopad-compat 
Emil/bufnorm iopad compat
 2026-09-23 10:11:31 +00:00
Emil J. Tywoniak 692ca9c0b8 bufnorm: cover IO pad handling with tests 2026-09-23 11:50:36 +02:00
Emil J. Tywoniak 40c50f6255 bufnorm: let directed connections to IO pads be handled as directed 2026-09-23 11:50:36 +02:00
nella 3b7c09934a Materialize A sign extension in shiftadd. 
$shr and $shift sign-extend A to max(A_WIDTH, Y_WIDTH) before shifting.
shiftadd resliced A without that extension and left A_SIGNED set, so the
narrowed A was sign-extended a second time, from the wrong bit. Bake the
extension in before reslicing and clear A_SIGNED.

When the constant offset consumed all of A this also left an empty A on a
signed $shr, which techmap lowered to x.

Fixes #6214, fixes #6041.
 2026-09-23 08:00:44 +02:00
nella 0fa1478ce8 Merge pull request #6036 from YosysHQ/nella/latch-diagnostics-2 
`proc_dlatch`: error on implicit latches early [sc-645]
 2026-09-22 15:33:40 +00:00
nella 57ab8ef2c6 Merge remote-tracking branch 'origin/main' into nella/latch-diagnostics-2 2026-09-22 16:49:41 +02:00
nella d4f0028e7f Merge pull request #6178 from YosysHQ/nella/muladd-reassoc 
canonicalize $macc unmapping for better DSP inference [sc-814]
 2026-09-22 13:04:16 +00:00