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17,415 Commits 135 Branches 69 Tags 48 MiB
Commit Graph

38 Commits

Author SHA1 Message Date
Emil J. Tywoniak f5b21ecc68 patch: fix signorm commit broken by twine rename 2026-06-24 12:25:20 +02:00
Emil J. Tywoniak 7c73fd62e4 twine: fix replayability, reduce TwineSearch usage 2026-06-22 17:53:19 +02:00
Emil J. Tywoniak 0c450ce8c8 WIP migration to twine 2026-06-18 19:27:41 +02:00
Emil J. Tywoniak afdae7b87e WIP 2026-06-11 20:02:02 +02:00
Emil J. Tywoniak f592f2f3af WIP 2026-06-10 19:22:53 +02:00
Emil J. Tywoniak 2117af318c WIP 2026-06-10 14:54:48 +02:00
Emil J. Tywoniak d13dfc21f4 WIP 2026-06-10 14:54:48 +02:00
Emil J. Tywoniak cfd7edc608 Patch: route staged cell names through per-Patch dict 2026-06-10 14:54:27 +02:00
Emil J. Tywoniak f1edb571f2 rtlil: evacuate src_id_ from AttrObject to per-Design meta vector 2026-06-10 14:54:05 +02:00
Emil J. Tywoniak 3424c00cd0 twine 2026-06-10 14:53:45 +02:00
Emil J. Tywoniak 7656347b44 patch: split into single-output patch + multi-output patch_ports; drop input-cone gc 2026-06-10 14:53:37 +02:00
Emil J. Tywoniak 61b0dfd3bf patch: gc collects src from every removed cell; ff.cc routes through Patch 2026-06-10 14:53:28 +02:00
Emil J. Tywoniak e583da906d patch: merge src into existing cells; opt_merge/_inc + onehot + ff.cc use Patch 2026-06-10 14:53:19 +02:00
Emil J. Tywoniak ea41e61a36 utils: add BitGrouper for shared bit-partition logic 2026-06-10 14:53:13 +02:00
Emil J. Tywoniak d952b04e54 opt_expr: convert remaining rewrites to patcher 2026-06-10 14:53:05 +02:00
Emil J. Tywoniak a689cdc6ed patch: don't track root cell deletions for perf 2026-06-10 14:53:04 +02:00
Emil J. Tywoniak f18f46cc9b patch: don't gc signorm cells 2026-06-10 14:53:01 +02:00
Emil J. Tywoniak c264649ae7 rtlil, patch: incremental signorm via connect_incremental, replacing batched sigNormalize in Patch::patch 2026-06-10 14:52:53 +02:00
Emil J. Tywoniak c3457e2e5c WIP 2026-06-10 14:52:50 +02:00
Emil J. Tywoniak dab9a386cc opt_expr: WIP use patcher more 2026-05-28 22:51:30 +02:00
Emil J. Tywoniak 12e94a9a8c patch: cleanup 2026-05-28 14:49:07 +02:00
Emil J. Tywoniak cef8186c4a patch: infer leaves for gc 2026-05-28 12:56:13 +02:00
Emil J. Tywoniak 1cd0d37511 patch: instead of cell->cell, use port->sig rewrites 2026-05-27 18:07:01 +02:00
Emil J. Tywoniak 688d256edc patch: fix gc 2026-05-27 17:04:31 +02:00
Emil J. Tywoniak 698f6e05c0 patch: fix const handling 2026-05-27 17:04:31 +02:00
Emil J. Tywoniak 5a6568edbe rtlil, patch: update signorm index and driver fields when committing Cell from Patch to Design 2026-05-23 01:09:26 +02:00
Emil J. Tywoniak 9f22b9d2a0 patch: source transfer 2026-05-23 00:10:02 +02:00
Emil J. Tywoniak db1c1d4359 patch: working multi-cell signorm invariant 2026-05-23 00:10:00 +02:00
Emil J. Tywoniak 8c26ecd2a6 patch: WIP multicell patch test 2026-05-23 00:09:17 +02:00
Emil J. Tywoniak 6b16a0cac8 patch: wires 2026-05-23 00:09:17 +02:00
Emil J. Tywoniak d2ae9b48e4 patch: signorm, move 2026-05-23 00:09:17 +02:00
Emil J. Tywoniak b7ea32dbee patch: unique heap 2026-05-23 00:09:17 +02:00
Emil J. Tywoniak dbc7e33908 rtlil: add CellAdderMixin for shared Cell adder interface between Module and Patch 2026-05-23 00:09:14 +02:00
Emil J. Tywoniak 770d74cc9b patch: GC comment 2026-05-23 00:07:39 +02:00
Emil J. Tywoniak 89e5c4ccca test_patch total basics 2026-05-23 00:07:39 +02:00
Emil J. Tywoniak 6f0be1b4e9 rtlil: allow friends to use Wire constructors with a factory token pattern 2026-05-23 00:07:39 +02:00
Emil J. Tywoniak 3e6b740430 rtlil: allow friends to use Cell constructors with a factory token pattern 2026-05-23 00:07:39 +02:00
Emil J. Tywoniak b3f605e0d2 patcher: start 2026-05-23 00:07:39 +02:00