Stefan Frederik 7401f1d8eb add menu "Symbol -> Search all search-paths for schematic associated to symbol". Default: not enabled. Variable: search_schematic. If enabled xschem does not assume the schematic is in the same directory of the symbol but looks in all libraries defined in XSCHEM_LIBRARY_PATH for a match.		2022-06-23 13:42:56 +02:00
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binto7seg	add -pg also in LDFLAGS if --profile is requested; add little more margin in ps page exports	2021-01-06 00:12:04 +01:00
devices	when placing components with lock=true set in template attribute allow to move it to its final position like any other unlocked symbol. Code in place in verilog.awk to do bit unblasting in net-> port associations, but not enalbed it for now as icarus verilog does not handle some bus slices (for example if bus slice direction is different from declared bus direction)	2022-06-09 09:32:34 +02:00
examples	add menu "Symbol -> Search all search-paths for schematic associated to symbol". Default: not enabled. Variable: search_schematic. If enabled xschem does not assume the schematic is in the same directory of the symbol but looks in all libraries defined in XSCHEM_LIBRARY_PATH for a match.	2022-06-23 13:42:56 +02:00
gschem_import	some parameter checks in xschem commands, global var removal in simulation help window - No use for production yet	2021-11-16 22:28:10 +01:00
logic	revert testbench.sch changes	2022-06-14 10:27:30 +02:00
ngspice	added some symbols	2022-04-10 09:05:17 +02:00
pcb	tedax example	2022-01-11 14:44:19 +01:00
rom8k	example schematics formatting	2022-02-16 01:08:16 +01:00
rulz-r8c33	"@#n:net_name" attribute (n = pin name or number) in symbols translates to net name attached to pin. "lab_show.sym" component that shows (does not assign) net name. "highlight=true" attribute can be given on instances in addition to symbols	2020-09-30 00:30:48 +02:00
symgen	removed unused files	2020-08-24 10:01:41 +02:00
viewdraw_import	add viewdraw_import example schematic/symbol dir for user evaluation and Viewdraw/DxDesigner import testing	2022-01-15 13:31:45 +01:00
xTAG	populating xschem git repo	2020-08-08 15:47:34 +02:00
xschem_simulator	added missing symbols	2021-12-19 01:32:19 +01:00
Makefile	added "xschem_simulator" sample example directory for trying logic propagation of probed nets	2020-12-26 19:26:33 +01:00