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adc.sch
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fixed is_symgen() regex, added stup for tutorial_symbol_generators.html
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2023-04-22 11:29:44 +02:00 |
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adc.sym
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add adc sigma delta example
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2022-02-16 02:29:55 +01:00 |
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amp_xschem.sch
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add command xschem tab_list, returns window pathname and associated filename loaded
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2023-06-03 00:21:55 +02:00 |
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and3_ngspice.sch
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spice netlisting of schematics with parametrized symbol generators should work
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2023-04-23 00:37:31 +02:00 |
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and3_ngspice.sym
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fixed is_symgen() regex, added stup for tutorial_symbol_generators.html
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2023-04-22 11:29:44 +02:00 |
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and_ngspice.sch
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spice netlisting of schematics with parametrized symbol generators should work
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2023-04-23 00:37:31 +02:00 |
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and_ngspice.sym
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fixed is_symgen() regex, added stup for tutorial_symbol_generators.html
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2023-04-22 11:29:44 +02:00 |
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autozero_comp.sch
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update xschemtest, more robust spice flatten.awk netlist flattener, specifically when translating expressions containing electrical nodes and parameters, all these need to be translated/substituted.
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2022-10-12 01:16:23 +02:00 |
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autozero_comp_xyce.sch
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send currents to graph
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2022-01-30 14:39:11 +01:00 |
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buck.sch
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(2) full widget creation for xschem new windows, code cleanup, removed old stuff
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2021-11-09 19:05:56 +01:00 |
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buf_ngspice.sch
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spice netlisting of schematics with parametrized symbol generators should work
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2023-04-23 00:37:31 +02:00 |
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buf_ngspice.sym
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fixed is_symgen() regex, added stup for tutorial_symbol_generators.html
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2023-04-22 11:29:44 +02:00 |
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colpitts_xschem.sch
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populating xschem git repo
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2020-08-08 15:47:34 +02:00 |
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comp_65nm.sch
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updates to ngspice/comp_65nm.*
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2023-04-13 12:10:04 +02:00 |
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comp_65nm.sym
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updates to ngspice/comp_65nm.*
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2023-04-13 12:10:04 +02:00 |
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comp_ngspice.sch
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fix a bug in my_mstrcat if an empty string is appended; add resolved_net(n) function that returns the top-most hierarchy name of the net mapping to upper level port connections if any; add xschem resolved_net comand that returns the resolved_net of selected wire/label/pin; add @#n:resolved_net pattern in symbol texts that uses resolved_net
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2023-05-27 11:20:49 +02:00 |
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comp_ngspice.sym
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perf. improvements in plot_raw_custom_data() / ravg_store()
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2022-10-17 15:17:47 +02:00 |
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counter_6bit_ngspice.sch
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add adc sigma delta example
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2022-02-16 02:29:55 +01:00 |
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counter_6bit_ngspice.sym
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add adc sigma delta example
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2022-02-16 02:29:55 +01:00 |
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delta_sigma.sch
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update xschemtest, more robust spice flatten.awk netlist flattener, specifically when translating expressions containing electrical nodes and parameters, all these need to be translated/substituted.
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2022-10-12 01:16:23 +02:00 |
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delta_sigma.sym
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add missing symbol dile in examples
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2022-02-17 02:32:01 +01:00 |
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diode_ngspice.sch
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added some symbols
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2022-04-10 09:05:17 +02:00 |
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diode_ngspice.sym
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added some symbols
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2022-04-10 09:05:17 +02:00 |
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flip_flop_ngspice.sch
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add adc sigma delta example
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2022-02-16 02:29:55 +01:00 |
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flip_flop_ngspice.sym
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add adc sigma delta example
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2022-02-16 02:29:55 +01:00 |
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full_adder_ngspice.sch
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add adc sigma delta example
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2022-02-16 02:29:55 +01:00 |
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full_adder_ngspice.sym
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add adc sigma delta example
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2022-02-16 02:29:55 +01:00 |
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half_adder_ngspice.sch
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add adc sigma delta example
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2022-02-16 02:29:55 +01:00 |
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half_adder_ngspice.sym
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add adc sigma delta example
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2022-02-16 02:29:55 +01:00 |
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hpf_xschem.sch
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faster jump table in plot_raw_custom_data(), added simulation->add waveform reload launcher
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2022-10-03 11:15:14 +02:00 |
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inv-2.sym
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populating xschem git repo
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2020-08-08 15:47:34 +02:00 |
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inv_ngspice.sch
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spice netlisting of schematics with parametrized symbol generators should work
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2023-04-23 00:37:31 +02:00 |
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inv_ngspice.sym
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fixed is_symgen() regex, added stup for tutorial_symbol_generators.html
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2023-04-22 11:29:44 +02:00 |
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keeper_ngspice.sch
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add adc sigma delta example
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2022-02-16 02:29:55 +01:00 |
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keeper_ngspice.sym
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add adc sigma delta example
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2022-02-16 02:29:55 +01:00 |
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led_driver.sch
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allow 0 width lines (faster device dependent implementation) if user defined line width is set (to 0), add devices/title-3.sym
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2023-01-07 11:28:28 +01:00 |
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lm741.sym
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populating xschem git repo
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2020-08-08 15:47:34 +02:00 |
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nand_ngspice.sch
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recognize \r\n sequences on windows rawfiles in "Binary:" lines, just in case ngspice developers want to add it someday. Quote ROUT ('ROUT') values for output resistors in ngspice_logic gates
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2022-07-28 00:36:09 +02:00 |
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nand_ngspice.sym
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add adc sigma delta example
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2022-02-16 02:29:55 +01:00 |
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nmos4-v.sym
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populating xschem git repo
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2020-08-08 15:47:34 +02:00 |
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nor_ngspice.sch
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recognize \r\n sequences on windows rawfiles in "Binary:" lines, just in case ngspice developers want to add it someday. Quote ROUT ('ROUT') values for output resistors in ngspice_logic gates
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2022-07-28 00:36:09 +02:00 |
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nor_ngspice.sym
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add adc sigma delta example
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2022-02-16 02:29:55 +01:00 |
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opamp_65nm.sch
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fix a bug in my_mstrcat if an empty string is appended; add resolved_net(n) function that returns the top-most hierarchy name of the net mapping to upper level port connections if any; add xschem resolved_net comand that returns the resolved_net of selected wire/label/pin; add @#n:resolved_net pattern in symbol texts that uses resolved_net
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2023-05-27 11:20:49 +02:00 |
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opamp_65nm.sym
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add adc sigma delta example
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2022-02-16 02:29:55 +01:00 |
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or_ngspice.sch
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recognize \r\n sequences on windows rawfiles in "Binary:" lines, just in case ngspice developers want to add it someday. Quote ROUT ('ROUT') values for output resistors in ngspice_logic gates
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2022-07-28 00:36:09 +02:00 |
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or_ngspice.sym
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fixed is_symgen() regex, added stup for tutorial_symbol_generators.html
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2023-04-22 11:29:44 +02:00 |
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passgate.sym
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Joanne fixes for potential crash in align_sch_pins_with_sym() if there is a sym/sch pin number mismatch. Moved box declaration to beginning of scope block for C89 compatibility
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2021-03-07 00:15:16 +01:00 |
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pmos4-v.sym
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populating xschem git repo
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2020-08-08 15:47:34 +02:00 |
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pv_ngspice.sch
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improve solar panel example circuit
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2023-02-11 11:36:08 +01:00 |
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pv_ngspice.sym
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added commented lines for antialiasing; JL:cairo_set_line_width should only be called with has_x as xctx->cairo_ctx and xctx->cairo_save_ctx is NULL when run with -x; JL:XCopyArea must be called to draw correctly with Cairo on Windows
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2022-12-02 16:43:01 +01:00 |
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solar_panel.sch
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reverted solar_panel.sch (was changed for testing)
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2023-06-07 03:44:42 +02:00 |
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solar_panel.sym
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changed @schname to @schname_ext and added @schname that expands to the schematic name containing the instance, with no extension (no .sch)
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2022-08-10 08:38:49 +02:00 |
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solar_panel_xyce.sch
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graphs in solar_panel_xyce.sch
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2022-09-13 01:08:42 +02:00 |
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stimuli.autozero_comp
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populating xschem git repo
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2020-08-08 15:47:34 +02:00 |
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stimuli.autozero_comp_xyce
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populating xschem git repo
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2020-08-08 15:47:34 +02:00 |
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xnor_ngspice.sch
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recognize \r\n sequences on windows rawfiles in "Binary:" lines, just in case ngspice developers want to add it someday. Quote ROUT ('ROUT') values for output resistors in ngspice_logic gates
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2022-07-28 00:36:09 +02:00 |
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xnor_ngspice.sym
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add adc sigma delta example
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2022-02-16 02:29:55 +01:00 |
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xor_ngspice.sch
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recognize \r\n sequences on windows rawfiles in "Binary:" lines, just in case ngspice developers want to add it someday. Quote ROUT ('ROUT') values for output resistors in ngspice_logic gates
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2022-07-28 00:36:09 +02:00 |
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xor_ngspice.sym
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add adc sigma delta example
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2022-02-16 02:29:55 +01:00 |
e63818f980