add adc sigma delta example
This commit is contained in:
Stefan Frederik
parent
f4ff14fbd8
commit
71bc59bc91
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v {xschem version=3.0.0 file_version=1.2 }
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G {}
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K {}
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V {}
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S {}
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E {}
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P 4 5 670 -580 1650 -580 1650 -190 670 -190 670 -580 {dash=5}
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P 5 5 10 -770 940 -770 940 -330 10 -330 10 -770 { dash=5}
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T {Modulator} 500 -810 0 0 0.6 0.6 { layer=5}
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T {Digital Decimator} 1000 -620 0 0 0.6 0.6 {layer=4}
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T {D} 160 -630 0 0 1 1 { layer=5 font=Symbol}
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T {S} 350 -750 0 0 1 1 { layer=5 font=Symbol}
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T {D-S} 430 -805 0 0 0.6 0.6 { layer=5 font=Symbol}
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N 890 -510 910 -510 {lab=Q}
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N 910 -510 910 -350 {lab=Q}
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N 1610 -530 1670 -530 { lab=CODE[5:0]}
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N 1300 -530 1490 -530 { lab=COUNT[5:0]}
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N 1150 -270 1150 -250 { lab=#net1}
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N 1150 -330 1150 -310 { lab=#net2}
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N 1420 -510 1490 -510 { lab=RSTI}
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N 1350 -310 1390 -310 { lab=#net3}
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N 1510 -370 1510 -330 { lab=RSTI}
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N 1420 -370 1510 -370 { lab=RSTI}
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N 1420 -510 1420 -370 { lab=RSTI}
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N 610 -290 760 -290 { lab=CK}
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N 610 -250 760 -250 { lab=RST}
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N 640 -510 770 -510 { lab=COMP}
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N 180 -350 910 -350 { lab=Q}
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N 1050 -510 1140 -510 { lab=QN}
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N 910 -510 970 -510 { lab=Q}
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N 500 -540 520 -540 { lab=INTEG}
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N 500 -540 500 -500 { lab=INTEG}
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N 280 -470 290 -470 { lab=VREF}
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N 180 -530 290 -530 {lab=FB}
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N 430 -500 500 -500 { lab=INTEG}
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N 400 -670 430 -670 { lab=INTEG}
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N 430 -670 430 -500 { lab=INTEG}
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N 290 -670 340 -670 { lab=FB}
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N 90 -530 110 -530 { lab=SIG_IN}
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N 290 -670 290 -530 { lab=FB}
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N 180 -530 180 -480 { lab=FB}
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N 180 -420 180 -350 { lab=Q}
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N 410 -500 430 -500 { lab=INTEG}
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N 170 -530 180 -530 {lab=FB}
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N 1040 -370 1420 -370 { lab=RSTI}
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N 1040 -400 1040 -370 { lab=RSTI}
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N 1140 -490 1140 -420 { lab=#net4}
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C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
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C {lab_pin.sym} 770 -490 0 0 {name=p4 lab=CK}
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C {lab_wire.sym} 740 -510 0 0 {name=l4 lab=COMP}
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C {lab_pin.sym} 910 -430 0 1 {name=p8 lab=Q}
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C {flip_flop_ngspice.sym} 830 -490 0 0 {name=x1}
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C {lab_pin.sym} 770 -470 0 0 {name=p3 lab=0}
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C {counter_6bit_ngspice.sym} 1220 -510 0 0 {name=x2}
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C {lab_pin.sym} 1140 -530 0 0 {name=p5 lab=CK}
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C {lab_pin.sym} 1040 -440 0 0 {name=p12 lab=RST}
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C {flip_flop_ngspice.sym} 1550 -510 0 0 {name=x4[5:0]}
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C {opin.sym} 1670 -530 0 0 {name=p20 lab=CODE[5:0]}
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C {lab_wire.sym} 1320 -530 0 1 {name=l10 lab=COUNT[5:0]}
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C {counter_6bit_ngspice.sym} 840 -270 0 0 {name=x4}
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C {ipin.sym} 610 -290 0 0 {name=p10 lab=CK}
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C {ipin.sym} 610 -250 0 0 {name=p11 lab=RST}
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C {lab_pin.sym} 760 -270 0 0 {name=p14 lab=VCC}
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C {lab_pin.sym} 920 -290 0 1 {name=p24 lab=C[5:0]}
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C {and3_ngspice.sym} 1090 -330 0 0 {name=x5 ROUT=1000}
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C {lab_pin.sym} 1050 -350 0 0 {name=p25 lab=C[5]}
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C {lab_pin.sym} 1050 -330 0 0 {name=p26 lab=C[4]}
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C {lab_pin.sym} 1050 -310 0 0 {name=p27 lab=C[3]}
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C {lab_pin.sym} 1050 -250 0 0 {name=p28 lab=C[1]}
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C {lab_pin.sym} 1050 -230 0 0 {name=p29 lab=C[0]}
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C {and3_ngspice.sym} 1090 -250 0 0 {name=x6 ROUT=1000}
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C {lab_pin.sym} 1050 -270 0 0 {name=p30 lab=C[2]}
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C {and_ngspice.sym} 1190 -290 0 0 {name=x7 ROUT=1000}
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C {or_ngspice.sym} 1290 -310 0 0 {name=x8 ROUT=1000}
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C {lab_pin.sym} 1250 -330 0 0 {name=p31 lab=RST}
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C {lab_pin.sym} 1510 -330 0 1 {name=p15 lab=RSTI}
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C {flip_flop_ngspice.sym} 1450 -310 0 0 {name=x9}
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C {lab_pin.sym} 1390 -290 0 0 {name=p32 lab=RST}
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C {lab_pin.sym} 1390 -330 0 0 {name=p35 lab=VCC}
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C {lab_pin.sym} 1490 -490 0 0 {name=p1 lab=RST}
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C {spice_probe.sym} 810 -350 0 0 {name=p6 attrs=""}
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C {spice_probe.sym} 680 -510 0 0 {name=p17 attrs=""}
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C {spice_probe.sym} 1510 -370 0 0 {name=p18 attrs=""}
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C {inv_ngspice.sym} 1010 -510 0 0 {name=x11 ROUT=1000}
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C {lab_wire.sym} 1100 -510 0 0 {name=l2 lab=QN}
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C {spice_probe.sym} 1060 -510 0 0 {name=p19 attrs=""}
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C {ipin.sym} 280 -470 0 0 {name=p242 lab=VREF}
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C {lab_pin.sym} 500 -520 0 0 {name=p244 lab=INTEG}
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C {ipin.sym} 90 -530 0 0 {name=p260 lab=SIG_IN}
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C {capa.sym} 370 -670 1 0 {name=c10 m=1 value="2e-12"}
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C {res.sym} 140 -530 1 0 {name=R4
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value=60k
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footprint=1206
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device=resistor
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m=1}
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C {lab_pin.sym} 520 -480 0 0 {name=p261 lab=VREF}
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C {res.sym} 180 -450 0 0 {name=R5
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value=60k
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footprint=1206
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device=resistor
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m=1}
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C {lab_pin.sym} 290 -560 0 0 {name=p262 lab=FB}
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C {spice_probe.sym} 430 -600 0 0 {name=p264 attrs=""}
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C {spice_probe.sym} 190 -530 0 0 {name=p265 attrs=""}
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C {opamp_65nm.sym} 350 -500 2 1 {name=x41}
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C {comp_65nm.sym} 580 -510 0 0 {name=x42}
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C {spice_probe.sym} 1440 -530 0 0 {name=p2 attrs=""}
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C {or_ngspice.sym} 1080 -420 0 0 {name=x3 ROUT=1000}
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@ -0,0 +1,31 @@
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v {xschem version=2.9.9 file_version=1.2 }
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G {}
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K {type=subcircuit
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format="@name @pinlist @symname"
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template="name=x1"
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}
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V {}
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S {}
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E {}
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L 4 -60 -40 60 -40 {}
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L 4 -60 40 60 40 {}
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L 4 -60 -40 -60 40 {}
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L 4 60 -40 60 40 {}
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L 4 60 -30 80 -30 {}
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L 4 -80 -30 -60 -30 {}
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L 4 -80 -10 -60 -10 {}
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L 4 -80 10 -60 10 {}
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L 4 -80 30 -60 30 {}
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B 5 77.5 -32.5 82.5 -27.5 {name=CODE[5:0] dir=out }
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B 5 -82.5 -32.5 -77.5 -27.5 {name=SIG_IN dir=in }
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B 5 -82.5 -12.5 -77.5 -7.5 {name=VREF dir=in }
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B 5 -82.5 7.5 -77.5 12.5 {name=CK dir=in }
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B 5 -82.5 27.5 -77.5 32.5 {name=RST dir=in }
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T {@symname} -60.25 -53.5 0 0 0.2 0.2 {}
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T {@name} 65 -52 0 0 0.2 0.2 {}
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T {CODE[5:0]} 55 -34 0 1 0.2 0.2 {}
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T {SIG_IN} -55 -34 0 0 0.2 0.2 {}
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T {VREF} -55 -14 0 0 0.2 0.2 {}
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T {CK} -55 6 0 0 0.2 0.2 {}
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T {RST} -55 26 0 0 0.2 0.2 {}
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T {@symname} -10.25 1.5 0 0 0.2 0.2 {}
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@ -0,0 +1,42 @@
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v {xschem version=2.9.9 file_version=1.2 }
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G {}
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K {}
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V {}
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S {}
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E {}
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N 480 -400 480 -360 { lab=#net1}
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N 480 -400 550 -400 { lab=#net1}
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N 480 -300 480 -250 { lab=0}
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N 610 -400 680 -400 { lab=Y1}
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N 310 -400 350 -400 { lab=A1}
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N 310 -460 350 -460 { lab=B1}
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N 310 -520 350 -520 { lab=C1}
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C {ipin.sym} 80 -230 0 0 {name=p1 lab=A}
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C {opin.sym} 330 -170 0 0 {name=p4 lab=Y}
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C {bsource.sym} 480 -330 0 1 {name=B1 VAR=V FUNC="'VCC/2*(1+tanh((min(V(C1),min(V(A1),V(B1)))-VCC/2)*100))'"
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}
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C {lab_pin.sym} 310 -400 0 0 {name=l2 sig_type=std_logic lab=A1}
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C {lab_pin.sym} 480 -250 0 0 {name=l3 sig_type=std_logic lab=0}
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C {res.sym} 580 -400 1 0 {name=R1
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value=ROUT
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footprint=1206
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device=resistor
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m=1}
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C {lab_pin.sym} 680 -400 0 1 {name=l5 sig_type=std_logic lab=Y1}
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C {lab_pin.sym} 140 -230 0 1 {name=l6 sig_type=std_logic lab=A1}
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C {lab_pin.sym} 270 -170 0 0 {name=l7 sig_type=std_logic lab=Y1}
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C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
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C {ipin.sym} 80 -170 0 0 {name=p2 lab=B}
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C {lab_pin.sym} 140 -170 0 1 {name=l4 sig_type=std_logic lab=B1}
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C {lab_pin.sym} 310 -460 0 0 {name=l8 sig_type=std_logic lab=B1}
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C {parax_cap.sym} 350 -390 0 0 {name=C1 gnd=0 value=8f m=1}
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C {parax_cap.sym} 350 -450 0 0 {name=C2 gnd=0 value=8f m=1}
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C {parax_cap.sym} 630 -390 0 0 {name=C3 gnd=0 value=8f m=1}
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C {ipin.sym} 80 -110 0 0 {name=p3 lab=C}
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C {lab_pin.sym} 140 -110 0 1 {name=l9 sig_type=std_logic lab=C1}
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C {lab_pin.sym} 310 -520 0 0 {name=l10 sig_type=std_logic lab=C1}
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C {parax_cap.sym} 350 -510 0 0 {name=C4 gnd=0 value=8f m=1}
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C {vsource.sym} 110 -230 1 0 {name=V1 value=0}
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C {vsource.sym} 110 -170 1 0 {name=V2 value=0}
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C {vsource.sym} 110 -110 1 0 {name=V3 value=0}
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C {vsource.sym} 300 -170 1 0 {name=V4 value=0}
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@ -0,0 +1,21 @@
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v {xschem version=2.9.9 file_version=1.2 }
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G {}
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K {type=subcircuit
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format="@name @pinlist @symname ROUT=@ROUT"
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template="name=x1 ROUT=1000"}
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V {}
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S {}
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E {}
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L 4 -40 -20 -20 -20 {}
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L 4 35 0 60 0 {}
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L 4 -20 -30 -20 30 {}
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L 4 -20 -30 5 -30 {}
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L 4 -20 30 5 30 {}
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L 4 -40 0 -20 0 {}
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L 4 -40 20 -20 20 {}
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B 5 57.5 -2.5 62.5 2.5 {name=Y dir=out verilog_type=wire}
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B 5 -42.5 -22.5 -37.5 -17.5 {name=A dir=in}
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B 5 -42.5 -2.5 -37.5 2.5 {name=B dir=in}
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B 5 -42.5 17.5 -37.5 22.5 {name=C dir=in}
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A 4 5 0 30 270 180 {}
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T {@name} -16.25 -5 0 0 0.2 0.2 {}
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@ -0,0 +1,36 @@
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v {xschem version=2.9.9 file_version=1.2 }
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G {}
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K {}
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V {}
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S {}
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E {}
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N 480 -400 480 -360 { lab=#net1}
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N 480 -400 550 -400 { lab=#net1}
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N 480 -300 480 -250 { lab=0}
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N 610 -400 680 -400 { lab=Y1}
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N 330 -400 370 -400 { lab=A1}
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N 330 -460 370 -460 { lab=B1}
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C {ipin.sym} 80 -170 0 0 {name=p1 lab=A}
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C {opin.sym} 330 -170 0 0 {name=p4 lab=Y}
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C {bsource.sym} 480 -330 0 1 {name=B1 VAR=V FUNC="'VCC/2*(1+tanh((min(V(A1),V(B1))-VCC/2)*100))'"
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}
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C {lab_pin.sym} 330 -400 0 0 {name=l2 sig_type=std_logic lab=A1}
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C {lab_pin.sym} 480 -250 0 0 {name=l3 sig_type=std_logic lab=0}
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C {res.sym} 580 -400 1 0 {name=R1
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value=ROUT
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footprint=1206
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device=resistor
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m=1}
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C {lab_pin.sym} 680 -400 0 1 {name=l5 sig_type=std_logic lab=Y1}
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C {lab_pin.sym} 140 -170 0 1 {name=l6 sig_type=std_logic lab=A1}
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C {lab_pin.sym} 270 -170 0 0 {name=l7 sig_type=std_logic lab=Y1}
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C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
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C {ipin.sym} 80 -110 0 0 {name=p2 lab=B}
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C {lab_pin.sym} 140 -110 0 1 {name=l4 sig_type=std_logic lab=B1}
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C {lab_pin.sym} 330 -460 0 0 {name=l8 sig_type=std_logic lab=B1}
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C {parax_cap.sym} 370 -390 0 0 {name=C1 gnd=0 value=8f m=1}
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C {parax_cap.sym} 370 -450 0 0 {name=C2 gnd=0 value=8f m=1}
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C {parax_cap.sym} 630 -390 0 0 {name=C3 gnd=0 value=8f m=1}
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C {vsource.sym} 110 -170 1 0 {name=V1 value=0}
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C {vsource.sym} 110 -110 1 0 {name=V2 value=0}
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C {vsource.sym} 300 -170 1 0 {name=V3 value=0}
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@ -0,0 +1,19 @@
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v {xschem version=2.9.9 file_version=1.2 }
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G {}
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K {type=subcircuit
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format="@name @pinlist @symname ROUT=@ROUT"
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template="name=x1 ROUT=1000"}
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V {}
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S {}
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E {}
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L 4 -40 -20 -20 -20 {}
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L 4 35 0 60 0 {}
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L 4 -20 -30 -20 30 {}
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L 4 -20 -30 5 -30 {}
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L 4 -20 30 5 30 {}
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L 4 -40 20 -20 20 {}
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B 5 57.5 -2.5 62.5 2.5 {name=Y dir=out verilog_type=wire}
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B 5 -42.5 -22.5 -37.5 -17.5 {name=A dir=in}
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B 5 -42.5 17.5 -37.5 22.5 {name=B dir=in}
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A 4 5 0 30 270 180 {}
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T {@name} -16.25 -5 0 0 0.2 0.2 {}
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@ -0,0 +1,30 @@
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v {xschem version=2.9.9 file_version=1.2 }
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G {}
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K {}
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V {}
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S {}
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E {}
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N 470 -470 470 -430 { lab=#net1}
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N 470 -470 540 -470 { lab=#net1}
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N 470 -370 470 -320 { lab=0}
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N 600 -470 670 -470 { lab=Y1}
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N 320 -470 360 -470 { lab=A1}
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C {ipin.sym} 70 -240 0 0 {name=p1 lab=A}
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C {opin.sym} 320 -240 0 0 {name=p4 lab=Y}
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C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
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C {bsource.sym} 470 -400 0 1 {name=B1 VAR=V FUNC="'VCC/2*(1+tanh((V(A1)-VCC/2)*100))'"
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}
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C {lab_pin.sym} 320 -470 0 0 {name=l2 sig_type=std_logic lab=A1}
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C {lab_pin.sym} 470 -320 0 0 {name=l3 sig_type=std_logic lab=0}
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C {res.sym} 570 -470 1 0 {name=R1
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value=ROUT
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footprint=1206
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device=resistor
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m=1}
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C {lab_pin.sym} 670 -470 0 1 {name=l5 sig_type=std_logic lab=Y1}
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C {lab_pin.sym} 130 -240 0 1 {name=l6 sig_type=std_logic lab=A1}
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C {lab_pin.sym} 260 -240 0 0 {name=l7 sig_type=std_logic lab=Y1}
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C {parax_cap.sym} 620 -460 0 0 {name=C3 gnd=0 value=8f m=1}
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C {parax_cap.sym} 360 -460 0 0 {name=C1 gnd=0 value=4f m=1}
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C {vsource.sym} 290 -240 1 0 {name=V1 value=0}
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C {vsource.sym} 100 -240 1 0 {name=V2 value=0}
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@ -0,0 +1,21 @@
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v {xschem version=2.9.9 file_version=1.2 }
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G {}
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K {type=subcircuit
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format="@name @pinlist @symname ROUT=@ROUT"
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template="name=x1 ROUT=1000"
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}
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V {}
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S {}
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E {}
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L 4 20 0 40 0 {}
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L 4 -40 0 -20 0 {}
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L 4 -20 -20 20 0 {}
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L 4 -20 -20 -20 20 {}
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L 4 -20 20 20 0 {}
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B 5 37.5 -2.5 42.5 2.5 {name=Y dir=out }
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B 5 -42.5 -2.5 -37.5 2.5 {name=A dir=in }
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T {@symname} -47.5 34 0 0 0.3 0.3 {}
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T {@name} 25 -22 0 0 0.2 0.2 {}
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T {Y} 7.5 -6.5 0 1 0.2 0.2 {}
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T {A} -17.5 -6.5 0 0 0.2 0.2 {}
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T {ROUT=@ROUT} -25 -42 0 0 0.2 0.2 {}
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@ -0,0 +1,109 @@
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v {xschem version=2.9.9 file_version=1.2 }
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G {}
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K {}
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V {}
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S {}
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E {}
|
||||
N 590 -150 590 -130 { lab=0}
|
||||
N 370 -180 550 -180 { lab=GN1}
|
||||
N 330 -230 330 -210 { lab=GN1}
|
||||
N 330 -310 330 -290 { lab=VCC}
|
||||
N 330 -150 330 -130 { lab=0}
|
||||
N 510 -240 670 -240 { lab=#net1}
|
||||
N 590 -240 590 -210 { lab=#net1}
|
||||
N 510 -340 510 -300 { lab=#net2}
|
||||
N 670 -340 670 -300 { lab=#net3}
|
||||
N 550 -410 550 -380 { lab=#net2}
|
||||
N 510 -380 550 -380 { lab=#net2}
|
||||
N 510 -380 510 -340 { lab=#net2}
|
||||
N 510 -460 510 -440 { lab=VCC}
|
||||
N 800 -460 800 -400 { lab=VCC}
|
||||
N 670 -370 760 -370 { lab=#net3}
|
||||
N 330 -210 370 -210 { lab=GN1}
|
||||
N 370 -210 370 -180 { lab=GN1}
|
||||
N 670 -460 670 -440 { lab=VCC}
|
||||
N 550 -410 640 -410 { lab=#net2}
|
||||
N 800 -150 800 -130 { lab=0}
|
||||
N 800 -340 800 -210 { lab=#net4}
|
||||
N 550 -180 550 -170 { lab=GN1}
|
||||
N 550 -170 660 -170 { lab=GN1}
|
||||
N 660 -180 660 -170 { lab=GN1}
|
||||
N 660 -180 760 -180 { lab=GN1}
|
||||
N 670 -380 670 -340 { lab=#net3}
|
||||
N 1130 -290 1170 -290 { lab=OUT}
|
||||
N 800 -290 870 -290 { lab=#net4}
|
||||
N 980 -150 980 -130 { lab=0}
|
||||
N 980 -420 980 -400 { lab=VCC}
|
||||
N 940 -370 940 -180 { lab=#net4}
|
||||
N 980 -340 980 -210 { lab=#net5}
|
||||
N 870 -290 940 -290 { lab=#net4}
|
||||
N 1130 -150 1130 -130 { lab=0}
|
||||
N 1130 -420 1130 -400 { lab=VCC}
|
||||
N 1090 -370 1090 -180 { lab=#net5}
|
||||
N 1130 -340 1130 -210 { lab=OUT}
|
||||
N 980 -290 1090 -290 { lab=#net5}
|
||||
N 990 -620 990 -510 { lab=#net5}
|
||||
N 930 -620 930 -510 { lab=#net4}
|
||||
N 890 -560 930 -560 { lab=#net4}
|
||||
N 890 -560 890 -290 { lab=#net4}
|
||||
N 990 -560 1010 -560 { lab=#net5}
|
||||
N 1010 -560 1030 -560 { lab=#net5}
|
||||
N 1030 -560 1030 -290 { lab=#net5}
|
||||
N 960 -660 990 -660 { lab=#net5}
|
||||
N 990 -660 990 -620 { lab=#net5}
|
||||
N 930 -510 930 -470 { lab=#net4}
|
||||
N 930 -470 960 -470 { lab=#net4}
|
||||
C {nmos4.sym} 570 -180 0 0 {name=M1 model=nmos w=4u l=0.4u m=1}
|
||||
C {lab_pin.sym} 590 -180 0 1 {name=p2 lab=0}
|
||||
C {lab_pin.sym} 590 -130 0 0 {name=p6 lab=0}
|
||||
C {nmos4.sym} 350 -180 0 1 {name=M2 model=nmos w=4u l=0.4u m=1}
|
||||
C {lab_pin.sym} 330 -180 0 0 {name=p7 lab=0}
|
||||
C {isource.sym} 330 -260 0 0 {name=I0 value=30u}
|
||||
C {lab_pin.sym} 330 -310 0 0 {name=p9 lab=VCC}
|
||||
C {lab_pin.sym} 330 -130 0 0 {name=p16 lab=0}
|
||||
C {nmos4.sym} 490 -270 0 0 {name=M3 model=nmos w=1.5u l=0.2u m=1}
|
||||
C {lab_pin.sym} 510 -270 0 1 {name=p17 lab=0}
|
||||
C {nmos4.sym} 690 -270 0 1 {name=M4 model=nmos w=1.5u l=0.2u m=1}
|
||||
C {lab_pin.sym} 670 -270 0 0 {name=p18 lab=0 l=0.2u}
|
||||
C {pmos4.sym} 530 -410 0 1 {name=M5 model=pmos w=6u l=0.3u m=1}
|
||||
C {lab_pin.sym} 510 -460 0 0 {name=p19 lab=VCC}
|
||||
C {pmos4.sym} 650 -410 0 0 {name=M6 model=pmos w=6u l=0.3u m=1}
|
||||
C {lab_pin.sym} 670 -460 0 0 {name=p21 lab=VCC}
|
||||
C {lab_pin.sym} 510 -410 0 0 {name=p23 lab=VCC}
|
||||
C {lab_pin.sym} 670 -410 0 1 {name=p33 lab=VCC}
|
||||
C {lab_wire.sym} 500 -180 0 0 {name=l2 lab=GN1}
|
||||
C {ipin.sym} 100 -310 0 0 {name=p161 lab=PLUS}
|
||||
C {ipin.sym} 100 -260 0 0 {name=p1 lab=MINUS}
|
||||
C {opin.sym} 180 -290 0 0 {name=p20 lab=OUT}
|
||||
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
|
||||
C {lab_pin.sym} 710 -270 0 1 {name=p3 lab=PLUS}
|
||||
C {lab_pin.sym} 470 -270 0 0 {name=p4 lab=MINUS}
|
||||
C {lab_pin.sym} 1170 -290 0 1 {name=p14 lab=OUT}
|
||||
C {pmos4.sym} 780 -370 0 0 {name=M14 model=pmos w=6u l=0.3u m=1}
|
||||
C {lab_pin.sym} 800 -370 0 1 {name=p15 lab=VCC}
|
||||
C {lab_pin.sym} 800 -460 0 0 {name=p22 lab=VCC}
|
||||
C {spice_probe.sym} 420 -180 0 0 {name=p27 attrs=""}
|
||||
C {spice_probe.sym} 570 -410 0 0 {name=p28 attrs=""}
|
||||
C {nmos4.sym} 780 -180 0 0 {name=M7 model=nmos w=4u l=0.4u m=1}
|
||||
C {lab_pin.sym} 800 -180 0 1 {name=p5 lab=0}
|
||||
C {lab_pin.sym} 800 -130 0 1 {name=p8 lab=0}
|
||||
C {nmos4.sym} 960 -180 0 0 {name=M8 model=nmos w=1u l=0.4u m=1}
|
||||
C {lab_pin.sym} 980 -180 0 1 {name=p10 lab=0}
|
||||
C {lab_pin.sym} 980 -130 0 1 {name=p11 lab=0}
|
||||
C {pmos4.sym} 960 -370 0 0 {name=M9 model=pmos w=2u l=0.4u m=1}
|
||||
C {lab_pin.sym} 980 -370 0 1 {name=p12 lab=VCC}
|
||||
C {lab_pin.sym} 980 -420 0 0 {name=p13 lab=VCC}
|
||||
C {nmos4.sym} 1110 -180 0 0 {name=M10 model=nmos w=1u l=0.4u m=1}
|
||||
C {lab_pin.sym} 1130 -180 0 1 {name=p24 lab=0}
|
||||
C {lab_pin.sym} 1130 -130 0 1 {name=p25 lab=0}
|
||||
C {pmos4.sym} 1110 -370 0 0 {name=M11 model=pmos w=2u l=0.4u m=1}
|
||||
C {lab_pin.sym} 1130 -370 0 1 {name=p26 lab=VCC}
|
||||
C {lab_pin.sym} 1130 -420 0 0 {name=p29 lab=VCC}
|
||||
C {nmos4.sym} 960 -490 3 0 {name=M13 model=nmos w=2u l=0.1u m=1}
|
||||
C {lab_pin.sym} 960 -510 3 1 {name=p31 lab=0}
|
||||
C {spice_probe.sym} 1040 -290 0 0 {name=p35 attrs=""}
|
||||
C {spice_probe.sym} 840 -290 0 0 {name=p36 attrs=""}
|
||||
C {nmos4.sym} 960 -640 1 0 {name=M12 model=nmos w=2u l=0.1u m=1}
|
||||
C {lab_pin.sym} 960 -620 1 1 {name=p30 lab=0}
|
||||
C {spice_probe.sym} 560 -240 0 0 {name=p32 attrs=""}
|
||||
C {parax_cap.sym} 390 -170 0 0 {name=C2 gnd=0 value=200f m=1}
|
||||
|
|
@ -0,0 +1,23 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {type=subcircuit
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -40 -50 -40 50 {}
|
||||
L 4 40 0 60 0 {}
|
||||
L 4 -60 30 -40 30 {}
|
||||
L 4 -40 -50 40 0 {}
|
||||
L 4 -40 50 40 0 {}
|
||||
L 4 -60 -30 -40 -30 {}
|
||||
B 5 -62.5 -32.5 -57.5 -27.5 {name=PLUS dir=in }
|
||||
B 5 57.5 -2.5 62.5 2.5 {name=OUT dir=out }
|
||||
B 5 -62.5 27.5 -57.5 32.5 {name=MINUS dir=in }
|
||||
T {@symname} -32 44 0 0 0.3 0.3 {}
|
||||
T {@name} -10 -48.25 0 0 0.2 0.2 {}
|
||||
T {PLUS} -38.75 -30.25 0 0 0.2 0.2 {}
|
||||
T {OUT} 28.75 -5.25 0 1 0.2 0.2 {}
|
||||
T {MINUS} -38.75 18.5 0 0 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 420 -320 640 -320 { lab=S[5:0]}
|
||||
N 760 -320 810 -320 { lab=COUNT[5:0]}
|
||||
N 800 -350 800 -320 { lab=COUNT[5:0]}
|
||||
N 280 -350 800 -350 { lab=COUNT[5:0]}
|
||||
N 280 -350 280 -320 { lab=COUNT[5:0]}
|
||||
N 420 -300 460 -300 { lab=COUT[5:0]}
|
||||
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
|
||||
C {lab_wire.sym} 520 -320 0 1 {name=l42 lab=S[5:0]}
|
||||
C {lab_pin.sym} 460 -300 0 1 {name=p43 lab=COUT[5:0]}
|
||||
C {flip_flop_ngspice.sym} 700 -300 0 0 {name=x2[5:0]}
|
||||
C {lab_pin.sym} 810 -320 0 1 {name=p11 lab=COUNT[5:0]}
|
||||
C {lab_pin.sym} 640 -300 0 0 {name=p13 lab=CK}
|
||||
C {lab_pin.sym} 640 -280 0 0 {name=p14 lab=RST}
|
||||
C {half_adder_ngspice.sym} 350 -310 0 0 {name=x1[5:0]}
|
||||
C {lab_pin.sym} 280 -300 0 0 {name=p5 lab=COUT[4:0],D}
|
||||
C {ipin.sym} 120 -120 0 0 { name=p1 lab=RST }
|
||||
C {ipin.sym} 120 -140 0 0 { name=p2 lab=D}
|
||||
C {opin.sym} 220 -160 0 0 { name=p4 lab=COUNT[5:0] }
|
||||
C {ipin.sym} 120 -160 0 0 { name=p6 lab=CK }
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {type=subcircuit
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -60 -30 60 -30 {}
|
||||
L 4 -60 30 60 30 {}
|
||||
L 4 -60 -30 -60 30 {}
|
||||
L 4 60 -30 60 30 {}
|
||||
L 4 -80 -20 -60 -20 {}
|
||||
L 4 60 -20 80 -20 {}
|
||||
L 4 -80 0 -60 0 {}
|
||||
L 4 -80 20 -60 20 {}
|
||||
B 5 -82.5 -22.5 -77.5 -17.5 {name=CK dir=in }
|
||||
B 5 77.5 -22.5 82.5 -17.5 {name=COUNT[5:0] dir=out }
|
||||
B 5 -82.5 -2.5 -77.5 2.5 {name=D dir=in }
|
||||
B 5 -82.5 17.5 -77.5 22.5 {name=RST dir=in }
|
||||
T {@symname} -78 34 0 0 0.3 0.3 {}
|
||||
T {@name} 65 -42 0 0 0.2 0.2 {}
|
||||
T {CK} -55 -24 0 0 0.2 0.2 {}
|
||||
T {COUNT[5:0]} 55 -24 0 1 0.2 0.2 {}
|
||||
T {D} -55 -4 0 0 0.2 0.2 {}
|
||||
T {RST} -55 16 0 0 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,261 @@
|
|||
v {xschem version=3.0.0 file_version=1.2 }
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
B 2 900 -620 1700 -330 {flags=graph
|
||||
y1=0.294023
|
||||
y2=1.25402
|
||||
ypos1=0
|
||||
ypos2=2
|
||||
divy=5
|
||||
subdivy=1
|
||||
unity=1
|
||||
x1=-8.91647e-08
|
||||
x2=8.98315e-06
|
||||
divx=5
|
||||
subdivx=1
|
||||
node="sig_in
|
||||
vref
|
||||
vcc"
|
||||
color="8 9 11"
|
||||
dataset=0
|
||||
unitx=u
|
||||
}
|
||||
B 2 900 -330 1700 -130 {flags=graph
|
||||
y1=0
|
||||
y2=1.2
|
||||
ypos1=0.0499032
|
||||
ypos2=0.633885
|
||||
divy=5
|
||||
subdivy=1
|
||||
unity=1
|
||||
x1=-8.91647e-08
|
||||
x2=8.98315e-06
|
||||
divx=5
|
||||
subdivx=1
|
||||
node="CODE,code[5],code[4],code[3],code[2],code[1],code[0]
|
||||
ck
|
||||
rst
|
||||
x1.comp"
|
||||
color="7 4 10 4"
|
||||
dataset=0
|
||||
unitx=u
|
||||
digital=1}
|
||||
B 2 900 -890 1700 -630 {flags=graph
|
||||
y1=17
|
||||
y2=51
|
||||
ypos1=0
|
||||
ypos2=2
|
||||
divy=5
|
||||
subdivy=1
|
||||
unity=1
|
||||
x1=-8.91647e-08
|
||||
x2=8.98315e-06
|
||||
divx=5
|
||||
subdivx=1
|
||||
node="\\"sig_in 1.2 / 63 *\\""
|
||||
color=8
|
||||
dataset=0
|
||||
unitx=u
|
||||
}
|
||||
T {Value of this signal
|
||||
is equal to adc conversion
|
||||
CODE[5:0]} 602.5 -792.5 0 0 0.4 0.4 {layer=8}
|
||||
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
|
||||
C {lab_pin.sym} 270 -580 0 0 {name=p33 lab=VREF}
|
||||
C {vsource.sym} 270 -550 0 0 {name=v2 value="'VCC/2'"}
|
||||
C {lab_pin.sym} 270 -520 0 0 {name=p34 lab=0}
|
||||
C {code_shown.sym} 10 -310 0 0 {name=CONTROL
|
||||
tclcommand="xschem edit_vi_prop"
|
||||
place=end
|
||||
value=".model switch sw vt='VCC/2' vh=0.2 ron=1000 roff=1G
|
||||
.param VCC=1.2
|
||||
.option method=GEAR
|
||||
.measure tran avg1 AVG v(x1.qn) from=1u to=3u
|
||||
.measure tran avg2 AVG v(x1.qn) from=4u to=6u
|
||||
.measure tran avg3 AVG v(x1.qn) from=7u to=9u
|
||||
.control
|
||||
* save all
|
||||
tran 0.6n 9u uic
|
||||
write delta_sigma.raw
|
||||
.endc
|
||||
"}
|
||||
C {vsource.sym} 270 -450 0 1 {name=v3
|
||||
value="pwl
|
||||
+ 0.001u 0.34 3u 0.34
|
||||
+ 3.001u 0.88 6u 0.88
|
||||
+ 6.001u 0.97 9u 0.97"}
|
||||
C {lab_pin.sym} 270 -420 0 0 {name=p1 lab=0}
|
||||
C {lab_pin.sym} 270 -480 0 0 {name=p2 lab=SIG_IN}
|
||||
C {vsource.sym} 520 -460 0 0 {name=v1
|
||||
value="pulse 0 VCC 100n 100p 100p 9.9n 20n"
|
||||
xvalue="sin 0.2 1.8 1u 0"
|
||||
}
|
||||
C {lab_pin.sym} 520 -430 0 0 {name=p6 lab=0}
|
||||
C {lab_pin.sym} 520 -490 0 0 {name=p7 lab=CK}
|
||||
C {vsource.sym} 390 -550 0 0 {name=v5 value=VCC}
|
||||
C {lab_pin.sym} 390 -520 0 0 {name=p17 lab=0}
|
||||
C {lab_pin.sym} 390 -480 0 0 {name=p18 lab=VSS}
|
||||
C {vsource.sym} 390 -450 0 0 {name=v6 value=0}
|
||||
C {lab_pin.sym} 390 -420 0 0 {name=p19 lab=0}
|
||||
C {lab_pin.sym} 520 -590 0 0 {name=p55 lab=RST}
|
||||
C {vsource.sym} 520 -560 0 0 {name=v7 value="pwl 0 VCC
|
||||
+ 1u VCC 1.001u 0 3u 0 3.001u VCC
|
||||
+ 4u VCC 4.001u 0 6u 0 6.001u VCC
|
||||
+ 7u VCC 7.001u 0 9u 0 9.001u VCC"
|
||||
|
||||
}
|
||||
C {lab_pin.sym} 520 -530 0 0 {name=p56 lab=0}
|
||||
C {vdd.sym} 390 -580 0 0 {name=l2 lab=VCC}
|
||||
C {adc.sym} 620 -190 0 0 {name=x1}
|
||||
C {lab_pin.sym} 700 -220 0 1 {name=p38 lab=CODE[5:0]}
|
||||
C {lab_pin.sym} 540 -220 0 0 {name=p39 lab=SIG_IN}
|
||||
C {lab_pin.sym} 540 -200 0 0 {name=p40 lab=VREF}
|
||||
C {lab_pin.sym} 540 -180 0 0 {name=p41 lab=CK}
|
||||
C {lab_pin.sym} 540 -160 0 0 {name=p42 lab=RST}
|
||||
C {code.sym} 0 -580 0 0 {name=MODELS_65nm only_toplevel=false value="* Beta Version released on 2/22/06
|
||||
|
||||
* PTM 65nm NMOS
|
||||
|
||||
.model nmos nmos level = 54
|
||||
+version = 4.0 binunit = 1 paramchk= 1 mobmod = 0
|
||||
+capmod = 2 igcmod = 1 igbmod = 1 geomod = 1
|
||||
+diomod = 1 rdsmod = 0 rbodymod= 1 rgatemod= 1
|
||||
+permod = 1 acnqsmod= 0 trnqsmod= 0
|
||||
+tnom = 27 toxe = 1.85e-9 toxp = 1.2e-9 toxm = 1.85e-9
|
||||
+dtox = 0.65e-9 epsrox = 3.9 wint = 5e-009 lint = 5.25e-009
|
||||
+ll = 0 wl = 0 lln = 1 wln = 1
|
||||
+lw = 0 ww = 0 lwn = 1 wwn = 1
|
||||
+lwl = 0 wwl = 0 xpart = 0 toxref = 1.85e-9
|
||||
+xl = -30e-9
|
||||
+vth0 = 0.423 k1 = 0.4 k2 = 0.01 k3 = 0
|
||||
+k3b = 0 w0 = 2.5e-006 dvt0 = 1 dvt1 = 2
|
||||
+dvt2 = -0.032 dvt0w = 0 dvt1w = 0 dvt2w = 0
|
||||
+dsub = 0.1 minv = 0.05 voffl = 0 dvtp0 = 1.0e-009
|
||||
+dvtp1 = 0.1 lpe0 = 0 lpeb = 0 xj = 1.96e-008
|
||||
+ngate = 2e+020 ndep = 2.54e+018 nsd = 2e+020 phin = 0
|
||||
+cdsc = 0.000 cdscb = 0 cdscd = 0 cit = 0
|
||||
+voff = -0.13 nfactor = 1.9 eta0 = 0.0058 etab = 0
|
||||
+vfb = -0.55 u0 = 0.0491 ua = 6e-010 ub = 1.2e-018
|
||||
+uc = 0 vsat = 124340 a0 = 1.0 ags = 1e-020
|
||||
+a1 = 0 a2 = 1.0 b0 = 0 b1 = 0
|
||||
+keta = 0.04 dwg = 0 dwb = 0 pclm = 0.04
|
||||
+pdiblc1 = 0.001 pdiblc2 = 0.001 pdiblcb = -0.005 drout = 0.5
|
||||
+pvag = 1e-020 delta = 0.01 pscbe1 = 8.14e+008 pscbe2 = 1e-007
|
||||
+fprout = 0.2 pdits = 0.08 pditsd = 0.23 pditsl = 2.3e+006
|
||||
+rsh = 5 rdsw = 165 rsw = 85 rdw = 85
|
||||
+rdswmin = 0 rdwmin = 0 rswmin = 0 prwg = 0
|
||||
+prwb = 6.8e-011 wr = 1 alpha0 = 0.074 alpha1 = 0.005
|
||||
+beta0 = 30 agidl = 0.0002 bgidl = 2.1e+009 cgidl = 0.0002
|
||||
+egidl = 0.8
|
||||
+aigbacc = 0.012 bigbacc = 0.0028 cigbacc = 0.002
|
||||
+nigbacc = 1 aigbinv = 0.014 bigbinv = 0.004 cigbinv = 0.004
|
||||
+eigbinv = 1.1 nigbinv = 3 aigc = 0.012 bigc = 0.0028
|
||||
+cigc = 0.002 aigsd = 0.012 bigsd = 0.0028 cigsd = 0.002
|
||||
+nigc = 1 poxedge = 1 pigcd = 1 ntox = 1
|
||||
+xrcrg1 = 12 xrcrg2 = 5
|
||||
+cgso = 1.5e-010 cgdo = 1.5e-010 cgbo = 2.56e-011 cgdl = 2.653e-10
|
||||
+cgsl = 2.653e-10 ckappas = 0.03 ckappad = 0.03 acde = 1
|
||||
+moin = 15 noff = 0.9 voffcv = 0.02
|
||||
+kt1 = -0.11 kt1l = 0 kt2 = 0.022 ute = -1.5
|
||||
+ua1 = 4.31e-009 ub1 = 7.61e-018 uc1 = -5.6e-011 prt = 0
|
||||
+at = 33000
|
||||
+fnoimod = 1 tnoimod = 0
|
||||
+jss = 0.0001 jsws = 1e-011 jswgs = 1e-010 njs = 1
|
||||
+ijthsfwd= 0.01 ijthsrev= 0.001 bvs = 10 xjbvs = 1
|
||||
+jsd = 0.0001 jswd = 1e-011 jswgd = 1e-010 njd = 1
|
||||
+ijthdfwd= 0.01 ijthdrev= 0.001 bvd = 10 xjbvd = 1
|
||||
+pbs = 1 cjs = 0.0005 mjs = 0.5 pbsws = 1
|
||||
+cjsws = 5e-010 mjsws = 0.33 pbswgs = 1 cjswgs = 3e-010
|
||||
+mjswgs = 0.33 pbd = 1 cjd = 0.0005 mjd = 0.5
|
||||
+pbswd = 1 cjswd = 5e-010 mjswd = 0.33 pbswgd = 1
|
||||
+cjswgd = 5e-010 mjswgd = 0.33 tpb = 0.005 tcj = 0.001
|
||||
+tpbsw = 0.005 tcjsw = 0.001 tpbswg = 0.005 tcjswg = 0.001
|
||||
+xtis = 3 xtid = 3
|
||||
+dmcg = 0e-006 dmci = 0e-006 dmdg = 0e-006 dmcgt = 0e-007
|
||||
+dwj = 0.0e-008 xgw = 0e-007 xgl = 0e-008
|
||||
+rshg = 0.4 gbmin = 1e-010 rbpb = 5 rbpd = 15
|
||||
+rbps = 15 rbdb = 15 rbsb = 15 ngcon = 1
|
||||
|
||||
* PTM 65nm PMOS
|
||||
|
||||
.model pmos pmos level = 54
|
||||
+version = 4.0 binunit = 1 paramchk= 1 mobmod = 0
|
||||
+capmod = 2 igcmod = 1 igbmod = 1 geomod = 1
|
||||
+diomod = 1 rdsmod = 0 rbodymod= 1 rgatemod= 1
|
||||
+permod = 1 acnqsmod= 0 trnqsmod= 0
|
||||
+tnom = 27 toxe = 1.95e-009 toxp = 1.2e-009 toxm = 1.95e-009
|
||||
+dtox = 0.75e-9 epsrox = 3.9 wint = 5e-009 lint = 5.25e-009
|
||||
+ll = 0 wl = 0 lln = 1 wln = 1
|
||||
+lw = 0 ww = 0 lwn = 1 wwn = 1
|
||||
+lwl = 0 wwl = 0 xpart = 0 toxref = 1.95e-009
|
||||
+xl = -30e-9
|
||||
+vth0 = -0.365 k1 = 0.4 k2 = -0.01 k3 = 0
|
||||
+k3b = 0 w0 = 2.5e-006 dvt0 = 1 dvt1 = 2
|
||||
+dvt2 = -0.032 dvt0w = 0 dvt1w = 0 dvt2w = 0
|
||||
+dsub = 0.1 minv = 0.05 voffl = 0 dvtp0 = 1e-009
|
||||
+dvtp1 = 0.05 lpe0 = 0 lpeb = 0 xj = 1.96e-008
|
||||
+ngate = 2e+020 ndep = 1.87e+018 nsd = 2e+020 phin = 0
|
||||
+cdsc = 0.000 cdscb = 0 cdscd = 0 cit = 0
|
||||
+voff = -0.126 nfactor = 1.9 eta0 = 0.0058 etab = 0
|
||||
+vfb = 0.55 u0 = 0.00574 ua = 2.0e-009 ub = 0.5e-018
|
||||
+uc = 0 vsat = 70000 a0 = 1.0 ags = 1e-020
|
||||
+a1 = 0 a2 = 1 b0 = -1e-020 b1 = 0
|
||||
+keta = -0.047 dwg = 0 dwb = 0 pclm = 0.12
|
||||
+pdiblc1 = 0.001 pdiblc2 = 0.001 pdiblcb = 3.4e-008 drout = 0.56
|
||||
+pvag = 1e-020 delta = 0.01 pscbe1 = 8.14e+008 pscbe2 = 9.58e-007
|
||||
+fprout = 0.2 pdits = 0.08 pditsd = 0.23 pditsl = 2.3e+006
|
||||
+rsh = 5 rdsw = 165 rsw = 85 rdw = 85
|
||||
+rdswmin = 0 rdwmin = 0 rswmin = 0 prwg = 3.22e-008
|
||||
+prwb = 6.8e-011 wr = 1 alpha0 = 0.074 alpha1 = 0.005
|
||||
+beta0 = 30 agidl = 0.0002 bgidl = 2.1e+009 cgidl = 0.0002
|
||||
+egidl = 0.8
|
||||
+aigbacc = 0.012 bigbacc = 0.0028 cigbacc = 0.002
|
||||
+nigbacc = 1 aigbinv = 0.014 bigbinv = 0.004 cigbinv = 0.004
|
||||
+eigbinv = 1.1 nigbinv = 3 aigc = 0.69 bigc = 0.0012
|
||||
+cigc = 0.0008 aigsd = 0.0087 bigsd = 0.0012 cigsd = 0.0008
|
||||
+nigc = 1 poxedge = 1 pigcd = 1 ntox = 1
|
||||
+xrcrg1 = 12 xrcrg2 = 5
|
||||
+cgso = 1.5e-010 cgdo = 1.5e-010 cgbo = 2.56e-011 cgdl = 2.653e-10
|
||||
+cgsl = 2.653e-10 ckappas = 0.03 ckappad = 0.03 acde = 1
|
||||
+moin = 15 noff = 0.9 voffcv = 0.02
|
||||
+kt1 = -0.11 kt1l = 0 kt2 = 0.022 ute = -1.5
|
||||
+ua1 = 4.31e-009 ub1 = 7.61e-018 uc1 = -5.6e-011 prt = 0
|
||||
+at = 33000
|
||||
+fnoimod = 1 tnoimod = 0
|
||||
+jss = 0.0001 jsws = 1e-011 jswgs = 1e-010 njs = 1
|
||||
+ijthsfwd= 0.01 ijthsrev= 0.001 bvs = 10 xjbvs = 1
|
||||
+jsd = 0.0001 jswd = 1e-011 jswgd = 1e-010 njd = 1
|
||||
+ijthdfwd= 0.01 ijthdrev= 0.001 bvd = 10 xjbvd = 1
|
||||
+pbs = 1 cjs = 0.0005 mjs = 0.5 pbsws = 1
|
||||
+cjsws = 5e-010 mjsws = 0.33 pbswgs = 1 cjswgs = 3e-010
|
||||
+mjswgs = 0.33 pbd = 1 cjd = 0.0005 mjd = 0.5
|
||||
+pbswd = 1 cjswd = 5e-010 mjswd = 0.33 pbswgd = 1
|
||||
+cjswgd = 5e-010 mjswgd = 0.33 tpb = 0.005 tcj = 0.001
|
||||
+tpbsw = 0.005 tcjsw = 0.001 tpbswg = 0.005 tcjswg = 0.001
|
||||
+xtis = 3 xtid = 3
|
||||
+dmcg = 0e-006 dmci = 0e-006 dmdg = 0e-006 dmcgt = 0e-007
|
||||
+dwj = 0.0e-008 xgw = 0e-007 xgl = 0e-008
|
||||
+rshg = 0.4 gbmin = 1e-010 rbpb = 5 rbpd = 15
|
||||
+rbps = 15 rbdb = 15 rbsb = 15 ngcon = 1
|
||||
"}
|
||||
C {spice_probe.sym} 270 -580 0 0 {name=p3 attrs=""}
|
||||
C {spice_probe.sym} 390 -580 0 0 {name=p4 attrs=""}
|
||||
C {spice_probe.sym} 270 -480 0 0 {name=p5 attrs=""}
|
||||
C {spice_probe.sym} 520 -490 0 0 {name=p8 attrs=""}
|
||||
C {spice_probe.sym} 520 -590 0 0 {name=p9 attrs=""}
|
||||
C {spice_probe.sym} 700 -220 0 0 {name=p10 attrs=""}
|
||||
C {launcher.sym} 1270 -90 0 0 {name=h5
|
||||
descr="Select arrow and
|
||||
Ctrl-Left-Click to load/unload waveforms"
|
||||
tclcommand="
|
||||
xschem raw_read $netlist_dir/[file tail [file rootname [xschem get current_name]]].raw
|
||||
"
|
||||
}
|
||||
C {launcher.sym} 870 -90 0 0 {name=h1
|
||||
descr="Netlist + Simulate
|
||||
Ctrl-Left-Click"
|
||||
tclcommand="xschem netlist; xschem simulate"
|
||||
}
|
||||
|
|
@ -0,0 +1,54 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 90 -460 130 -460 { lab=D}
|
||||
N 500 -570 520 -570 { lab=DI}
|
||||
N 500 -570 500 -460 { lab=DI}
|
||||
N 870 -460 1030 -460 { lab=QI}
|
||||
N 970 -570 990 -570 { lab=QI}
|
||||
N 970 -570 970 -460 { lab=QI}
|
||||
N 1110 -460 1160 -460 { lab=Q}
|
||||
N 990 -460 990 -360 { lab=QI}
|
||||
N 990 -300 990 -260 { lab=0}
|
||||
N 790 -460 870 -460 { lab=QI}
|
||||
N 690 -460 730 -460 { lab=#net1}
|
||||
N 670 -460 690 -460 { lab=#net1}
|
||||
N 460 -460 590 -460 { lab=DI}
|
||||
N 340 -460 400 -460 { lab=#net2}
|
||||
N 520 -460 520 -360 { lab=DI}
|
||||
N 520 -300 520 -260 { lab=0}
|
||||
N 210 -460 280 -460 { lab=#net3}
|
||||
C {ipin.sym} 70 -240 0 0 {name=p1 lab=D}
|
||||
C {ipin.sym} 70 -200 0 0 {name=p2 lab=CLK}
|
||||
C {ipin.sym} 70 -160 0 0 {name=p3 lab=RST}
|
||||
C {opin.sym} 250 -200 0 0 {name=p4 lab=Q}
|
||||
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
|
||||
C {keeper_ngspice.sym} 560 -570 0 0 {name=x2}
|
||||
C {switch_ngspice.sym} 310 -460 1 1 {name=S1 model=SWITCH}
|
||||
C {lab_pin.sym} 310 -420 0 1 {name=l4 sig_type=std_logic lab=VCC}
|
||||
C {lab_pin.sym} 290 -420 0 0 {name=l5 sig_type=std_logic lab=CLK}
|
||||
C {lab_pin.sym} 90 -460 0 0 {name=l6 sig_type=std_logic lab=D}
|
||||
C {switch_ngspice.sym} 760 -460 1 1 {name=S2 model=SWITCH}
|
||||
C {lab_pin.sym} 740 -420 0 0 {name=l7 sig_type=std_logic lab=0}
|
||||
C {lab_pin.sym} 760 -420 0 1 {name=l8 sig_type=std_logic lab=CLK}
|
||||
C {keeper_ngspice.sym} 1030 -570 0 0 {name=x3}
|
||||
C {lab_pin.sym} 500 -480 0 1 {name=l9 sig_type=std_logic lab=DI}
|
||||
C {buf_ngspice.sym} 1070 -460 0 0 {name=x4 ROUT=100}
|
||||
C {lab_pin.sym} 970 -480 0 0 {name=l10 sig_type=std_logic lab=QI}
|
||||
C {lab_pin.sym} 1160 -460 0 1 {name=l11 sig_type=std_logic lab=Q}
|
||||
C {switch_ngspice.sym} 990 -330 0 0 {name=S3 model=SWITCH}
|
||||
C {lab_pin.sym} 990 -260 0 0 {name=l2 sig_type=std_logic lab=0}
|
||||
C {lab_pin.sym} 950 -310 0 0 {name=l3 sig_type=std_logic lab=0}
|
||||
C {lab_pin.sym} 950 -330 0 0 {name=l12 sig_type=std_logic lab=RST}
|
||||
C {buf_ngspice.sym} 630 -460 0 0 {name=x1}
|
||||
C {switch_ngspice.sym} 430 -460 1 1 {name=S4 model=SWITCH}
|
||||
C {lab_pin.sym} 430 -420 0 1 {name=l13 sig_type=std_logic lab=VCC}
|
||||
C {lab_pin.sym} 410 -420 0 0 {name=l14 sig_type=std_logic lab=RST}
|
||||
C {switch_ngspice.sym} 520 -330 0 0 {name=S5 model=SWITCH}
|
||||
C {lab_pin.sym} 520 -260 0 0 {name=l15 sig_type=std_logic lab=0}
|
||||
C {lab_pin.sym} 480 -310 0 0 {name=l16 sig_type=std_logic lab=0}
|
||||
C {lab_pin.sym} 480 -330 0 0 {name=l17 sig_type=std_logic lab=RST}
|
||||
C {buf_ngspice.sym} 170 -460 0 0 {name=x5}
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {type=subcircuit
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -40 -30 40 -30 {}
|
||||
L 4 -40 30 40 30 {}
|
||||
L 4 -40 -30 -40 30 {}
|
||||
L 4 40 -30 40 30 {}
|
||||
L 4 -60 -20 -40 -20 {}
|
||||
L 4 -60 0 -40 0 {}
|
||||
L 4 40 -20 60 -20 {}
|
||||
L 4 -60 20 -40 20 {}
|
||||
B 5 -62.5 -22.5 -57.5 -17.5 {name=D dir=in }
|
||||
B 5 -62.5 -2.5 -57.5 2.5 {name=CLK dir=in }
|
||||
B 5 57.5 -22.5 62.5 -17.5 {name=Q dir=out }
|
||||
B 5 -62.5 17.5 -57.5 22.5 {name=RST dir=in }
|
||||
T {@symname} -64.5 34 0 0 0.3 0.3 {}
|
||||
T {@name} 45 -42 0 0 0.2 0.2 {}
|
||||
T {D} -35 -24 0 0 0.2 0.2 {}
|
||||
T {CLK} -35 -4 0 0 0.2 0.2 {}
|
||||
T {Q} 35 -24 0 1 0.2 0.2 {}
|
||||
T {RST} -35 16 0 0 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,28 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 540 -190 590 -190 {lab=#net1}
|
||||
N 600 -150 730 -150 {lab=#net2}
|
||||
N 600 -170 600 -150 {lab=#net2}
|
||||
N 540 -170 600 -170 {lab=#net2}
|
||||
N 730 -210 830 -210 {lab=S}
|
||||
N 400 -230 550 -230 {lab=CIN}
|
||||
N 550 -230 550 -210 {lab=CIN}
|
||||
N 550 -210 590 -210 {lab=CIN}
|
||||
C {ipin.sym} 110 -220 0 0 {name=p1 lab=A}
|
||||
C {ipin.sym} 110 -190 0 0 {name=p2 lab=B}
|
||||
C {ipin.sym} 110 -150 0 0 {name=p3 lab=CIN}
|
||||
C {opin.sym} 210 -220 0 0 {name=p4 lab=S}
|
||||
C {opin.sym} 210 -190 0 0 {name=p5 lab=COUT}
|
||||
C {title.sym} 160 -30 0 0 {name=l2}
|
||||
C {lab_pin.sym} 400 -230 0 0 {name=l8 lab=CIN}
|
||||
C {lab_pin.sym} 830 -210 0 1 {name=l1 lab=S}
|
||||
C {lab_pin.sym} 830 -170 0 1 {name=l3 lab=COUT}
|
||||
C {lab_pin.sym} 400 -190 0 0 {name=p6 lab=A}
|
||||
C {lab_pin.sym} 400 -170 0 0 {name=p7 lab=B}
|
||||
C {half_adder_ngspice.sym} 470 -180 0 0 {name=x0}
|
||||
C {half_adder_ngspice.sym} 660 -200 0 0 {name=x1}
|
||||
C {or_ngspice.sym} 770 -170 0 0 {name=x2 ROUT=1000}
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {type=subcircuit
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x0"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -50 -30 50 -30 {}
|
||||
L 4 -50 30 50 30 {}
|
||||
L 4 -50 -30 -50 30 {}
|
||||
L 4 50 -30 50 30 {}
|
||||
L 4 -70 -20 -50 -20 {}
|
||||
L 4 50 -20 70 -20 {}
|
||||
L 4 -70 0 -50 0 {}
|
||||
L 4 50 0 70 0 {}
|
||||
L 4 -70 20 -50 20 {}
|
||||
B 5 -72.5 -22.5 -67.5 -17.5 {name=A dir=in }
|
||||
B 5 67.5 -22.5 72.5 -17.5 {name=S dir=out }
|
||||
B 5 -72.5 -2.5 -67.5 2.5 {name=B dir=in }
|
||||
B 5 67.5 -2.5 72.5 2.5 {name=COUT dir=out }
|
||||
B 5 -72.5 17.5 -67.5 22.5 {name=CIN dir=in }
|
||||
T {@symname} -55 34 0 0 0.3 0.3 {}
|
||||
T {@name} 55 -42 0 0 0.2 0.2 {}
|
||||
T {A} -45 -24 0 0 0.2 0.2 {}
|
||||
T {S} 45 -24 0 1 0.2 0.2 {}
|
||||
T {B} -45 -4 0 0 0.2 0.2 {}
|
||||
T {COUT} 45 -4 0 1 0.2 0.2 {}
|
||||
T {CIN} -45 16 0 0 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,19 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
C {ipin.sym} 110 -220 0 0 {name=p1 lab=A}
|
||||
C {ipin.sym} 110 -190 0 0 {name=p2 lab=B}
|
||||
C {opin.sym} 210 -220 0 0 {name=p4 lab=S}
|
||||
C {opin.sym} 210 -190 0 0 {name=p5 lab=COUT}
|
||||
C {title.sym} 160 -30 0 0 {name=l2}
|
||||
C {lab_pin.sym} 470 -270 0 0 {name=l6 lab=A}
|
||||
C {lab_pin.sym} 470 -230 0 0 {name=l7 lab=B}
|
||||
C {lab_pin.sym} 570 -160 0 1 {name=p7 lab=COUT}
|
||||
C {lab_pin.sym} 470 -180 0 0 {name=p3 lab=A}
|
||||
C {lab_pin.sym} 470 -140 0 0 {name=p6 lab=B}
|
||||
C {lab_pin.sym} 570 -250 0 1 {name=l3 lab=S}
|
||||
C {xor_ngspice.sym} 510 -250 0 0 {name=x1 ROUT=1000}
|
||||
C {and_ngspice.sym} 510 -160 0 0 {name=x2 ROUT=1000}
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {type=subcircuit
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x0"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -50 -20 50 -20 {}
|
||||
L 4 -50 20 50 20 {}
|
||||
L 4 -50 -20 -50 20 {}
|
||||
L 4 50 -20 50 20 {}
|
||||
L 4 -70 -10 -50 -10 {}
|
||||
L 4 50 -10 70 -10 {}
|
||||
L 4 50 10 70 10 {}
|
||||
L 4 -70 10 -50 10 {}
|
||||
B 5 -72.5 -12.5 -67.5 -7.5 {name=A dir=in }
|
||||
B 5 67.5 -12.5 72.5 -7.5 {name=S dir=out }
|
||||
B 5 67.5 7.5 72.5 12.5 {name=COUT dir=out }
|
||||
B 5 -72.5 7.5 -67.5 12.5 {name=B dir=in }
|
||||
T {@symname} -55 24 0 0 0.3 0.3 {}
|
||||
T {@name} 55 -32 0 0 0.2 0.2 {}
|
||||
T {A} -45 -14 0 0 0.2 0.2 {}
|
||||
T {S} 45 -14 0 1 0.2 0.2 {}
|
||||
T {COUT} 45 6 0 1 0.2 0.2 {}
|
||||
T {B} -45 6 0 0 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 470 -470 470 -430 { lab=#net1}
|
||||
N 470 -470 540 -470 { lab=#net1}
|
||||
N 470 -370 470 -320 { lab=0}
|
||||
N 600 -470 670 -470 { lab=Y1}
|
||||
N 320 -470 360 -470 { lab=A1}
|
||||
C {ipin.sym} 70 -240 0 0 {name=p1 lab=A}
|
||||
C {opin.sym} 320 -240 0 0 {name=p4 lab=Y}
|
||||
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
|
||||
C {bsource.sym} 470 -400 0 1 {name=B1 VAR=V FUNC="'VCC/2*(1-tanh((V(A1)-VCC/2)*100))'"
|
||||
}
|
||||
C {lab_pin.sym} 320 -470 0 0 {name=l2 sig_type=std_logic lab=A1}
|
||||
C {lab_pin.sym} 470 -320 0 0 {name=l3 sig_type=std_logic lab=0}
|
||||
C {res.sym} 570 -470 1 0 {name=R1
|
||||
value=ROUT
|
||||
footprint=1206
|
||||
device=resistor
|
||||
m=1}
|
||||
C {lab_pin.sym} 670 -470 0 1 {name=l5 sig_type=std_logic lab=Y1}
|
||||
C {lab_pin.sym} 130 -240 0 1 {name=l6 sig_type=std_logic lab=A1}
|
||||
C {lab_pin.sym} 260 -240 0 0 {name=l7 sig_type=std_logic lab=Y1}
|
||||
C {parax_cap.sym} 360 -460 0 0 {name=C1 gnd=0 value=8f m=1}
|
||||
C {parax_cap.sym} 620 -460 0 0 {name=C2 gnd=0 value=8f m=1}
|
||||
C {vsource.sym} 290 -240 1 0 {name=V1 value=0}
|
||||
C {vsource.sym} 100 -240 1 0 {name=V2 value=0}
|
||||
|
|
@ -0,0 +1,22 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {type=subcircuit
|
||||
format="@name @pinlist @symname ROUT=@ROUT"
|
||||
template="name=x1 ROUT=1000"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -40 0 -20 0 {}
|
||||
L 4 -20 -20 20 0 {}
|
||||
L 4 -20 -20 -20 20 {}
|
||||
L 4 -20 20 20 0 {}
|
||||
L 4 30 -0 40 -0 {}
|
||||
B 5 37.5 -2.5 42.5 2.5 {name=Y dir=out }
|
||||
B 5 -42.5 -2.5 -37.5 2.5 {name=A dir=in }
|
||||
A 4 25 -0 5 180 360 {}
|
||||
T {@symname} -47.5 24 0 0 0.3 0.3 {}
|
||||
T {@name} 25 -22 0 0 0.2 0.2 {}
|
||||
T {Y} 7.5 -6.5 0 1 0.2 0.2 {}
|
||||
T {A} -17.5 -6.5 0 0 0.2 0.2 {}
|
||||
T {ROUT=@ROUT} -25 -42 0 0 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,18 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 260 -300 290 -300 { lab=A}
|
||||
N 260 -300 260 -200 { lab=A}
|
||||
N 260 -200 290 -200 { lab=A}
|
||||
N 370 -300 400 -300 { lab=Y}
|
||||
N 400 -300 400 -200 { lab=Y}
|
||||
N 370 -200 400 -200 { lab=Y}
|
||||
N 220 -250 260 -250 { lab=A}
|
||||
C {ipin.sym} 220 -250 0 0 {name=p1 lab=A}
|
||||
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
|
||||
C {inv_ngspice.sym} 330 -200 0 0 {name=x1 ROUT=1000}
|
||||
C {inv_ngspice.sym} 330 -300 0 1 {name=x2 ROUT=300k}
|
||||
C {lab_pin.sym} 400 -250 0 1 {name=l2 sig_type=std_logic lab=Y}
|
||||
|
|
@ -0,0 +1,18 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {type=subcircuit
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -40 0 -20 0 {}
|
||||
L 4 -20 -20 -20 20 {}
|
||||
L 4 -20 20 20 20 {}
|
||||
L 4 20 -20 20 20 {}
|
||||
L 4 -20 -20 20 -20 {}
|
||||
B 5 -42.5 -2.5 -37.5 2.5 {name=A dir=in }
|
||||
T {@symname} -41 24 0 0 0.3 0.3 {}
|
||||
T {@name} 25 -22 0 0 0.2 0.2 {}
|
||||
T {A} -15 -4 0 0 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 480 -400 480 -360 { lab=#net1}
|
||||
N 480 -400 550 -400 { lab=#net1}
|
||||
N 480 -300 480 -250 { lab=0}
|
||||
N 610 -400 680 -400 { lab=Y1}
|
||||
N 330 -400 370 -400 { lab=A1}
|
||||
N 330 -460 370 -460 { lab=B1}
|
||||
C {ipin.sym} 80 -170 0 0 {name=p1 lab=A}
|
||||
C {opin.sym} 330 -170 0 0 {name=p4 lab=Y}
|
||||
C {bsource.sym} 480 -330 0 1 {name=B1 VAR=V FUNC="'VCC/2*(1-tanh((min(V(A1),V(B1))-VCC/2)*100))'"
|
||||
}
|
||||
C {lab_pin.sym} 330 -400 0 0 {name=l2 sig_type=std_logic lab=A1}
|
||||
C {lab_pin.sym} 480 -250 0 0 {name=l3 sig_type=std_logic lab=0}
|
||||
C {res.sym} 580 -400 1 0 {name=R1
|
||||
value=ROUT
|
||||
footprint=1206
|
||||
device=resistor
|
||||
m=1}
|
||||
C {lab_pin.sym} 680 -400 0 1 {name=l5 sig_type=std_logic lab=Y1}
|
||||
C {ammeter.sym} 110 -170 3 0 {name=Va}
|
||||
C {lab_pin.sym} 140 -170 0 1 {name=l6 sig_type=std_logic lab=A1}
|
||||
C {ammeter.sym} 300 -170 3 0 {name=Vy}
|
||||
C {lab_pin.sym} 270 -170 0 0 {name=l7 sig_type=std_logic lab=Y1}
|
||||
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
|
||||
C {ipin.sym} 80 -110 0 0 {name=p2 lab=B}
|
||||
C {ammeter.sym} 110 -110 3 0 {name=Va1}
|
||||
C {lab_pin.sym} 140 -110 0 1 {name=l4 sig_type=std_logic lab=B1}
|
||||
C {lab_pin.sym} 330 -460 0 0 {name=l8 sig_type=std_logic lab=B1}
|
||||
C {parax_cap.sym} 370 -390 0 0 {name=C1 gnd=0 value=8f m=1}
|
||||
C {parax_cap.sym} 370 -450 0 0 {name=C2 gnd=0 value=8f m=1}
|
||||
C {parax_cap.sym} 630 -390 0 0 {name=C3 gnd=0 value=8f m=1}
|
||||
|
|
@ -0,0 +1,20 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {type=subcircuit
|
||||
format="@name @pinlist @symname ROUT=@ROUT"
|
||||
template="name=x1 ROUT=1000"}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -40 -20 -20 -20 {}
|
||||
L 4 -20 -30 -20 30 {}
|
||||
L 4 -40 20 -20 20 {}
|
||||
L 4 -20 -30 5 -30 {}
|
||||
L 4 -20 30 5 30 {}
|
||||
L 4 45 0 60 0 {}
|
||||
B 5 57.5 -2.5 62.5 2.5 {name=Y dir=out verilog_type=wire}
|
||||
B 5 -42.5 -22.5 -37.5 -17.5 {name=A dir=in}
|
||||
B 5 -42.5 17.5 -37.5 22.5 {name=B dir=in}
|
||||
A 4 5 0 30 270 180 {}
|
||||
A 4 40 0 5 180 360 {}
|
||||
T {@name} -16.25 -5 0 0 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 480 -400 480 -360 { lab=#net1}
|
||||
N 480 -400 550 -400 { lab=#net1}
|
||||
N 480 -300 480 -250 { lab=0}
|
||||
N 610 -400 680 -400 { lab=Y1}
|
||||
N 330 -400 370 -400 { lab=A1}
|
||||
N 330 -460 370 -460 { lab=B1}
|
||||
C {ipin.sym} 80 -170 0 0 {name=p1 lab=A}
|
||||
C {opin.sym} 330 -170 0 0 {name=p4 lab=Y}
|
||||
C {bsource.sym} 480 -330 0 1 {name=B1 VAR=V FUNC="'VCC/2*(1-tanh((max(V(A1),V(B1))-VCC/2)*100))'"
|
||||
}
|
||||
C {lab_pin.sym} 330 -400 0 0 {name=l2 sig_type=std_logic lab=A1}
|
||||
C {lab_pin.sym} 480 -250 0 0 {name=l3 sig_type=std_logic lab=0}
|
||||
C {res.sym} 580 -400 1 0 {name=R1
|
||||
value=ROUT
|
||||
footprint=1206
|
||||
device=resistor
|
||||
m=1}
|
||||
C {lab_pin.sym} 680 -400 0 1 {name=l5 sig_type=std_logic lab=Y1}
|
||||
C {ammeter.sym} 110 -170 3 0 {name=Va}
|
||||
C {lab_pin.sym} 140 -170 0 1 {name=l6 sig_type=std_logic lab=A1}
|
||||
C {ammeter.sym} 300 -170 3 0 {name=Vy}
|
||||
C {lab_pin.sym} 270 -170 0 0 {name=l7 sig_type=std_logic lab=Y1}
|
||||
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
|
||||
C {ipin.sym} 80 -110 0 0 {name=p2 lab=B}
|
||||
C {ammeter.sym} 110 -110 3 0 {name=Va1}
|
||||
C {lab_pin.sym} 140 -110 0 1 {name=l4 sig_type=std_logic lab=B1}
|
||||
C {lab_pin.sym} 330 -460 0 0 {name=l8 sig_type=std_logic lab=B1}
|
||||
C {parax_cap.sym} 370 -390 0 0 {name=C1 gnd=0 value=8f m=1}
|
||||
C {parax_cap.sym} 370 -450 0 0 {name=C2 gnd=0 value=8f m=1}
|
||||
C {parax_cap.sym} 630 -390 0 0 {name=C3 gnd=0 value=8f m=1}
|
||||
|
|
@ -0,0 +1,21 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {type=subcircuit
|
||||
format="@name @pinlist @symname ROUT=@ROUT"
|
||||
template="name=x1 ROUT=1000"}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 45 0 60 0 {}
|
||||
L 4 -40 -20 -19.21875 -20 {}
|
||||
L 4 -40 20 -19.21875 20 {}
|
||||
L 4 -25 -30 -5 -30 {}
|
||||
L 4 -25 30 -5 30 {}
|
||||
B 5 57.5 -2.5 62.5 2.5 {name=Y dir=out verilog_type=wire}
|
||||
B 5 -42.5 -22.5 -37.5 -17.5 {name=A dir=in}
|
||||
B 5 -42.5 17.5 -37.5 22.5 {name=B dir=in}
|
||||
A 4 40 0 5 180 360 {}
|
||||
A 4 -65 0 50 323.130102354156 73.7397952916881 {}
|
||||
A 4 -9.642857142857142 17.85714285714286 48.0818286351295 21.80140948635181 62.65738573560834 {}
|
||||
A 4 -4.6875 -11.25 41.25118369513777 269.5659493678606 74.60789655596687 {}
|
||||
T {@name} -11.25 -5 0 0 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,81 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 660 -190 660 -170 { lab=0}
|
||||
N 440 -220 620 -220 { lab=GN1}
|
||||
N 400 -270 400 -250 { lab=GN1}
|
||||
N 400 -350 400 -330 { lab=VCC}
|
||||
N 400 -190 400 -170 { lab=0}
|
||||
N 580 -280 740 -280 { lab=#net1}
|
||||
N 660 -280 660 -250 { lab=#net1}
|
||||
N 580 -380 580 -340 { lab=#net2}
|
||||
N 740 -380 740 -340 { lab=#net3}
|
||||
N 620 -450 620 -420 { lab=#net2}
|
||||
N 580 -420 620 -420 { lab=#net2}
|
||||
N 580 -420 580 -380 { lab=#net2}
|
||||
N 580 -500 580 -480 { lab=VCC}
|
||||
N 940 -330 1060 -330 { lab=OUT}
|
||||
N 940 -500 940 -440 { lab=VCC}
|
||||
N 740 -410 900 -410 { lab=#net3}
|
||||
N 400 -250 440 -250 { lab=GN1}
|
||||
N 440 -250 440 -220 { lab=GN1}
|
||||
N 740 -500 740 -480 { lab=VCC}
|
||||
N 620 -450 710 -450 { lab=#net2}
|
||||
N 940 -190 940 -170 { lab=0}
|
||||
N 940 -380 940 -250 { lab=OUT}
|
||||
N 620 -220 620 -210 { lab=GN1}
|
||||
N 620 -210 730 -210 { lab=GN1}
|
||||
N 730 -220 730 -210 { lab=GN1}
|
||||
N 730 -220 900 -220 { lab=GN1}
|
||||
N 740 -420 740 -380 { lab=#net3}
|
||||
N 790 -410 790 -340 { lab=#net3}
|
||||
N 910 -340 940 -340 { lab=OUT}
|
||||
C {nmos4.sym} 640 -220 0 0 {name=M1 model=nmos w=4u l=0.4u m=1}
|
||||
C {lab_pin.sym} 660 -220 0 1 {name=p2 lab=0}
|
||||
C {lab_pin.sym} 660 -170 0 0 {name=p6 lab=0}
|
||||
C {nmos4.sym} 420 -220 0 1 {name=M2 model=nmos w=4u l=0.4u m=1}
|
||||
C {lab_pin.sym} 400 -220 0 0 {name=p7 lab=0}
|
||||
C {isource.sym} 400 -300 0 0 {name=I0 value=30u}
|
||||
C {lab_pin.sym} 400 -350 0 0 {name=p9 lab=VCC}
|
||||
C {lab_pin.sym} 400 -170 0 0 {name=p16 lab=0}
|
||||
C {nmos4.sym} 560 -310 0 0 {name=M3 model=nmos w=1.5u l=0.2u m=1}
|
||||
C {lab_pin.sym} 580 -310 0 1 {name=p17 lab=0}
|
||||
C {nmos4.sym} 760 -310 0 1 {name=M4 model=nmos w=1.5u l=0.2u m=1}
|
||||
C {lab_pin.sym} 740 -310 0 0 {name=p18 lab=0 l=0.2u}
|
||||
C {pmos4.sym} 600 -450 0 1 {name=M5 model=pmos w=6u l=0.3u m=1}
|
||||
C {lab_pin.sym} 580 -500 0 0 {name=p19 lab=VCC}
|
||||
C {pmos4.sym} 720 -450 0 0 {name=M6 model=pmos w=6u l=0.3u m=1}
|
||||
C {lab_pin.sym} 740 -500 0 0 {name=p21 lab=VCC}
|
||||
C {lab_pin.sym} 580 -450 0 0 {name=p23 lab=VCC}
|
||||
C {lab_pin.sym} 740 -450 0 1 {name=p33 lab=VCC}
|
||||
C {lab_wire.sym} 570 -220 0 0 {name=l2 lab=GN1}
|
||||
C {ipin.sym} 100 -310 0 0 {name=p161 lab=PLUS}
|
||||
C {ipin.sym} 100 -260 0 0 {name=p1 lab=MINUS}
|
||||
C {opin.sym} 180 -290 0 0 {name=p20 lab=OUT}
|
||||
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
|
||||
C {lab_pin.sym} 780 -310 0 1 {name=p3 lab=PLUS}
|
||||
C {lab_pin.sym} 540 -310 0 0 {name=p4 lab=MINUS}
|
||||
C {lab_pin.sym} 1060 -330 0 1 {name=p14 lab=OUT}
|
||||
C {pmos4.sym} 920 -410 0 0 {name=M8 model=pmos w=6u l=0.4u m=1}
|
||||
C {lab_pin.sym} 940 -410 0 1 {name=p15 lab=VCC}
|
||||
C {lab_pin.sym} 940 -500 0 0 {name=p22 lab=VCC}
|
||||
C {spice_probe.sym} 490 -220 0 0 {name=p27 attrs=""}
|
||||
C {spice_probe.sym} 640 -450 0 0 {name=p28 attrs=""}
|
||||
C {nmos4.sym} 920 -220 0 0 {name=M7 model=nmos w=4u l=0.4u m=1}
|
||||
C {lab_pin.sym} 940 -220 0 1 {name=p5 lab=0}
|
||||
C {lab_pin.sym} 940 -170 0 1 {name=p8 lab=0}
|
||||
C {res.sym} 880 -340 1 0 {name=R1
|
||||
value=30k
|
||||
footprint=1206
|
||||
device=resistor
|
||||
m=1}
|
||||
C {capa.sym} 820 -340 3 0 {name=C1
|
||||
m=1
|
||||
value=150f
|
||||
footprint=1206
|
||||
device="ceramic capacitor"}
|
||||
C {parax_cap.sym} 460 -210 0 0 {name=C2 gnd=0 value=200f m=1}
|
||||
C {spice_probe.sym} 630 -280 0 0 {name=p10 attrs=""}
|
||||
|
|
@ -0,0 +1,23 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {type=subcircuit
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -40 -50 -40 50 {}
|
||||
L 4 40 0 60 0 {}
|
||||
L 4 -60 30 -40 30 {}
|
||||
L 4 -40 -50 40 0 {}
|
||||
L 4 -40 50 40 0 {}
|
||||
L 4 -60 -30 -40 -30 {}
|
||||
B 5 -62.5 -32.5 -57.5 -27.5 {name=PLUS dir=in }
|
||||
B 5 57.5 -2.5 62.5 2.5 {name=OUT dir=out }
|
||||
B 5 -62.5 27.5 -57.5 32.5 {name=MINUS dir=in }
|
||||
T {@symname} -32 44 0 0 0.3 0.3 {}
|
||||
T {@name} -10 -48.25 0 0 0.2 0.2 {}
|
||||
T {PLUS} -38.75 -30.25 0 0 0.2 0.2 {}
|
||||
T {OUT} 28.75 -5.25 0 1 0.2 0.2 {}
|
||||
T {MINUS} -38.75 18.5 0 0 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 480 -400 480 -360 { lab=#net1}
|
||||
N 480 -400 550 -400 { lab=#net1}
|
||||
N 480 -300 480 -250 { lab=0}
|
||||
N 610 -400 680 -400 { lab=Y1}
|
||||
N 330 -400 370 -400 { lab=A1}
|
||||
N 330 -460 370 -460 { lab=B1}
|
||||
C {ipin.sym} 80 -170 0 0 {name=p1 lab=A}
|
||||
C {opin.sym} 330 -170 0 0 {name=p4 lab=Y}
|
||||
C {bsource.sym} 480 -330 0 1 {name=B1 VAR=V FUNC="'VCC/2*(1+tanh((max(V(A1),V(B1))-VCC/2)*100))'"
|
||||
}
|
||||
C {lab_pin.sym} 330 -400 0 0 {name=l2 sig_type=std_logic lab=A1}
|
||||
C {lab_pin.sym} 480 -250 0 0 {name=l3 sig_type=std_logic lab=0}
|
||||
C {res.sym} 580 -400 1 0 {name=R1
|
||||
value=ROUT
|
||||
footprint=1206
|
||||
device=resistor
|
||||
m=1}
|
||||
C {lab_pin.sym} 680 -400 0 1 {name=l5 sig_type=std_logic lab=Y1}
|
||||
C {lab_pin.sym} 140 -170 0 1 {name=l6 sig_type=std_logic lab=A1}
|
||||
C {lab_pin.sym} 270 -170 0 0 {name=l7 sig_type=std_logic lab=Y1}
|
||||
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
|
||||
C {ipin.sym} 80 -110 0 0 {name=p2 lab=B}
|
||||
C {lab_pin.sym} 140 -110 0 1 {name=l4 sig_type=std_logic lab=B1}
|
||||
C {lab_pin.sym} 330 -460 0 0 {name=l8 sig_type=std_logic lab=B1}
|
||||
C {parax_cap.sym} 370 -390 0 0 {name=C1 gnd=0 value=8f m=1}
|
||||
C {parax_cap.sym} 370 -450 0 0 {name=C2 gnd=0 value=8f m=1}
|
||||
C {parax_cap.sym} 630 -390 0 0 {name=C3 gnd=0 value=8f m=1}
|
||||
C {vsource.sym} 110 -170 1 0 {name=V1 value=0}
|
||||
C {vsource.sym} 110 -110 1 0 {name=V2 value=0}
|
||||
C {vsource.sym} 300 -170 1 0 {name=V3 value=0}
|
||||
|
|
@ -0,0 +1,20 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {type=subcircuit
|
||||
format="@name @pinlist @symname ROUT=@ROUT"
|
||||
template="name=x1 ROUT=1000"}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -40 -20 -20 -20 {}
|
||||
L 4 -40 20 -20 20 {}
|
||||
L 4 35 0 60 0 {}
|
||||
L 4 -25 -30 -5 -30 {}
|
||||
L 4 -25 30 -5 30 {}
|
||||
B 5 57.5 -2.5 62.5 2.5 {name=Y dir=out verilog_type=wire}
|
||||
B 5 -42.5 -22.5 -37.5 -17.5 {name=A dir=in}
|
||||
B 5 -42.5 17.5 -37.5 22.5 {name=B dir=in}
|
||||
A 4 -65 0 50 323.130102354156 73.7397952916881 {}
|
||||
A 4 -9.642857142857142 17.85714285714286 48.0818286351295 21.80140948635181 62.65738573560834 {}
|
||||
A 4 -4.6875 -11.25 41.25118369513777 269.5659493678606 74.60789655596687 {}
|
||||
T {@name} -11.25 -5 0 0 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 480 -400 480 -360 { lab=#net1}
|
||||
N 480 -400 550 -400 { lab=#net1}
|
||||
N 480 -300 480 -250 { lab=0}
|
||||
N 610 -400 680 -400 { lab=Y1}
|
||||
N 330 -400 370 -400 { lab=A1}
|
||||
N 330 -460 370 -460 { lab=B1}
|
||||
C {ipin.sym} 80 -170 0 0 {name=p1 lab=A}
|
||||
C {opin.sym} 330 -170 0 0 {name=p4 lab=Y}
|
||||
C {bsource.sym} 480 -330 0 1 {name=B1 VAR=V FUNC="'VCC/2*(1-tanh((abs(V(A1)-V(B1))-VCC/2)*100))'"
|
||||
}
|
||||
C {lab_pin.sym} 330 -400 0 0 {name=l2 sig_type=std_logic lab=A1}
|
||||
C {lab_pin.sym} 480 -250 0 0 {name=l3 sig_type=std_logic lab=0}
|
||||
C {res.sym} 580 -400 1 0 {name=R1
|
||||
value=ROUT
|
||||
footprint=1206
|
||||
device=resistor
|
||||
m=1}
|
||||
C {lab_pin.sym} 680 -400 0 1 {name=l5 sig_type=std_logic lab=Y1}
|
||||
C {ammeter.sym} 110 -170 3 0 {name=Va}
|
||||
C {lab_pin.sym} 140 -170 0 1 {name=l6 sig_type=std_logic lab=A1}
|
||||
C {ammeter.sym} 300 -170 3 0 {name=Vy}
|
||||
C {lab_pin.sym} 270 -170 0 0 {name=l7 sig_type=std_logic lab=Y1}
|
||||
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
|
||||
C {ipin.sym} 80 -110 0 0 {name=p2 lab=B}
|
||||
C {ammeter.sym} 110 -110 3 0 {name=Va1}
|
||||
C {lab_pin.sym} 140 -110 0 1 {name=l4 sig_type=std_logic lab=B1}
|
||||
C {lab_pin.sym} 330 -460 0 0 {name=l8 sig_type=std_logic lab=B1}
|
||||
C {parax_cap.sym} 370 -390 0 0 {name=C1 gnd=0 value=8f m=1}
|
||||
C {parax_cap.sym} 370 -450 0 0 {name=C2 gnd=0 value=8f m=1}
|
||||
C {parax_cap.sym} 630 -390 0 0 {name=C3 gnd=0 value=8f m=1}
|
||||
|
|
@ -0,0 +1,22 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {type=subcircuit
|
||||
format="@name @pinlist @symname ROUT=@ROUT"
|
||||
template="name=x1 ROUT=1000"}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -40 -20 -27.5 -20 {}
|
||||
L 4 -40 20 -27.5 20 {}
|
||||
L 4 -25 -30 -5 -30 {}
|
||||
L 4 -25 30 -5 30 {}
|
||||
L 4 45 0 60 0 {}
|
||||
B 5 57.5 -2.5 62.5 2.5 {name=Y dir=out verilog_type=wire}
|
||||
B 5 -42.5 -22.5 -37.5 -17.5 {name=A dir=in}
|
||||
B 5 -42.5 17.5 -37.5 22.5 {name=B dir=in}
|
||||
A 4 -9.642857142857142 17.85714285714286 48.0818286351295 21.80140948635181 62.65738573560834 {}
|
||||
A 4 -4.6875 -11.25 41.25118369513777 269.5659493678606 74.60789655596687 {}
|
||||
A 4 -65 0 50 323.130102354156 73.7397952916881 {}
|
||||
A 4 -72.5 0 50 323.130102354156 73.7397952916881 {}
|
||||
A 4 40 0 5 180 360 {}
|
||||
T {@name} -11.25 -5 0 0 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 480 -400 480 -360 { lab=#net1}
|
||||
N 480 -400 550 -400 { lab=#net1}
|
||||
N 480 -300 480 -250 { lab=0}
|
||||
N 610 -400 680 -400 { lab=Y1}
|
||||
N 330 -400 370 -400 { lab=A1}
|
||||
N 330 -460 370 -460 { lab=B1}
|
||||
C {ipin.sym} 80 -170 0 0 {name=p1 lab=A}
|
||||
C {opin.sym} 330 -170 0 0 {name=p4 lab=Y}
|
||||
C {bsource.sym} 480 -330 0 1 {name=B1 VAR=V FUNC="'VCC/2*(1+tanh((abs(V(A1)-V(B1))-VCC/2)*100))'"
|
||||
}
|
||||
C {lab_pin.sym} 330 -400 0 0 {name=l2 sig_type=std_logic lab=A1}
|
||||
C {lab_pin.sym} 480 -250 0 0 {name=l3 sig_type=std_logic lab=0}
|
||||
C {res.sym} 580 -400 1 0 {name=R1
|
||||
value=ROUT
|
||||
footprint=1206
|
||||
device=resistor
|
||||
m=1}
|
||||
C {lab_pin.sym} 680 -400 0 1 {name=l5 sig_type=std_logic lab=Y1}
|
||||
C {lab_pin.sym} 140 -170 0 1 {name=l6 sig_type=std_logic lab=A1}
|
||||
C {lab_pin.sym} 270 -170 0 0 {name=l7 sig_type=std_logic lab=Y1}
|
||||
C {parax_cap.sym} 370 -390 0 0 {name=C1 gnd=0 value=8f m=1}
|
||||
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
|
||||
C {ipin.sym} 80 -110 0 0 {name=p2 lab=B}
|
||||
C {lab_pin.sym} 140 -110 0 1 {name=l4 sig_type=std_logic lab=B1}
|
||||
C {lab_pin.sym} 330 -460 0 0 {name=l8 sig_type=std_logic lab=B1}
|
||||
C {parax_cap.sym} 370 -450 0 0 {name=C2 gnd=0 value=8f m=1}
|
||||
C {parax_cap.sym} 630 -390 0 0 {name=C3 gnd=0 value=8f m=1}
|
||||
C {vsource.sym} 110 -170 1 0 {name=V1 value=0}
|
||||
C {vsource.sym} 110 -110 1 0 {name=V2 value=0}
|
||||
C {vsource.sym} 300 -170 1 0 {name=V3 value=0}
|
||||
|
|
@ -0,0 +1,21 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {type=subcircuit
|
||||
format="@name @pinlist @symname ROUT=@ROUT"
|
||||
template="name=x1 ROUT=1000"}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -40 -20 -27.5 -20 {}
|
||||
L 4 35 0 60 0 {}
|
||||
L 4 -40 20 -27.5 20 {}
|
||||
L 4 -25 -30 -5 -30 {}
|
||||
L 4 -25 30 -5 30 {}
|
||||
B 5 57.5 -2.5 62.5 2.5 {name=Y dir=out verilog_type=wire}
|
||||
B 5 -42.5 -22.5 -37.5 -17.5 {name=A dir=in}
|
||||
B 5 -42.5 17.5 -37.5 22.5 {name=B dir=in}
|
||||
A 4 -9.642857142857142 17.85714285714286 48.0818286351295 21.80140948635181 62.65738573560834 {}
|
||||
A 4 -4.6875 -11.25 41.25118369513777 269.5659493678606 74.60789655596687 {}
|
||||
A 4 -65 0 50 323.130102354156 73.7397952916881 {}
|
||||
A 4 -72.5 0 50 323.130102354156 73.7397952916881 {}
|
||||
T {@name} -11.25 -5 0 0 0.2 0.2 {}
|
||||
Loading…
Reference in New Issue