Árpád Bűrmen
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746fd66d90
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Updated devices/*.sym with VACASK syntax (where applicable).
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2025-08-18 12:10:04 +02:00 |
stefan schippers
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46fdeb2fd4
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additions for VACASK backannotation (vsource currents). nmos4.sym updated to support Spectre netlist (Vacask simulation)
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2025-08-02 12:40:43 +02:00 |
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stefan schippers
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5a3c97d64e
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add vccs_limit.sym and vcvs_limit.sym that use the XSPICE limit code model (saturated controlled sources). [WIP] support for spectre netlist format (for the VACASK simulator) - still incomplete
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2025-07-16 00:12:26 +02:00 |
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stefan schippers
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954d10eb25
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better position of Id annotator in nmos4 and pmos4 symbols (close to drain terminal)
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2024-12-20 23:44:40 +01:00 |
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stefan schippers
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c6e63005ba
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remove hide=instance from [np]mos annotated current text
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2024-12-20 23:20:25 +01:00 |
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stefan schippers
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b892ad8ac7
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Make @spice_get_current report Id (drain current) for mos devices (defined as plain mosfets in model (ngspice syntax), may be to extend for Xyce)
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2024-12-20 22:25:19 +01:00 |
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stefan schippers
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20359ed43e
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update license info. Remove unneeded newline saving in version line of .sch/.sym files, remove c89 flag based on lib versions
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2024-11-12 20:23:18 +01:00 |
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stefan schippers
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7d181e43a1
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spice_get_voltage attributes: assume "0" and "GND" equal to 0.0V (not saved by simulator), added vgs and vds showing in nmos4.sym and pmos4.sym if show/hide->show hidden texts enabled
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2024-05-03 12:10:37 +02:00 |
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stefan schippers
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9c750b5044
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add @#pin:spice_get_voltage attribute for pin texts that displays voltage of net attached to pin. remove net_name=... attributes from symbols and instance global attributes since it is no more used. set default value for show_pin_net_names to 1.
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2024-05-02 10:32:12 +02:00 |
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stefan schippers
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94bccc08d9
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do not duplicate empty strings as NULLs in hash tables
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2023-10-09 12:49:11 +02:00 |
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Stefan Frederik
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b1f011f933
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clean up testing @path in symbols
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2022-11-01 13:17:51 +01:00 |
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Stefan Frederik
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b0a88325e7
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"@path" will be expanded in symbols with the hierarchy path, so a fully qualified instance name is obtained with @path@name
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2022-11-01 12:54:43 +01:00 |
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Stefan Frederik
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10114ec838
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add missing braces in update recent file submenu, fix file selector improperly setting main window title, added logic/test_mos_verilog.sch depletion mode verilog example
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2021-11-20 23:44:19 +01:00 |
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Stefan Schippers
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91e74fadcb
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"@#n:net_name" attribute (n = pin name or number) in symbols translates to net name attached to pin. "lab_show.sym" component that shows (does not assign) net name. "highlight=true" attribute can be given on instances in addition to symbols
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2020-09-30 00:30:48 +02:00 |
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Stefan SChippers
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5e8df730a0
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populating xschem git repo
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2020-08-08 15:47:34 +02:00 |